PASSIVE LOSSLESS SNUBBERS FOR HIGH FREQUENCY PWM CONVERTERS Sam Ben-Yaakov and Gregory Ivensky Power Electronics Laboratory Department of Electrical and Computer Engineering Ben-Gurion University of the Negev P. O. Box 653, Beer-Sheva 84105, ISRAEL Tel: +972-7-646-1561; Fax: +972-7-647-2949 Email: [email protected]March 1999 1
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PASSIVE LOSSLESS SNUBBERS FOR HIGHFREQUENCY PWM CONVERTERS
Sam Ben-Yaakov and Gregory Ivensky
Power Electronics LaboratoryDepartment of Electrical and Computer Engineering
Ben-Gurion University of the Negev
P. O. Box 653, Beer-Sheva 84105, ISRAELTel: +972-7-646-1561; Fax: +972-7-647-2949
The major objective: to circulate the trapped energy
• In a lossless manner
• Without increasing the switch and diode stresses• As quickly as possible (Don & Doff limitations)
• Without generating new parasitic effects (of extra
components)
• Inexpensive to implement
Use the followings as check points for comparison
Ipk(switch)
Vmax(switch)
Vmax(diode)
21
General Observation
B
S
C
Lo
DoA
Snubber solution is independent of (PWM) topology if confined to the 'A-B-C' domain
Practical Aspects (1)
Snubber inductor rms current:
B
S
AC
Lo
Do
Ls
• Snubber inductor carries switch plus reverse recovery
currents
22
A
Lo
B
S
CDo
Ls
• Snubber inductor carries diode plus reverse recovery
currents
Practical Aspects (2)
Stirring capacitor's ripple current
B
S
C
Lo
DoA
Cc
B
S
C
Lo
DoA
Cc
B
S
C
Lo
DoA
Cc
(a) (b) (c)
(a) Ripple stirred to 'ground' - in Boost topology
(b) Ripple stirred to output - in Boost topology
23
(c) Ripple stirred to input - in Boost topology
24
Chapter 3
BASICS OF RESONANT NETWORKS
25
Reset of Resonant Elements
At steady-state:
• Volt-Sec of resonant inductor over switching cycle must be
zero
VLrTs∫ dt = 0
• Ampere- Sec of resonant capacitor over switching cycle
must be zero
IC rTs∫ dt = 0
• Sufficient time must be available for reset
• This will cause restriction on duty cycle min & max
Resonant Networks
-the vehicle of Snubbing and Energy Circulation
• Energy circulation in passive lossless snubbers is made
possible by lossless energy exchange of reactive elements
(i.e. C, L)
• When the exchange is between L & C one deals with
resonant phenomena
26
Basic Resonant Network Parameters
C
RLD
V
• Typical equivalent circuit of a lossless snubber
Series resonance R is normally small (to make the snubber "lossless") May or may not include diode Peak current equal or higher than main currents Resonant frequency need to be shorter than
switching frequency
Basic Resonant Network Parameters
CLD
V
i
VCs
Resonant frequency: fr = 1
2 π L C ; ωr=
1LC
; Tr= 2πωr
Characteristic impedance : Zr = LC
27
Ideal LC-network with ideal diode fed by a voltage source Vs
i(0)= Io vC(0)=VCo
C
LS
VVC
s
D
i
i=Vs-VCo
Zr sin(ωrt)+Iocos(ωrt)
vC=(Vs-VCo)[1-cos(ωrt)]+IoZrsin(ωrt)+VCo
VCp=(Vs-VCo)[1-cosψ]+IoZrsinψ+VCo
ψ=tan-1(-IoZr
Vs-VCo)+π ψ<π
If VCo = 0 and Io = 0 ψ=π and VCp = 2 Vs
If VCo < 0 and Io = 0 ψ=π and VCp > 2 Vs
i
tTr
Vco
∆Vc
Vc
Ip
t
Vcp
Vs
Io
2 πψ
28
SOME TRIVIAL CASES
• Linear inductor discharge
L
D
i
Vs +
dI L
dt =VsL ; iL = IL(0) −
VsL
t
Large capacitor acts as Vs
• Linear capacitor discharge
VCIs
dVC
dt =IsL ; vC = VC(0) +
IsC
t
Large inductor acts as Is
29
• Capacitor voltage reversal i(0)=0 vC(0)=VCo
C
LVCo
C
LVCo
Beginning End
Practical Aspects (3)Practical Snubber Components
• Reverse recovery of snubber diodes
L
D
I
Vs +
C
L
I
Vs+
p
Before reset Diode snapped
Parasitic oscillations
Remedy -> Saturable Reactor
30
Practical Aspects (4)
Practical Snubber Components
• ESR of resonant Capacitor
High losses, high temperature
Remedy -> Low ESR capacitors:
Polypropylene
Mica (the best !!)
• Interwinding capacitance of resonant inductor
C p
L i
C p
L i
C p
L i
Parasitic oscillations , high losses, EMI emission
Remedy -> Careful design, toroidal configuration,
good coupling between windings
31
• Printed circuit layout
Parasitic oscillations , high losses, EMI emission
Remedy -> Careful design
Resonant Inductor Design
Typical characteristics
• Low inductance ; Typical range 3µH - 10µH
• High current ; Typical range 1A -30A
Some basic relationships:
Bmax =L I
pkn Ae
; L =n2 µ
oµ
rAe
le
;
∆B =VL∫ dt
n AeL - inductance (H)Ipk - peak inductor current (A)
VL - voltage across inductor (V)
t - time (Sec)
n - number of turnsBmax - limit of magnetic flux density (T)
Ae - effective core area (m2)
le - effective magnetic length (m)
µo - permeability (1.25 10-6 H/m)
µr - relative permeability
32
From above
IpkL = 1
L
Bmax len µo µr
For high IpkL ratios:
• Long le• Small number of turns n• Low relative permeability µr
• Winding window will no be full
Typical Construction
Gap
Ferrite
Ferromagnetic Gap
Ferrite
Toroid based design Lower EMI emission
33
Suggested Design Procedure
1. Choose ∆Bmax based of acceptable losses (mW/gr) from
ferrite data (losses as a function of ∆B and frequency). Use
fr as an indicator but take into account the short period of
snubbing by dividing the data sheet losses by (fr/fs)
2. Estimate V Sec across resonant inductor VL∫ dt or by an
approximation e.g. VL * trr
3. Calculate nAe from the relationship:
n Ae =VL∫ dt
∆Bmax
4. Select wire cross section according to rms current5. Based on calculated nAe and wire size, choose a core for a
single layer winding
6. Gap the core for required L value
Chapter 4
SWITCH TURN-OFF LOSSLESS SNUBBERS
34
35
SWITCH 'TURN OFF' LOSSLESS SNUBBER (SNB1)
The 'One Way' Capacitor : Version 1 [35]
+
VAB
-
A
B
Do
LC1
D2
D1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
+
VAB
-
A
B
C1
D2
D1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
+
VAB
-
A
B
LC1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
Snubbing Reset
• Snubber capacitor C1+C2
• Resonant reset ( C1+C2, L)
36
General Observations (1)
1. Snubbing
+
VAB
-
A
B
C1
D2
D1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
B
S
C
Lo
DoA
Cc
• Prior to 'turn-off', C1 & C2 must be charged to VCB
2. Reset
+
VAB
-
A
B
LC1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
C
LS
VVC
s
D
i
VC= 2 VCB
if C1 = C2 -> VC1 = VC2 = VCB
37
General Observations (2)
+
VAB
-
A
B
Do
LC1
D2
D1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
B
S
C
Lo
DoA
Cc
• Topology independent
t0 t1 t3t2
Vs
is
Vc1
Vgs
iLr
488us 490us 492us 494us 496us 498us 500us
Timev(drain)
500V
0V
i(smain)
2.0A
0A
v(out,vd1)
500Vi(lr)
2.0Av(pulse)
2.0V
0V
0A
-10V
Ipk
IA
Waveforms of SNB1 (simulation)
38
Interval to-t1 Assuming: C1=C2=C
t1-to=Tr2 =π
LC2 ;
iL=iD3=Ipksin(2πt
Tr)
Ipk=VCB
2LC
; iS=IA+iL
vC1=vC2=0.5VCB[1-cos(2πt
Tr)]
Interval t1-t2 iS=IA ; iDo=iD1=iD2=iD3=0
Interval t2-t3 vC1=vC2=VCB-IA2C(t-t2) ;
vC1(t3)=vC2(t3)=0
from which: t3-t2=2CVCB
IA and hence (
dvSdt )
t2-t3=
IA2C
Interval t3-(to+Ts) iDo=IA ; iS=iD1=iD2=iD3=0
Typical Design
Given: VCB, IA, (dvSdt )
t2-t3, Dmin, Dmax
1. C ≥ IA
2(dvSdt )
t2-t3
; 2. t2-3=2CVCB
IA
3. fs ≤ 1-Dmax
t2-3 4. L=
2(Dmin
fs)2
π2C
5. Ipk=VCB
2LC
=> Ipk IA
= π VCB
ton min (dvSdt )
t2-t3
The diodes D1 & D2 must be very fast and have a very low
storage charge.
39
Example:
Assuming: fs≈ 100KHz; ton min ≈ 1µS ; (dvSdt )
t2-t3 ≈ 400V/µS
Ipk IA
= 0.78
Check points
Ipk(switch) = IA + IA π VCB
ton min (dvSdt )
t2-t3
Vmax(switch) = Same as original
Vmax(diode) = Same as original
SWITCH 'TURN OFF' LOSSLESS SNUBBER
The 'One Way' Capacitor : Version 2 (SNB2) [35]
+
VAB
-
A
B
Do
LC1
D2
D1
D3
C2
SgsV
IA Lo+
VCB
-
C
B
Snubber
B
S
C
Lo
DoA
Cc1
Cc2
• Identical to Version 1 (normally drawn differently)
40
SWITCH 'TURN OFF' LOSSLESS SNUBBER (SNB3) [35]
Reset to Input
+
VAB
-
A
B
Do
SgsV
D1
IA Lo
L C1
D2
- +
+
VCB
-
C
B
Snubber
+
-
A
B
SgsV
D1
IA Lo
C1
- +
+
VCB
-
C
B B
S
C
Lo
DoA
Cc
Snubbing
41
+
VAB
-
A
B
SgsV
D1
IA Lo
L C1
D2
- +
+
VCB
-
C
B
C
LVCo
i
Reset 1
VCA > VAB ---> Dmin = 0.5
+
VAB
-
A
B
SgsV
D1
IA Lo
L
D2
+
VCB
-
C
B
Snubber
L
D
i
Vs +
Reset 2
t0 t1 t2t3 t4
Vs
is
488us 490us 492us 494us 496us 498us 500us
Timev(drain)-v(vc1)
400V
-400V
i(dout)
800mA
0A
i(d1)
800mA
0A
v(drain)
500V
0V
i(smain)
1.0A
0A
iD1
iDo
Vc1
Waveforms of SNB3 (simulation)
42
Case VCB-VAB > VAB, i.e. VCB > 2VAB
Interval to-t1 iL=iD2=Ipksin(2πt
Tr)
whereTr=2π LC1
Ipk=VCB-VAB
LC1
iS=IA+iL
vC1=(VCB-VAB)cos(2πt
Tr)
t1 is found from the condition:(vC1)t1=-VAB
t1=Tr
2πcos-1(
VABVCB-VAB
)
Interval t1-t2 iL=iD1=iD2=Ipksin(2πt1Tr
)-VAB
L (t-t1)
t2-t1 is foundfrom the condition: (iL)t2=0
t2-
t1=IpkLsin(2π
t1Tr
)
VAB
iA=IAo-iLInterval t2-t3 iS=IA ; iDo=iD1=iD2=0
Interval t3-t4 iS=iDo=iD2=0
vC1=-VAB+IAoC1
(t-t3)
t4-t3 is found from the
condition:
43
(vC1)t4=VCB-VAB
t4-t3=C1VCB
IAo
Interval t4-(to+Ts) iS=iD1=iD2=0 ;
iDo=IAo
44
Typical Design
Given: VCB, ILo, (dvSdt )
t3-t4, Dmin ≥ 0.5, Dmax
1. C1 ≤ \f(ILo,(\f(dvS,dt))t3-t4
) ; 2. t3-4 =\f(C1VCB,ILo)
; 3. fs≤1-Dmax
t3-4 ;
4. L≈(Dmin
fs)2
π2C1 (assumption: iL has a sine waveform not only
during interval to-t1 but also during
t1-t2)
5. Ipk=VCBDmax
LC1
Check points
Ipk(switch)=ILo+πDmaxVCBILo
ton min(dvSdt )
t3-t4
(no free lunch)
Vpk(switch) = Same as original
Vpk(diode) = Same as original
Limitation: VAB ≤ VCB
2
In Boost Power Factor, hard switching when Vin ≥ Vo2
45
Applying snubber SNB3 in a flyback converter [6, 26, 28]
oCoR
inV+
-
1D
C
2D
L
S
oD
rT
1n2n-
+
SNUBBER
oV
oC'
oD
oR-
+
inV+
-
1D
C
2D
LS
lkgL
mLoV''
+-
Basic topology Equivalent circuit
Lm - output transformer magnetizing inductance
Llkg - output transformer leakage inductance
C - snubber capacitance
L - snubber inductanceRo' - reflected load resistance
Co' - reflected capacitance of the output filter
S - switching transistorDo - output diode
D1, D2- snubber diodes
V in - input voltage
Vo' - reflected output voltage
46
Equivalent circuit at different time intervals
oC'oR-
+
inV+
-
S
lkgL
mL'
oC'oR-
+
-
+
S
lkgL
mL'
1D
C
+-
lkgi
inV
1. ON 2. Snubbing 1
oD
-
+
C
lkgL
mL
+-
oV'oC'oR
+
-
1D
S
'
inV 1D
-
+
lkgL+ -
oV'
i
C
3. Snubbing 2
47
oC'
oD
oR-
+ mL'
4. OFF
oC'
oD
oR-
+
inV+
-
C
2D
LS
lkgL
mLoV''
+ -
5. Resonant reset - ZCS at 'turn on' by Llkg !!
oC'
oD
oR-
+
inV+
-
C
2D
LS
lkgL
mLoV''
+ -
inV+
-
C
2D
LS
lkgL
mL
+ -
1D
6 Inductor discharge
48
General Observation
1. Switch maximum voltage (Vs pk)
oD
-
+
C
lkgL
mL
+-
oV'oC'oR
+
-
1D
S
'
inV 1D
-
+
lkgL+ -
oV'
i
C
Capacitor's initial voltage --> VC(0) = Vin
Capacitor maximum voltage --> VCpk > 2 Vo' +Vin
additional voltage contributed by energy removed from Llkg
Switch maximum voltage --> Vs pk > 2 (Vin +Vo')
Advantages
• The snubber is simple and inexpensive [28]
• The operational duty cycle range is wider than in the
case when this snubber is used in a boost converter
Disadvantage
• High voltage stress on the transistor Vs pk
49
Reverse recovery of snubber diode
oD
-
+
C
lkgL
mL
+-
oV'oC'
oR
+
-
1D
S
'
inV oD
-
+
C
lkgL
mL
+-
oV'oC'oR
+
-
1D
S
'
inV
Resonant reset Reverse recovery
oC'
oD
oR-
+
C
+ -inV
+
-
2D
L
lkgL
mL'
Linear discharge
• Loss of C charge
• C must retain a voltage of at least Vin for proper ZVS at
'turn-off'
50
Applying snubber SNB3 in a forward converter [40]
oCoR
1D
inV+
-C
2D
L
S
3D SNUBBER
oV+
- 4D
L1
Same advantages and disadvantages as for the flyback
converter case:
- the snubber is simple and inexpensive
- high voltage stress Vs pk on transistor.
Vs pk = Vin+VCp
where
VCp= LmIm2+LlkgISp2
CLm - magnetizing inductance of the transformer
Llkg - primary leakage inductance
Im - magnetizing current of the transformer
Is pk - switch current in the moment when the switch is
turned off
Experimental results [40]1) Vin=17V; Pout=17W; D=2/3; Vs pk=52V
2) Vin=34V; Pout=36W; D=1/3; Vs pk=88V
51
A switch "turn-off" lossless snubber for a boostconverter [30]
(SNB4)
oD+
oC oRoL+
-SinV C
1D
2D
L
oV
B
S
C
Lo
DoA
Cc
Snubber elements:
L - the resonant inductor
C - the resonant capacitorD1, D2 - snubber diodes
No common ground !
Equivalent circuits for different time intervals
+
oC oR
oVoL
+
-
SinV
Loi s= i
t1-t2 ON
52
53
oD+
oC oRoL+
-
SinV C
2D
oV
+
-Loi c=i
t2-t3 , snubbing
dvSdt =
iLoC ZVS!
vDo(t) = vC(t)-Vo
vC(t3) =Vo vDo(t3)=0
oD+
oC oRoL+
-
inV
oV
t3-t4 OFF
54
Loi
si
+
oC oR
oL
+
-
SinVC
1D
2D
L
oV
ci
+-
t4-t5 , reset
vC(t4)=Vo iL= iC =V inZr
sin(ωrt)
ωr= 1LC
Zr = LC
iS=iLo+iC ISp=ILo+V inZr
vC(t5)=vD2(t5)=0
+
oC oRoL+
-
SinV
1D
2D
L
oV
iL
t5-t6, linear discharge
55
iL(t) = iD1(t) = iL(t5) - Vo-Vin
L (t-t5)
iL(t6)=iD1(t6)=0
56
A switch "turn-off" lossless snubber for a boostconverter [30]
(SNB4)Advantages
• Soft switching at turn off. Efficiency was reported to
increase by 5% to 97% [30] .
Disadvantage
• Reverse recovery problems of diodes Do, D1, and D2
• High current stress of main switch during the interval t4 - t5
• No common ground between input and output
Chapter 5
SWITCH TURN-ON AND DIODE TURN-OFF SNUBBERS
57
SWITCH 'TURN ON' AND DIODE 'TURN OFF' SNUBBER
[35,39]
FLYBACK RESET SNUBBER (energy recovery via a catch
winding)
Lo
SgV
L1
D
Do
1:N
A
B
C
IA
IS
ID
Lo
SgV
L1
D
Do
1:N
A
B
C
IA
IS
ID
Version 1 (SNB5) Version 2 (SNB6)
Lo
SgV
L1
Do
1:N
A
B
C
IA
I S
B
S
AC
Lo
Do
Ls
Snubbing
58
Lo
SgV
D
Do
1:N
A
B
C
IA
ID
L
D
I
Vs +
Reset
Practical Aspects (5)
Lo
SgV
B
L1
D
Do
1:N
A C
IA
IS
ID
Llkg
Beware of leakage inductance
Not practical for HF high power levels
59
t0 t1 t3t2
Vs
is
iD
V gs
488us 490us 492us 494us 496us 498us 500us
Timev(drain)
1.0KV
0V
i(smain)
5.0Ai(d1)
4.0A
0A
v(vd1,out)-1.2KV
0.1KVv(pulse)
2.0V
0V
VD
0A
Waveforms of SNB5 (simulation)
Analysis: Version 1 (SNB5)
Interval to-t1 iS=VCBt
L1
t1-to is found from the
condition: iS(t1)=IA
from where
t1-to=L1IAVCB
VDo max=VCB(1+N)
Interval t2-t3 iD=IAN -
VCBN2L1
(t-t2)
t3-t2 is found from the
condition: iD(t3)=0
t3-t2=IAL1NVCB
; VS
max=VCB(1+1N)
60
t3-t2=\f(IAL1N,VCB) ; fs
max=1-Dmax
t3-t2
VS max=VCB(1+1N) ; VDo
max=VCB(1+N)
The lower N, the shorter is t3-t2 and hence the higher is the
upper limit of the switching frequency fs max. The lower N, the
higher is VS max. The voltage across the main diode Do is high
when N is high.
A major disadvantage of the converter is the leakage
inductance between the primary and secondary of the coupled
inductor : it will cause a large voltage spike across the switch.
Beware of reverse recovery problems of the auxiliary diode D.
FLYBACK RESET SNUBBER Version 1 (SNB5)
Typical Design
Given: VCB, IA, (diSdt )
to-t1, Dmin, Dmax
1. L1 ≤ VCB
(diSdt )
to-t1
; 2. t1-0=L1IAVCB
; 3. fs ≤ Dmint1-0
4. t2-3 ≤ 1-Dmax
fs ; 5. N=
VCBt2-3L1IA
; 6. VS max=VCB(1+1N)
7. VDo max=VCB(1+N)
Check points
61
Ipk(switch) = IA
Vmax(switch) = VCB (1+\f(1,N)) =VCB \b\bc(1+IA
toff min(disdt ) t0-t1
)
Vmax(diode) = VCB (1+N) =VCB \b\bc(1+ \f(toff
min(disdt )t0-t1,IA))
LOW STRESS 'TURN ON' SNUBBER (SNB7) [17, 24]
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
A
Lo
B
S
CDo
Ls
Q - Main switchDout - Main diode
D1,D2 - Auxiliary diodes
Ls, Cs - Resonant network
Basic waveforms of lossless snubberInterval t0-t1
62
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
IRR
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
63
Interval t1-t2
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
CsV+-
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
Interval t2-t3
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
CsV+-
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
64
Interval t3-t4
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
CoVin
-
CsVCs +
-
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
Interval t4-t5
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
CsV+-
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
65
Interval t5-t6
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
CsV
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
Practical requirement of peak reverse recovery current - IrmIf Irm < Iin
+
Dout
D2D1
Iin
Lm Ls
QgsV
Ro
Vout
Co
CsVin
-
CsV
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1 t2 t3 t4
t5t0
I in
I in
I in
IrmIrm
To avoid the above undesired condition Irm > Iin
66
The coupled inductor realization
Vout+ L1
CsRoCo
Dout
D1 D2Q-
LsLm
1 : n
Vin+-
gsV
Dout - Main diode
D1, D2 - Auxiliary diodes
Ls, Cs - Resonant network
Lm, L1 - Coupled inductors
n - turn ratio
Simplified equivalent circuits of the resonant elements with
coupling inductor
LsCs
Vcpl on
D1
LsCs
D1
Vcpl off++ --
Vcpl on= nVin
Vcpl off = n
1+n (Vout - Vin)
67
Basic waveforms of the lossless snubberwith coupling inductor
I (Ls)
I (D2)
I (D1)
Vgs
I (Dout)
V (Cs)
Timet1t2 t3 t4 t5 t6t0
I in
I in
I in
I in
Irm
VCs(t3) is larger and therefore t3-4 is smaller
68
Components Stress
Transistor
or diode Current stress
Current
stress
instance
or interval
Voltage stress
Voltage
stress
instance
or interval
Q Iin+Irm t1 Vout t3-t4
Do
Iin Irm
t5-t6t1
Vout +VCmax t2
D1 Irm2 +
Vcpl on2CsLs
t1<te<t2 Vout -Vcpl on t0-t1
D2 Iin t3-t5 Vout t1-t2
Irm = (Vout+Vcpl on)trm
Lstrm ≈ trr trr =
formal reverse recovery time
V cpl on = nVin = n(1-D)Vout
D = tonTs
VCmax = IrmLsCs
sin(ωrt1-2)+Vcpl on [1- cos(ωrt1-2)]
ωrt1-2 = tan-1(- Irm
LsCs
V cpl on) +π
69
An experimental 1kW Boost converter
Vout+ L1
CsRoCo
Dout
D1 D2Q-
LsL0
1 : n
Vin+-
gsV
Q - IRF460Dout - MUR860 trr = 60nsec.
D1, D2 - MUR460
Ls - 3uH Cs - 100nF
n=1/7
Operational conditionsFs - 100KHz Pout - 1000W
Vin - 200V Vout - 400V
Iin - 5.8A D - 0.5
Typical waveforms of the experimental Boost converter