REAL TIME ECG & BODY TEMPERATURE MONITORING DEVICE MINI PROJECT REPORT Submitted by DILEEP DINESH ELDHO JOSE LADVINE D ALMEIDA NIDHISH ROY VIVEK K HARIDAS In partial fulfillment for the award of degree of BACHELOR OF TECHNOLOGY IN ELECTRONICS AND BIOMEDICAL ENGINEERING MODEL ENGINEERING COLLEGE Thrikkakara Cochin University of Science and Technology
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REAL TIME ECG & BODY TEMPERATURE
MONITORING DEVICE
MINI PROJECT REPORT
Submitted by
DILEEP DINESH
ELDHO JOSE
LADVINE D ALMEIDA
NIDHISH ROY
VIVEK K HARIDAS
In partial fulfillment for the award of
degree of
BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND BIOMEDICAL
ENGINEERING
MODEL ENGINEERING COLLEGE
Thrikkakara
Cochin University of Science and Technology
GOVERNMENT MODEL ENGINEERING COLLEGE
THRIKKAKARA
KOCHI
DEPARTMENT OF ELECTRONICS AND
BIOMEDICAL ENGINEERING
Cochin University of Science and Technology
BONAFIDE CERTIFICATE
This is to certify that the Mini Project entitled
………………………………………………………………….
Submitted by ………………………………………………………………………………………… ………………………………………………………………………………………… ………………………………………………………………………………………… …………………………………………………………………………………………
is a bonafide work done by him/her under our supervision
Dr.Jessy John Mrs.Vijayalakshmi k Ms.Nisha Krishnan
HEAD OF THE CO-ORDINATOR GUIDE
DEPARTMENT
ACKNOWLEDGEMENT
At this moment of accomplishment, we are presenting our work with great
pride and pleasure, we would like to express our sincere gratitude to all those who
helped us in the successful completion of our venture. First of all, we would like to
thank our Principal Prof. Dr.TK MANI who provided us with all facilities and
amenities for the development of our project.
We would like to thank Dr. Jessy John, Head of Department of Electronics and
Biomedical Engineering for helping us in the successful accomplishment of our
project.
We are exceedingly grateful to our project coordinator, Mrs. Vijayalakshmi K,
Asst. Professor, Dept. of Electronics and Biomedical Engineering for her timely and
valuable suggestions.
We would also like to thank our project guide Ms. Nisha Krishnan, Faculty staff
who gave us constant guidance and support throughout this journey of turbulence.
We also sincerely thank Mrs. Bella, Medical electronics lab-in-charge and Mrs.
Geethu and Mrs.Vidhya, Lab Technicians, Department of Electronics and
Biomedical for their constant support and encouragement for our project.
Above all we thank God almighty for constantly motivating us with His love, and
giving us courage at each stride to step forward with confidence and self – belief.
I
ABSTRACT
Our project aims at ECG Acquisition and temperature monitoring in medical field.
An ECG is a test that records the activity of the heart over time. Each portion
of the ECG waveform can hint whether the patient is in good health or else. ECG
signal are usually very small(approximately1mV) and therefore prone to interferences
The problem within the ECG among the existing processes for patients ECG
monitoring requires a great deal of effort to collect and analyze information
introducing a latency that prevents real-time analysis and use by a common person.
We propose a solution to automate this process by acquiring the ECG and
temperature, analyzing the information based on PR, QRS,ST intervals and amplitude
and providing different information to person based on it such as health status,
measurements etc. on a LCD screen.
The device is aimed at a common person to get current heart
condition and temperature .Moreover, the device is portable.
II
TABLE OF CONTENTS
SL NO TOPIC PAGE NO
1. INTRODUCTION 1
2. LITERATURE REVIEW 2
3. RELATEDTHEORIES
3.1 CARDIAC CONDUCTION PROCESS 3
3.2 ECG 4
3.3 WAVEFORM 5
3.4 ECG LEADS 6
3.4.1 ECG STANDARD LIMB LEADS 7
3.4.2 EINTHOVANS TRIANGLE 8
3.5 CARDIAC ARRHYTHMIAS 9
3.6 DURATION AND DISEASES
ASSOCIATED WITH ECG 10
3.7 BODY TEMPERATURE 11
4. DESIGN OF THE WORK
4.1 BLOCK DIAGRAM OF CIRCUIT 12
4.2 BLOCK LEVEL TREATMENT 13
III
4.2.1 ECG ACQUISITION BLOCK 13
4.2.2 TEMPERATURE SENSING 13
4.3 CIRCUIT LEVEL DESCRIPTION
4.3.1 INSTRUMENTATION AMPLIFIER 14
4.3.2 LOW PASS FILTER 17
4.3.3 HIGH PASS FILTER 18
4.3.4 RL DRIVE CIRCUIT 20
4.3.5 MICROCONTROLLER 20
4.4 FLOWCHARTS AND CIRCUITS 22
5. IMPLEMENTATION
5.1 SYSTEM REQUIREMENTS 26
5.2 HARDWARE REQUIREMENTS 26
5.3 SOFTWARE REQUIREMENTS 26
5.4 FULL CIRCUIT DIAGRAM 27
6. RESULT AND CONCLUSION 28
7. FUTURE WORKS 29
APPENDIX A PROGRAMS 30
REFERENCES 53
APPENDIX B DATA SHEETS 54
III
LIST OF FIGURES
SL NO: TOPIC PAGE NO
Fig 3.1 ECG Waveform 4
Fig 3.2 ECG Waveform Showing
Various Segments 5
Fig 3.3 Waveform Of Standard
Limb Leads 7
Fig3.4 Standard Limb Leads 7
Of ECG
Fig 3.5 Einthoven’s Triangle 8
Fig 4.1 Full Block Diagram 12
Fig 4.2 ECG Acquisition Block 13
Fig 4.3 Temperature Sensing Block 13
Fig 4.4 ECG Acquisition Block 14
Fig 4.5 Instrumentation Amplifier 15
Fig 4.6 Graphics LCD Circuit 23
Fig 4.7 Temperature Sensing Circuit 25
III
LIST OF ABBREVATIONS ECG- Electrocardiogram Rl-Right Leg LCD- Liquid Crystal Display GLCD- Graphical Liquid Crystal Display
III
CHAPTER 1
Introduction
An ECG (electrocardiogram) is a test that measures the electrical activity of the
heart. The heart is a muscular organ that beats in rhythm to pump the blood through the
body. The signals that make the heart's muscle fibers contract come from the Sino atrial
node, which is the natural pacemaker of the heart. In an ECG test, the electrical impulses
made while the heart is beating are recorded and usually shown on a piece of paper. This
is known as an electrocardiogram, and records any problems with the heart's rhythm, and
the conduction of the heart beat through the heart which may be affected by underlying
heart disease.ECG signals are usually small, approximately 1mV and therefore, it is
prone to corruption by various noises; power line interference, electrode contact noise,
motion artifacts. Also, it is necessary to design a good filter system that can filter out the
noises from the ECG signal in order to get better result. Therefore, measuring an ECG
signal is not an easy task to achieve.
The ECG signals are captured by the electrode sensors, and then it is amplified by
the instrumentation amplifier and precision amplifier. The gain achieved by cascading the
amplifiers must be equal or greater than1000 in order to achieve the desired signal output.
However, the noises may still interfere with the signal. Therefore, it is necessary to
design a band-pass filter (BPF) circuit where the low-pass circuit (LPF) will eliminate the
high-frequency noises and the high-pass circuit (HPF) will eliminate the direct current
(DC) noise components.
An operational amplifier will be used to invert the common noise voltage and
drive it back to the right leg of the patient which is considered the ground, in order to
cancel the interference.
1
CHAPTER 2
Literature Review
Initial research was conducted to determine the types of vital signs of heart and
arrhythmias and also body temperature that are routinely measured during a visit to a
doctor. As part of the project, it is necessary to find, design and build suitable electrodes
and temperature sensors. Then, the market demand for this type of device was determined
and research on similar monitoring devices that are currently sold was performed.
Major disadvantages with these devices are that they are not very easy to use,
somewhat intrusive, and, of course, very expensive. The main problem facing on GLCD
plotting and analysis ECG signal without MAT lab.
To measure the electrocardiogram (ECG), this project uses three Unipolar leads,
placed in Einthoven’s triangle configuration. Lead I, Lead II, and Lead III are used. This
method works accurately for the scope of this project as it is geared towards older
individuals who are less active.
Next, different types of temperature sensors were compared. It was determined
that the most effective way of measuring body temperature is by using a LM35. The
advantages and disadvantages of the temperature sensor is provided in block level
description of temperature sensing circuit.
2
CHAPTER 3
Related Theories
The heart is a four-chambered organ consisting of right and left halves. Two of
the chambers, the left and right atria, are entry-points into the heart, while the other two
chambers, the left and right ventricles, are responsible for contractions that send the blood through the circulation. The circulation is split into
the pulmonary and systemic circulation. The role of the right ventricle is to pump deoxygenated blood to the lungs through the pulmonary trunk and pulmonary arteries.
The role of the left ventricle is to pump newly oxygenated blood to the body through the
aorta.
3.1 Four Steps Of Cardiac Conduction: Step 1: Pacemaker Impulse Generation:
The sinoatrial (SA) node (also referred to as the pacemaker of the heart) contracts
generating nerve impulses that travel throughout the heart wall. This causes both atria to
contract. The SA node is located in the upper wall of the right atrium. It is composed of
nodal tissue that has characteristics of both muscle and nervous tissue. Step 2: AV node Impulse Conduction: The atrioventricular (AV) node lies on the right
side of the partition that divides the atria, near the bottom of the right atrium. When the
impulses from the SA node reach the AV node they are delayed for about a tenth of a
second. This delay allows the atria to contract and empty their contents first. Step 3: AV Bundle Impulse Conduction: The impulses are then sent down the
atrioventricular bundle. This bundle of fibres branches off into two bundles and the
impulses are carried down the centre of the heart to the left and right ventricles. Step 4: Purkinje fibres impulse conduction: At the base of the heart the
atrioventricular bundles starts to divide further into purkinje fibers. When the impulse
reaches these fibers they trigger the muscle fibers in the ventricles to contract.
The electrocardiogram (ECG) is a diagnostic tool that measures and records the
electrical activity of the heart in detail. Being able to interpretate these details allows
diagnosis of a wide range of heart problems. The ECG records the electrical activity and
depicts it as a series of graph-like tracings, or waves. The shapes and frequencies of these
tracings reveal abnormalities in the heart's anatomy or function.
Fig 3.1 ECG waveform
The EKG can provide important information about the patient's heart rhythm, a
previous heart attack, increased thickness of heart muscle, signs of decreased oxygen
delivery to the heart, and problems with conduction of the electrical current from one
portion of the heart to another.
There are no risks. No electricity is sent through the body, so there is no risk of
shock. The accuracy of the ECG depends on the condition being tested. A heart problem
may not always show up on the ECG. Some heart conditions never produce any specific
ECG changes.
4
3.3 Waveforms:
The ECG records the electrical activity that results when the heart muscle cells in the atria and ventricles contract.
Atrial contractions show up as the P wave.
Ventricular contractions show as a series known as the QRS complex.
The third and last common wave in an ECG is the T wave. This is the electrical
activity produced when the ventricles are recharging for the next contraction
(repolarizing).
Interestingly, the letters P, Q, R, S, and T are not abbreviations for any actual
words but were chosen many years ago for their position in the middle of the
alphabet.
The electrical activity results in P, QRS, and T waves that are of different sizes
and shapes. When viewed from different leads, these waves can show a wide
range of abnormalities of both the electrical conduction system and the muscle
tissue of the hearts 4 pumping chambers.
Fig 3.2 ECG waveform showing various segments
P Wave: represents atrial depolarization -the time necessary for an electrical impulse
from the sinoatrial (SA) node to spread throughout the atrial musculature.
Under normal conditions, electrical activity is spontaneously generated by the SA
node, the physiological pacemaker. This electrical impulse is propagated throughout the
5
right atrium, and through Bachmann's bundle to the left atrium, stimulating the
myocardium of both atria to contract. The conduction of the electrical impulse throughout
the left and right atria is seen on the ECG as the P wave.
Location: Precedes QRS complex. Amplitude: Should not exceed 2 to 2.5 mm in
height.
Duration: 0.06 to 0.11 seconds. P-R Interval: represents the time it takes an impulse to travel from the atria through the AV node, bundle of His, and bundle branches to the Purkinje fibres.
Location: Extends from the beginning of the P wave to the beginning of the QRS
complex.
Duration: 0.12 to 0.20 seconds. QRS Complex: represents ventricular depolarisation. The QRS complex consists of 3 waves: the Q wave, the R wave, and the S wave.
The Q wave is always located at the beginning of the QRS complex. It may or
may not always be present.
The R wave is always the first positive deflection.
The S wave, the negative deflection, follows the R wave 2.
Amplitude: Normal values vary with age and sex Duration: No longer than 0.10 seconds Q-T Interval: represents the time necessary for ventricular depolarization and repolarisation.
Location: Extends from the beginning of the QRS complex to the end of the T
wave (includes the QRS complex, S-T segment, and the T wave) Duration: Varies according to age, sex, and heart rate. T Wave: represents the repolarisation of the ventricles. On rare occasions, a U wave can
be seen following the T wave. The U wave reflects the repolarisation of the His-Purkinje
fibres.
Location: Follows the S wave and the S-T segment. 3.4 ECG leads:
The three types of ECG leads are :
6
Limb Leads (Bipolar)
Augmented Limb Leads (Unipolar)
Chest Leads (Unipolar)
Some of the ECG leads are bipolar leads(e.g., standard limb leads) that utilize a single
positive and a single negative electrode between which electrical potentials are measured.
Unipolar leads (augmented leads and chest leads) have a single positive recording
electrode and utilize a combination of the other electrodes to serve as a composite
negative electrode. Normally, when an ECG is recorded, all leads are recorded
simultaneously, giving rise to what is called a 12-lead ECG.
Fig 3.3 waveform of standard limb leads 3.4.1 Electrocardiogram Standard Limb Leads (Bipolar): There are three of these leads, I, II and III. Lead I: is between the right arm and left arm electrodes, the left arm being positive. Lead
II: is between the right arm and left leg electrodes, the left leg being positive. Lead III: is
between the left arm and left leg electrodes, the left leg again being positive.
Fig 3.4 standard limb leads of ECG
7
Lead I has the positive electrode on the left arm, and the negative electrode on the right
arm, and therefore measures the potential difference between the two arms. In this and
the other two limb leads, an electrode on the right leg serves as a reference electrode for
recording purposes. Lead II configuration, the positive electrode is on the left leg and the negative electrode
is on the right arm. Lead III has the positive electrode on the left leg and the negative electrode on the left
arm. These three bipolar limb leads roughly form an equilateral triangle (with the heart at
the centre) that is called Einthoven's triangle in honour of Willem Einthoven who
developed the electrocardiogram in 1901. Whether the limb leads are attached to the end
of the limb (wrists and ankles) or at the origin of the limb (shoulder or upper thigh)
makes no difference in the recording because the limb can simply be viewed as a long
wire conductor originating from a point on the trunk of the body. 3.4.2Einthovan’s Triangle
Fig 3.5 Einthoven triangle
8
An equilateral triangle whose vertices lie at the left and right shoulders and the
pubic region and whose center corresponds to the vector sum of all electric activity
occurring in the heart at any given moment, allowing for the determination of the
electrical axis. Einthoven's triangle is approximated by the triangle formed by the axes of
the bipolar electrocardiographic (ECG) limb leads I, II, and III. The centre of the triangle
offers a reference point for the Unipolar ECG leads. 3.5 Cardiac Arrhythmias: Arrhythmia is a irregular rhythm of heart. Bradycardia:
A slow rhythm, (less than 60 beats/min), is labelled Bradycardia. This may be
caused by a slowed signal from the sinus node (termed sinus Bradycardia), a pause in the
normal activity of the sinus node (termed sinus arrest), or by blocking of the electrical
impulse on its way from the atria to the ventricles (termed AV block or heart block).
Heart block comes in varying degrees and severity. It may be caused by reversible
poisoning of the AV node (with drugs that impair conduction) or by irreversible damage
to the node. Bradycardias may also be present in the normally functioning heart of
endurance athletes or other well-conditioned persons. Tachycardia:
In adults and children over 15, resting heart rate faster than 100 beats/minute is
labelled tachycardia. Tachycardia may result in palpitation, however, tachycardia is not
necessarily an arrhythmia. Increased heart rate is a normal response to physical exercise
or emotional stress. This is mediated by the sympathetic nervous system on the sinus
node, and is called sinus tachycardia. Other things that increase sympathetic nervous
system activity in the heart include ingested or injected substances such as caffeine or
amphetamines, and an overactive thyroid gland (hyperthyroidism).
Tachycardia that is not sinus tachycardia usually results from the addition of
abnormal impulses to the normal cardiac cycle. Abnormal impulses can begin by one of
three mechanisms: automaticity, re-entry or triggered activity. A specialised form of re-
entry problem is termed fibrillation.
9
3.6 Duration And Diseases Associated With Ecg
PR Interval
(Measured from beginning of P to beginning of QRS in the frontal plane)
Normal: 0.12 - 0.20s Short PR: < 0.12s Preexcitation syndromes:
WPW (Wolff-Parkinson-White) Syndrome: An accessory pathway
(called the "Kent" bundle) connects the right atrium to the right
ventricle (see diagram below) LGL (Lown-Ganong-Levine): An AV nodal bypass track into the His bundle
exists, and this permits early activation of the ventricles without a delta-wave
because the ventricular activation sequence is normal. Prolonged PR: >0.20s First degree AV block (PR interval usually constant)
Intra-atrial conduction delay (uncommon)
Slowed conduction in AV node (most common site)
Slowed conduction in His bundle (rare)
Slowed conduction in bundle branch (when contra lateral bundle is
blocked) Second degree AV block (PR interval may be normal or prolonged; some P waves
do not conduct)
Type I (Wenckebach): Increasing PR until nonconductor P wave occurs
Type II (Mobitz): Fixed PR intervals plus nonconductor P waves AV dissociation: Some PR's may appear prolonged, but the P waves and QRS
complexes are dissociated (i.e., not married, but strangers passing in the night). QRS Duration (Duration of QRS complex in frontal plane): Normal: 0.06 - 0.10s Prolonged QRS Duration (>0.10s):
This stage is used to acquire the ECG signal from the body using electrodes. It
consist of an instrumentation amplifier stage used to provide an initial gain to the signal
& is made using IC LM324. it is followed by a band pass filter which is used to remove
50hz power line interference & other unwanted noise from the signal. This stage is
followed by a differential amplifier stage made from IC LM324 which provides the final
amplification required for the signal. This signal is given to PIC & is then displayed using
a graphical display. 4.2.2 Temperature Sensing Block
Fig 4.3Temperature sensing block
The LM35 series are precision integrated-circuit temperature sensors, whose
output voltage is linearly proportional to the Celsius (Centigrade) temperature. The LM35 thus
has an advantage over linear temperature sensors calibrated in ° Kelvin, as the user is not
required to subtract a large constant voltage from its output to obtain convenient
13
Centigrade scaling. The LM35 does not require any external calibration or trimming to
provide typical accuracies of ±¼°C at room temperature and ±¾°C over a full -55 to
+150°C temperature range. Low cost is assured by trimming and calibration at the wafer
level. The LM35's low output impedance, linear output, and precise inherent calibration
make interfacing to readout or control circuitry especially easy. It can be used with single
power supplies, or with plus and minus supplies. As it draws only 60 µA from its supply,
it has very low self-heating, less than 0.1°C in still air. The LM35 is rated to operate over
a -55° to +150°C temperature range, while the LM35C is rated for a -40° to +110°C
range (-10° with improved accuracy). The LM35 series is available packaged in hermetic
TO-46 transistor packages, while the LM35C, LM35CA, and LM35D are also available
in the plastic TO-92 transistor package. The LM35D is also available in an 8-lead surface
mount small outline package and a plastic TO-220 package.
4.3 Circuit Level Description
Fig 4.4 ECG acquisition circuit
4.3.1 Instrumentation Amplifier
As suggested before, it is
the amplifier circuit without having
necessary with the previous
beneficial to be able to adjust the gain of
to change more than one resistor value, as is design of differential amplifier. The so-
14
called instrumentation builds on the last version of differential amplifier to give us that
capability:
Fig 4.5 Instrumentation amplifier
This intimidating circuit is constructed from a buffered differential amplifier stage
with three new resistors linking the two buffer circuits together. Consider all resistors to
be of equal value except for Rgain. The negative feedback of the upper-left op-amp
causes the voltage at point 1 (top of Rgain) to be equal to V1. Likewise, the voltage at
point 2 (bottom of Rgain) is held to a value equal to V2. This establishes a voltage drop
across Rgain equal to the voltage difference between V1 and V2. That voltage drop causes
a current through Rgain, and since the feedback loops of the two input op-amps draw no
current, that same amount of current through Rgain must be going through the two "R"
resistors above and below it. This produces a voltage drop between points 3 and 4 equal
to:
15
The regular differential amplifier on the right-hand side of the circuit then takes
this voltage drop between points 3 and 4, and amplifies it by a gain of 1 (assuming again
that all "R" resistors are of equal value). Though this looks like a cumbersome way to
build a differential amplifier, it has the distinct advantages of possessing extremely high
input impedances on the V1 and V2 inputs (because they connect straight into the
noninverting inputs of their respective op-amps), and adjustable gain that can be set by a
single resistor. Manipulating the above formula a bit, we have a general expression for
overall voltage gain in the instrumentation amplifier:
(4.2)
Though it may not be obvious by looking at the schematic, we can change the
differential gain of the instrumentation amplifier simply by changing the value of one
resistor: Rgain. Yes, we could still change the overall gain by changing the values of
some of the other resistors, but this would necessitate balanced resistor value changes for
the circuit to remain symmetrical. Please note that the lowest gain possible with the
above circuit is obtained with Rgain completely open (infinite resistance), and that gain
value is 1.Now use instrumentation amplifier with LM324.the advantage is that working
on single supply such as 5V.
Design Instrumentation Amplifier Stage
Total Gain= 110
Gain of first stage, A1= 11
Gain of second stage, A2= 10
Atotal= (1+2R4/R5)(-Rf/R1)
Let R4= 100k therefore R5= 20k
Let R1= 100k we get Rf= 1M
16
4.3.1. a Features of Lm324 LM324 is a low power quad operational amplifier, it has these features: 1. Internally frequency compensated for unity gain 2. Large DC voltage gain 100 dB 3. Wide bandwidth (unity gain) 1 MHz (temperature compensated) 4. Wide power supply range: Single supply 3V to 32V . 5. Very low supply current drain (700 µA)-essentially independent of supply voltage 6. Low input biasing current 45 nA (temperature compensated) 7. Low input offset voltage 2 mV and offset current: 5 nA 8. Input common-mode voltage range includes ground 9. Differential input voltage range equal to the power supply voltage 10. Large output voltage swing 0V to V+ – 1.5) 4.3.2 Lowpass Filter
A low pass filter is an electronic circuit that passes low frequency
signals but attenuates (reduces the amplitude of) signals with frequencies higher than the cutoff frequency. The actual amount of attenuation for each frequency varies from
filter to filter. It is sometimes called a high-cut filter, or treble cut filter when used in
audio applications. Normally we using second order low pass filter for eliminating noise
from the ECG signal. second order Butterworth design follows the circuit design. As with
low-pass filters, high-pass filters have a rated cutoff frequency, above which the output
voltage increases above 70.7% of the input voltage. Just as in the case of the capacitive low-pass filter circuit, the capacitive high-pass filter's cutoff frequency can be foun with
A Driven Right Leg Circuit or ―DRL‖ circuit is an electric circuit that is often
added to biological signal amplifiers to reduce Common noise. Biological signal
amplifiers such as EKG (Electrocardiogram) EEG (Electroencephalogram) or EMG
circuits measure very small electrical signals emitted by the body, often as small as
several micro-volts (millionths of a volt). Unfortunately, the patient's body can also act
as an antenna which picks up electromagnetic interference, especially 50/60 Hz noise
from electrical power lines. This interference can obscure the biological signals, making
them very hard to measure. Right Leg Driver circuitry is used to eliminate interference
noise by actively canceling the interference. Electrocardiography (ECG) is the science of
converting the ionic depolarization of the heart to a measurable electrical signal for
analysis. One of the most common challenges in the design of the analog electronics
interface to the electrodes/patient is in the optimization of the right leg drive (RLD) for
common mode performance and stability.
4.3.5 Microcontroller
Microcontroller are used in automatically controlled products and devices, such as
automobile engine control systems, implantable medical devices, remote controls, office
machines, appliances, power tools, toys and other embedded systems. By reducing the
size and cost compared to a design that uses a separate microprocessor, memory, and
input/output devices, microcontrollers make it economical to digitally control even more
devices and processes. Mixed signal microcontrollers are common, integrating analog
components needed to control non-digital electronic systems. Mostly using
microcontroller for interfacing signal to display system by PIC.
4.3.5. a Features • High performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two cycle • Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
• Up to 8K x 14 words of FLASH Program Memory, Up to 368 x 8 bytes of Data Memory (RAM),Up to 256 x 8 bytes of EEPROM Data Memory
Peripheral Features: • Timer0: 8-bit timer/counter with 8-bit prescaler • Timer1: 16-bit timer/counter with prescaler can be incremented during SLEEP via
external crystal/clock. • Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler • Two Capture, Compare, PWM modules - Capture is 16-bit, max. resolution is 12.5 ns - Compare is 16-bit, max. resolution is 200 ns - PWM max. Resolution is 10-bit Timer Features: • 8-bit timer/counter • Readable and writable • 8-bit software programmable prescaler • Internal or external clock select • Interrupt on overflow from FFh to 00h • Edge select for external clock The PIC architectures have these advantages: Small instruction set to learn
RISC architecture
Built in oscillator with selectable speeds
Easy entry level, in circuit programming plus in circuit debugging PIC it units
available from Microchip.com for less than $50
Inexpensive microcontrollers Wide range of interfaces including I²C, SPI, USB, USART, A/D, programmable comparators, PWM, LIN, CAN, PSP, and Ethernet
® code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.
DS30292C - page ii 2001 Microchip Technology Inc.
PIC16F87X
28/40-Pin 8-Bit CMOS FLASH Microcontrollers
Devices Included in this Data Sheet: • PIC16F873 • PIC16F876 • PIC16F874 • PIC16F877 Microcontroller Core Features: • High performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for
program branches which are two cycle • Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle • Up to 8K x 14 words of FLASH Program Memory,
Up to 368 x 8 bytes of Data Memory (RAM) Up to 256 x 8 bytes of EEPROM Data Memory
• Pinout compatible to the PIC16C73B/74B/76/77 • Interrupt capability (up to 14 sources) • Eight level deep hardware stack • Direct, indirect and relative addressing modes • Power-on Reset (POR) • Power-up Timer (PWRT) and
Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation • Programmable code protection • Power saving SLEEP mode • Selectable oscillator options • Low power, high speed CMOS FLASH/EEPROM
technology • Fully static design • In-Circuit Serial Programming (ICSP) via two
pins • Single 5V In-Circuit Serial Programming capability • In-Circuit Debugging via two pins • Processor read/write access to program memory • Wide operating voltage range: 2.0V to 5.5V • High Sink/Source Current: 25 mA • Commercial, Industrial and Extended
Instruction Set 35 instructions 35 instructions 35 instructions 35 instructions
2001 Microchip Technology Inc. DS30292C-page 3
PIC16F87X Table of Contents
1.0 Device Overview .................................................................................................................................................. 5 2.0 Memory Organization ......................................................................................................................................... 11 3.0 I/O Ports............................................................................................................................................................. 29 4.0 Data EEPROM and FLASH Program Memory.................................................................................................... 41 5.0 Timer0 Module ................................................................................................................................................... 47 6.0 Timer1 Module ................................................................................................................................................... 51 7.0 Timer2 Module ................................................................................................................................................... 55 8.0 Capture/Compare/PWM Modules ....................................................................................................................... 57 9.0 Master Synchronous Serial Port (MSSP) Module................................................................................................ 65 10.0 Addressable Universal Synchronous Asynchronous Receiver Transmitter (USART) ......................................... 95 11.0 Analog-to-Digital Converter (A/D) Module ......................................................................................................... 111 12.0 Special Features of the CPU............................................................................................................................. 119 13.0 Instruction Set Summary................................................................................................................................... 135 14.0 Development Support ....................................................................................................................................... 143 15.0 Electrical Characteristics................................................................................................................................... 149 16.0 DC and AC Characteristics Graphs and Tables................................................................................................. 177 17.0 Packaging Information ...................................................................................................................................... 189 Appendix A: Revision History..................................................................................................................................... 197 Appendix B: Device Differences ................................................................................................................................ 197 Appendix C: Conversion Considerations.................................................................................................................... 198 Index ......................................................................................................................................................................... 199 On-Line Support ........................................................................................................................................................ 207 Reader Response ..................................................................................................................................................... 208 PIC16F87X Product Identification System ................................................................................................................. 209
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OSC2/CLKOUT 14 15 31 O — Oscillator crystal output. Connects to crystal or resonator
in crystal oscillator mode. In RC mode, OSC2 pin outputs
CLKOUT which has 1/4 the frequency of OSC1, and
denotes the instruction cycle rate.
MCLR/VPP 1 2 18 I/P ST Master Clear (Reset) input or programming voltage input.
This pin is an active low RESET to the device.
PORTA is a bi-directional I/O port.
RA0/AN0 2 3 19 I/O TTL RA0 can also be analog input0.
RA1/AN1 3 4 20 I/O TTL RA1 can also be analog input1.
RA2/AN2/VREF- 4 5 21 I/O TTL RA2 can also be analog input2 or negative
analog reference voltage.
RA3/AN3/VREF+ 5 6 22 I/O TTL RA3 can also be analog input3 or positive
analog reference voltage.
RA4/T0CKI 6 7 23 I/O ST RA4 can also be the clock input to the Timer0 timer/
counter. Output is open drain type.
RA5/SS/AN4 7 8 24 I/O TTL RA5 can also be analog input4 or the slave select for
the synchronous serial port.
PORTB is a bi-directional I/O port. PORTB can be soft-
ware programmed for internal weak pull-up on all inputs.
RB0/INT 33 36 8 I/O TTL/ST(1)
RB0 can also be the external interrupt pin.
RB1 34 37 9 I/O TTL
RB2 35 38 10 I/O TTL
RB3/PGM 36 39 11 I/O TTL RB3 can also be the low voltage programming input.
RB4 37 41 14 I/O TTL Interrupt-on-change pin.
RB5 38 42 15 I/O TTL Interrupt-on-change pin.
RB6/PGC 39 43 16 I/O TTL/ST(2)
Interrupt-on-change pin or In-Circuit Debugger pin.
Serial programming clock.
RB7/PGD 40 44 17 I/O TTL/ST(2)
Interrupt-on-change pin or In-Circuit Debugger pin.
Serial programming data.
Legend: I = input O = output I/O = input/output P = power — = Not used TTL = TTL input ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus).
4: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise.
DS30292C-page 8 2001 Microchip Technology Inc.
PIC16F87X TABLE 1-2: PIC16F874 AND PIC16F877 PINOUT DESCRIPTION (CONTINUED)
Pin Name DIP PLCC QFP I/O/P Buffer Description
Pin# Pin# Pin# Type Type
PORTC is a bi-directional I/O port.
RC0/T1OSO/T1CKI 15 16 32 I/O ST RC0 can also be the Timer1 oscillator output or a
Timer1 clock input.
RC1/T1OSI/CCP2 16 18 35 I/O ST RC1 can also be the Timer1 oscillator input or
Capture2 input/Compare2 output/PWM2 output.
RC2/CCP1 17 19 36 I/O ST RC2 can also be the Capture1 input/Compare1
output/PWM1 output.
RC3/SCK/SCL 18 20 37 I/O ST RC3 can also be the synchronous serial clock input/
output for both SPI and I2
C modes.
RC4/SDI/SDA 23 25 42 I/O ST RC4 can also be the SPI Data In (SPI mode) or
data I/O (I2
C mode).
RC5/SDO 24 26 43 I/O ST RC5 can also be the SPI Data Out (SPI mode).
RC6/TX/CK 25 27 44 I/O ST RC6 can also be the USART Asynchronous Transmit
or Synchronous Clock.
RC7/RX/DT 26 29 1 I/O ST RC7 can also be the USART Asynchronous Receive
or Synchronous Data.
PORTD is a bi-directional I/O port or parallel slave port
when interfacing to a microprocessor bus.
RD0/PSP0 19 21 38 I/O ST/TTL(3)
RD1/PSP1 20 22 39 I/O ST/TTL(3)
RD2/PSP2 21 23 40 I/O ST/TTL(3)
RD3/PSP3 22 24 41 I/O ST/TTL(3)
RD4/PSP4 27 30 2 I/O ST/TTL(3)
RD5/PSP5 28 31 3 I/O ST/TTL(3)
RD6/PSP6 29 32 4 I/O ST/TTL(3)
RD7/PSP7 30 33 5 I/O ST/TTL(3)
PORTE is a bi-directional I/O port.
RE0/RD/AN5 8 9 25 I/O ST/TTL(3)
RE0 can also be read control for the parallel slave
port, or analog input5.
RE1/WR/AN6 9 10 26 I/O ST/TTL(3)
RE1 can also be write control for the parallel slave
port, or analog input6.
RE2/CS/AN7 10 11 27 I/O ST/TTL(3)
RE2 can also be select control for the parallel slave
port, or analog input7.
VSS 12,31 13,34 6,29 P — Ground reference for logic and I/O pins.
VDD 11,32 12,35 7,28 P — Positive supply for logic and I/O pins.
NC — 1,17,28, 12,13, — These pins are not internally connected. These pins
40 33,34 should be left unconnected.
Legend: I = input O = output I/O = input/output P = power — = Not used TTL = TTL input ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus).
4: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise.
2001 Microchip Technology Inc. DS30292C-page 9
2.0 MEMORY ORGANIZATION 2.1 Program Memory Organization
There are three memory blocks in each of the
PIC16F87X MCUs. The Program Memory and Data
Memory have separate buses so that concurrent
access can occur and is detailed in this section. The
EEPROM data memory block is detailed in Section
4.0. Additional information on device memory may be
found in the PICmicro Mid-Range Reference Manual,
(DS33023).
FIGURE 2-1: PIC16F877/876 PROGRAM
MEMORY MAP AND
STACK
PC<12:0>
CALL, RETURN 13
RETFIE, RETLW
Stack Level 1
Stack Level 2
Stack Level 8
RESET Vector 0000h
Interrupt Vector 0004h
0005h
Page 0
07FFh
0800h
Page 1
On-Chip
0FFFh Program
1000h
Memory
Page 2
17FFh
1800h
Page 3
1FFFh
The PIC16F87X devices have a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. The PIC16F877/876 devices have 8K
x 14 words of FLASH program memory, and the
PIC16F873/874 devices have 4K x 14. Accessing a
location above the physically implemented address
will cause a wraparound. The RESET vector is at 0000h and the interrupt vector is at 0004h.
FIGURE 2-2: PIC16F874/873 PROGRAM
MEMORY MAP AND
STACK
PC<12:0>
CALL, RETURN 13
RETFIE, RETLW
Stack Level 1
Stack Level 2
Stack Level 8
RESET Vector 0000h
Interrupt Vector 0004h
0005h
Page 0
On-Chip 07FFh
Program
0800h
Memory
Page 1
0FFFh
1000h
1FFFh
2001 Microchip Technology Inc. DS30292C-page 11
PIC16F87X
2.2.2 SPECIAL FUNCTION REGISTERS The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the desired operation of the device. These registers are implemented as static RAM. A list of these registers is
given in Table 2-1.
The Special Function Registers can be classified into two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of the peripheral features are described in detail in the
peripheral features section.
TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY Value on: Details
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, on BOR page:
Bank 0
00h(3) INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 27
01h TMR0 Timer0 Module Register xxxx xxxx 47 02h
(3) PCL Program Counter (PC) Least Significant Byte 0000 0000 26 03h
(3) STATUS IRP RP1 RP0 TO PD Z DC C 0001 1xxx 18 04h(3) FSR Indirect Data Memory Address Pointer xxxx xxxx 27 05h PORTA — — PORTA Data Latch when written: PORTA pins when read --0x 0000 29 06h PORTB PORTB Data Latch when written: PORTB pins when read xxxx xxxx 31 07h PORTC PORTC Data Latch when written: PORTC pins when read xxxx xxxx 33 08h
(4) PORTD PORTD Data Latch when written: PORTD pins when read xxxx xxxx 35 09h
(4) PORTE — — — — — RE2 RE1 RE0 ---- -xxx 36 0Ah(1,3) PCLATH — — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 26 0Bh
(3) INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 20 0Ch PIR1 PSPIF
Shaded locations are unimplemented, read as „0‟. Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter. 2: Bits PSPIE and PSPIF are reserved on PIC16F873/876 devices; always maintain these bits clear. 3: These registers can be addressed from any bank. 4: PORTD, PORTE, TRISD, and TRISE are not physically implemented on PIC16F873/876 devices; read as „0‟. 5: PIR2<6> and PIE2<6> are reserved on these devices; always maintain these bits clear.