Smart Card Reader For Student ID

1

Smart Card Reader for Student ID

1. INTRODUCTION

1.1 Objective of the Work

The objective of this work is writing the details of the particular student in

an institute and uses it as an ID for his/her recognition in a Smartcard Chip and Read

it with a Reader whenever it is needed for convenient Identification.

1.2 Technical Approach

For the hardware construction we used a Phillips 89C51 microcontroller,

Smart card SLE-4442, Smart card Reader, regulated power supply and LCD display.

These are available anywhere in the market.

1.3 Literature Survey

For writing we referred microcontroller text book. The code is very simple.

And we implement where ever we want. “How to use Keil 8051 C Compiler” by

Kim Hyoung tae is the handy book with which we can learn the usage and

applications of the keil software.

2


2. MICROCONTROLLER

2.1 Introduction:

Micro controller plays a vital role in our project. Micro

controller controls each and every peripheral device connected to it. The micro

controller that we are using is reliable and best suited for our project.

2.2 Description:

The 89C51/89C52/89C54/89C58 contains a non-volatile FLASH

program memory that is parallel programmable. For devices that are serial

programmable (In System Programmable (ISP) with a boot loader), see the

89C51RC+/89C51RD+ datasheet.

Both families are Single-Chip 8-bit Micro controllers

manufactured in advanced CMOS process and are derivatives of the 80C51 micro

controller family. All the devices have the same instruction set as the 80C51.

2.3 Features of 89C51 Micro Controller:

80C51 Central Processing Unit

On-chip FLASH Program Memory

Speed up to 33 MHz

Full static operation

RAM expandable externally to 64 k bytes

4 level priority interrupt

6 interrupt sources

Four 8-bit I/O ports

Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

Power control modes

– Clock can be stopped and resumed

– Idle mode

– Power down mode

3


Programmable clock out

Second DPTR register

Asynchronous port reset

Low EMI (inhibit ALE)

3 16-bit timers

Wake up from power down by an external interrupt

Obviously, 8051 configuration is intended to satisfy the needs of

programmers developing the controlling devices and instruments. This is one part of

its key to success: there is nothing missing, yet there is no lavishness; it is meant for

the average user. The other clue can be found in the organization of RAM, Central

Processor Unit (CPU), and ports - all of which maximally utilize the available

resources and allow further upgrades.

4


2.4 Block Diagram of 89C51 Micro Controller

Figure: 2.1 Block Diagram of 89C51 Micro Controller

5


2.5 Block Diagram Description:

ALU:

The ALU performs arithmetic and logic functions on 8-bit variables.

The ALU can perform addition, subtraction, multiplication and division and

the logic unit can perform logical operations. An important and unique

feature of the microcontroller architecture is that the ALU can also

manipulate 1 bit as well as 8-bit data types. Individual bits may be set,

cleared, complemented, moved, tested and used in logic computation.

Accumulator:

The Accumulator, as its name suggests, is used as a general register

to accumulate the results of a large number of instructions. It can hold an 8-

bit (1-byte) value and is the most versatile register, the microcontroller has

due to the sheer number of instructions that make use of the accumulator.

Accumulator holds a source of operand and stores the result of the

arithmetic operations such as addition, subtraction, multiplication and

division. The accumulator can be the source or destination register for

logical operations. The accumulator has several exclusive functions such as

rotate, parity computation; testing for 0, sign acceptor etc. and so on.

Program counter:

The program counter points to the address of the next instruction to

be executed. As the CPU fetches the opcode from the program ROM, the

program counter is implemented to point to the next instruction. The

Microcontroller can access program addresses 0000 to FFFFH, a total of

64K bytes of code.

When the 8051 is initialized PC always starts at 0000h and is

incremented each time an instruction is executed. PC is always incremented

by one. Since some instructions require 2 or 3 bytes the PC will be

incremented by 2 or 3 in these cases. The Program Counter is special in that

there is no way to directly modify its value.

6


2.6 Types of Memory:

The 8051 has three very general types of memory. To effectively

program the 8051 it is necessary to have a basic understanding of these

memory types.

The memory types are illustrated in the following diagram they are:

1. on-Chip Memory

2. External Code Memory

3. External RAM.

Figure: 2.2 Memory Types

On-Chip Memory refers to any memory (Code, RAM, or other) that

physically exists on the microcontroller itself. On-chip memory can be of

several types, but we'll get into that shortly.

External Code Memory is code (or program) memory that resides off-

chip. This is often in the form of an external EPROM.

External RAM is RAM memory that resides off-chip. This is often in

the form of standard static RAM or flash RAM.

7


Code Memory:

Code memory is the memory that holds the actual 8051 program that

is to be run. This memory is limited to 64K and comes in many shapes and

sizes. Code memory may be found on-chip, either burned into the

microcontroller as ROM or EPROM. Code may also be stored completely

off-chip in an external ROM or, more commonly, an external EPROM.

Flash RAM is also another popular method of storing a program. Various

combinations of these memory types may also be used--that is to say, it is

possible to have 4K of code memory on-chip and 64k of code memory off-

chip in an EPROM.

When the program is stored on-chip the 64K maximum is often

reduced to 4k, 8k, or 16k. This varies depending on the version of the chip

that is being used. Each version offers specific capabilities and one of the

distinguishing factors from chip to chip is how much ROM/EPROM space

the chip has.

However, code memory is most commonly implemented as off-chip

EPROM. This is especially true in low-cost development systems and in

systems developed by students.

External RAM:

As an obvious opposite of Internal RAM, the 8051 also supports

what is called External RAM.

External RAM is any random access memory which is found off-

chip. Since the memory is off-chip it is not as flexible in terms of accessing,

and is also slower. For example, to increment an Internal RAM location by

1 requires only 1 instruction and 1 instruction cycle. To increment a 1-byte

value stored in External RAM requires 4 instructions and 7 instruction

cycles. In this case, external memory is 7 times slower!

8


2.7 Pins On The Case:

Figure: 2.3 Pin Diagram of 89C51

9


Ground

0 V reference.

Power Supply:

This is the power supply voltage for normal, idle, and power-down operation.

Port 0:

Port 0 is an open-drain, bi-directional I/O port. Port 0 pins that have 1s written

to them float and can be used as high-impedance inputs. Port 0 is also the

multiplexed Low-order address and data bus during accesses to external program and

data memory. In this application, it uses strong internal pull-ups when emitting 1s.

Port 1:

Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, port 1 pins that are externally pulled low will source current

because of the internal pull-ups.

T2 (P1.0): Timer/Counter2 external count input/clock out (see Programmable

Clock-Out).

T2EX (P1.1): Timer/Counter2 reload/capture/direction control.

Port 2:



inputs. As inputs, port 2 pins that are externally being pulled low will source current

because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits

the high-order address byte during fetches from external program memory and

during accesses to external data memory that uses 16-bit addresses (MOVX

@DPTR). In this application, it uses strong internal pull-ups when emitting 1s.

During accesses to external data memory that uses 8-bit addresses (MOV @Ri), port

2 emits the contents of the P2 special function register.

10


Port 3:



inputs. As inputs, port 3 pins that are externally being pulled low will source current

because of the pull-ups.

RxD (P3.0): Serial input port

TxD (P3.1): Serial output port

INT0 (P3.2): External interrupt

INT1 (P3.3): External interrupt

T0 (P3.4): Timer 0 external input

T1 (P3.5): Timer 1 external input

WR (P3.6): External data memory write strobe

RD (P3.7): External data memory read strobe

Reset:

A high on this pin for two machine cycles while the oscillator is running

resets the device. An internal diffused resistor to VSS permits a power-on reset using

only an external capacitor to VCC.

Address Latch Enable:

Output pulse for latching the low byte of the address during an access to

external memory. In normal operation, ALE is emitted at a constant rate of 1/6 the

oscillator frequency, and can be used for external timing or clocking. Note that one

ALE pulse is skipped during each access to external data memory. Setting SFR

auxiliary.0 can disable ALE. With this bit set, ALE will be active only during a

MOVX instruction.

Program Store Enable:

The read strobe to external program memory. When executing code from the

external program memory, PSEN is activated twice each machine cycle, except that

two PSEN activations are skipped during each access to external data memory.

PSEN is not activated during fetches from internal program memory.

11


External Access Enable/Programming Supply Voltage:

EA must be externally held low to enable the device to fetch code from

external program memory locations 0000H to the maximum internal memory

boundary. If EA is held high, the device executes from internal program memory

unless the program counter contains an address greater than 0FFFH for 4 k devices,

1FFFH for 8 k devices, 3FFFH for 16 k devices, and 7FFFH for 32 k devices. The

value on the EA pin is latched when RST is released and any subsequent changes

have no effect. This pin also receives the 12.00 V programming supply voltage

(VPP) during FLASH programming.

Crystal 1:

Input to the inverting oscillator amplifier and input to the internal clock

Generator circuits.

Crystal 2:

Output from the inverting oscillator amplifier.

2.8 Timer/Counters:

The IS89C51 has two 16-bit Timer/Counter registers: Timer 0 and Timer 1.

All two can be configured to operate either as Timers or event counters.

As a Timer, the register is incremented every machine cycle. Thus, the register

counts machine cycles. Since a machine cycle consists of 12 oscillator periods, the

count rate is 1/12 of the oscillator frequency.

As a Counter, the register is incremented in response to a 1-to-0 transition at

its corresponding external input pin, T0 and T1. The external input is sampled during

S5P2 of every machine cycle. When the samples show a high in one cycle and a low

in the next cycle, the count is incremented. The new count value appears in the

register during S3P1 of the cycle following the one in which the transition was

detected. Since two machine cycles (24 oscillator periods) are required to recognize a

12


1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. There

are no restrictions on the duty cycle of the external input signal, but it should be held

for at least one full machine cycle to ensure that a given level is sampled at least once

before it changes.

In addition to the Timer or Counter functions, Timer 0 and Timer 1 have four

operating modes: 13-bit timer, 16-bit timer, 8-bit auto-reload, split timer.

Timer 0 and Timer 1:

The Timer or Counter function is selected by control bits C/T in the Special

Function Register TMOD. These two Timer/Counters have four operating modes,

which are selected by bit pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same

for both Timer/Counters, but Mode 3 is different. The four modes are described in

the following sections.

Mode 0:

Both Timers in Mode 0 are 8-bit Counters with a divide-by-32 prescaler.

Figure 8 shows the Mode 0 operation as it applies to Timer 1.

In this mode, the Timer register is configured as a 13-bit register. As the count

rolls over from all 1s to all 0s, it sets the Timer interrupt flag TF1. The counted input

is enabled to the Timer when TR1 = 1 and either GATE = 0 or INT1 = 1. Setting

GATE = 1 allows the Timer to be controlled by external input INT1, to facilitate

pulse width measurements. TR1 is a control bit in the Special Function Register

TCON. Gate is in TMOD.

The 13-bit register consists of all eight bits of TH1 and the lower five bits of

TL1. The upper three bits of TL1 are indeterminate and should be ignored. Setting

the run flag (TR1) does not clear the registers.

Mode 0 operation is the same for Timer 0 as for Timer 1, except that TR0,

TF0 and INT0 replace the corresponding Timer 1 signals in Figure 8. There are two

different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3)

13


Mode 1:

Mode 1 is the same as Mode 0, except that the Timer register is run with all 16

bits. The clock is applied to the combined high and low timer registers (TL1/TH1).

As clock pulses are received, the timer counts up: 0000H, 0001H, 0002H, etc. An

overflow occurs on the FFFFH-to-0000H overflow flag. The timer continues to

count. The overflow flag is the TF1 bit in TCON that is read or written by software.

Mode 2:

Mode 2 configures the Timer register as an 8-bit Counter (TL1) with

automatic reload. Overflow from TL1 not only sets TF1, but also reloads TL1 with

the contents of TH1, which is preset by software. The reload leaves the TH1

unchanged. Mode 2 operation is the same for Timer/Counter 0.

Mode 3:

Timer 1 in Mode 3 simply holds its count. The effect is the same as setting

TR1 = 0. Timer 0 in Mode 3 establishes TL0 and TH0 as two separate counters. The

logic for Mode 3 on Timer 0. TL0 uses the Timer 0 control bits: C/T, GATE, TR0,

INT0, and TF0. TH0 is locked into a timer function (counting machine cycles) and

over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the Timer 1

interrupt.

Mode 3 is for applications requiring an extra 8-bit timer or counter. With

Timer 0 in Mode 3, the IS89C51 can appear to have three Timer/Counters. When

Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching it out of and

into its own Mode 3. In this case, Timer 1 can still be used by the serial port as a

baud rate generator or in any application not requiring an interrupt.

14


3. Liquid Crystal Display [LCD]

3.1 Introduction:

We examine an intelligent LCD display of two lines, 20 characters per line

that is interfaced to the 8051.The protocol (handshaking) for the display is as shown.

The display contains two internal byte-wide registers, one for commands (RS=0) and

the second for characters to be displayed (RS=1).It also contains a user-programmed

RAM area (the character RAM) that can be programmed to generate any desired

character that can be formed using a dot matrix. To distinguish between these two

data areas, the hex command byte 80 will be used to signify that the display RAM

address 00h will be chosen Port1 is used to furnish the command or data type, and

ports 3.2 to 3.4 furnish register select and read/write levels.

The display takes varying amounts of time to accomplish the functions as

listed. LCD bit 7 is monitored for logic high (busy) to ensure the display is

overwritten. A slightly more complicated LCD display (4 lines*40 characters) is

currently being used in medical diagnostic systems to run a very similar program.

3.2 Liquid Crystal Display:

Figure: 3.1 Liquid Crystal Display

15


3.2 Pins Description

1 Ground 2 Vcc

3 Contrast Voltage 4"R/S" _Instruction/Register Select

5 "R/W" Read/Write LCD Registers 6 "E" Clock

7 - 14 Data I/O Pins

Figure: 3.2 Showing LCD Pins

Gn

d

+5

v

Vd

d A K

1 2 3 15 16

4 5 6 7 8 9 10 11 12 13 14

20x4 Liquid Crystal Display

RS R/W En D0

0D

6

0

D2 D3 D5 D7 D6 D4 D1

16


4. SERIAL COMMUNICATION

In order to connect micro controller or a PC to GSM modem a serial port is

used. Serial, is a very common protocol for device communication that is standard on

almost every PC .Most computers including RS-232 based serial ports. Serial is also

a common communication protocol that is used by many devices for instrumentation.

In serial communication, the data is sent one bit at a time in contrast parallel

communication, in which the data is sent a byte or more at time. Serial

communication uses a single data line where as the parallel communication uses 8

bit data line , this makes serial communication not only inexpensive but also makes

it possible for two computers located in two different cities to communicate over the

telephone.

Serial data communication uses two methods, asynchronous and synchronous.

the synchronous method transfers a block of data at a time while the asynchronous

transfers a single byte at a time. The 8051 have an in built UART (Universal

Asynchronous Receiver-Transmitter).

Typically, serial is used to transmit ASCII data. Communication is completed

using 3 transmission lines: (1) Transmitter, (2) Receiver and (3) Ground. Since serial

is asynchronous, the port is able to transmit data on one line while receiving data on

another. Other lines are available for handshaking, but are not required. The

important characteristics are Data Transfer Rate, Start and Stop bits, Data bits and

Parity bits. For two ports to communicate, these parameters must match.

Figure: 4.1 Serial communication transmission method

Space Stop

Bit

0 1 0 0 0 0 0 1 Start

Bit Mark

Goes out last

D7 D0

17


4.1 Data Transfer Rate: -

The rate of data transfer in serial data communication is stated in bps (bits per

second). Another widely used terminology for bps is baud rate. However the baud

rate and bps are not necessarily equal. Baud rate is defined as the number of signal

changes per second. In modems, there are occasions when a single change of signal

transfers several bits of data .As far as conductor wire is considered bps and baud

rate is the same.

4.2 Data Framing:

Asynchronous serial data communication is used for character oriented

transmissions, each character is placed in between start and stop bits. This is called

framing .In data framing for asynchronous communications , the data ,such as ASCII

characters ,are packed in between a start bit and a stop bit .The start bit is always one

bit but the stop bit can be one or more bits .The start bit is always 0(low) whereas

stop bit is 1(high).Since the data is clocked across the lines and each device has its

own clock , it is possible for the two devices to come out slightly out of synchronous

.Therefore ,the stop bits not only indicate the end of transmission but also give the

computers some room for error in clock speeds .The more the stop bits the greater

the lenience in synchronizing the different clocks, but slower the data transmission

rate.

4.3 Parity Bits:

In order to maintain data integrity, parity bit of the character byte is included

in the data frame .The parity bit is odd or even .In the case of an odd parity bit the

number of data bits, including the parity bits has an odd number of 1‟s.Similarly, in

an even parity bit system the total number of bits, including the parity bits has an

even number of 1‟s.UART chips allow programming of the parity bit for odd-, even-

and no- parity options.

18


Figure: 4.2 Functional Diagram of DS232A

19


5. RS232 STANDARD

To allow compatibility among data communication equipment made by

various Manufacturers, an interfacing standard called RS232 was set by the

Electronics and Industries Association in 1960.Today, RS232 is the most widely

used serial I/O interfacing standard. RS232 standard is not TTL compatible;

therefore it requires a line driver such as MAX232chip to convert RS232 voltage

levels to TTL levels and vice versa. One advantage of the MAX 232 chip is that it

uses +5V power source that has same source voltage as that of 8051.

RS232 Logic Level Converter TTL Logic

Figure: 5.1 Block Diagram of RS232

Figure: 5.2 Pin Diagram of RS232 Connector

RS232P (DB9) RS232S (DB9)

RS232P (DB25)

1 13

14 25 1

1

System Max

232

89C51

20


5.1 RS232 PINS:

Pin Description

1 Protective ground

2 Transmitted data (TxD)

3 Received data (RxD)

4 Request to send (RTS)

5 Clear to send (CTS)

6 Data set ready (DSR)

7 Signal ground (GND)

8 Data carrier detect (DCD)

9/10 Reserved for data setting

11 Unassigned

12 Secondary data carrier

13 Secondary clear send

14 Secondary transmitted data

15 Transmit signal element timing

16 Secondary received data

17 Receive signal element timing

18 Unassigned

19 Secondary request to send

20 Data terminal ready (DTR)

21 Signal quality detector

22 Ring indicator

23 Data signal rate select

24 Transmit signal element timing

25 Unassigned

21


5.3. MAX 232:

The RS 232 is not compatible with micro controllers, so a line driver converts

the RS 232's signals to TTL voltage levels.

The MAX232 is a dual driver/receiver that includes a capacitive voltage

generator to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each receiver

converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have a typical

threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver

converts TTL/CMOS input levels into TIA/EIA-232-F levels.

5.4 Registers used for Communication:

SBUF Register:

SBUF is an 8-bit register used solely for serial communication in the 8051. For

byte of data to be transferred via TxD line, it must be placed in SBUF register. SBUF also

holds the byte of data when it is received by the 8051‟s RxD line.

The moment a byte is written into SBUF, it is framed with the start and stop

bits and transferred serially via TxD line. Similarly when bits r received serially via

RxD, the 8051 defames it by eliminating a byte out of the received, and then placing

it in the SBUF.

22


6. SMART CARD

The SLE-4442 Secure Memory Card is one of the most popular "Smart

Memory Cards" in the world. This chip includes an intelligent 256-Byte EEPROM

with Write Protect Function and Programmable Security Code (PSC). This chip

contains and EEPROM organized 1024 x 8 bit offering the possibility of

programmable write protection for each byte. Reading of the whole memory is

always possible. The memory can be written and erased byte by byte. Data can only

be changed after entry of the correct 3-byte programmable security code (security

memory).

The SLE 4442 consists of 256 x 8 bit EEPROM main memory and a 32-bit

protection memory with PROM functionality. The main memory is erased and

written byte by byte. When erased, all 8 bits of a data byte are set to logical one.

When written, the information in the individual EEPROM cells is, according to the

input data, altered bit by bit to logical zeros (logical AND between the old and the

new data in the EEPROM). Normally a data change consists of an erase and write

procedure. It depends on the contents of the data byte in the main memory and the

new data byte whether the EEPROM is really erased and/or written. If none of the 8

bits in the addressed byte requires a zero to-one transition the erase access will be

suppressed. Vice versa the write access will be suppressed if no one-to-zero

transition is necessary. The write and the erase operation take at least 2.5 ms each.

Figure: 6.1 Smart Card

23


Table: 6.1 Pin Configuration of Smart Card

Each of the first 32 bytes can be irreversibly protected against data change by

writing the corresponding bit in the protection memory. Each data byte in this

address range is assigned to one bit of the protection memory and has the same

address as the data byte in the main memory that it is assigned to. Once written the

protection bit cannot be erased (PROM).

Additionally to the above functions the SLE 4442 provides a security code

logic that controls the write/erase access to the memory. For this purpose the SLE

4442 contains a 4-byte security memory with an Error Counter EC (bit 0 to bit 2) and

3 bytes reference data. These 3 bytes as a whole are called Programmable Security

Code (PSC). After power on the whole memory, except for the reference data, can

only be read. Only after a successful comparison of verification data with the internal

reference data the memory has the identical access functionality of the SLE 4432

until the power is switched off. After three successive unsuccessful comparisons the

Error Counter blocks any subsequent attempt, and hence any possibility to write and

erase.

24


Figure: 6.2 Reset and Answer to Reset Wave Form

6.1 Operational Modes

Command Mode

After the Answer-to-Reset the chip waits for a command. Every command

begins with a start condition, includes a 3 bytes long command entry followed by an

additional clock pulse and ends with a stop condition.

– Start condition: Falling edge on I/O during CLK in level H

– Stop condition: Rising edge on I/O during CLK in level H

After the reception of a command there are two possible modes:

– Outgoing data mode for reading

– Processing mode for writing and erasing

Outgoing Data Mode

In this mode the IC sends data to the IFD. The first bit becomes valid on I/O

after the first falling edge on CLK. After the last data bit an additional clock pulse is

necessary in order to set I/O to high impedance Z and to prepare the IC for a new

command entry. During this mode any start and stop condition is discarded.

Processing Mode

In this mode the IC processes internally. The IC has to be clocked

continuously until I/O, which was switched to level L after the first falling edge of

CLK, is set to high impedance level Z. Any start and stop condition is discarded

during this mode.

25


The SLE4442 Provides 7 Commands they are

Table: 6.2 SLE4442 Command

Reading Main Memory

Figure: 6.3 Read main memory wave forms

26


6.2 Key Features and Characteristics of Smart Cards

Cost: Typical costs range from $2.00 to $10.00. Per card cost increases with chips

providing higher capacity and more complex capabilities; per card cost decreases as

higher volume of cards are ordered.

Reliability: Vendors guarantee 10,000 read/write cycles. Cards claiming to meet

International Standards Organization (ISO) specifications must achieve set test

results covering drop, flexing, abrasion, concentrated load, temperature, humidity,

static electricity, chemical attack, ultra-violet, X-ray, and magnetic field tests.

Error Correction: Current Chip Operating Systems (COS) performs their own error

checking. The terminal operating system must check the two-byte status codes

returned by the COS (as defined by both ISO 7816 Part 4 and the proprietary

commands) after the command issued by the terminal to the card. The terminal then

takes any necessary corrective action.

Storage Capacity: EEPROM: 8K - 128K bit. (Note that in smart card terminology,

1K means one thousand bits, not one thousand 8-bit characters. One thousand bits

will normally store 128 characters - the rough equivalent of one sentence of text.

However, with modern data compression techniques, the amount of data stored on

the smart card can be significantly expanded beyond this base data translation.)

Ease of Use: Smart cards are user-friendly for easy interface with the intended

application. They are handled like the familiar magnetic stripe bank card, but are a

lot more versatile.

Susceptibility: Smart cards are susceptible to chip damage from physical abuse, but

more difficult to disrupt or damage than the magnetic stripe card.

Security: Smart cards are highly secure. Information stored on the chip is difficult to

duplicate or disrupt, unlike the outside storage used on magnetic stripe cards that can

be easily copied. Chip microprocessor and Co-processor supports DES, 3-DES, RSA

or ECC standards for encryption, authentication, and digital signature for non-

repudiation.

27


First Time Read Rate: ISO 7816 limits contact cards to 9600 baud transmission

rate; some Chip Operating Systems do allow a change in the baud rate after chip

power up; a well designed application can often complete a card transaction in one or

two seconds. Speeds of Recognition Smart cards are fast. Speed is only limited by

the current ISO Input/output speed standards.

Proprietary Features: These include Chip Operating System (COS) and System

Development Kits.

Processing Power: Older version cards use an 8-bit micro-controller clock able up to

16 MHz with or without co-processor for high-speed encryption. The current trend is

toward customized controllers with a 32-bit RISC processor running at 25 to 32 MHz

Power Source: 1.8, 3, and 5 volt DC power sources.

6.3 Applications:

Student Identification

All-purpose student ID card (a/k/a campus card), containing a variety

of applications such as electronic purse (for vending machines, laundry machines,

library card, and meal card).

Financial Applications

Electronic Purse to replace coins for small purchases in vending

machines and over-the-counter transactions.

Credit and/or Debit Accounts, replicating what is currently on the

magnetic stripe bank card, but in a more secure environment.

Securing payment across the Internet as part of Electronic Commerce.

Communications Applications

The secure initiation of calls and identification of caller (for billing

purposes) on any Global System for Mobile Communications (GSM) phone.

Subscriber activation of programming on Pay-TV.

28


Government Programs

Electronic Benefits Transfer using smart cards to carry Food Stamp

and WIC food benefits in lieu of paper coupons and vouchers.

Agricultural producer smart marketing card to track quotas.

Information Security

Employee access cards with secured passwords and the potential to

employ biometrics to protect access to computer systems.

Physical Access Control

Employee access cards with secured ID and the potential to employ

biometrics to protect physical access to facilities.

Transportation

Drivers Licenses.

Mass Transit Fare Collection Systems.

Electronic Toll Collection Systems.

Retail and Loyalty

Consumer reward/redemption tracking on a smart loyalty card, that is

marketed to specific consumer profiles and linked to one or more specific retailers

serving that profile set.

Health Care

Consumer health card containing insurance eligibility and emergency

medical data.

29


6.4 Advantages of Smart Cards:

The capacity provided by the on-board microprocessor and data

capacity for highly secure, off-line processing

Adherence to international standards, ensuring multiple vendor sources

and competitive prices

Established track record in real world applications

Durability and long expected life span (guaranteed by vendor for up to

10,000 read/writes before failure)

Chip Operating Systems that support multiple applications

Secure independent data storage on one single card

30


7. INTRODUCTION TO SMART CARD FOR STUDENT ID

In the past barcodes and magnetic strips are used to store the information

about a particular information. Due to disadvantages with the using of barcode and

magnetic strips like

1. Less Memory

2. Easily Damaged

3. Access Speed

To overcome these draw backs smartcard technology is used for its board way

of features and applications due to the development in the Chip Designing

Technology.

The project deals with the application of smartcard technology for accessing

the information about a student in an institute.

This application has been developed using the features and functionality of

micro controller and a smart card. Micro controller is used to perform read and write

actions of data from and into the smartcard. Name and some of the academic details

of a student were stored in the smartcard internal memory which can be used as a

student ID.

Figure: 7.1 Block Diagram of Smart Card reader

Smart Card Reader

Interface

Atmel/Phillips

Micro Controller

89C51

Power

Supply

Smart Card Reader For Student ID Card

31


A card Reader Interface is used to establish an interface between micro

controller and smartcard from which write and read operations can be performed

easily. A code was written in Source „C‟ file in µvision Software which was used to

write embedded code for the embedded systems and it is dumped in the internal

memory of the micro controller using FLASH MAGIC. This code helps us to control

the micro controller actions on the smartcard.

We have to write the information into the smartcard memory by using the

assembly language. When we perform writing operation we have to specify the

address location where the character should be store for displaying.

When we insert the smartcard in the card reader slot the VCC pin of the card

becomes low and it sense the card and performs answer to reset mode default without

any instruction. When it is performed the first 4 bytes of the EEPROM was read and

check the working condition of the smartcard. It happens whenever you press the

RESET button.

32


7.1 CIRCUIT DIAGRAM

Figure: 7.2 Circuit Diagram for SMART CARD STUDENT ID

33


8. KEIL SOFTWARE

8.1 Introduction:

An assembler is a software tool designed to simplify the task of writing

computer programs. It translates symbolic code into executable object code. This

object code may then be programmed into a microcontroller and executed.

Assembly Language programs translate directly into CPU instructions which

instruct the processor what operations to perform. Therefore, to effectively write

assembly programs, you should be familiar with both the microcomputer architecture

and the assembly language.

Assembly language operation codes (mnemonics) are easily remembered. You

can also symbolically express addresses and values referenced in the operand field of

instructions. Since you assign these names, you can make them as meaningful as the

mnemonics for the instructions. For example, if your program must manipulate a

date as data, you can assign it the symbolic name DATE. If your program contains a

set of instructions used as a timing loop (a set of instructions executed repeatedly

until a specific amount of time has passed), you can name the instruction group

TIMER_LOOP.

An assembly program has three constituent parts:

1. Machine instructions

2. Assembler directives

3. Assembler controls

A machine instruction is a machine code that can be executed by the

machine. Detailed discussion of the machine instructions can be found in the

hardware manuals of the 8051 or derivative microcontroller.

Assembler directives are used to define the program structure and symbols,

and generate non-executable code (data, messages, etc.). Assembler directives

instruct the assembler how to process subsequent assembly language instructions.

Directives also provide a way for you to define program constants and reserve space

for variables.

34


Assembler controls set the assembly modes and direct the assembly flow.

Assembler controls direct the operation of the assembler when generating a listing file

or object file. Typically, controls do not impact the code that is generated by the

assembler. Controls can be specified on the command line or within an assembler

source file.

8.2 Conclusions:

Each line of an assembly program can contain only one control, directive, or

instruction statement. Statements must be contained in exactly one line. Multi– line

statements are not allowed. Statements in x51 assembly programs are not column

sensitive. Controls, directives, and instructions may start in any column. Indentation

used in the programs in this project is done for program clarity and is neither

required nor expected by the assembler. The only exception is that arguments and

instruction operands must be separated from controls, directives, and instructions by

at least one space.

All x51 assembly programs must include the END directive. This directive

signals to the assembler that this is the end of the assembly program. Any

instructions, directives, or controls found after the END directive are ignored. The

shortest valid assembly program contains only an END directive.

35


9. PROJECT CODE:

/****************************************************************/

/******************PH:89C51RD+**DT:01.06.09********************/

/PROGRAM: PROJECT: SMARTCARD READER FOR STUDENT ID/

/***************************************************************/

/*------------------------------------*/

#include<reg51.h>

#include<intrins.h>

//#include<all_functions.h>

//typedef unsigned char uc;

typedef unsigned int ui;

/*---------------------------------------*/

//LCD PINS DECLARATION

#define lcd_port P0

sbit lcd_rs = P1^5;

sbit lcd_rw = P1^6;

sbit lcd_en = P1^7;

bit z;

u temp,addr;

/*-----------------------------------*/

//FUNCTION PROTOTYPE FUNCTIONS

void lcd_init();

void lcd_cmd(uc);

void lcd_data(uc);

void lcd_busychk();

void string_display(uc *);

void delay(ui );

uc t=0;

/*-----------------------------------*/

36


//MAIN FUNCTION

void main()

{

lcd_init();

z = 0;

TMOD = 0x21;

SCON = 0x50;

TH1 = 0xfd;

TH0 = 0xf0;

TL0 = 0x00;

TR0 = 1;

TR1 = 1;

lcd_cmd(0x86);

string_display("WELCOME");

lcd_cmd(0xC8);

string_display("TO");

lcd_cmd(0x99);

string_display("S.R.T.I.S.T");

lcd_cmd(0xDA);

string_display("NALGONDA");

delay(5000);

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("PRJ DEV BY");

lcd_cmd(0xC0);

string_display("SHESHU");

lcd_cmd(0x94);

string_display("MANASA");

lcd_cmd(0xd4);

string_display("PREM");

delay(5000);

IE = 0x82;

37


while(1)

{

ATR();

if(!VCC)

{

z=1;

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("SMART CARD INSERTED");

t=0;

Read_Code();

delay(1000);

t=0x24;

if(hexnum[t]=='*')

{

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("VALID CARD");

delay(1000);

while(z)

{

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("NAME:");

t=0x25;

while(hexnum[t]!=' ')

{

lcd_data(hexnum[t]);

t++;

}

lcd_cmd(0xC0);

string_display("STNO:");

t=0x32;

38



{


t++;

}

lcd_cmd(0x94);

string_display("DEPT:");

t=0x3d;


{


t++;

}

lcd_cmd(0xD4);

string_display("B.G.:");

t=0x41;


{


t++;

}

delay(2000);

t=0;

}

}

else

{

while(z)

{

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("INVALID CARD");

delay(1000);

39


}

}

t=0;

}

}

}

/*----------------------------------------*/

//TIMER INTERUUPT

void timer0_isr() interrupt 1

{

if(VCC)

{

lcd_cmd(0x01);

lcd_cmd(0x80);

string_display("INSERT SMART CARD ");

z=0;

}

TH0 = 0xf0;

TL0 = 0x00;

}

/*---------------------------------*/

//LCD INIT FUNCTION

void lcd_init()

{

lcd_cmd(0x38);

lcd_cmd(0x01);

lcd_cmd(0x06);

lcd_cmd(0x0c);

}

/*-----------------------------------*/

//LCD COMMAND FUNCTION

void lcd_cmd(uc a)

40


{

lcd_busychk();

lcd_port = a;

lcd_rs = 0;

lcd_rw = 0;

lcd_en = 1;

_nop_();

_nop_();

lcd_en = 0;

}

/*------------------------------------*/

//LCD DATA FUNCTION

void lcd_data(uc a)

{

lcd_busychk();

lcd_port = a;

lcd_rs = 1;

lcd_rw = 0;

lcd_en = 1;

_nop_();

_nop_();

lcd_en = 0;

}

/*-------------------------------------*/

//LCD BUSYCHECK FUNCTION

void lcd_busychk()

{

lcd_port = 0xff;

lcd_rs = 0;

lcd_rw = 1;

while(lcd_port&0x80)

{

41


lcd_en = 0;

_nop_();

_nop_();

lcd_en = 1;

}

}

/*---------------------------------------*/

//STRING DISPLAY FUNCTION

void string_display(uc *ptr)

{

while(*ptr)

{

lcd_data(*ptr);

ptr++;

}

}

/*---------------------------------------*/

//DELAY FUNCTION

void delay(ui x)

{

ui i,j;

for(i=0;i<x;i++)

for(j=0;j<113;j++);

}

42


10. CONCLUSION

The project “SMART CARD FOR STUDENT IDENTIFICATION”

has been successfully designed and code was written using assembly

language and student‟s data was written and displayed for few fields.

It has been developed by integrating features of all the hardware

components used. Presence of every module has been reasoned out and

placed carefully thus contributing to the best working of the unit.

Secondly, using highly advanced IC‟s and with the help of growing

technology the project has been successfully implemented.

43


11. BIBLIOGRAPHY

REFERENCES:

1) Microprocessor and Interfacing by Douglas V Hall, Tata Mc Graw Hill, 2nd

edition.1999

2) Advanced Microprocessor and Peripherals by A.K. Ray and K.M.

Bhurchandi, Tata Mc Graw Hill.2000

3) How to use Keil 8051 C Compiler by Kim Hyoung tae

4) Electronic Components by D.V Prasad.

5) Wireless communications by Theodore S. Rappaport

INTERNET:

www.extremelectronics.com

www.Google.com

www.wikipdiea.com

www.Hobbyprojects.Com

www.Cardwerk.Com

SIMENS SEMICONDUCTOR Group

http://www.extremelectronics.com/

http://www.google.com/

http://www.wikipdiea.com/

http://www.hobbyprojects.com/

http://www.cardwerk.com/

Smart Card Reader For Student ID

Documents

smart card reader

micro controller controls

80c51 micro controller

micro controllers

smart card sle

student id programmable

particular student

logic unit