SINGLE-PHASE TO THREE-PHASE DRIVE SYSTEM USING TWO PAPALLEL SINGLE PHASE RECTIFIERS A Main Project Report submitted in partial fulfilment of the Requirements for the award of the degree of BACHELORE OF TECHNOLOGY IN ELECTRICAL & ELECTRONICS ENGINEERING By M.THRIVENI (09HT1A0225) B.RAJU (09HT1A0205) P.KARUNAKAR (09HT1A0235) B.NAGESWARA RAO (09HT1A0206) K.NAVEEN (09HT1A0221) Under the guidance of Mr.P.PURNA CHANDA RAO M.Tech Assistant Professor
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single phase to three phase converstion using two parallel rectifiers
convert single phase to three phase by using two parallel single phase full bridge rectifiers
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SINGLE-PHASE TO THREE-PHASE DRIVE SYSTEM
USING TWO PAPALLEL SINGLE PHASE RECTIFIERS
A Main Project Report submitted in partial fulfilment of the Requirements for the award of the degree of
Fig. 3.7:Relation between the Voltage and Torque versus Frequency
17
Fig. 3.8wave forms of three phase voltage, current, speed and torque
18
Fig. 4.1 Unipolar and bipolar modulation 22
Fig. 4.2: Simple Voltage Sourced Inverter 23
Fig. 4.3: Principal of Pulse Width Modulation 24
Fig. 4.4: SPWM Harmonic Spectra 25
Fig. 4.5: Three-phase voltage source PWM Inverter 25
Fig. 4.6: The eight inverter voltage vectors (V0 to V7) 27
Fig. 4.7:Locus comparison of maximum linear control voltage in Sine PWM and SVPWM
27
Fig. 4.8:The relationship of abc reference frame and stationary dq reference frame
28
Fig. 4.9: Basic switching vectors and sectors 29
Fig.4.10:Reference vector as a combination of adjacent vectors at sector 1
31
Fig. 4.11: Space vector PWM switching patterns at each sector 32
Fig. 4.12:Block diagram for vector control technique using direct torque and speed control
34
Fig. 4.13: Control circuit for rectifier 35
Fig. 4.14: Control circuit for inverter 36
Fig 4.15: Block diagram of pi controller 36
Fig. 5.1 Conventional single-phase to three phase drive system 37
Fig. 5.2(a) Proposed single-phase to three phase drive system 38
Fig. 5.2(b)Block diagram of proposed single-phase to three phase drive system model
38
Fig: 5.2.1a: Loop1 of the system model 39
Fig: 5.2.1(b): Loop2 of the system model 40
Fig: 5.2.1(c): Loop3 of the system model 40
Fig: 5.2.1(d): Loop4 of the system model 41
Fig. 5.3 Control Block Diagram for rectifier 45Fig. 5.4 WTHD of rectifier voltage (vab for proposed
configuration and vg for Standard configuration) as a function of μ
47
Fig. 5.5 Variables of rectifiers A and B. 48
Fig. 5.6 Currents ia , i’a , and io for double-carrier 49
Fig. 5.7(a)Flow of active power in Conventional ac–dc–ac single-phase to three phase converter
50
Fig. 5.7(b)Flow of active power in Proposed system with two rectifiers
50
Fig. 5.8: Inductor specification in terms of THD of ig and μ 52
Fig. 5.9(a):Proposed configuration highlighting devices of fault-tolerant system.
53
Fig.5.9 (b): Block diagram of the fault diagnosis system 53
Fig.5.10:Possibilities of configurations in terms of fault occurrence
54
Fig5.11(a): pulse trainee of rectifier control circuit 56
Fig.5.11(b): pulse trainee of inverter control circuit 57
Fig. 6.1: Simulink model of conventional system 58
Fig. 6.2: Wave forms of grid input voltage & current 58
Fig. 6.3: Wave form of DC-Link capacitor voltage 59
Fig. 6.4: Wave form of current i’a in rectifier A 59
Fig. 6.5: Wave form of output line voltage 60
Fig. 6.6: THD content at input current is 19.36% 60
Fig. 6.7: Simulink model of proposed system 61
Fig. 6.8: Simulink model of control circuit for rectifier 61
Fig. 6.9: Simulink model of control circuit for inverter 62
Fig. 6.10: Wave forms of grid input voltage & current 62
Fig. 6.11 : Wave form of DC-Link capacitor voltage 63
Fig. 6.12: Wave form of circulating current 63
Fig. 6.13: Wave forms of currents in rectifier A & B 64
Fig. 6.14: Wave forms of grid voltage & current in fault condition 64
Fig. 6.15: Wave forms currents in rectifier A & B in fault condition 65
Fig. 6.16: Wave forms currents in rectifier A in fault condition 65
Fig. 6.17: THD content at input current using SPWM Technique 66
Fig. 6.18 : THD content at input current using SVPWM Technique 66
Fig. 6.19: THD content at output voltage using SPWM Technique 67
Fig. 6.20 : THD content at output voltage using SVPWM Technique 67
Fig.6.21: Wave forms of grid input voltage & current 68
Fig. 6.22: Wave form of current in rectifier A 69
Fig. 6.23: Wave form of DC-Link capacitor voltage 69
Fig. 6.24: Wave forms of currents in rectifier A & B 70
Fig. 6.25: Wave form of output line voltage 70
Fig. 6.26: Wave form of circulating current 71
Fig. 6.27: Wave form of DC-Link capacitor voltage 71
Fig. 6.28 : THD content at input current using SVPWM Technique 72
Fig. 6.29: THD content at input current using SPWM technique 72
Fig. 6.30 : THD content at output voltage with SPWM technique 73
Fig. 6.31 : THD content at output voltage with SVPWM technique 73
LIST OF TABLES
Description Pg. No.Table 1: ratings of induction motor 19Table 2: Switching vectors, phase voltages and output line to line voltages 26Table 3: Efficiency of the Proposed System Normalized In Terms Conventional 55Table 4: Comparison of conventional and proposed systems for 110V supply 68Table 5: Comparison of conventional and proposed systems for 230V 74Table 6: Distribution of currents for different values of modulation index 74
Introduction
Chapter 1
INTRODUCTION
1.1 Introduction:
Many solutions have been proposed when the objective is to supply three-phase motors from single-phase ac mains. It is quite common to have only a single phase power grid in residential, commercial, manufacturing and mainly in rural areas, while the induction motor may require a three-phase power grid. The motor and power factor control and reduction of total harmonic distortion have been presented by using a single phase to three-phase converter topology, this is a two step conversion which involves single phase a.c to d.c by using a rectifier and then d.c to a.c by using three phase inverter reduced number of switching devices. The most desirable characteristics of ac to ac power converters are:
Sinusoidal input and output currents
Operation with nearly unity power factor for any load
Simple and compact power circuit
Generation of load voltage with arbitrary amplitude and frequency
A front end-rectifier followed by a pulse width modulated voltage source
inverter (VSI-PWM) has been well-established power converter configuration for many
industrial drives. The increasing costs on the utility usage, due to power quality
regulations and the need to improve the fault tolerance characteristics and VA capacity
of systems, have increased the interest in the development of power electronic
equipment with power factor quality capability. Electrical motors consume a large
amount of the available electrical energy and this energy tends to increase due to the
massive emerging applications of electrical motor drives, in appliances and in industrial
processes. Therefore, the improvement of the power factor of these low power drive
systems, usually in the range from fractional horsepower to one horsepower is of
particular interest. For these power ratings, the system configuration usually comprises
a single-phase to three-phase type of converter with additional circuitry for power factor
control and reduction of T.H.D. Single-phase to three-phase ac–dc–ac conversion
usually employs a full-bridge topology. This system composed of two parallel single-
phase rectifiers and a three-phase inverter and induction motor. The proposed system is
9
Introduction
conceived to operate where the single-phase utility grid is the unique option available.
Three such converter topologies, which use reduced number of switching devices, were
presented along with their power factor control scheme.
.
1.2 Motivation of Work:
In the present work a way to operate the motor and power factor control,
reduction of total harmonic distortion has been presented by using a single phase to
three-phase converter topology, which involves reduced number of switching devices.
The proposed schemes were shown to achieve unity power factor operation at the
supply side and high performance control of the motor drive system, etc. We will
analyze the performance of a single-phase a.c to three phase a.c circuit with emphasis
on the output harmonic content and utilization of input voltage. Parallel converters have
been used to improve the power capability, reliability, efficiency, and redundancy. Also
continuity of the power is obtained even though any one of the rectifier is failed.
1.3 Problem Definition:
Single phase to three phase ac-dc-ac conversion usually has the rectifier
switching currents, the harmonic distortion at the input converter side. Discontinuity of
the power is observed when a fault occurs across the rectifier.So these problems are
minimised in the given system by using parallel converter techniques.
1.4 Scope of the project:
As switching currents are more at the input side, parallel converters technique
has been used to reduce the switching currents. SVPWM technique has been used to
reduce the T.H.D content. If one of the rectifiers is failed, Continuity of the power is
observed by using parallel rectifiers.
1.5 Solution Technique:
parallel converter techniques has been employed for continuity of power for
sharing of current between two parallel rectifiers, so that switching currents are
reduced. PWM technique has been used to generate the gating pulses across the rectifier
switches. SVPWM technique is used to reduce the T.H.D content in the overall system.
10
Introduction
1.6 Literature Overview:
“High-Performance Speed-Sensorless Control of an Induction Motor Drive Using a
Minimalist Single-Phase PWM Converter” by Olorunfemi Ojo, Senior Member, IEEE,
Zhiqiao Wu, Student Member, IEEE, Gan Dong, Student Member, IEEE, and Sheetal
K. Asuri.
Summary:
Home appliances and comfort conditioners are yet to benefit from the recent
developments in power electronics because of cost constraints. In this paper, a speed-
sensor less induction motor drive system using converters with reduced device counts
(minimalist, sparse converters) and actuated from a single-phase system is proposed for
such low-cost applications. The analysis, control, dynamic, and steady-state
characteristics of the proposed drive are experimentally illustrated.
This paper has presented the methodology for the analysis and control of a high-
performance induction motor drive actuated by two controlled rectifier–inverter
systems with reduced count of switching devices. The general approach for determining
the modulation signals required for the carrier-based PWM pulse generation for this
class of minimalist converters has been set forth. The input supply voltage is a single
phase and the input current is controlled using a natural reference frame controller to
operate close to unity displacement power factor. The nature of the modulation signals,
the achievable motor dynamics, and waveforms are clearly layout in simulation results.
“Reduced Switch Count Multiple Three-Phase AC Machine Drive Systems” by
Introducing a parameter μ (0 ≤ μ ≤ 1), the variable v∗x can be written as
(5.32)
When μ = 0, μ = 0.5, and μ = 1 the auxiliary variable v∗x has the following
values v∗x = v∗xmin, v∗x = v∗x have = (v∗xmin +v∗xmax)/2, and v∗x = v∗xmax,
respectively. When v∗x = v∗xmin or v∗x = v∗xmax a converter leg operates with
zero switching frequency.
Once v∗x is chosen, pole voltages v∗a10, v∗a20, v∗b10, and v∗b20are
defined from (5.26) to (5.29). The gating signals are obtained by comparing pole
voltages with one (vt1), two (vt1 and vt2) or more high frequency triangular carrier
signals. In the case of double-carrier approach, the phase shift of the two triangular
carrier signals (vt1 and vt2) is 180 ◦.
The parameter μ changes the place of the voltage pulses related to va and vb .
When v∗x = v∗xmin (μ = 0) or v∗x = v∗xmax(μ = 1) are selected, the pulses are
placed in the begin or in the end of the half period (Ts ) of the triangular carrier signal.
On the other hand, when v∗x =v∗x have the pulses are centred in the half period of the
carrier signal. The change of the position of the voltage pulses leads also to the change
in the distribution of the zero instantaneous voltages (i.e., va = 0 and vb = 0).With μ = 0
or μ = 1 the zero instantaneous voltages are placed at the beginning or at the end of the
switching period, respectively, while with μ = 0.5, they are distributed equally at the
beginning and at the end of the half period. This is similar to the distribution of the
51
Design Methodology of Proposed Converter
zero-voltage vector in the three-phase inverter. Consequently, μ influences the
harmonic distortion of the voltages generated by the rectifier.
5.4 Control Strategy:
Fig. 5.3 presents the control block diagram of the system in Fig. 5.2,
highlighting the control of the rectifier. The rectifier circuit of the proposed system has
the same objectives of that in Fig. 5.1, i.e., to control the dc-link voltage and to
guarantee the grid power factor close to one. Additionally, the circulating current io in
the rectifier of the proposed system needs to be controlled. In this way, the dc-link
voltage vc is adjusted to its reference value vc using the controller Rc , which is a
standard PI type controller. This controller provides the amplitude of the reference grid
current Ig . To control power factor and harmonics in the grid side, the instantaneous
reference current ig must be synchronized with voltage eg , as given in the voltage
oriented control (VOC) for three-phase system. This is obtained via blocks Ge-Ig, based
on a PLL scheme. The reference currents i*a and i*b are obtained by making i∗a = i∗b
= i∗g /2, which means that each rectifier receives half of the grid current. The control
of the rectifier currents is implemented using the controllers indicated by blocks Ra and
Rb . These controllers can be implemented using linear or nonlinear techniques. In this
paper, the current control law is the same as that used in the two sequences synchronous
controller described.
Fig. 5.3: Control Block Diagram for rectifier
These current controllers define the input reference voltages v∗a and v∗b .The
homopolar current is measured (io ) and compared to its reference (i∗o = 0). The error
is the input of PI controller Ro , that determines the voltage v∗o . The calculation of
52
Design Methodology of Proposed Converter
voltage v∗x is given from (5.30) to (5.32) as a function of μ, selected as shown in the
Section V. The motor there-phase voltages are supplied from the inverter (VSI). Block
VSI-Ctr indicates the inverter and its control. The control system is composed of the
PWM command and a torque/flux control strategy (e.g., field-oriented control or
volts/hertz control).
5.5 Harmonic Distortion:
The harmonic distortion of the converter voltages has been evaluated by using
the weighted THD (WTHD). It is computed by using
(5.33)
where a1 is the amplitude of the fundamental voltage, ai is the amplitude of ith
harmonic and p is the number of harmonics taken into consideration Fig. 4 shows the
WTHD of voltages generated by rectifiers [vab = (va + vb )/2 for the proposed
configuration and vg =vg10 − vg20 for the conventional one] at rated grid voltage as a
function of μ. Note that the parameter μ determines v∗x from (5.30) to (5.32). The
resultant voltage vab generated by rectifier is responsible to control ig, which means
that this voltage is used to regulate the harmonic distortion of the utility grid.
When the single-carrier PWM is used, the behaviour of WTHD of the proposed
system is similar to that of conventional one for all μ, as observed in Fig. 5.4. When the
double-carrier PWM is used with μ = 0.5, the WTHD is also the same for both
configurations. However, for the other values of μ the WTHD of the proposed system is
lower than that of the conventional one. The WTHD of the proposed topology (double-
carrier with μ = 0 or μ = 1) is close to 63% of that of the conventional topology (with μ
= 0.5). The study has also shown that it is possible to reduce the switching frequency of
the proposed system in 60% and still have the same WTHD of the standard
configuration.
53
Design Methodology of Proposed Converter
Fig. 5.4: WTHD of rectifier voltage (vab for proposed configuration and vg forstandard configuration) as a function of μ.
The WTHD behaviour in Fig. 5.4 can be explained from Fig. 5.5. That figure
depicts the pole voltages (va10, va20, vb10, vb20) and their references (v∗a10, v∗a20,
v∗b10, v∗b20), the triangular carrier signals (vt1 , vt2 ), the resultant rectifier voltage
(vab ) and the circulating voltage (vo ). Fig. 5.5(a) and (c) shows these variables with
single-carrier (with μ = 1) and double-carrier (with μ =1), respectively. For the double-
carrier the voltage vab has smaller amplitude and better distribution along the half
switching period than that of single-carrier, which means a lower WTHD (as observed
in Fig. 5.4 for μ = 1). On the other hand, for μ = 0.5 the distribution of voltage vab
along the switching period is the same for both cases, i.e., single-carrier and double-
carrier have the same WTHD (as observed in Fig. 4 for μ = 0.5).
Besides the total harmonic distortion (THD) of the grid current ig , associated to
the WTHD of the voltage vab , the harmonic distortion analysis must also consider the
currents in the rectifiers. This is an important issue due to losses of the converter. The
harmonic distortion of the rectifier currents (ia , i’a , ib , and i’b ) with double-carrier is
higher than that of the grid current ig . When the parallel rectifier with double-carrier is
used, the THD of all these currents are reduced for μ = 0 orμ = 1 and increased for μ =
0.5. On the other hand, the THD of the circulating current is also smaller with μ = 0 or
μ = 1. Fig. 5.6 shows currents ia , i’a , and io for double-carrier with μ = 1 and μ = 0.5.
54
Design Methodology of Proposed Converter
It can be seen that the mean values of the ripples of all currents are smaller when μ = 1
is selected.
In conclusion the optimal rectifier operation is obtained with double-carrier
making μ = 0 or μ = 1. A four-carrier approach may also be used. Compared with the
two-carrier strategy, the four-carrier strategy permits to reduce the harmonic distortion
of the grid current, but increases the rectifier losses.
Fig. 5.5: Variables of rectifiers A and B. (a) Single-carrier with μ = 1.
(b) Single-carrier with μ = 0.5. (c) Double-carrier with μ = 1.
(d) Double carrier with μ = 0.5.
55
Design Methodology of Proposed Converter
Fig. 5.6: Currents ia , i_a , and io for double-carrier with μ = 1 and μ = 0.5.
5.6 Ratings of Switches:
Assuming same rms voltages at both grid and machine sides, a machine power
factor of 0.85 and neglecting the converter losses, currents of the rectifier switches
normalized in terms of currents of the inverter switches are 2.55 and 1.27 for the
conventional and the proposed single-phase to three-phase converter, respectively. Fig.
5.7(a) and (b) shows the flow of active power in the conventional and in the proposed
single-phase to three-phase converter, respectively. For balanced system (L’g =La = L’a
= Lb = L’b ), voltage vo is close to zero, so that the dc-link voltage is equal to that
required by the conventional system. Since the parallel connection scheme permits to
reduce the switch currents and preserve the dc-link voltage, the rating of each power
switch in the rectifier side is reduced.
56
Design Methodology of Proposed Converter
Fig. 5.7(a): Flow of active power in Conventional ac–dc–ac single-phase to three phase converter
Fig. 5.7(b): Flow of active power in proposed system with two rectifiers
5.7 DC-Link Capacitor Design:
The dc-link capacitor design and calculation carried out in this section. The
voltage ripple over the dc capacitor is limited to an imposed maximum value of Δvmax.
some simplified assumptions are considered such that the integration time interval (t1,
t2) is half of the switching period Tsw and the dc current (Idc) is half of the peak value
of the nominal line current.
Then the minimum required dc capacitor is given by
57
Design Methodology of Proposed Converter
Where idc and νdc are current and voltage of the dc capacitor, respectively, Tsw
is the switching period, and Δνdc is the voltage ripple.
1/2√ 2× 10 ×0.1 ×2230 × √ 2
C=4.7mF
5.8 Input Inductors:
The design of input inductors is carried out in this section.
Where Vdc is the voltage on the dc capacitor and Δi is the amplitude of the
cross-current developed during the interval t0, the Vdc obtained is 230V
LF= 2× 230×1/50
3(10+0.34+32)× √ 2
L= 5mH
The THD of the grid current as a function of μ for different values of ln [the
inductances of rectifiers A and B (l’g ) referred to that of the conventional configuration
(lg ), i.e., ln = l’g /lg ]. For ln > 0.4 (l’g > 0.4lg) the THD of the grid current of the
proposed topology is smaller than that of the conventional topology.
58
Design Methodology of Proposed Converter
Fig. 5.8: Inductor specification in terms of THD of ig and μ.
5.9 Fault Compensation:
The proposed system presents redundancy of the rectifier converter, which can
be useful in fault-tolerant systems. The proposed system can provide compensation for
open-circuit and short-circuit failures occurring in the rectifier or inverter converter
devices.
The fault compensation is achieved by reconfiguring the power converter
topology with the help of isolating devices (fast active fuses—Fj , j = 1, . . . , 7) and
connecting devices (back-to-back connected SCRs—t1 , t2 , t3 ), as observed in Fig.
5.10(a). These devices are used to redefine the post-fault converter topology, which
allows continuous operation of the drive after isolation of the faulty power switches in
the converter. Fig. 5.10(b) presents the block diagram of the fault diagnosis system. In
this figure, the block fault identification system (FIS) detects and locates the faulty
switches, defining the leg to be isolated. This control system is based on the analysis of
the pole voltage error.
The fault detection and identification is carried out in four steps:
1) Measurement of pole voltages (vj0).
2) Computation of the voltage error εj0 by comparison of reference voltages and
measurements affected in Step 1).
3) Determination as to whether these errors correspond or not to a faulty condition; this
can be implemented by the hysteresis detector shown in Fig. 5.10(b).
4) Identification of the faulty switches by using ε’j0.
59
Design Methodology of Proposed Converter
Fig. 5.9(a): Proposed configuration highlighting devices of fault-tolerant system.
Fig.5.9 (b): Block diagram of the fault diagnosis system.
This way, four possibilities of configurations have been considered in terms of faults
1) Pre-fault (“healthy”) operation.
2) Post-fault operation with fault at the rectifier B
3) Post-fault operation with fault at the rectifier A.
4) Post-fault operation with fault at the inverter.
When the fault occurrence is detected and identified by the control system, the
proposed system is reconfigured and becomes similar to that in Fig. 1. For instance, if a
fault in any switch of rectifier A has been detected by the control system, the whole
rectifier needs to be isolated.
60
Design Methodology of Proposed Converter
Fig. 5.10: Possibilities of configurations in terms of fault occurrence. (a) Pre-fault system.
(b) Post-fault system with fault at the rectifier B. (c) Post-fault system with fault at the rectifier A. (d) Post-fault system with fault at the inverter.
This isolation procedure depends on the kind of fault detected. If an open-circuit
failure is detected, the control system will open all switches of the rectifier A. On the
other hand, if a short circuit is detected, the control system will turn on all switches
related to rectifier A, and in this case, the fuses will open, and consequently, the
rectifier will be isolated. Considering now a fault in one leg of inverter, in this case the
SCR related with this leg in turned on and the leg b1 is isolated, so that the leg b2 of
rectifier B will operate as the leg of inverter
5.10 Losses and Efficiency:
The evaluation of the rectifier losses is obtained through regression model
presented. The switch loss model includes:
1) IGBT and diode conduction losses
2) IGBT turn-on losses
3) IGBT turn-off losses and
4) Diode turn-off energy.
The loss evaluation takes into account just the rectifier circuit, since the inverter
side of converter is the same for the proposed and standard configurations. When the
61
Design Methodology of Proposed Converter
rectifiers operate with a switching frequency equal to 5 kHz, the conduction and
switching losses of the proposed topology were 70% and 105%, respectively, of the
corresponding losses of the conventional topology. Consequently, in this case, the total
loss of the proposed topology was smaller than that of the conventional topology. The
increase of the switching frequency does not change the conduction losses of both
topologies, but increases their switching losses, especially for the proposed topology
that has a high number of switches. The efficiency of the topologies operating with a
switching frequency equal to 10 kHz and 5 kHz was evaluated by experimental
measurement with a 2 kW load. Table
Figure below shows the experimental results of the rectifier efficiency. Such
results are obtained for the proposed system (ηp) normalized in terms conventional one
(ηc), for three cases:
1) Both rectifiers operating at 10 kHz and L’g = Lg
2) Both rectifiers operating at 10 kHz and L’g = Lg /2 and
3) Both rectifiers operating at 5 kHz and L’g = Lg.
Three strategies are considered in terms of PWM control:
1) Single-carrier with μ = 0.5 (S-Ca μ = 0.5)
2) Double-carrier with μ = 0.5 (D-Ca μ = 0.5) and
3) Double carrier with μ = 0 (D-Ca μ = 0).
For case 1) the proposed configuration with double-carrier and μ = 0 have its
efficiency slightly smaller than that of the conventional one, but with the other PWM
strategies its efficiency is clearly inferior. In the other cases, the proposed configuration
with double-carrier and μ = 0 presents higher efficiency than the conventional one.
Table 3: Efficiency of the Proposed System Normalized In Terms Conventional One
5.11 Costs and Applications of Configuration:
62
Design Methodology of Proposed Converter
The initial investment of the proposed system is higher than that of the standard
one, since the number of switches and devices such as fuses and triacs is highest. But,
considering the scenario when faults may occur, the drive operation needs to be stopped
for a non-programmed maintenance schedule. The cost of this schedule can be high and
this justifies the high initial investment inherent of fault-tolerant motor drive systems.
On the other hand, the initial investment can be justified if the THD or losses of the
conventional system is a critical factor. Furthermore, the cost of power switches has
decreased substantially. This permits to employ extra switches without increasing the
final price of converter dramatically The proposed system can be used in the same
applications as the conventional configuration (rural or remote application), especially
when the THD of the grid current, fault tolerance and efficiency of converter are critical
issues. In Brazil, it is quite common to have a single-phase distribution system and a
demand to supply a three-phase motor. A single-phase to three phase converter with
bidirectional flux in the rectifier circuit has been required in the distributed generation
system.
5.12 pulse train of control circuits of rectifier and inverter switches:
Fig 5.11(a) pulse trainee of rectifier control circuit
The above figure shows four generated pulse signals of qa1, qa2, qb1, qb2 for rectifier
switches.
63
Design Methodology of Proposed Converter
Fig 5.11(b) pulse train for inverter switches
The above figure shows pulse train signals for inverter switches
64
Simulation and result discussion
Chapter 6
SIMULATION AND RESULT DISCUSSION
6.1 Simulation Results for 110V AC:
6.1.1 Simulation of Conventional Model:
Fig. 6.1: Simulink model of conventional system
The above figure shows the matlab/simulink model of the conventional system with
single rectifier and three phase inverter.
Fig. 6.2: Wave forms of grid input voltage & current
65
Simulation and result discussion
The above figure shows the input side grid voltage of 110 Volts and grid current of 10
Amps which are in phase, so that the power factor is close to unity.
Fig. 6.3: Wave form of DC-Link capacitor voltage
The above figure shows constant capacitor voltage of 230 V d.c across dc link
capacitors for a given input voltage of 110V a.c at the grid side, it can be seen that small
amount of dc link ripple component exists in the above waveform.
Fig. 6.4: Wave form of current in rectifier A
The above figure shows the input currents i'a of 4 Amps and along with their duty-
cycles which is pure sinusoidal.
66
Simulation and result discussion
Fig. 6.5: Wave form of output line voltage
The above figure shows the synthesized three-phase balanced line to line voltage of
125V obtained from input of 230V d.c to the three phase inverter. However, there still
exist some distortion and unbalance due to low speed at starting.
Fig. 6.6: THD content at input current is 19.36%
The above figure shows harmonic content of 19.35% at the input current side for the
conventional system.
67
Simulation and result discussion
6.1.2 Simulation of Proposed Model:
Fig. 6.7: Simulink model of proposed system
The above figure shows the matlab/simulink model of the two single phase rectifiers
connected in parallel which is controlled by a control strategy which helps in
controlling the DC link voltage, controls the circulating current io in the rectifier and
guarantee’s the grid power factor to be close to unity. The system is connected to a
three phase drive system with the help of an inverter.
Fig. 6.8: Simulink model of control circuit for rectifier
68
Simulation and result discussion
The above figure shows Matlab /simulink model of rectifier control circuit where
voltage Vc ic adjusted to its reference value V*c using pi controller.
Fig. 6.9: Simulink model of control circuit for inverter
The above figure shows Matlab /simulink model of inverter control circuit where speed
and torque is taken as reference from induction motor
Fig. 6.10: Wave forms of grid input voltage & current
The above figure shows the input side grid voltage of 110 Volts and grid current of
10 Amps which are in phase, so that the power factor is nearly to unity.
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Simulation and result discussion
Fig. 6.11: Wave form of DC-Link capacitor voltage
The above figure shows constant capacitor voltage of 230 Volts across dc link
capacitors obtained from 110V a.c supply, it can be seen that small amount of dc link
ripple component exists in the above waveform.
Fig. 6.12: Wave form of circulating current
The above figure shows circulating current which is close to zero, this current circulates
in the system itself and doesn’t goes to load, so these current made to zero.
70
Simulation and result discussion
Fig. 6.13: Wave forms of currents in rectifier A & B
The above figure shows the input currents of rectifier ia & ib of 4 Amps each and along
with their duty-cycles. It can be noticed that the currents are sinusoidal of equal
magnitude, this is due to modulation index(1/2) given in the control circuit for sharing
of equal currents from the total input current of 8A between two rectifiers.
6.1.1.1 Simulation results of Proposed Model when a fault is identified at rectifier B:
Fig. 6.14: Wave forms of grid voltage & current in fault condition
The above figure shows grid voltage and grid current which are in phase and also there
is a variation in waveforms due to failure of rectifier B
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Simulation and result discussion
Fig. 6.15: Wave forms currents in rectifier A & B in fault condition
The above figure shows rectifier currents of rectifier ia & ib, it can be observed the
current ib is zero at interval 0.2, because of failure of rectifier B.
Fig. 6.16: Wave forms currents in rectifier A & B in fault condition
The above figure shows rectifier currents of rectifier ia & ib, it can be observed the
current ib is zero at interval 0.2,because of failure of rectifier B and then the fault is
isolated at interval 0.6. By using a clock signal the time period of fault is adjusted
intentionally by using circuit breaker.
72
Simulation and result discussion
Fig. 6.17: THD content at input current using SPWM Technique is 9.24%
The above figure shows harmonic content of 9.24% at the input current side for the
proposed system by using SPWM Technique.
Fig. 6.18: THD content at input current using SVPWM Technique is 4.55%
The above figure shows harmonic content of 4.55% at the input current side for the
proposed system by using SVPWM Technique.
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Simulation and result discussion
Fig. 6.19: THD content at output voltage using SPWM Technique is 14.84%
The above figure shows harmonic content of 14.84% at the output voltage side for the
conventional system by using SPWM Technique.
Fig. 6.20: THD content at output voltage using SVPWM Technique is 12.90%
The above figure shows harmonic content of 12.90% at the output voltage side for the
proposed system by using SPWM Technique.
74
Simulation and result discussion
Parameters Conventional System
Proposed System
SPWM SVPWM
Input Current 7.831 Amps 5.518 Amps 5.35 Amps
Input Voltage 110 Volts 110 Volts 110 Volts
Power Factor 0.937 0.989 0.996Input Power 608.4 Watts 428.7 Watts 415.69 Watts
Total Harmonic Distortion
19.35% 9.24% 4.55%
Current through Switch
7.8Amps 6.8 Amps 6.3 Amps
Power Loss across switch
6.1 Watts 4.6 Watts 3.9 Watts
Output Voltage 121.24 Volts 121.24 Volts 121.24 VoltsOutput Current 4.023 Amps 3.28 Amps 3.3 AmpsOutput Power 487.76 Watts 398.22 Watts 400.54WattsEfficiency 80.17% 92.89% 96.25%
Table 4: Comparison of conventional and proposed systems
The above table shows comparison between conventional and proposed (with spwm
and svpwm) system, it can be clearly noticed that the total harmonic distortion is
reduced from 19.35% to 4.55% and improvement in power factor (0.937 t0 0.996) and
efficiency (80.17% to 96.25%).
6.2 Simulation Results for 230V AC:
6.2.1 Simulation of Conventional Model:
Fig.6.21: Wave forms of grid input voltage & current
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Simulation and result discussion
The above figure shows the input side grid voltage of 230 Volts and grid current of
24 Amps which are in phase, so that the power factor is nearly unity.
Fig. 6.22: Wave form of current in rectifier A
The above figure shows the input current of rectifier ia of 22 Amps which is sinusoidal
and along with their duty-cycles.
Fig. 6.23: Wave form of DC-Link capacitor voltage
The above figure shows constant capacitor voltage of 440 Volts across dc link
capacitors obtained from 230V a.c supply, it can be seen that small amount of dc link
ripple component exists in the above waveform.
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Simulation and result discussion
6.2.2 Simulation of proposed Model:
Fig. 6.24: Wave forms of currents in rectifier A & B
The above figure shows the input currents of rectifier ia & ib of 13 Amps each and
along with their duty-cycles. It can be noticed that the currents are sinusoidal of
equal magnitude, this is due to modulation index(1/2) given in the control circuit for
sharing of equal currents from the total input current of 23A between two rectifiers
Fig. 6.25: Wave form of output line voltage
The above figure shows the synthesized three-phase balanced line to line voltage of
230V obtained from input of 440V d.c to the three phase inverter. However, there still
exist some distortion and unbalance due to low speed at starting.
77
Simulation and result discussion
Fig. 6.26: Wave form of circulating current
The above figure shows above shows circulating current which is close to zero, this
current circulates in the system itself and doesn’t goes to load, so these current is made
to zero.
Fig. 6.27: Wave form of DC-Link capacitor voltage
The above figure shows constant capacitor voltage of 440 Volts across dc link
capacitors obtained from 230V a.c supply, it can be seen that small amount of dc link
ripple component exists in the above waveform.
78
Simulation and result discussion
Fig. 6.28: THD content at input current using SVPWM Technique of 4.02%
The above figure shows harmonic content of 4.02% at the input side for the proposed
system by using SVPWM Technique
Fig. 6.29: THD content at input current using SPWM technique of 8.12%
The above figure shows harmonic content of 8.12% at the input side for the proposed
system by using SPWM Technique.
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Simulation and result discussion
Fig. 6.30: THD content at output voltage with SPWM technique of 15.34%
The above figure shows harmonic content of 15.34% at the output voltage side for the
proposed system by using SPWM Technique.
Fig. 6.31: THD content at output voltage with SVPWM technique of 10.26%
The above figure shows harmonic content of 10.26% at the output voltage side for the
proposed system by using SVPWM Technique.
Parameters Conventional System Proposed System
SPWM SVPWM
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Simulation and result discussion
Input Current 25.96 Amps 20.15 Amps 18.05 Amps
Input Voltage 230 Volts 230 Volts 230 Volts
Power Factor 0.937 0.989 0.996
Input Power 3226.6 Watts 2646.29 Watts 2390.23 Watts
Total Harmonic Distortion
19.32% 15.82% 4.55%
Current through Switches
12.98Amps 10.7 Amps 9 Amps
Power Loss across switches
16.84 Watts 11.45 Watts 8.1 Watts
Output Voltage 440 Volts 440 Volts 440 VoltsOutput Current 11.66 Amps 9.5 Amps 8.945 AmpsOutput Power 2794.37 Watts 2413.32 Watts 2260.90WattsEfficiency 86.67% 91.96% 94.6%
Table 5: Comparison of conventional and proposed systems
The above table shows comparison between conventional and proposed (with spwm
and svpwm) system, it can be clearly noticed that the total harmonic distortion is
reduced from 19.32% to 4.55% and improvement in power factor (0.937 to 0.996) and
efficiency (86.67% to 96.25%).
Table 6: Distribution of currents for different values of modulation index