www.compaq.com Simultaneous Multithreading: Simultaneous Multithreading: Multiplying Alpha Performance Multiplying Alpha Performance Dr. Joel Emer Dr. Joel Emer Principal Member Technical Staff Principal Member Technical Staff Alpha Development Group Alpha Development Group Compaq Computer Corporation Compaq Computer Corporation
23
Embed
Simultaneous Multithreading: Multiplying Alpha Performance€¦ · u "Simultaneous Multithreading: Maximizing On-Chip Parallelism" by Tullsen, Eggers and Levy in ISCA95. u "Exploiting
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
uu Leading edge process technology – 1.2- 2.0GHzLeading edge process technology – 1.2- 2.0GHzll 0.125µm CMOS0.125µm CMOSll SOI- compatibleSOI- compatiblell Cu interconnectCu interconnectll low- k dielectricslow- k dielectrics
uu Replicated resourcesReplicated resourcesll Program countersProgram countersll Register mapsRegister maps
uu Shared resourcesShared resourcesll Register f ile (size increased)Register f ile (size increased)ll Instruct ion queueInstruct ion queuell First and second level cachesFirst and second level cachesll Translat ion buffersTranslat ion buffersll Branch predictorBranch predictor
uu Solut ion:Solut ion:Provide Provide quiescingquiescing operat ion that allows a operat ion that allows aTPU to sleep unt il a memory locat ion changesTPU to sleep unt il a memory locat ion changes
www.compaq.com
SummarySummary
uu Alpha will maintain single stream performanceAlpha will maintain single stream performanceleadershipleadership
uu SMT will signif icant ly enhance mult istreamSMT will signif icant ly enhance mult istreamperformanceperformance
ll Across a wide range of applicat ions,Across a wide range of applicat ions,
ll Without signif icant hardware cost, andWithout signif icant hardware cost, and
ll Without major architectural changesWithout major architectural changes
www.compaq.com
ReferencesReferences
uu ""Simultaneous Multithreading: Maximizing On-Chip ParallelismSimultaneous Multithreading: Maximizing On-Chip Parallelism" by" by Tullsen Tullsen, Eggers, Eggersand Levy in ISCA95.and Levy in ISCA95.
uu ""Exploiting Choice: Instruction Fetch and Issue on anExploiting Choice: Instruction Fetch and Issue on an Implementable Implementable Simultaneous SimultaneousMultithreaded ProcessorMultithreaded Processor" by" by Tullsen Tullsen, Eggers, Emer, Levy, Lo and, Eggers, Emer, Levy, Lo and Stamm Stamm in inISCA96.ISCA96.
uu ““Converting Thread-Level Parallelism to Instruction-Level Parallelism via SimultaneousConverting Thread-Level Parallelism to Instruction-Level Parallelism via SimultaneousMultithreadingMultithreading” by Lo, Eggers, Emer, Levy, ” by Lo, Eggers, Emer, Levy, StammStamm and and Tullsen Tullsen in ACMin ACMTransact ions on Computer Systems, August 1997.Transact ions on Computer Systems, August 1997.
uu “Simultaneous Mult ithreading: A Plat form for Next- Generat ion“Simultaneous Mult ithreading: A Plat form for Next- Generat ionPrcoessorsPrcoessors” by Eggers, Emer, Levy, Lo, ” by Eggers, Emer, Levy, Lo, Stamm Stamm and and Tullsen Tullsen in IEEEin IEEEMicro, October, 1997.Micro, October, 1997.