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All general commands are described in the “PowerView Command Reference” (ide_ref.pdf) and “General Commands Reference”.This document describes the processor specific settings and features for the SIM TRICORE.
The extensive use of the TRACE32 Instruction Set Simulator requires a TRACE32 Simulator License.
For more information, see www.lauterbach.com/sim_license.html.
Brief Overview of Documents for New Users
Architecture-independent information:
• “Debugger Basics - Training” (training_debugger.pdf): Get familiar with the basic features of a TRACE32 debugger.
• “T32Start” (app_t32start.pdf): T32Start assists you in starting TRACE32 PowerView instances for different configurations of the debugger. T32Start is only available for Windows.
• “General Commands” (general_ref_<x>.pdf): Alphabetic list of debug commands.
Architecture-specific information:
• “Processor Architecture Manuals”: These manuals describe commands that are specific for the processor architecture supported by your debug cable. To access the manual for your processor architecture, proceed as follows:
- Choose Help menu > Processor Architecture Manual.
• “OS Awareness Manuals” (rtos_<os>.pdf): TRACE32 PowerView can be extended for operating system-aware debugging. The appropriate OS Awareness manual informs you how to enable the OS-aware debugging.
Example Scripts
In your TRACE32 installation directory there is a subdirectory ~~/demo/tricore/ where you will find example scripts and demo software:
compiler/ Compiler examples.
hardware/ The demo scripts usually also run in the simulator.
This chapter should help you to prepare your Simulator for TriCore. For some applications additional steps might be necessary that are not described in this Quick Start section.
See the Example Scripts for more examples.
1. Select the Device Prompt B: for the ICD Debugger
On all TRACE32 tool configurations except for the emulator device B:: is already selected.
2. Select the CPU Type to load the CPU specific Settings
3. Enter Debug Mode
This command resets the CPU and enters debug mode. After this command is executed, it is possible to access memory and registers.
4. Load your Application Program
The options of the Data.LOAD command depend on the file format generated by the compiler. For information on the compiler options refer to the section Compiler. A detailed description of the Data.LOAD command is given in “General Commands Reference”.
B::
SYStem.CPU TC1766
SYStem.Up
Data.LOAD.Elf myprog.elf ; ELF specifies the format, myprog is the file name
Now the quick start is done. If you were successful you can start to debug, it is recommended to prepare a PRACTICE script (*.cmm, ASCII file format) to be able to do all the necessary actions with only one command.
Here is a typical start sequence:
*) These commands open windows on the screen. The window position can be specified with the WinPOS command.
For information about how to build a PRACTICE script file (*.cmm file), refer to “Debugger Basics - Training” (training_debugger.pdf). There you can also find some information on basic actions with the debugger.
Please keep in mind that only the Processor Architecture Manual (the document you are reading at the moment) is CPU specific, while all other parts of the online help are generic for all CPUs. So if there are questions related to the CPU, the Processor Architecture Manual should be your first choice.
B:: ; Select the ICD device prompt
WinCLEAR ; Clear all windows
SYStem.CPU TC1766 ; Select CPU
SYStem.Up ; Reset the target and enter debug; mode
Data.LOAD.Elf myprog.elf ; Load the application
Data.List ; Open disassembly window *)
Register /SpotLight ; Open register window *)
Frame.view /Locals /Caller ; Open the stack frame with ; local variables *)
Var.Watch %Spotlight flags ast ; Open watch window for variables *)
PER.view ; open window with peripheral register; *)
Break.Set main ; Set breakpoint to function main
Break.Set 0xD0000200 ; Set breakpoint to address; 0xD0000200
P: and D: display the same memory, the difference is in handling the symbols.
Prepending an E as attribute to the memory class will make memory accesses possible even when the CPU is running. See SYStem.MemAccess and SYStem.CpuAccess for more information.
In the Simulator, all memories are dual-port capable by default.
Memory Class Description
P Program
D Data
EEC Emulation Memory on EECOnly available on TriCore Emulation Devices for accessing the Emulation Extension Chip
SYStem.CONFIG Configure debugger according to target topology
The SYStem.CONFIG commands have no effect in Simulator. These commands describe the physical configuration at the JTAG port and the trace port of a multi-core hardware target. Since the simulator normally just simulates the instruction set, these commands will be ignored. Refer to the relevant Processor Architecture Manual in case you want to know the effect of these commands on a debugger.
SYStem.CONFIG.DAP.BreakPINS Define mapping of break pins
Command has no effect in Simulator.
SYStem.CONFIG.DAP.DAPENable Enable DAP mode on PORST
Command has no effect in Simulator.
SYStem.CONFIG.DAP.USERn Configure and set USER pins
Command has no effect in Simulator.
SYStem.CONFIG.Interface Set debug cable interface mode
This option declares if an intrusive memory access can take place while the CPU is executing code. To perform this access, the debugger stops the CPU shortly, performs the access and then restarts the CPU.
The run-time memory access has to be activated for each window by using the memory class E: (e.g. Data.dump ED:0xA1000000) or by using the format option %E (e.g. Var.View %E var1).
Enable Stop the CPU shortly to perform a memory read or write while the program execution is running.Each short stop takes 1 … 100 ms depending on the speed of the debug interface and on the size of the read/write accesses required.
Denied No intrusive memory read or write is possible while the CPU is executing the program.
Nonstop The program execution can not be stopped and the real-time behavior of the CPU is not affected.Nonstop reduces the functionality of the debugger to:• run-time access to memory and variables• trace displayThe debugger inhibits the following:• to stop the program execution• all features of the debugger that are intrusive (e.g. spot breakpoints, per-
formance analysis via StopAndGo, conditional breakpoints etc.)
This option declares if and how a non-intrusive memory access can take place while the CPU is executing code. Although the CPU is not halted, run-time memory access creates an additional load on the processor’s internal data bus. The MemAccess mode is printed in the state line.
The run-time memory access has to be activated for each window by using the memory class E: (e.g. Data.dump ED:0xA1000000) or by using the format option %E (e.g. Var.View %E var1). It is also possible to enable non-intrusive memory access for all memory areas displayed by setting SYStem.Option DUALPORT ON.
SYStem.Mode Establish the communication with the CPU
Initial Mode: Down.
The SYStem Modes are not only commands to bring the debugger in a certain debug state, they also reflect the current debug state of the target. SYStem Modes Attach and Go are only transitional states which will result in an Up state on success. Any critical failure will transition the debug state to SYStem Mode Down immediately
The “Emulate” LED on the debug module is ON when the debug mode is active and the CPU is running.
Format: SYStem.Mode <mode>
<mode>: DownNoDebugGoAttachUp
Down The CPU is held in reset, debug mode is not active. Default state and state after fatal errors.
NoDebug The CPU is running. Debug mode is not active, debug port is tristate. In this mode the target behaves as if the debugger is not connected.
Attach User program remains running (no reset) and the debug mode is activated. After this command the user program can be stopped with the break command or if any break condition occurs. The debugger should be in NoDebug mode when performing an Attach.
Go The CPU is running. Debug mode is active. After this command the CPU can be stopped with the break command or if any break condition occurs.
Up The CPU is not in reset but halted. Debug mode is active. In this mode the CPU can be started and stopped. This is the most typical way to activate debugging.
The SYStem.Option command group provides architecture and CPU specific commands.
SYStem.Option DCFREEZE Do not invalidate cache
Command has no effect in Simulator.
SYStem.Option DIAG Diagnosis function
System Diagnosis functions. Please execute only when demanded by LAUTERBACH support engineer. Functionality is undocumented, can change without any notice and may bring the debugger software into an unstable state. Do not use in script files.
SYStem.Option DUALPORT Run-time memory access for all windows
Default: OFF.
Enable permanent non-intrusive memory access for all windows and memory accesses. Memory class E: does not have to be specified any more. This only works when SYStem.MemAccess is set to CPU.
SYStem.Option ETK Debugging together with ETK from ETAS
When this option is enabled, no Data.dump or Data.List windows must be opened while programming the on-chip flash. Otherwise flash operation will fail.
SYStem.Option TC1796FIX Bug fix for disabling the watchdog
Command has no effect in Simulator.
SYStem.Option TC19XXFIX Bug fix required for some TC19XX derivatives
Command has no effect in Simulator.
SYStem.RESetOut Assert nRESET/nSRST on JTAG connector
The command is ignored by the simulator. It is an allowed command that you can run scripts which have actually been made for a debugger. See the Processor Architecture Manual for more information about the effect there.
SYStem.Option WATCHDOGFIX Disables the watchdog on SYStem.Up
Command has no effect in Simulator.
SYStem.state Open SYStem.state window
Opens the SYStem.state window with settings of CPU specific system commands. Settings can also be changed here.
CODE::BLOCKS - -C++TEST - WindowsADENEO -X-TOOLS / X32 blue river software GmbH WindowsCODEWRIGHT Borland Software
CorporationWindows
CODE CONFIDENCE TOOLS
Code Confidence Ltd Windows
CODE CONFIDENCE TOOLS
Code Confidence Ltd Linux
EASYCODE EASYCODE GmbH WindowsECLIPSE Eclipse Foundation, Inc WindowsCHRONVIEW Inchron GmbH WindowsLDRA TOOL SUITE LDRA Technology, Inc. WindowsUML DEBUGGER LieberLieber Software
GmbHWindows
SIMULINK The MathWorks Inc. WindowsATTOL TOOLS MicroMax Inc. WindowsVISUAL BASIC INTERFACE
Microsoft Corporation Windows
LABVIEW NATIONAL INSTRUMENTS Corporation
Windows
TPT PikeTec GmbH WindowsCANTATA QA Systems Ltd WindowsRAPITIME Rapita Systems Ltd. WindowsRHAPSODY IN MICROC IBM Corp. WindowsRHAPSODY IN C++ IBM Corp. WindowsDA-C RistanCASE WindowsTRACEANALYZER Symtavision GmbH WindowsECU-TEST TraceTronic GmbH WindowsUNDODB Undo Software LinuxTA INSPECTOR Vector WindowsVECTORCAST UNIT TESTING
1 User Float. Lic. TRACE32 TriCore SimulatorFloating license to use the TRACE32 Instruction SetSimulator for automated tests via script languagePRACTICE or via the TRACE32 Remote APIsupports TriCorefor Windows32, Windows64, Linux32, Linux64and Solaris, other platforms on requestfloating license via RLM (Reprise License Manager)Please add the RLM HostID of the license serverto your order (please see our FAQ)
Order No. Code Text
LA-2800L SIMULATOR-TC-FL 1 User Float. Lic. TRACE32 TriCore Simulator