Simulation of transient thermal effects during GTO turn off

ELSEVIER

Microelctronics Journal 27 (1996) 217-229 Copyright ~) 1996 Elsevier Science Limited Printed in Great Britain. All rights reserved

0026-2692/96/$15.00

0026-2692(95)00091-7

Simulation of transient thermal effects during GTO turn off P.A. Mawby 1, M. Evans 2 and M.S. "Towers1 I Department of Electrical and Electronic Engineering, University of Wales, Swansea, Singleton Park, Swansea SA2 8PP, UK. Tel: +(44)(0) 1792 295595. Fax: +(44)(0) 1792 295686. E-mail: [email protected] ~Westcode Semiconductors Limited, PO Box 57, Chippenham, Wiltshire SN15 1JL, UK

A rigorous two-dimensiorLal physical model of the GTO thyristor is presented. The :model includes the fully coupled effects of self-heating on the device during the turn-off phase of operation. The effects of spatially-dependent minority carrier lifetime, Auger recombination and carrier- cartier scattering are included in the model. Also, the effect of the temperature gradient on the internal current has been included. The simulation has been carried out within a realistic external circuit environment.

1. Introduction

T he influence of self-heating behaviour in power devices, especially during switching,

becomes critical as switching repetition rates increase. In the case o f the G T O , this is particularly true during turn-off where the charge stored during the on-state must be fully extracted before the terminal currents reduce to zero. In the initial phase o f turn-off, the gate is reverse biased so as to extract holes f rom the p- base, which gradually reduces the area of the conduct ing plasma to a small filament just below the centre of the cathode electrode. During this

phase, known as the storage phase, the main anode current continues to flow essentially unchanged, and afterwards the anode current rapidly falls off during the decay phase. Following this, a characteristic tail current is observed and consists of the remaining charge stored in the n-base region being extracted as the depletion region expands. It is during the tail current phase that the device is known to be at its most vulnerable since the anode voltage is rising rapidly, giving a high instantaneous value o f Joule heating in the device, which results in a peak rise in temperature.

Usually, thermal analysis of semiconductor problems is limited to the steady state [1-4]. However, as the rate o f heat diffusion is much slower than the movement of electrical charge [5] it is clearly unacceptable to assume this, especially as switching times become progressively faster. Previous authors have presented modelling results for the transient switching process [6]; however, in [6] the local

217

P.A. Mawby et al./Simulation of transient thermal effects

lattice heating is calculated in an a posteriori manner based only on the solution of the electrical equations. It is not solved self- consistently with the heat equation. In this paper we consider the effect of self-consistently calculated temperature on the turn-off switching of a GTO structure.

2. The model

The GTO considered in this paper is a conventional 2.5 kV 38 mm diameter symmetrically diffused design which typically finds apphcation in the traction industry [7]. The full device consists of several thousand individual islands which are essentially individual GTOs in parallel to give the total rated current carrying capability. In the analysis contained in this paper we focus on a single GTO island (finger), a cross-section of which is shown in Fig. 1. Figure 2 shows the external circuit applied to the GTO in a typical application. This is essential in modelling the operation of the device. The device is usually mounted in a "hockey puck" hermetically sealed package, in which pressure contacts are used to give both electrical and thermal contacts. Thus heat is extracted from the top (cathode) and bottom (anode) surfaces of the wafer. The thermal contacts are modelled as ideal thermal contacts, although this is an oversimplification of the real situation where considerable thermal impedances exist at the contact.

2.1 Governing physical equations The device simulator used in this work (SUDS) solves the standard drift-diffusion equations self- consistently with the heat equation. This uses the control region approximation to discretize all the resulting partial differential equations which are ultimately assembled using the standard finite element methodology. A fully coupled Newton process is used to solve the non-linear equations and updates are damped using the correction transformation [8] which results in a stable convergent solution process.

Anode

i -- Gate

1

Fig. 1. Geometry and

Cathode

doping profile of 2.5kV GTO device.

IO00V

2V --~ -lOV

I -16V

f 7

Fig. 2. Typical circuit configuration for GTO switching operation.

The transient device equations are of the form

V - D - p = O (1)

( V . J p + q R + ~ - = 0 (2)

( On) V . J n - q R+-0]- = 0 (3)

V . S _ H + C OT (4)

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Microelectronics Journal VoL 2 7 , Nos 2-3

where the symbols in the electrical equations (1)-(3) take on their usual meanings. In the heat equation (4), S is the heat flux (S = - k V T ) , C is the total specific heat per unit volume of the semiconductor and T is the temperature of the lattice (which is as;sumed to be in local equilibrium with the carrier temperature throughout the whole device). H is the total heat source term and consists of two components which are involved in producing heat and are given by [5]

H = (jp + J n ) - E + q(R - G)Eg (5)

The current densities in eqs. (2) and (3) differ from the usual isothermal expressions [5], yielding

Jn = qnltn E + klan( T~/n + %nVT) (6)

jp = qp/~pE - k#p(TVp + OtppVT) (7)

where the last terms in brackets for both equations are additional thermally driven currents. The terms 0~p and % are numerical coefficients that depend on the free cartier relaxation time, and are given in [8] but are often approximated to unity.

2.2 Discretization As mentioned previously, the partial differential equations (1)-(4) are discretized using the control region approximation (CRA), also known as the Box method. This is derived by applying the divergence theorem of Gauss over the Voronoi region associated with each node in the mesh. This yields two types of quantity which require evaluation, source terms which are lumped at the node in question, and flux terms, which describe the flux between adjacent nodes in the mesh. The electron and hole current flux expressions (6) and (7) in the isothermal limit are discretized using the conventional Scharfetter-Gummel upwinding method, which provides a stable discretization of these highly non-linear expressions. This

method therefore requires modification when the thermal diffusion terms become non-zero. The modified expression is derived with the same assumptions as the conventional Scharfetter-Gummel discretization, namely that the current (Jn or Jp) is constant along an edge between two nodes whilst all other variables (y, T) vary in a piecewise-linear fashion along the edge. Equations (6) and (7) are then solved as first order differential equations in the respective cartier concentration (n or p), yielding

= -t" ~ (Tj - Ti)~n J.aj . j

(8) nj {- n i

1 - (T,/Tjp'. 1 - (T j /T i ) ~'n

ku.

[1 pj v,+ (-~jj/Ti)rp] - 1 -

and

(9)

k Tj-- i q-o n (10)

YP = -~ k T j . - ~ -t- % (11)

Numerically these terms have to be evaluated carefully as T j - Ti ~ O, and it can be shown that the above expressions revert to the standard Scharfetter-Gummel ones in the isothermal limit as follows

Jn0 = + [njB(/ ji) - - (12)

k !ap T Jpo - hij [pjB(flij) - pi(B(flji)] (135

219


where B is the Bernoulli function given by

X B(x) e x - 1 (14)

and

q 0j ) ( 15 ) fl;j : -

Special consideration of the discretization of the Joule heating term (J.E) is also necessary, since in general the two vectors are not aligned, thus they have to be resolved into components before the dot product can be taken. This can be time consuming and may also lead to erroneous heating being attributed to some parts of the device, especially in the vicinity of depletion regions. To remedy this an alternative approach is used [9, 10], referred to as the power scheme, which ensures that the correct total amount of power is generated in each element and is apportioned to the corresponding nodes in the mesh. Basically the method requires the calculation of the product of edge fields and currents which are readily available and then weighting the product with a suitable area associated with each node, so that for node i in a triangle (wi thj , k representing the other vertices) we obtain with reference to Fig. 3 the source term contributed from that element:

1 [JijEijdijhij +JkjEikdikhik] (16) J'EI; =~

2.3 Boundary conditions The heat flow equation can have isothermal contacts applied to any of the device's bounding surfaces and elsewhere be adiabatic (thermally insulating). It is also possible to apply a thermal circuit to a contact to represent the thermal mass of the heat sink. This is included as a thermal resistance, and in the transient case a thermal capacitor, allowing device cooling surfaces to become elevated above ambient temperature.

The boundary conditions to the electrical equations have been set so as to allow the

hij

hit

dij

dik

k

Fig. 3. Construction of heat source term based upon the power scheme.

application of an external circuit to each of the electrical contacts on the device. In addition to the external circuit further constraints must be applied to nodes sitting on the ohmic contact, so as to enforce the conditions of charge neutrality and thermal equilibrium, which are usually assumed to represent the contact. Figure 4 shows a schematic representation of the ohmic contact. The time-dependent bias supply is applied to the external circuit, and the contact will automatically adjust its potential to balance out the currents at the contact. This is a very efficient method of applying mixed boundary conditions, since the whole solution procedure is carried out in a single Newton process.

2.4 Physical models The simulator contains various physical models which can be selected as required. The carrier densities are assumed to obey Maxwellian statistics in the current work, although the option of Fermi-Dirac statistics is available. Recombination processes allowable include the Shocldey-Read-HaU (SRH) and Auger mechanisms. The minority carrier lifetime in

220

Microelectronics Journal, Vol. 27, Nos 2-3

/q Cs Rs Ls \ [ ",d

Rv

i.q RBv-p~s _[

Fig. 4. Full external circuit for each contact from which actual circuit can be selected.

SRH recombination is assumed to be position dependent, since lifetime killing impurities have been introduced into the fabricated structure in order to reduce the switch off transient time. The recombination rate due to the SRH process is given by

2 pn - 1.z i RSRH = (17)

Zn(p -- hi) + Zp(n - ni)

The Auger process is described by the following expression

RAUG = ( C n n d- Cpp)(pn - ni 2) (18)

Avalanche generation occurs in the high field region around the cathode junction during turn- off. This is included in the model via the standard Chynoweth expression, namely

Gaval =Jn~n0 exp(-1-~)+Jpatp0 e x p ( - ~ --p)

(19)

Here the field E used is taken in the direction of the current flow. The carrier mobilities are functions of temperature, fidd, doping and

carrier concentration. Since the internal fields in the on-state are relatively i0w, we will not discuss the field dependence further. The temperature dependence of the carrier mobility is included using the following expression

iUL(n,p) = ~o(n,p)~-3-~) (20)

where Tmia is the temperature evaluated at the mid-edge point. This is then used in the Caughey-Thomas model for doping dependence of mobility in silicon,

#D(n,p) = /'/min(n,p) q ~/L(n,p) --#min(n,p)

1 q- [ (N D -~- NA)/Nref<n,p)] ~n,p (21)

Since the device is operated under conditions of high injection where the carrier concentration is conductivity modulated, the effects of carrier- carrier scattering become highly significant. The above expression is modified to handle the effects of carrier-carrier scattering empirically, by making eq. (21) depend on the carrier concentrations using the following substitution, so that

~/D(n,p) ~--" /'/min(n,p)

]'/L(n,p) - - / ' /min(n,p) (22) 1 + [(0.34(ND + NA) +

0.66(n + p))/Nref(n,p)] ~n,p

2.5 External circuit environment A limited number of external circuit configurations can be selected independently for each contact. In the cases modelled here, Fig. 4 shows the circuit used which includes a series LR branch to the anode supply and an anode snubber circuit, whilst the gate supply is through a series LR branch representing parasitics. The circuit component values are summarized in Table 1.

221


TABLE 1 Circuit conditions and component values used during transient simulation

Component Symbol Value

DC link voltage VD 1000 V Load inductance LL 55 x 10 -6 H Load resistance RE 1.4 f~ Snubber inductance Ls 0.3 x 10 -6 H Snubber resistance Rs 2 × 1 0 -3 f~ Snubber capacitance Cs 2 × 10 -6 F Reverse gate supply voltage VGQ -- 16 V Gate inductance Lc 0.3 × 1 0 - 6 H Gate resistance RG 10 × 10 -3

Overshoot voltage VDM 2000 V (at turn-off)

Turn-off current ITCQ 700 A (rain) Rate of rise of reverse d/Gq/dt 25 A/ps

gate current Junction temperature Tj 125°C

3. Results

3.1 Steady state characteristics The results from the complete dc model are shown in Fig. 5. The experimental results are averaged over several samples and cover a wide range of the device's operating regime. The agreement is excellent for this device, and similar agreement has been observed for devices with different substrate thicknesses. All o f the above models must be included in order to get such close agreement. It is worth pointing out that in the high current range o f operation, the device is working in high injection as shown in Fig. 10a. At these current densities the electron and hole concentrations are raised well above the doping level, so that Auger recombination and carrier- carrier scattering become dominant in deter- mining the currents. The internal temperature o f a device calculated self-consistently with the electrical equations is illustrated in Fig. 1 la.

3 . 2 T r a n s i e n t characteristics One of the key problems in the design of high power G T O structures is understanding and controlling the physical processes involved

( a )

i o =

o

=o <

103 Simulated results

102i .-o- Measured data

10 I

10 ~

I0-1

I I I I I I 10"20 0.5 1.0 1.5 2.0 2.5 3.0

Anode voltage (V)

(b) 10 3

102 E

~,< 10 I

-~- I00

"~ i0. I

I- 10. 2 g 10-3

< 10-4

10 0

S --,,- P r e d i c t e d T = 3 0 0 * K

--,- P r e d i c t e d T = 2 7 0 * K

• - ~ P r e d i c t e d T = 3 7 0 * K

I I I I I I I 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

-Anode voltage (V)

Fig. 5. (a) DC on-state characteristic of GTO compared with experimental results. (b) Effect of ambient isothermal

lattice temperature on the IV characteristics.

during the switch-off o f the device. This behaviour is fundamentally controlled not only by the device fabrication but also the circuit surrounding the device. Below, the results o f a turn-off transient are presented. The device simulator requires approximately 100 C P U minutes on an HP9000/730 to complete the complete coupled thermal transient.

Figure 6 shows the gate voltage and current waveforms as the G T O turns off. In this example

222


1V

L.._.. 1

f

. ~ ...IV t I I

2,W gs

40

i

750A 1300V

/ \ I,K / \

/ \

/ I [ z.- Zp - 2.91~S

0 10 20 30 40

~S

Fig. 6. Gate current (It;K) and voltage (VGK) turn-off waveforms for full G T O structure.

Fig. 7. Anode current ( I~ ) and voltage (V~a~) turn-off waveforms for flail GTO structure.

a dc anode voltage of I kV is applied to the device in series with the load; this voltage is well within the blocking capabilities of the device. When a negative gate voltage is applied to the device the storage phase starts to occur. Because of the presence of the gate inductor in the circuit, the step in gate voltage causes a current ramp to appear at the gate with a value of dI/dt determined by the size of the gate voltage step and the value of the inductor. This current ramp is responsible for removing the holes from the p- base of the GTO, and continues to rise until the conducting plasma is extinguished, at which point the storage phase ends at about 8ms. Figure 7 shows the turn-off waveforrns associated with the anode. Here the end of the storage time is evident as the anode current rapidly reduces and at the same time the anode voltage builds up. It is also important to note that the voltage the gate attains is limited by avalanche breakdown at the cathode junction. This occurs at a relatively low voltage (24V) since the doping in the vicinity of the junction is very high, causing a high electric field to exist

there. Figure 8 gives a comparison between the measured and modelled anode waveforms. The agreement is very good except for the magnitude of the anode voltage overshoot. This is probably due to differences between t h e actual circuit configuration and that modelled.

Following the storage phase there still exists a considerable amount of plasma stored in the n- base of the GTO which must be extracted. This is seen in the characteristic "tail current" hump visible after the anode voltage has risen. The rate at which the plasma is extracted is dependent on how fast the carriers recombine in the plasma. Consequently, the devices are usually subjected to lifetime killing processes to speed up the tail current phase. This, however, has the detrimental effect of increasing the on-state voltage. Figure 9 shows a close-up of the tail current with two different values of bulk lifetime (1.9ms and 2.9ms) and two effects are clearly visible here. Firstly, the tail current peak is much smaller in the 1.9ms case and the duration is shorter; and secondly, the storage time is also

223


2.SOE~03

2.00E*03

1.50E~03

I .OOE+03

S.0OE*02 -

O.OOE+O0

o

,/

:"

P ~ n • j ~ ~ B j ~ O ~ W~ ! I Q q

S 10 iS 20 2S 30 35 40 ,iS SO

Time ( , - ~ ' m ~ ' ~ l b )

Fig. 8. Coamparision between measured and modelled and voltage and current waveforms.

II

100

shorter. Both of the observations are easily understood since there will be less stored charge in the on-state and the excess carriers will recombine more quickly in the tail current phase. It is very important to control the tail current since during this phase there is considerable simultaneous anode voltage and current, the product of which gives large power dissipation m the device. Therefore, it is considered most likely to fail during this phase, and the effect is viewed as the limiting factor of the device.

The internal electron distribution is illustrated in Fig. 10. It is readily seen that at the start of the transient there exists a plasma of electrons (and holes) which spans the entire length of the device joining the anode and cathode terminals. The carrier density in the plasma is far in excess

of the background doping, giving the low resistance path in the on-state. As time proceeds the holes extracted from the gate terminal cause a depletion region to start to form at the p-base/ n-base junction, which gradually extends until this junction becomes reverse biased, at around 7ms. At this point there is still considerable charge stored in the lighdy doped base region which must be extracted. Recombination is responsible for the removal of the charge, following which recombined electrons will be extracted from the cathode and recombined holes from the anode. The depletion region sweeps out as the charge is extracted, forming a high field region which accelerates the electrons to their saturated driii velocity. The charge neutrality condition ensures that the electron and hole concentrations remain equal in the remaining plasma, which continues to exist long

224


i

!

OA

i \

\\\\ m 2o

#as

Fig. 9. Tail current waveforms with varying bulk lifetimes (1.9 ms and 2.9 ms).

after the tail current reaches negligible levels. It is also worth pointing out that the minority electron concentration in the p-base region

under the cathode finger remains high whilst the electrons are removed from the plasma region.

Figure 11 demonstrates a series of internal temperature distributions, for a single turn-off transient. Naturally, in service the device would undergo repeated switching transients, thus elevating the temperature to a much higher value than with a single transient; also the anode and cathode thermal boundary conditions represent ideal heat sinks in this sequence, thereby cooling the samples much more efficiently than could ever be achieved in practice. However, the simulation does serve to demonstrate the effective internal behaviour of the device in terms of the location of the power dissipation. Initially the temperature rise caused by the steady state current flow is very low, just a few degrees. Once the gate current starts to be extracted localized heating begins to occur at the p-base cathode junction as the plasma becomes squeezed. The temperature in this region rises as the gate current is extracted, and continues to increase well after the main anode current and tail current have been removed. Note also that

(a)

| 020

8

[] 10 m°

Z

1020 . ~ [ g

Fig. 10. Internal electron concentration profiles with time: (a) 5.2 ms; (b) 6.5 ms; Continued overleaf

225


1 1o2o x

101° - J lli~+ lJlllllNlJ lono

(e )

I 0 2°

c) + -

o

I 0 =o

q

I 0 =°

600/an ' ~

,(

J 600/~

Fig. lO.--Continued (c) 7.7ms; (d) 8.0ms; (e) 12.4ms; (f) 17.0ms;

the temperature peak becomes much more evenly distributed across the device once the storage phase has been completed.

4. Conc lus ions

The electrical and thermal transient simulation of GTO devices has been described and a number of results presented. It is seen that good agreement

between simulation and measurements with typical devices is possible with the correct optimization of parameter values. These values are compared for modelled and measured values in Table 2. The thermal results illustrate the magnitude, location and distribution of the peak lattice temperature in the device. The transient results presented demonstrate all the qualitative behaviour of the device observed in practice. With

226

Microelectronics Journal, VoL 27, Nos 2-3

! 0 2 0 -

. !

~ 10 lo _

~ "

600~un

(h)

10 2° _

-'• lolO m

Z

y ~ , , x

600tam

Fig. lO.--Continued (g) 26.1 ms; (h) 34.4 ms.

(a)

32O

300

7.

,-. X

3011

Fig. 11. Temperature profiles with time: (a) 6.5 ms; (b) 8.0 ms;

the application o f the fuU circuit environment , and the inclusion o f avalanche generation, the flail behaviour o f the tail current is successfully reproduced in the model .

Acknowledgement

This project was funded L I N K S P E D D S Scheme.

by the D T I / S E R C

227


(c)

320

300 -

Z 320 Z

x

.1

300

600l.tm ~ " ,5~9 "x~ 6001lrn

Fig. 11.--C0ntiinued (c) 12.4 ms; (d) 26.1 ms.

TABLE 2 Comparison between modelled and measured transient turn-offcircuit values

Symbol Characteristic Measured Modelled

tgq Turn-off time (/is) 9.1 9.18 tf Fall time (/is) 0.5 1.41 t~l Tail time (/is) 14.25 15.8 Vs Peak turn-offvoltage spike (V) 421 522 VDM Peak off-state voltage (V) 2000 1290 Vc(^v) Reverse gate avalanche voltage (V) -23.4 -24 tg(AV) Duration of gate avalanche voltage (/is) 5.06 4.81 IcQ Peak gate turn-off (A) 187 226 Eoir Turn-off energy (J) 0.52 0.53 ITGQ Peak turn-off current (A) 741 738 dicq/dt Rate of rise of gate current (A//is) 26.2 30 VTM On-state voltage (V) 2.99 2.96

References

[1] S.P. Gaur and D.V. Navon, Two dimensional carrier flow in a transistor structure under non-isothermal conditions, IEE Trans. Electron Devices, ED-23 (1976) 50-57.

[2] M.S. Adler, Accurate calculations of the forward drop and power dissipation in thyristors, IEEE Trans. Electron Devices, ED-25 (1978) 16-22.

[3] K. Board and P.A. Mawby, Heat sources and

[4]

[5]

temperature distribution in insulated gate bipolar transistors, Int. J. Numer. Meth. Fluid Flow, 2 (1992) 291-298. P.A. Mawby, J. Zeng and K. Board, Electrothermal simulation of VDMOS transistors, Int. J. Numer. Meth. Fluid F/ow, 5 (1995) 185-192. G.K. Wachutka, Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modelling, IEEE Trans. CAD, 9 (1990) 1141- 1149.

228


[6] M. Turowski and A. Napieralski, Two-dimensional analysis of GTO switching under the influence of external circuit, IEE Proc.--Circuits Devices Syst., 141(6) (1994) 483-488.

[7] Gate-turn off thyristors (symmetrical type) types WG1008P,.XX to WG10025RXX, Westcode Semiconductors Rating Report 95G6, Issue 1, Feb. 1995.

[8] Z.Ik. Hu, P.A. Mawby, M.S. Towers, K. Board and J. Zeng, Degradation in on-state characteristics of IGBTs through stir-heating, IEE. Proc.-Circuits Devices Syst., 141 (1994) 439-444.

[9] Z.Ik. Hu, P.A. Mawby, M.S. Towers and K. Board, Simulation of transient self-heating during power VDMOS transistor turn-off, Int.J. Electron., 77 (1994) 525-534.

[10] K.W. Chai, P.A. Mawby and A. McCowen, Hydrodynamic simulation of electron heating in conventional and lightly-doped-drain MOSFETs with application to substrate current calculation, J. Numer. Modelling: Electronics, Networks, Devices and Fields, 15(1) (1992) 53-66.

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Simulation of transient thermal effects during GTO turn off

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