SERVICE MANUAL 5N11&5N07 CHASSIS Design and specifications are subject to change without prior notice. ( ONLY REFERRENCE) ENGINEER BY: CHECKED BY: PPROVED BY: _____ _____ _____
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SERVICE MANUAL 5N11&5N07 CHASSIS
Design and specifications are subject to change without prior notice. ( ONLY REFERRENCE)
ENGINEER BY: CHECKED BY: PPROVED BY: _______________
Safety NoticeTechnical specification--------------------------------------------
Operation InstructionsMechanical Disassemblies---------------------------------------28Cabinet parts List ---------------------------------------------------29
--------------------------------------------------------23-4
Chassis Block Diagram---------------------------------------------5IC Block Diagram --------------------------------------------------6-12Transistor mark ----------------------------------------------------13Chassis wiring diagram --------------------------------------------14PCB Top layer --------------------------------------------------15-17Service Adjustments ---------------------------------------------18-21Purity and Convergence Adjustment ---------------------------22Control Location ---------------------------------------------------23Input and Output Terminals----------------------------------------24
---------------------------------------25-27
Circuit Diagram-----------------------------------------------------30
Safety Notice
Contents
-2-
SAFETY PRECAUTIONS
1:An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set.2:Comply with all caution and safety-related notes provided on the cabinet back, inside the cabinet, on the chassis or the picture tube.3:When replacing a chassis in the cabinet, always be certain that all the protective devices are installed properly,such as,control knobs, adjustment covers or shields, barriers,isola- tion resistor-capacitor networks etc.. Before returning any television to the customer,the service technician must be sure that it is completely safe to operate without danger of electrical shock.
X-RADIATION PRECAUTION
The primary source of X-RADIATION in television receiver is the picture tube. The picture tube is specially constructed to limit X-RADIATION emissions. For continued X-RADIATION protection, the replacement tube must be the same type as the original including suffix letter. Excessive high voltage may produce potentially hazardous X-RADIATION. To avoid such hazards, the high voltage must be maintained within specified limit. Refer to this service manual, high voltage adjustment for specific high voltage limit. If high voltage exce-eds specfied limits, take necessary corrective action. Carefully follow the instructions for+B1 volt power supply adjustment, and high voltage check to maintain the high voltage within the specified limits.
PRODUCT SAFETY NOTICE
Product safety should be considered when a component replacement is made in any area of a receiver. Components indicated by mark in the parts list and the schematic diagram designate components in which safety can be of special significance. It is particularly recommended that only parts designated on the parts list in this manual be used for com-ponent replacement designated by mark . No deviations fromresistance wattage or vol-tage ratings may be made for replacement items designated by mark .!
!
!
-3-
-4-
TU
NE
RP
RE
-AM
P
PIC
TU
RE
S
AW
SO
UN
D S
AW
I C
20
1
N N
51
98
I C
40
3A
N5
89
1
I C
40
4M
SP
34
13
I C3
01
T A
88
59
I C
00
1
S3
P8
84
9
I C
70
1S
TV
53
48
I C
20
5A
N5
61
3
RE
MO
TE
KE
Y I C
00
2E
EP
RO
M
PO
WE
R
I C
40
1T
A8
25
6
I C
20
4T
A8
42
7
CR
T B
OA
RD
Q3
02
T3
02
+1
40
V+
24
V+
14
V+
70
V (
FO
R S
TAN
DB
Y)
+2
00
V+
12
V2
9V
HE
AT
ER
FB
T
IIC
LV LH
Chassis Block Diagram
-5-
IC Block Diagram
P0.0 - P0.7
RESET
P1.0 - P1.7
SAM87 Bus
SAM87 Bus
Port 0 Port 1
CAPA
Vred
Vgreen
Vblue
Vblank
OSDHT
H-syncV-sync
Test
OSCINOSCOUT
INT0 - INT3
SAM87 CPU
XIN
XOUT
ADC0
ADC1
Port 2
P2.0 - P2.7
Port 3
P3.0 - P3.1
Port I/O and Interrupt
Control
24/32-KByte
ROM
272-Byte Register
File
Timer 0
Timer A
PWM
Block
PWM
Counter
and Data
Capture
14-Bit
PWM
On-
Screen
Display
4-Bit
ADC
L-C Osc
Main
Osc
8-Bit
PWM
PWM0
PWM1
PWM3
PWM5
PWM2
PWM4
TO
T0CK
ADC2ADC3
-6-
IC 001 (MULTI SYSTEM COLOR TV CPU) S3P8849
IC Block Diagram
-7-
IC 201 (MULTI SYSTEM COLOR TV SIGNAL PROCESSOR) Nn5198
VS
W
AS
W
CV
Cla
mp
SIF
fs
De
tect
Am
pS
IFS
W
Lim
ite
r
VC
OS
IFD
ete
ct
Pre
-Am
p
28
29
30
31
32
33
34
35
36
37
9V
Vid
eo
o
utV
cc3
4.7
V(D
AC
)
De
-e
mp
ha
sis
VIF
De
t o
utV
cc1
9V
(Ch
rom
a) A
ud
io m
on
ito
r
De
-e
mp
ha
sis
Bla
ck L
eve
lD
et o
ut A
ud
io o
ut
EX
TA
ud
io in
Bu
ffe
r
38
39
40
49
46
48
47
45
44
43
42
41
50
51
52
S C
P
CW
ou
tX
-ra
y
VD
D1
SV
(CM
OS
) Ve
r.A
GC
V o
ut
Sa
wTo
oth
De
cou
plin
gAF
C1
H o
ut
9V H
Vcc
Vcc
26
.3V3.5
8M
Hz
Ho
r.S
ync
in
Yin
Ve
r.S
ync
in
Ve
r.O
ut
AF
C1
Ho
r.O
ut
Ho
r.R
eg
.H
or.
Syn
c S
ep
Ve
rC
ou
nt d
ow
nH
VC
OA
FC
2H
BL
K
HV
BL
K
Ho
r.L
ock
De
t
50
/60
Hz
De
tect
Ho
r.C
ou
nt d
ow
nB
GP
SC
P
Ve
r.S
ync
Se
p
CS
W
Tu
ne
BP
FT
rap
FB
P in
S D
A
Vss
(CM
OS
)
Po
we
r O
n
Re
set
PN
/S S
W
IIC
BU
SIn
terf
ace
DA
C/S
W
51
2b
itE
EP
RO
M
R-Y
B-Y
1H
De
lay
Lin
e
Pe
de
sta
l A
dju
st
R-Y
Am
pB
-YA
mp
I H FF
Kill
er3
(SE
CA
M)
Ide
nt
Am
p
Lim
ite
rB
ell
Sa
tura
tio
n
De
-em
ph
Tu
ne
I H FF
Kill
er2
(NT
SC
)
G-Y
SE
CA
MD
em
od
VC
O
Y/B
-YM
atr
ix B S
W
Co
ntr
ast
Bri
gh
tne
ss
BC
on
tra
st
BC
lam
pB
Cu
t off
D
rive
PN
S
R-Y
De
mo
d
+/-
B-Y
De
mo
dA
CC
De
tD
ela
y
AC
CA
mp
Sh
arp
ne
ssK
ille
r1(P
AL
)Id
en
t
CW
Ge
ne
rate
Tin
tA
PC
Bla
ckE
xpa
nsi
on
Vid
eo
Am
pP
ed
est
al
Cla
mp
VC
O
V
CX
O(3
.58
MH
z)
Syn
c.S
ep
.
No
ise
Inve
rte
r
Ph
ase
Sh
ift
Q D
etQ
SS
SW
Tu
ne
Tra
p
VC
XO
QA
GC
QIF
Am
p
AP
C
AF
TP
CP
SW
VIF
De
tect
VIF
Lo
ck D
et
25
24
23
22
21
20
19
18
17
16
QS
Syn
c.S
ep
IF Am
pIF A
GC
RF
AG
C
SA
W
++
+
IF A
GC
EX
T V
ide
o/C
inA
FT
ou
tR
FA
GC
Ou
t
GN
D
QS
S(I
F)
in
SE
CA
MB
ell
re
f
9V
Vcc
1 (
IF)
15
14
13
12
111
09
87
65
+
G SW
R SW
GC
on
tra
st
RC
on
tra
st
G
Cla
mp
R
Cla
mp
G C
ut o
ff
R C
ut o
ff
Dri
ve
V
CX
O(4
.43
MH
z) SE
CA
MP
LL
re
f4
.43
MH
z
GN
D(V
CJ)
BG
R 9
VV
cc1
(VC
J)
RG
BY
s
+
43
21 Te
st
SC
L
CA
PC
IA
BC
L
Y/G
-YM
atr
ix
Y/R
-YM
atr
ix
27
Ext
a B
PF
(
exp.
5.74
MH
z)
SIF
inQ
De
t o
ut B
PF
SW
BP
F
26
-
VA
FC
9V
IC Block Diagram
-8-
IC403(AN5891)
[Application Circuit]
[Application Circuit to get L + R output instead of Super Bass Boos]t
1 2 3 4 5 6 7 8 9 10 11 12
131415161718192021222324MODE Vcc RIN Vref RBBB RT BLD TD ROUT SDA SCL
AGC SURR ToneControl
VolumeControl
Balance/MUTE
PFI AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT
+
+
Control
+
+
+ + + + + + + +
10u
15n0.1u
33n
10u 10u 10u0.68u 0.1u
10n 10u 10u 10u
SDA SCLRout
2.2k
+ + + + +
39n10u
33n 10n 10u 10u 10u
220k
Lin Lout
1 2 3 4 5 6 7 8 9 10 11 12
131415161718192021222324MODE Vcc RIN Vref RBBB RT BLD TD ROUT SDA SCL
AGC SURR ToneControl
VolumeControl
Balance/MUTE
PFI AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT
+
+
Control
+
+
+ + + + + + + +
10u
15n0.1u
33n
10u 10u 10u0.1u
10n 10u 10u 10u
SDA SCLRout
2.2k
+ + + + +
39n10u
33n 10n 10u 10u 10u
220k
Lin Lout
Vcc Rin
Vcc Rin
10u
L+R Out
IC Block Diagram
IC404(MSP3413)
-9-
IC301(TA8859)
IC601<POWER > STR-G6456
IC Block Diagram
-10-
Comp2
Vth(2)
Vth(1)
Comp1
GND
O.C.P/F.B
DRIVELATCHO.V.P
REG.
T.S.D
VIN4
START
O.S.C
-+
-+
5
2S
1D
3
Comp2
16 15 14 13 12 11 10 9
74 5 61 2 3 8
RAMPPULSE GENE
TRIGER BUS INTERFACE
AGC
CORRECTLINEARITY CORRECT
SCORRECT
PARABOLA CORRECT
E T HCRCT
E T HCRCT
E T HINPUT
E WDRIVE
VCC E W VFEED BACK
N C VDRIVEFEED BACK
TRIGER IN N C SCL SDA
BUS CONTROL LINE
+-+
-
+-
+-
IC401(TA8256)
IC Block Diagram
-11-
IC205(AN5613)<YUV>(Option)
G-Y ColorMatrix Control
PedestalClamp
Picture ContrastControl
R , G ,B MatrixBlanking
PedestalClamp
15 14 13 12 11 10
987654321
18 17 16
Vcc R-Y B-Y GND
R-Y G-Y B-Y
Y
PedestalClampPulse
BLKPulse
R G B
+
-
AMP 1
+
-
AMP 2
V18
RL
+
-
AMP 3
-
6 9
4k
30
k350 20k
4
3
2
1
8
10
12
11
5 7
Ripple Filter
OUT1
PW-GND
OUT2
OUT3
+
+
2.1
V
Pre-GND
350 20k
350
4k
30
k3
0k
4k
20k
+
+
+
+ -
+ -
MUTE SW MUTE
MUTE OFF
MUTE T C
RL
RL
+ - + Vcc
INPUT1
INPUT2
INPUT3
-
-
-
-
IC701(STV5348)<TELETEXT>(Option)
D613<PHOTO TRANSISTOR> TLP621
IC Block Diagram
-12-
TLP621
1
2 3
4
1:ANODE2:CATHODE3:EMITTER4:COLLECTOT
0.1uF
+5V
+5V
MA
1uF
SL2
3
4
5
6
7
8
9
10
1
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
+
-+5V
CVBS
MA/SL
VDDA
POL
STTV/LFB
FFB
0.1uF
+5V0.1uF
1k
VSSD
R
G
B
RGB REF
BLAN
3.9k
Y
SCL
SDA
47k
1uF10nF
+5V
+5VVCR/TV
VDDD
XTO
XTI
VSSO
VSSA
TEST
CBLK
VCR
TV
13.875MHz
C2
C1STV5348
ODD/EVEN
COR
C5148
B C E
A1499
B C E
C2216
CB E
C BE
C2230
C BE
C2482
C BE
C2703
C BE
B774
C BE
C1815
C BE
B420
C BE
B421
C BE
C BE
A1015
PNP PNP
NPN
NPN
PNP
C2120
C BE
PNP
C2717
CB E
NPN NPN
L7805
INPUT
GND
OUTPUT
L7812
INPUT
GND
OUTPUT
L7809
INPUT
GND
OUTPUT
Se140
Vout SENSE
COLLECTOR
GROUND
A1013
NPN NPN NPNPNP
Transistor Mark
-13-
-14-
Chassis wiring diagram
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