Sequential Circuits. Combinational Circuits + Storage element output depends both on previous state and input Fig. 5-1.

Sequential Circuits

• Combinational Circuits + Storage element• output depends both on previous state and input

Fig. 5-1

Fig. 5-2

• (a): a buffer• tG the delay• the information enters the buffer at t and output at t+ tG

• the stored information only retained in buffer by tG • longer storage time is necessary in most applications

Fig. 5-3

Use flip-flop

•A storage element can maintain a binary state indefinitely, until directed by an input signal to switch states.•The most basic storage elements are latches.

Fig. 5-5

RS

RS

RS

Fig. 5-7

Fig. 5-8

A change in value on the control input allows the state of a latch in a flip-flop to switch.

This change is called a trigger The trigger enable (trigger) the flip-flops See Fig. 5-3 for sequential circuits A present (original) and next (new) state occur in

flip-flop before and after the trigger, respectively The most important element in sequential circuits Can be derived from latch

Fig. 5-9

Fig. 5-10

•Pulse trigger •Pulse in the inputs SR will results wrong output

Initially unknown

Unknown due to R=1 S=1

Pulse input results wrong output

Fig. 5-11

Fig. 5-13

Fig. 5-14

17

5-4 Sequential Circuit Analysis

The output and the next state are a function of the inputs and the present state.

An example

XBAY )( Fig. 5-15

input equations

output equation

XAD

XBXAD

B

A

State table

XADtB

XBXADtA

B

A

)1(

)1( XBAY )(

Two-dimensional state table

Mealy model/Moore model

Mealy model circuits Sequential circuits in which the outputs depend

on the input, as well as on the states The circuits in Fig. 5-15

Moore model circuits Sequential circuits in which the outputs depend

only on the states The circuits in Fig. 5-16

A Moore model circuit (Fig. 5-16)

State diagram(a): for Fig. 5-15 (b): for Fig. 5-16

Example 5-1 States reduction

equivalent

Example 5-1 States reduction

Example 5-1 States reduction

equivalent

Example 5-1 States reduction

• Reduce from 4 states, 2 flip-flops to 2 states, 1 flip-flop

• may or may not result in reduced cost

Sequential Circuit Simulation

A simulator for the input/output of a designed circuit

Functional simulation Timing simulation