Degree project in Selection of DC Voltage Controlling Station in an HVDC Grid Arvind Muthukrishnan Stockholm, Sweden 2015 TRITA-EE 2015:57 ICS Master thesis
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Degree project in
Selection of DC Voltage Controlling Station in an HVDC Grid
Arvind Muthukrishnan
Stockholm, Sweden 2015
TRITA-EE 2015:57
ICSMaster thesis
Selection of DC Voltage Controlling Station in an HVDCGrid
by
Arvind Muthukrishnan
A thesis submitted to the
School of Electrical Engineering
in partial fulfilment of the
requirements for the degree of
Master of Science in Electric Power Engineering
Department of Industrial Information and Control System
KTH
August 2015
Abstract
In the recent power system expansion driven by growing energy demand, more attention is being
put towards integration of large-scale renewable resources. The HVDC transmission system on top
of, or in complement to, existing AC power has been considered as a relevant solution for integrating
remote energy resources as well as cross-border power trading. This thesis considers an approach
where more than two HVDC stations are connected in the DC side to form a meshed HVDC grid.
In an HVDC grid, the real-time mismatch of power injection can be compensated by the DC voltage
controlling converter(s). Similar to frequency in the AC grid, the DC voltage deviation is a local
indication of power mismatch in an HVDC grid. The capability of a converter to control DC voltage
and contribute in power sharing impacts the secure operation of an HVDC grid. The selection of
DC voltage controlling station becomes even more critical when a present DC voltage controlling
station is tripped and the system operator has to assign a new one.
This thesis proposes a real-time quantitative evaluation of HVDC converters in an HVDC grid
to select the proper DC slack converter. This real-time evaluation considers the strength of the
connecting AC grid as well as the converter’s on-line capacity margin as the selection metrics.
Strength of the AC grid is evaluated in real-time by estimation of grid Short Circuit Capacity
(SCC). Low computational requirement, low operational complication and acceptable accuracy of
estimated parameters have been considered as performance metrics for the selection of a suitable
algorithm. This thesis shows that the Recursive Least Square (RLS) algorithm can be very efficiently
used for the real-time estimation of SCC.
The concept of on-line ranking of the converter’s capability in controlling DC voltage has been
evaluated through different scenarios for the CIGRE B4 DC grid test system. To evaluate the
performance of the concept, a real-time co-simulation platform has been used to mimic the aspects
of the system. This platform includes OPAL-RT to model the power system, ABB’s industrial
HVDC controllers and corresponding ICT (Information and Communication Technology) systems.
The results show that the proper selection of the slack station can improve the AC system response
and DC voltage drops during the disturbances.
ii
Sammanfattning
En vaxande efterfragan pa elektrisk energi har bland annat medfort okade krav pa integrering
av fornyelsebar energi i dagens elkraftsystem. Som komplement till det befintliga vaxelstromsnatet
betraktas HVDC-nat som en attraktiv losning for bade integrering av fornyelsebar energi och for
gransoverskridande elhandel. Detta examensarbete studerar ett fall dar fler an tva HVDC-stationer
ar anslutna pa likspanningssidan i ett HVDC-nat. Likt frekvensen i ett vaxelstromsnat ar
likspanningen i ett HVDC-nat ett matt pa natets effektobalans. I ett HVDC-nat kan denna obalans
kompenseras till exempel genom att styra nagon eller nagra av omriktarstationerna. Valet av vilken
station som ska styra likspanningen blir an mer kritiskt da en station med den rollen kopplas bort
och systemoperatoren tvingas utse en ny.
Detta examensarbete foreslar en kvantitativ realtidsutvardering av omriktare i ett HVDC-nat
i syfte att valja den station som ska kontrollera likspanningen. Realtidsutvarderingen anvander
kortslutningseffekten, dvs. styrkan, hos de anslutna vaxelstromsnaten samt omriktarnas
kapacitetsmarginal som urvalsparametrar. Val av lamplig algoritm har gjorts utifran kriterier
sasom laga berakningskrav, lag komplexitet och acceptabel noggrannhet av beraknade parametrar.
Resultaten visar att den rekursiva minsta kvadratmetoden (eng. RLS) kan vara mycket effektiv for
att i realtid uppskatta kortslutningseffekten.
Konceptet att ranka omriktarnas formaga att kontrollera likspanningen har utvarderats genom
olika scenarier i testsystemet CIGRE B4 som bland annat innehaller HVDC-nat med flera
omriktare. For att utvardera konceptets prestanda har en realtidsplattform anvants for att
modellera relevanta delar hos systemet. Denna plattform inkluderar realtidssimulatorn OPAL-RT for
kraftsystemet och ABBs industriella styrsystem MACH for HVDC med tillhorande informations- och
kommunikationsutrustning. Resultatet visar att korrekt val av station for reglering av likspanningen
kan forbattra vaxelstromssystemets respons saval som minimera HVDC-natets likspanningsfall da
storningar intraffar.
iii
Acknowledgements
I would like to express my sincere gratitude to my supervisor Davood Babazadeh for his
continuous support through out the entire thesis. I am extremely thankful and indebted to him
for sharing his expertise and valuable guidance.
I would also like to thank my examiner Professor Lars Nordstrom for providing me with all the
necessary facilities for research and his continuous encouragement.
This thesis is performed in collaboration with HVDC Grids Simulation Center, ABB AB,
Vasteras, Sweden and Industrial Information and Control Systems, School of Electrical Engineering,
KTH Royal Institute of Technology, Stockholm, Sweden.
I would like to express my gratitude to Pinaki Mitra from ABB. I am fortunate to have him
as the supervisor from ABB for this thesis work. He has given me sincere and valuable guidance
throughout the thesis work.
I would also like to thank Tomas Larsson from ABB, for providing me an absolutely amazing
opportunity of performing this thesis work, encouraging me throughout the thesis and for his
insightful comments.
Last but not the least, I would like to thank all my friends and family for supporting me and
encouraging me with their best wishes.
iv
Abbreviations
AC Alternating Current
AI Analog Input
AO Analog Output
DC Direct Current
DQ Direct-axis and Quadrature-axis
DSP Digital Signal Processor
EKF Extended Kalman Filter
GEV Generalised Extreme Value
GPS Global Positioning System
HIL Hardware-In-the-Loop
HVDC High Voltage Direct Current
I/O Input/Output
ICT Information and Communication Technology
IGBT Insulated Gate Bipolar Transistor
LCC Line Commutated Converter
MMC Modular Multi-level Converter
MTDC Multi Terminal Direct Current
NPC Neutral Point Clamped
OPF Optimum Power Flow
PCC Point of Common Coupling
PI Proportional Integral
PLL Phase Locked Loop
PWM Pulse Width Modulation
RLS Recursive Least Square
RT Real-Time
SCC Short Circuit Capacity
SVPWM Space-Vector-Pulse-Width-Modulation
TSO Transmission System Operator
UKF Unscented Kalman Filter
VSC Voltage Source Converter
ZOH Zero Order Hold
v
Contents
Abstract ii
Sammanfattning iii
Acknowledgements iv
Abbreviations v
List of Tables ix
List of Figures x
1 Introduction 1
1.1 Outline of the report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Theoretical Background 3
2.1 High Voltage Direct Current Technology . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.1 VSC-HVDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1.1 Point-to-point transmission . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.1.2 HVDC grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1.2 Control Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2.1 Inner Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2.2 Outer Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.3 Supervisory Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 DC Voltage controlling station selection . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 Short Circuit Capacity estimation techniques . . . . . . . . . . . . . . . . . . . . . . 11
2.3.1 Extended Kalman Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.2 Unscented Kalman Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3.3 Recursive Least Square . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 Controller Hardware - MACH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Methodology 15
3.1 Summary of the methods considered in this thesis . . . . . . . . . . . . . . . . . . . 15
3.2 Overview of research problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
vi
3.3 Overview of the research approach . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.1 Literature review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.2 Research approach for SCC estimation . . . . . . . . . . . . . . . . . . . . . . 17
3.3.3 Research approach for selecting DC voltage controlling station . . . . . . . . 18
4 SCC Calculation for VSC-HVDC 19
4.1 Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1.1 Different approaches for introducing the second measurement point . . . . . . 22
4.2 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2.1 Non Real-Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2.1.1 dq Transformation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2.1.2 SCC Estimation Algorithm . . . . . . . . . . . . . . . . . . . . . . . 25
4.2.2 Real Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.2.1 Implementation in MACH . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.2.2 Implementation in OPAL-RT . . . . . . . . . . . . . . . . . . . . . . 28
4.2.2.3 Integration of OPAL-RT and MACH . . . . . . . . . . . . . . . . . 29
5 Selection metrics for DC slack converter 31
5.1 Short Circuit Capacity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.2 Power Margin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6 Test Platform 33
6.1 Co-simulation platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.1.1 OPAL-RT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.1.2 ABB’s MACH Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2 Power System Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2.1 HVDC model for SCC Estimation . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2.1.1 Average Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2.1.2 Switching 3-Level Model . . . . . . . . . . . . . . . . . . . . . . . . 36
6.2.2 HVDC grid model for DC slack selection . . . . . . . . . . . . . . . . . . . . . 37
6.2.2.1 CIGRE DC Grid Test Model . . . . . . . . . . . . . . . . . . . . . . 37
6.2.2.2 AC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.2.2.3 DC-DC converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.2.2.4 Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.2.2.5 Real-Time Implementation of DC grid test model . . . . . . . . . . 41
7 Simulations and Results 43
7.1 Estimation of Short Circuit Capacity . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.1.1 Non Real-Time system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.1.1.1 Average Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7.1.1.2 Switching Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.1.1.3 Sensitivity Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
7.1.2 Real-time Hardware-in-the-Loop simulations . . . . . . . . . . . . . . . . . . 51
7.1.2.1 Noise analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
vii
7.1.2.2 Accuracy of analog signals . . . . . . . . . . . . . . . . . . . . . . . 53
7.1.3 Comparison of Non-Real Time and Real Time system with HIL . . . . . . . . 56
7.1.3.1 Average Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.1.3.2 Switching Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
7.2 Selection of DC Voltage Controlling Stations . . . . . . . . . . . . . . . . . . . . . . 58
7.2.1 Scenario 1 - Importance of Power margin in Voltage Controlling Station . . . 58
7.2.2 Scenario 2 - Importance of SCC in Voltage Controlling Station . . . . . . . . 59
7.2.3 Scenario 3 - Second measurement point for SCC estimation algorithm . . . . 61
7.2.4 Scenario 4 - Slack Converter Ranking . . . . . . . . . . . . . . . . . . . . . . 61
8 Conclusions 64
A Non-Complex and Non-Matrix representation of RLS algorithm 68
viii
List of Tables
6.1 Controller Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.1 Actual grid parameters used in simulation . . . . . . . . . . . . . . . . . . . . . . . . 43
7.2 Result of average model - Non real-time . . . . . . . . . . . . . . . . . . . . . . . . . 44
7.3 Result of switching model - Non real-time . . . . . . . . . . . . . . . . . . . . . . . . 45
7.4 Error in SCC estimation for different grid conditions . . . . . . . . . . . . . . . . . . 52
7.5 Result of sensitivity analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7.6 Noise distribution (GEV) in Analog channel 1 and 2 . . . . . . . . . . . . . . . . . . 53
7.7 DC Voltage Controlling Station Ranking at 25th second . . . . . . . . . . . . . . . . 62
ix
List of Figures
2.1 VSC HVDC Station . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Point-to-point transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 HVDC grid [1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.4 Inner Control Loop [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5 Overview of Control Architecture [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.6 Supervisory control [1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7 Cycle diagram of EKF algorithm for parameter estimation [3] . . . . . . . . . . . . . 12
3.1 Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Final Estimation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3 DQ Transformation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.4 Overview of RLS Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.5 RLS Estimation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.6 Outputs Pk Plus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.7 Overview of the implementation in MACH . . . . . . . . . . . . . . . . . . . . . . . . 27
4.8 Zoomed view of the implementation in MACH . . . . . . . . . . . . . . . . . . . . . 28
4.9 Overview of the implementation in OPAL-RT . . . . . . . . . . . . . . . . . . . . . . 28
4.10 Analog Inputs to MACH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.11 Analog Outputs from MACH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.1 Co-simulation platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.2 Overview of the MATLAB model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.3 Average Model - Converter Station 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.4 Switching Model - Converter Station 1 . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.5 AC System 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.6 CIGRE DC Grid Test Model [4] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.7 Monopole AC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.8 Bi-pole AC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.9 DC-DC converter station . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.10 Core 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.11 Core 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
x
7.1 Average Model - Non Real Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7.2 Switching Model - Non real-time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.3 Switching Model - Different sample times . . . . . . . . . . . . . . . . . . . . . . . . 46
7.4 Switching Model - Different time constants for filter . . . . . . . . . . . . . . . . . . 47
7.5 Switching Model - Change in ramp rates . . . . . . . . . . . . . . . . . . . . . . . . . 47
7.6 Switching Model - Different change in Q . . . . . . . . . . . . . . . . . . . . . . . . . 48
7.7 Switching Model - Different change in P . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.8 Switching Model - Different change in PQ . . . . . . . . . . . . . . . . . . . . . . . . 49
7.9 Switching Model - Comparison of 2% & 3% change in P, Q & PQ . . . . . . . . . . . 50
7.10 Switching Model - Different grid conditions . . . . . . . . . . . . . . . . . . . . . . . 51
7.11 Noise in different analog channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7.12 Probability distribution function of Analog Channel 1 and 2 . . . . . . . . . . . . . . 53
7.13 Comparison of communication from OPAL to MACH . . . . . . . . . . . . . . . . . 54
7.14 Average model - Comparison of results from different type of communication . . . . 55
7.15 Switching model - Comparison of results from different type of communication . . . 55
7.16 Average model - Comparison between real-time and non real-time . . . . . . . . . . 56
7.17 Switching model - Comparison between real-time and non real-time . . . . . . . . . 57
7.18 Scenario 1: Importance of Power Margin in Slack Converter . . . . . . . . . . . . . . 58
7.19 Scenario 2: Active power flow in different HVDC stations . . . . . . . . . . . . . . . 59
7.20 Scenario 2: Effect of different SCC on AC voltage at Cb-A1 . . . . . . . . . . . . . . 60
7.21 Scenario 2: HVDC station connected to weak AC grid . . . . . . . . . . . . . . . . . 60
7.22 Scenario 3: Estimated Short circuit capacity . . . . . . . . . . . . . . . . . . . . . . . 61
7.23 Scenario 4: Comparison between Cb-A1 (solid) and Cb-B1 (dotted) as slack converter 62
7.24 Scenario 4: Effect of slack converter selection on AC voltage . . . . . . . . . . . . . . 63
xi
Chapter 1
Introduction
Integration of renewable resources and increase of cross-border trading between different countries
have introduced new requirements to the operation and development of electric power transmission
grids. Since AC grid expansions are limited by legislative issues and long distance transmission
capacity, High Voltage Direct Current (HVDC) technology with its different benefits compared to
AC such as lower power losses, controllability and visual impact is being considered as appropriate
alternative solution [5]. Two technologies exist, based on either the Line Commutated Converter
(LCC) or the Voltage Source Converter (VSC). LCC technology requires large reactive power
compensation at the Point of Common Coupling (PCC). Compared to LCC, the VSC can provide
reactive power at PCC, therefore it is more flexible to be connected to weak AC grids [6].
This thesis considers an approach where different HVDC stations could be connected to form an
HVDC grid just like with AC systems. These kinds of meshed HVDC grids are possible only with
VSC based HVDC stations. This is due to the fact that IGBTs could support current flow in both
directions with same voltage polarity. Different control strategies are available for HVDC stations.
The controls of VSC based HVDC stations are usually done in the dq reference frame and hence
completely decoupled control is possible.
In case of HVDC grids, the real-time mismatch in power flow is compensated by a slack converter
which controls the DC voltage. DC voltage variation is a local indication of power unbalance just like
frequency variation in AC grids. Usually, only one of the HVDC stations in a DC grid is operated
in DC voltage control mode. Hence the choice of the HVDC station to perform this task is very
important. This thesis focuses on providing a suitable selection algorithm which could assist in
choosing the DC voltage controlling station in real-time.
This thesis proposes a real-time quantitative evaluation of power converters connected to an
HVDC grid in order to select the proper DC voltage controlling station. The strength of connecting
AC grids and the power capacity margin of each HVDC station are considered in this evaluation.
Short Circuit Capacity (SCC) provides information about the strength of connecting AC grids.
Several estimation techniques are available to estimate short circuit capacity which are detailed in
Chapter 2.
The estimation algorithm is verified using hardware-in-the-loop simulation with ABB’s
industrial real-time controller (MACH), a real-time digital simulator (OPAL-RT) and corresponding
1
communication I/Os. Finally, the concept of selecting the DC voltage controlling station is verified
using real-time simulations in OPAL-RT. Different simulation scenarios are performed with CIGRE
B4 DC grid test system model proposed in [4]. The proper selection of slack converter could improve
the AC system response and limit DC voltage drops during disturbances.
1.1 Outline of the report
Chapter 2 details the theoretical background required to understand this thesis work. This chapter
gives details about the HVDC technology specific to VSC-based systems. The basic concept
of DC voltage controlling station selection is introduced here. Also the advantages and
disadvantages of different estimation techniques considered in this thesis are detailed.
Chapter 3 details the method followed during this thesis. It gives an overview of the research
problem dealt within this thesis. Also the research approach taken to solve problems is detailed
in this chapter.
Chapter 4 discusses the RLS estimation algorithm. The algorithm itself is discussed in detail along
with its derivation of non-complex and non-matrix representation. Also, the implementation
of this estimation algorithm in non-real time and real-time environment is detailed in this
chapter.
Chapter 5 proposes the selection metrics which are used for choosing DC voltage controlling
station.
Chapter 6 presents the test platform used for simulations in this thesis. The co-simulation platform
used for hardware-in-the-loop simulation is detailed in this chapter. Also, the simulation
models used for SCC estimation and DC voltage controlling station selection are also discussed
in detail in this chapter.
Chapter 7 provides the results of SCC estimation and DC voltage controlling station selection.
Both real-time and non-real time results are presented in this chapter. Different scenarios of
CIGRE B4 DC grid test system are used to provide the results of the DC voltage controlling
station selection.
Chapter 8 concludes the thesis.
2
Chapter 2
Theoretical Background
This chapter provides the theoretical background about HVDC technology along with its control
architecture. It also provides the theoretical background for selecting DC slack converter along with
its estimation algorithm for SCC calculation. Finally it also details the basics of MACH controller
hardware which is utilized in this thesis work.
2.1 High Voltage Direct Current Technology
AC electric power transmission systems are commonly and widely used throughout the world.
However, for bulk transmission of electric power, HVDC technology is used due to its advantages.
There are not many technical restrictions regarding the distance of transmission in HVDC
technology. In case of underwater power cables, HVDC technology could operate without heavy
flow of currents which are required to charge and dis-charge the cable capacitance in each cycle.
Transmission of power between two unsynchronised AC systems is possible with HVDC
technology. Hence, HVDC technology could be used to transfer power between grid systems with
different frequencies, like 50 Hz and 60 Hz. Using HVDC technology for power transmission is not
a new concept. A 100 kV, 20 MW HVDC system based on mercury arc valve technology between
Gotland and mainland of Sweden was installed in 1954. However, there are vast improvements in
semi-conductor technology since then, which are used in today’s power converters.
Advantages with DC: [7]
• Low transmission losses.
• Low investment cost for long distance transmission.
• Less requirement of conductor per unit distance on comparison to 3-phase AC.
• No skin effect on the transmission conductor.
• Ability to transfer power between separate AC networks even with different frequencies.
• Increase power grid’s capacity when additional lines are deemed difficult or costly to install.
• Improve stability of the connected AC network.
3
Drawbacks: [8]
• Converter stations have limited overload capability.
• HVDC systems are less standardised when compared to AC systems and the technology is
changing fast.
• Losses in an HVDC connection may be higher than in an AC transmission for small distances.
To convert AC to DC, there are two well known and established technologies. One is Line
Commutated Converter (LCC) and the other is Voltage Source Converter (VSC). Thyristors are used
in LCCs. Thyristors are very similar to diodes, which could conduct current in only one direction.
Thyristors have an advantage of having a gate terminal, which could be used to switch on the device.
However, in order to switch off a thyristor, the voltage across it has to be reversed or the current
through it has to be brought below the holding current. This process is called commutation and
since the commutation occurs with respect to line voltage present across thyristors, these converters
are named as line commutated converters. This thesis is about VSC technology for HVDC and thus
LCC is not discussed any further.
2.1.1 VSC-HVDC
VSC-HVDC uses Insulated Gate Bi-polar Transistor (IGBT). The gate terminal of an IGBT could
be used to both switch on and switch off the device. Also, IGBTs can pass current in either
direction, keeping the same voltage polarity across the device. Hence, it is possible to reverse the
power flow direction in a VSC-HVDC station without the requirement of reversing the voltage
polarity.
Advantages: [9]
• Independent control of active and reactive power is possible.
• Possible to reverse both active and reactive power flow while keeping the same voltage polarity.
• Four quadrant operation is possible.
• The Gate terminal of the IGBT could be used to both switch on and switch off. Forced
commutation.
• VSC-HVDC stations could be connected to weak AC systems (with low SCC) and even to
dead or islanded networks.
• Lower size of filters to absorb only higher order harmonics.
• Possibility of meshed HVDC grid using VSC technology.
Drawbacks:
• The voltage and current ratings of IGBT are currently lower than for thyristors. Hence
solutions for very large amount of power transfer get complex with VSC technology.
• Complex controls especially for multi-level modular converters.
• Converter stations are expensive when compared to LCC.
4
• Isolation of power faults (like short circuit). Breakers are required to isolate the faulty
converters on both the AC and DC sides to be able to operate the remaining grid.
Figure 2.1 shows the circuit diagram of a typical VSC-HVDC station along with its main
components. The voltage source converter could be one of the different available types like two-level,
three-level or Modular Multi-level Converter (MMC). An AC side transformer is used to change the
AC side voltage level to a value desirable by converter. The design of transformers for VSC converters
are conventional and simple when compared to the ones used in LCC. Phase reactors along with
the internal impedance of transformer, provide the required reactive impedance to reduce the short
circuit current. Filters are used in the AC side to absorb the higher order harmonics created by
PWM switching of IGBTs in VSC. DC capacitors are used to absorb the voltage ripple and provide
a stiff DC voltage.
Figure 2.1: VSC HVDC Station
2.1.1.1 Point-to-point transmission
Figure 2.2 shows an example of a simple point to point power transmission using VSC-HVDC
technology. Power could be transferred from AC area 1 to AC area 2 or vice versa with the same
voltage polarity in DC side. An entire AC area is represented as a voltage source with resistor and
inductor. DC lines are represented as ”Line 1” and ”Line 2” in Figure 2.2. The amount of electric
power transfer depends on the capacity of VSC-HVDC Station 1 and VSC-HVDC Station 2. Since
VSC technology is used, the reactive power is AC Area 1 and AC Area 2 could also be controlled.
It is also possible to inject reactive power from the converters to both AC areas to improve the
stability.
A large number of installations are available in the world with this type of point-to-point power
transmission with VSC technology. This kind of installation is suitable if there is a huge power
excess in one AC area and also a huge power demand in the other.
Figure 2.2: Point-to-point transmission
5
2.1.1.2 HVDC grid
HVDC grids are considered to be very promising for the future of electric power transmission
networks. In an HVDC grid, different HVDC stations are interconnected with each other to form
a meshed network. These kinds of meshed HVDC grids are possible only with VSC technology
and not with LCC technology. This is mainly due to the fact that IGBTs could pass current in
both directions with the same voltage polarity. At present, there are no operational multi-terminal
meshed HVDC grids with VSC technology, but, are expected in the near future.
Figure 2.3 shows an example of a multi-terminal HVDC grid. It could be seen from Figure 2.3
that three AC systems are interconnected with a wind farm using a meshed DC network. There
are totally five VSC-HVSC stations in this example. Thus, there is a possibility of having DC
transmission networks in the future just like AC transmission networks which are available today.
Also, the DC networks will improve the stability, reduce transmission losses and reduce the amount
of conductors used for transmission. Since VSC technology is used, the power flows could be changed
depending on the requirement of various AC grid areas.
Unlike AC transmission systems, HVDC transmission networks have no inductive reactive power
in overhead lines or capacitive reactive power in underground cables. HVDC grids are becoming
popular due to their capability of integrating renewable energy into the existing power networks.
There are still some challenges like DC side protection, standardization and multiple TSO operation
which are to be considered for smooth performance of HVDC grids. In case of faults and multiple
protection zones, breakers are required to isolate the faulty converters on both the AC and DC sides
to be able to operate the remaining grid.
In an HVDC grid, the mismatch of active power injection from different HVDC stations, could
be compensated by the DC voltage controlling converter. Just like frequency in AC systems, the
DC voltage is a local indication of power mismatch in an HVDC grid. Usually only one terminal is
assigned to regulate the DC voltage, otherwise, instability may occur as discussed in [10]. Proper
selection of the DC voltage controlling station is the main focus of this thesis. Choosing the DC
voltage controlling station in real-time using some selection metrics is discussed in the Chapter 5.
VSC 1
VSC 2
VSC 4
VSC 3
VSC5
~=
~=
~=
~=
~=
Wind Farm
AC1
AC1
AC2
AC3
Figure 2.3: HVDC grid [1]
6
2.1.2 Control Architecture
The general control architecture used for VSC-HVDC converter stations is discussed in this section.
The objective of a VSC-HVDC station is to convert DC to AC or vice versa with a specific control
over produced AC voltage. The control of VSC converters is through Pulse Width Modulation
(PWM) switching of IGBTs. There are different available PWM techniques which could be used to
switch the IGBTs [11]. The active power flow and reactive power flow could be controlled by the
difference between converter AC voltage and voltage at PCC.
P =E1.E2.sin(δ)
X12; Q =
E1.(E1 − E2.cos(δ))
X12(2.1)
The difference in phase angle between the converter voltage and the voltage at PCC decides
the active power flow in VSC-HVDC station. Also, the sign of difference in phase angles decide
whether the VSC-HVDC station acts as an inverter or a rectifier. Reactive power is absorbed by the
VSC-HVDC station if the magnitude of converter voltage is less than the PCC voltage. Similarly,
reactive power is injected, if the magnitude of converter voltage is greater than PCC voltage.
The control architecture of VSC-HVDC stations could be divided into two levels, one is Inner
Control Loop and the other is Outer Control Loop.
2.1.2.1 Inner Control Loop
The vector control of current in dq reference frame is usually used to control VSC-HVDC stations.
Complete de-coupled control of d-axis and q-axis currents are possible with this approach. Separate
PI controllers are used on both axes. This concept of controlling current in dq reference frame
is from electrical drives and is widely used now in all VSC applications. The differences between
measured currents and references are given as error inputs to these PI controllers. The converter
station itself is represented as a first order transfer function. Inner control loop with decoupled d and
q-axis current control is depicted in Figure 2.4. The reference current values used in PI controllers
are provided from an outer control loop. De-coupled control of d and q-axis currents will lead to
separate control of active and reactive power in VSC-HVDC stations.
Figure 2.4: Inner Control Loop [2]
7
2.1.2.2 Outer Control Loop
The objective of this outer control loop is to provide the d and q-axis current references to inner
control loop. Current control in the inner loop is de-coupled and hence two separate d and q-axis
references are provided by outer control loop. An overall view of control architecture in a typical
VSC-HVDC station is shown in Figure 2.5. Different control modes are available for outer control
loop as shown in Figure 2.5.
Figure 2.5: Overview of Control Architecture [2]
• d-axis control modes
DC Voltage Control The HVDC station acts as a slack converter if this DC voltage control
mode is chosen. The power mismatch in DC grid is compensated by the station which
operates in this control mode. The station in this control mode is responsible for
maintaining the DC voltage at its set-value.
Active Power Control HVDC station ensures that the active power flow through it is equal
to the reference value. The reference value for active power could be changed depending
on operational requirement.
Active Power Control with DC Voltage droop HVDC station controls the active power
to its set-point as long as the DC voltage is maintained at its set-point. Once DC
voltage starts to change from its set-point, active power set-points are changed linearly
to compensate for the change in DC voltage. This concept is similar to the primary
frequency control in AC networks. The droop value decides the magnitude of active
power change for certain change in DC voltage.
8
• q-axis control modes
AC Voltage Control The voltage magnitude in the AC side is maintained at its reference
value, if this control mode is chosen. Usually for wind farms, this kind of control mode
is chosen to maintain the required AC voltage.
Reactive Power Control The HVDC station ensures that the reactive power flow through
it is equal to the reference value. The reference value for reactive power could be changed
depending on operational requirement.
Reactive Power Control with AC Voltage droop HVDC station controls the reactive
power to its set-point as long as the AC voltage is maintained at its set-point. Once the AC
voltage starts to change form its set-point, reactive power set-points are changed linearly
to compensate of the change in AC voltage. The droop value decides the magnitude of
reactive power change for certain change in AC voltage. This control mode is similar to
the active power control with DC voltage droop in d-axis.
The droop control could also be implemented with a dead-band so that a small change in AC or
DC voltage within this dead-band will not cause any deviation in power set-points.
2.1.3 Supervisory Control
Figure 2.6 shows the control hierarchy of an HVDC grid as proposed in [12]. This kind of supervisory
controls are used to bridge the gap between SCADA/EMS systems (slow) and local controls (fast).
The DC side measurements through a data gateway from all stations connected in an HVDC grid
are given to a state estimation. There is a network processor in this supervisory control which could
perform different functions like Island detection, topology detection and control mode selection. One
of the control applications which could be implemented in supervisory controller is optimum power
flow (OPF) calculations [13].
Supervisory controls could thus compute the reference set-points for each station taking into
account the present status of lines and converters connected to an HVDC grid. Thus, the supervisory
control could respond to contingencies and reduce losses in the DC system post contingency. The
use of DC supervisory controls is also important on an event of fault which causes the change in
grid topology.
Selection of DC voltage controlling station, which is the main objective of this thesis, could
be implemented in such DC supervisory controllers as it has communication links to all stations
connected in an HVDC grid. Also, the DC grid topology detection and optimal power flow
calculations available in these supervisory controllers, make it an ideal choice for implementing
the selection of DC voltage controlling station as a supplementary control application within power
flow controls.
The optimum power flow calculator determines the optimum set-points for all the HVDC stations
connected to an HVDC grid. In order to perform these power flow calculations, the control mode
for each station has to be defined. Hence, the algorithm for selecting DC voltage controlling station
could be run in coordination with optimum power flow calculator to send out required set-points for
all HVDC stations.
9
HVDC grid SCADA
Control Applications : OPF
State Estimation
Topology Processor
Data GateWay
VSC 2
VSC4
Grid
Grid
PWM
Converter Station Control
dq/abc
dcPdc
V
Ui i
&i i
P Q
VSC 1
_PI
_+
*
dcV
PI
_+ acU
*
acU
PI
Inner Current
Control
PI +
Q
*
dcP
_+
*Q
Outer Control
AC SCADA
(Area B)
DC Substation
Inner ControlStation Control
Bay Control
Process Level
VSC5
DC breaker
AC SCADA
(Area A)
Control Mode
Selection
Islands
detection
Network Processor
Figure 2.6: Supervisory control [1]
2.2 DC Voltage controlling station selection
In an HVDC grid, real-time mismatch of power injection can be compensated by the DC voltage
controlling converter(s). Similar to frequency in AC grid, the DC voltage deviation is a local
indication of power mismatches in an HVDC grid. Different strategies such as ”single-slack station”,
”multiple voltage droop stations without dead-band” or ”single slack plus multiple droop station
with dead-band” have been considered in the literature for the control of DC voltage in HVDC
grid [11], [14], [15]. Regardless of which control strategy, the capability of converter to control DC
voltage and contribute in power sharing impacts the secure operation of that HVDC grid. The
selection of DC voltage controlling station becomes even more critical when a present DC voltage
controlling station is tripped and the system operator has to assign a new one.
In case of a fault, the initial stabilization of DC grid is provided by the droop control characteristic
of each HVDC station. Hence the droop control could be referred to as primary control in this
context. However, the DC grid master controller (supervisory controller) could assign another
station as DC voltage controlling station if that was a bottle neck. Hence this kind of control
10
from the supervisory controller could be referred to as secondary control.
This thesis proposes a real-time quantitative evaluation of HVDC converters in an HVDC grid to
select the proper DC slack converter. This real-time evaluation considers the strength of connecting
AC grids as well as the converter’s on-line capacity margin as the selection metrics. The strength of
AC grids can be characterised from its short circuit capacity. Hence the SCC of AC grids have to
be estimated in real-time. The selection metrics used for evaluation of HVDC converters in order
to select the DC voltage controlling station is detailed in Chapter 5.
2.3 Short Circuit Capacity estimation techniques
The estimation of AC grid parameters (i.e. Short Circuit Capacity) connected to an HVDC
system can be used to adjust its converter control parameters or to select its converters operational
control mode. Real-time estimation of such grid parameters can result in more freedom for on-line
or adaptive decisions regarding the control adjustments. Low computational requirement, low
operational complication and acceptable accuracy of estimated parameters have been considered
as performance metrics for the selection of suitable algorithm.
In this section, some of the algorithms which could be used for estimating short circuit capacity
are discussed along with their advantages and drawbacks. These algorithms mainly focus on low
voltage distribution networks. This thesis aims at extending these algorithms also for high voltage
transmission networks. There are passive (non-invasive) and active (invasive) methods to estimate
the grid parameters. Passive methods use the disturbance present in a grid to estimate grid
parameters, whereas, in active methods the grid is forced with some disturbance in parallel to its
normal operation [16]. There are also quasi-passive methods for estimating grid parameters which
usually requires the change in operating point of power converter [16].
2.3.1 Extended Kalman Filter
Estimating the short circuit capacity using an Extended Kalman Filter (EKF) is discussed in [16].
This is a passive method for estimating the grid parameters and could be run in parallel to the
control of power converters. The noise present in the point of common coupling is utilized by this
EKF algorithm to estimate the grid parameters. This eliminates the need for active disturbance
injection for estimating grid parameters.
This algorithm uses the Thevenin equivalent model of a grid as seen from the point of common
coupling of power converter in-order to estimate grid parameters. The grid is modelled as a voltage
source along with a resistor and inductor. A simple state space model is formulated for this
simplified circuit which has a power converter and a grid model. Later this state space model is
adjusted to achieve a disturbance observer formulation. However, the final state space model with
disturbance observer formulation in discrete time domain is non-linear in nature. Hence, normal
Kalman filter could not be used in this application. Extended Kalman filter is used to estimate
state variables in the formulated non-linear state space model.
The cycle diagram of EKF algorithm to estimate grid parameters is shown in Figure 2.7. Since
the formulated state-space model is non-linear in nature, EKF algorithm calculates the Jacobian
matrix in each iteration which linearises the problem around a particular operating point (estimated
11
Figure 2.7: Cycle diagram of EKF algorithm for parameter estimation [3]
value of state variables in previous iteration). Pk is the error co-variance matrix of state variables,
Qk is the process noise covariance matrix and Rk is the measurement noise covariance matrix. xk
is the estimated state variables and yk is the actual system measurements.
A 22 kW test set-up has been used to verify this proposed EKF algorithm for grid parameter
estimation in [16] and [3]. Both the process and measurement noise co-variance matrices are
assumed to be diagonal is nature and a step-by-step procedure to tune these matrices is given
in [16]. Change in grid impedance could be detected by this EKF algorithm with adequate accuracy.
Advantages
• Passive method of estimating grid parameters (no active disturbance).
• Could be run in parallel to converter controls.
• Measurement values required for this algorithm are just PCC voltage and current which are
already available in converter controller.
• Algorithm could work with noise (Gaussian with zero mean) in measurements.
• Algorithm could work with noise (Gaussian with zero mean) in process itself.
• Proven algorithm which is used for many other applications (like GPS) [17].
Drawbacks
• Convergence of the algorithm is also dependent on the initial values.
• Accurate model of measurement noise and process noise is required.
• Challenging to tune Qk and Rk matrices on trial and error basis.
• The step by step procedure given in [16] for EKF tuning is based on intuitive choices.
• Computational requirement is high.
12
– Jacobian matrix has to be calculated at every iteration.
– Matrix inverse in the order of 14x14 is required in every iteration.
– Matrix multiplication, addition and subtraction is required in every iteration.
• Difficult to implement in hardware (like DSP).
2.3.2 Unscented Kalman Filter
When the predict and update functions of a state space model are non-linear in nature, the use of
EKF algorithm for parameter estimation could give poor performance [18]. In EKF algorithm, the
Jacobian is calculated in each iteration, which linearises the non-linear functions around current
operating point. But, in UKF algorithm, an unscented transform is used which utilises a set of
sample points around the mean (sigma points). The result of this UKF algorithm is claimed to
be much better than EKF algorithm in [18]. Also, some critical applications like positioning of
satellites and unmanned vehicles are using UKF algorithm now-a-days.
The use of unscented transform to calculate mean is very close to actual mean value. Thus any
filter which utilizes the unscented transform will have the same performance of a truncated second
order Gaussian filter [18].
Advantages
• Similar advantages to EKF algorithm.
• Better accuracy of estimate parameters.
• Noise characteristics does not need to be Gaussian.
Drawbacks
• Similar disadvantages to EKF algorithm.
• Computation requirement and implementation in hardware becomes even more difficult.
2.3.3 Recursive Least Square
The use of recursive least square algorithm for grid parameter estimation is discussed in [19], [20]
and [21]. The grid parameters are estimated from the current and voltage measurements at the
point of common coupling. The algorithm is performed in complex space with dq reference frame.
This is a quasi-passive method for estimating the grid parameters. No active disturbance is injected
into the grid, but, operating points of the power converter are changed.
This thesis uses the RLS algorithm for estimating the grid parameters and thus this algorithm
is discussed in detail in Chapter 4.
Advantages
• Simple algorithm and easy to understand.
• Low computational requirement.
13
• Easy for hardware implementation.
• Non-complex and non-matrix implementation of the algorithm is possible.
• Inherits optimal behaviour with additive white Gaussian noise in measurements.
• Adequate accuracy in the estimated parameters.
• Evaluation of the estimated parameters to detect the change in grid conditions.
Drawbacks
• Requires a minimum of two measurement points for the algorithm to settle.
• The algorithm has an assumption that the grid is stationary during the estimation.
• Once the evaluation of estimated parameters detects a change in grid conditions, entire
estimation algorithm is reset to its initial values and restarted.
2.4 Controller Hardware - MACH
MACH controllers are used for station level control in HVDC installations. They are robust in
design and capable of running round the clock for thirty years or more. Control systems are an
important part of HVDC transmission systems and thus MACH controllers are the brain behind it.
MACH controllers use state-of-the-art computers, micro-controllers and digital signal processors to
enable them to be fully computerized and also fulfil future requirements [22].
MACH controllers are connected to high performance industrial standard buses and fibre optic
communication links. A typical HVDC station would have MACH controller at station control,
along with operator workstations, DSP units, protection and control main computers, I/O systems
and valve control units. The details of MACH controller are provided in [23].
Details about the implementation of RLS estimation algorithm in this controller hardware is
provided in Chapter 4.
14
Chapter 3
Methodology
This chapter gives a summary of different methods considered in this thesis along with an overview
of the research problem and an overview of research approach followed while solving this problem.
3.1 Summary of the methods considered in this thesis
The objective of this master thesis is to come up with a suitable solution for selecting an appropriate
DC voltage controlling station in an HVDC grid. The steps followed in order to accomplish this
objective are shown in Figure 3.1. At the start of this thesis, a literature review was done in order to
find the available methods for estimating short circuit capacity. All activities carried out during this
phase of the thesis are summarized and provided in Chapter 2. Based on the literature review some
grid parameter estimation algorithms were chosen. The chosen algorithms are Extended Kalman
Filter, Unscented Kalman Filter and Recursive Least Square. The selected estimation algorithms
were then verified using MATLAB Simulink based on simple simulations.
Figure 3.1: Methodology
15
At the end of verification phase of this thesis, it was decided to use recursive least square
estimation algorithm based on its advantages detailed in Chapter 2. This RLS algorithm was
later implemented in non real-time and real-time systems. The simulation phase could be separated
into two parts. The first part is the non-real time and HIL real-time simulations to evaluate the
performance of RLS estimation algorithm. The second part of simulations phase is selecting suitable
DC voltage controlling station using different scenarios of CIGRE B4 DC grid test system. The
research approach taken for both SCC estimation and DC voltage controlling station selection is
explained in detail on Section 3.3 of this chapter.
All the results obtained in the simulation phase are carefully analysed in the results evaluation
phase. The results from different simulations were also compared with each other for better
understanding. All the results obtained along with their comparison are evaluated and detailed
in Chapter 7. Finalization phase includes proper documentation and presentation of this thesis
work. This phase also includes all revisions done based on feedback.
3.2 Overview of research problem
HVDC grids are the future of power transmission networks. For HVDC station control, different
strategies are available in literature. In a DC grid, usually one of the HVDC station is responsible
for controlling DC voltage. The choice of which HVDC station to control the DC voltage is
important. Hence the research question which this thesis tries to solve is
How to select a proper station for DC voltage control and what are the possible metrics
and methods?
In order to select an HVDC station for DC voltage control some selection metrics are
required. The selection metrics used in this thesis are short circuit capacity and power margin.
Short circuit capacity of the AC grid connected to an HVDC station is not known and should be
estimated using suitable algorithms. The estimated information about short circuit capacity could
also be used to adjust the converter control parameters which will allow more freedom for adaptive
decisions.
Hence the main objective of this thesis is to come up with a solution for selecting DC voltage
controlling station in real-time. In order to achieve this, a suitable algorithm for estimating short
circuit capacity with adequate accuracy has to be chosen.
3.3 Overview of the research approach
The research approach followed during the entire thesis work is detailed in this section. Some critical
decisions which were made during the course of thesis work, like choosing the estimation algorithm,
are explained in this section. The thesis work started with literature review. Some of the chosen
estimation algorithms from literature review were implemented in MATLAB. Later, RLS algorithm
was implement in a real controller hardware (MACH). Finally the selection of DC voltage controlling
station was verified using a real time simulator called OPAL-RT.
16
3.3.1 Literature review
The thesis work started with a literature review to find suitable methods for estimating short circuit
capacity. Several different approaches to estimate the grid impedance were proposed in [3], [16],
[19] - [21] and [24] - [31]. Among them, [16] provided an approach for estimating gird parameters
with minimal disturbance to grid. [16] was chosen mainly because of two reasons.
• Kalman filters have been used in many other industrial applications (proven technique)
• Minimal invasive approach of the algorithm (passive method of estimation).
Also, another suitable approach for estimating grid parameters using Recursive Least Square
(RLS) method were discussed in [19], [20] and [21]. This RLS algorithm is chosen because it is easy
to understand and could be very simple to implement in any controller hardware. Also, continuous
research has been done regarding this RLS algorithm in [19], [20] and [21] which provided enough
information to replicate the work in a different environment.
3.3.2 Research approach for SCC estimation
Initially, the algorithms used for short circuit capacity estimation has to be verified. Hence a
simple model with VSC connected to load on one side and AC grid on other is considered to verify
the estimation algorithms. The EKF method proposed in [16] was implemented in MATLAB and
simulations were performed to verify the results. The following observations were made from the
simulations with EKF algorithm.
• Difficult to implement process noise in MATLAB simulations
• Difficult to tune process noise and measurement noise co-variance matrices
• The estimation results were sensitive to tuning of co-variance matrices
Hence, the results from simulation using EKF algorithm were not satisfactory due to the incapability
of tuning its covariance matrices. The results showed a good estimate of grid inductance with
adequate accuracy, but the estimated results of grid resistance were not satisfactory. Later the
Unscented Kalman Filter(UKF) approach detailed in [18] were also implemented in MATLAB to
find similar limitations as of EKF approach. Adaptive tuning of the co-variance matrices as suggested
in [32] could have helped, but, was not done during the thesis.
Finally the RLS estimation algorithm detailed in [19] to estimate grid parameters was
implemented in MATLAB. The results of estimated grid parameters were with adequate accuracy.
Till this point of time, the simulations were carried out on a basic model without any aspect of
HVDC transmission systems.
Later, a point-to-point HVDC transmission model was chosen to verify this RLS estimation
algorithm. Simulations were performed in MATLAB Simulink environment (non real-time), which
consisted of HVDC transmission model along with RLS estimation. The results of estimated grid
parameters were satisfactory. The major dis-advantage faced with this RLS algorithm was the
introduction of second measurement point. Different techniques to provide this second operating
point are discussed in detail in Chapter 4. During MATLAB simulations, average model of VSC
were used in HVDC stations before any PWM switching model could be verified. This kind of
17
approach for choosing average models of VSC for HVDC stations were to reduce the complexity of
model and hence reduce the time required for each simulation.
Once the RLS estimation algorithm was verified using both average and PWM switching model of
point-to-point HVDC transmission system, a sensitivity analysis on critical parameters were carried
out. The objective of this sensitivity analysis was to prove the selection of some critical parameters
quantitatively.
Later, this RLS estimation algorithm was decided to be implemented in a real controller
hardware (MACH) from ABB. MACH is used as station controller in many HVDC installations.
Hi-draw studio was used to implement the RLS algorithm in MACH. A point-to-point HVDC
transmission model was simulated using a real-time digital simulator called OPAL-RT. The
communication between MACH hardware and OPAL-RT was implemented using EtherCAT
modules. The co-simulation platform used in this thesis is explained in Chapter 6. The results
from hardware-in-the-loop simulation were satisfactory. Hence, it was concluded that the RLS
estimation algorithm could be used in real HVDC installations to estimate grid parameters.
3.3.3 Research approach for selecting DC voltage controlling station
The selection metrics used for choosing DC voltage controlling station in this thesis are short circuit
capacity and power margin. More selection metrics could be added to this concept in the future,
if it is deemed necessary. In order to prove the concept of DC voltage controlling station, a DC
grid test system proposed in [4] was chosen. The test system proposed in [4] was implemented in a
real-time digital simulator called OPAL-RT. Later the RLS algorithm to estimate gird parameters
was also implemented in that model.
An evaluation value for each HVDC station in the DC grid were calculated in simulation. A
ranking based on these evaluation values were made to choose the slack converter. Simulations were
performed with different choices of DC voltage controlling station to understand the importance of
choosing the correct one. Also, the importance of SCC and power margin in slack converters were
understood from these simulations.
The concept of choosing DC voltage controlling station based on evaluation values is thus
demonstrated using real-time simulations. It is suggested that this ranking based on evaluation
values be available in real-time to the system operator. The system operator could then order a
bump-less transfer of control mode between stations. Further, this concept could also be extended
in the future to automatic change over of control modes through the help of supervisory controllers.
18
Chapter 4
SCC Calculation for VSC-HVDC
The estimation of AC grid parameters (i.e. Short Circuit Capacity) connected to an HVDC system
can be used to adjust converter control parameters or to select its converter’s operational control
mode. Real-time estimation of such grid parameters can result in more freedom for on-line or
adaptive decisions regarding the control adjustments. This thesis work shows that the Recursive
Least Square (RLS) algorithm can be very efficiently used for the real-time estimation of SCC.
4.1 Theory
The use of RLS algorithm for estimating the short circuit capacity of AC grid is discussed in [19], [20]
and [21]. The equivalent grid voltage and impedance are estimated in complex space in these
papers. The entire theory of RLS algorithm for SCC calculation is based on these papers. Low
voltage distribution networks with distributed power generation systems are the main focus in all
these papers. However, this concept of estimating the equivalent short circuit capacity is extended
to HVDC stations in this thesis work. Since, HVDC grids are the future of electric transmission
networks, estimating the strength of connected AC areas seems to be an appropriate option for slack
converter selection.
Figure 4.1: Equivalent Circuit
One of the issues to be considered in HVDC application is the interaction between AC and DC
systems. This interaction can be characterized by the strength or SCC of the AC system connected
19
to the HVDC converter. It has been shown in the literature that this characteristic of AC grid has
a significant impact on the behaviour of a VSC-HVDC system connected to it [6]. Therefore, the
control system of HVDC should be designed and tuned properly to be able to perform optimally for
different grid characteristics. This can include the operational control mode of the HVDC converter
in a DC grid. The accurate and rapid estimation of grid characteristic (i.e. SCC) as seen from point
of common coupling (PCC) can result in more freedom for on-line or adaptive decisions regarding
control adjustments for the connected HVDC converters.
The equivalent circuit considered for this RLS algorithm is shown in Figure 4.1. In steady state
conditions,
V = IZ + E (4.1)
where V and I are the voltage and currents at the point of common coupling, Z is the equivalent
grid impedance and E is the equivalent grid voltage. All these parameters are expressed in complex
domain with respect to the dq reference frame. V and I are the measured parameters, whereas E
and Z are the estimated parameters. Considering n different measurement points,
V1 = I1Z1 + E1
V2 = I2Z2 + E2
...
Vn = InZn + En
(4.2)
Assume that the grid is stationary during the measurements, then it could be said that Z1 = Z2
= . . . = Zn and E1 = E2 = . . . = En. Equation 4.2 can be rewritten in the matrix form as
Y = A.X (4.3)
where,
Y =
V1
V2...
Vn
; A =
I1 1
I2 1...
...
In 1
; X =
(Z
E0
); (4.4)
Hence, from equation 4.3, a minimum of two measurement points in a stationary grid is required
to estimate the parameters Z and E0. Equation 4.3 is a linear regression problem expressed in a
complex domain.
Let us consider E to be the error between estimated voltage value calculated by the product of
A and X and the actual measurement Y . Then the equation 4.3 can be re-written as
Y = A.X −E (4.5)
The best-fit for the estimated parameter vector X can be found by minimising the error (E).
J = |E|2 = ET∗E = (AX − Y )T∗(AX − Y ) (4.6)
20
∂J
∂t= 0 =⇒ X = (AT∗A)−1(AT∗Y ) (4.7)
J is the error function built to obtain the positive magnitude of error. Equation 4.7 provides an
optimal off-line estimation after all the measurements are available. But, in order to transform into
a recursive algorithm, the following equations are to be considered.
Pk = ([AT∗]k[A]k)−1; B =
(I∗k+1
1
)(4.8)
Wk+1 = PkB(I + BT∗PkB)−1 = Pk+1B (4.9)
where, Pk is the cross correlation matrix and I is the identity matrix. B and Wk+1 are the
intermediate variables. It can be demonstrated that(Z
E0
)k+1
=
(Z
E0
)k
+ Wk+1.ek+1 (4.10)
where, Z is the estimated grid equivalent impedance, E0 is the estimated grid equivalent voltage
and ek+1 is the error between the measured PCC voltage and the calculated PCC voltage based
on estimates. Equation 4.10 provides a straight forward method to recursively estimate the grid
parameters such as equivalent impedance and voltage. Figure 4.2 provides the final flow chart for
this recursive algorithm.
Figure 4.2: Final Estimation Algorithm
The RLS algorithm can thus estimate the equivalent grid voltage and equivalent grid impedance.
Also, the algorithm has low computational requirement. Thanks to the small dimension of the
regression problem and the matrix inversion during computation of Wk+1 reduces to a complex
number inversion. The algorithm inherits the optimal behaviour of recursive least-squares (RLS)
under additive white Gaussian noise in the measurements [19].
As seen from Figure 4.2, initial values of P and X are required to start the algorithm. These
values of P0 and X0 can be found from an off-line identification. For example, these initial values
can be measured from an open circuit condition, where Ik = 0.
The estimation of grid equivalent impedance and grid equivalent voltage is accurate only if the
grid is stationary. In order to avoid a periodic disturbance of the grid, an evaluation is incorporated
to find whether the grid parameters have changed. This evaluation is based on equation 4.11 where
’n’ is the moving window of terms
21
τk =1
2k
k+n∑i=k−n
‖Vi − IiZi − Ei‖2
|Ii|(4.11)
The evaluation parameter at the time instant k is given as τk. i is the iteration variable which
computes the summation in a loop throughout the window n. The threshold for the evaluated
parameter τk is τγ . In case τk > τγ , then the grid parameters have changed. Hence the estimated
grid equivalent voltage and impedance are no longer correct. Thus, the value of Pk is reset to its
initial value and two new measurement points are required for the accurate estimation of a new
grid equivalent voltage and impedance. Different approaches for introducing the new measurement
points are discussed later in this chapter. The contribution from this thesis work towards the RLS
algorithm is its implementation in HVDC stations along with the different approaches to introduce
second measurement point. Also, the non-matrix and non-complex way of representing the same
algorithm, detailed in Appendix A, is another contribution from this thesis work.
4.1.1 Different approaches for introducing the second measurement point
As discussed in the previous sections, two different measurement points are required by the RLS
algorithm to estimate the grid equivalent impedance and equivalent voltage. Furthermore, the
grid should be stationary during these two measurement points. There are different approaches to
introduce the second measurement point, which are detailed below.
1. Load Change
In a large grid, load changes occur commonly. Hence, a load change could be used to provide the
second measurement point to the estimation algorithm, provided the change is large enough.
However, this scenario is circumstantial and thus other options are considered as well.
2. Droop response
In an HVDC grid, consider that the converters work with DC voltage droop. Whenever there
is a change in AC grid parameters (e.g.: tripping of a line), it is not essential for the application
of DC voltage controlling station selection to have estimated SCC until there is a disturbance
in DC side. This disturbance in DC side could be a change in set-points or a droop response
in DC grid. Either the change of set-points or a droop response could provide the second
measurement point to the estimation algorithm. However, this case is very specific and may
not happen in all circumstances. Hence, other options are also considered in this thesis.
3. Change Reactive Power Set-point
The reactive power set-point of the HVDC station can be changed by a small percent in order to
provide the second measuring point to the estimation algorithm. The effect of different percent
change of reactive power set-point on the estimation algorithm is presented in Chapter 7. The
reactive power change has an effect in the change of AC voltage magnitude at the HVDC
terminal and has no effect on the power flow.
4. Change Active Power Set-point
The active power set-point of the HVDC station can be changed by a small percent, in order
to provide the second measuring point to the estimation algorithm. The effect of different
22
percentage change of active power set-point on the estimation algorithm is presented in
Chapter 7. The active power change has an effect on the power flow.
5. Change both Active and Reactive Power Set-points
Set-points of both active and reactive power of the HVDC station can be changed by a small
percent, in order to provide the second measuring point for the estimation algorithm. The
effect of different percentage of change on the estimation algorithm is presented in Chapter 7.
Since both active and reactive power set-points are changed, it will have an effect on both AC
voltage magnitude and the power flow.
Changing the set-points of active or reactive power in an HVDC station could be done
instantaneously (step change) or in a ramp. The effect of step change and different rate of ramp
changes are also presented in Chapter 7. Whenever the set-point of the HVDC station is changed
in order to provide the second measuring point, it is brought back to its original set-points after
1 second. The performance of estimation algorithm using these different approaches for second
measurement point are also discussed in Chapter 7.
23
4.2 Implementation
The RLS algorithm for estimating the Short Circuit Capacity is implemented in both Non Real-Time
and Real-Time environments to verify its performance.
4.2.1 Non Real-Time
In non real-time implementation, both the power system and the estimation algorithm are simulated
in MATLAB. A simple point to point HVDC transmission system is considered for the power system
and it is detailed in Chapter 6. This section focuses on the implementation of estimation algorithm
in MATLAB.
4.2.1.1 dq Transformation
The measured current and voltage values at the point of common coupling is given as input to
the estimation algorithm in dq reference frame. If the dq transformation is not accurate, then the
estimated parameters are incorrect. Phase-Locked-Loop (PLL) algorithms are commonly used to
extract the frequency and phase information of the measured signals. Usually the measured phase
angle of PCC voltage is used to synchronise the entire system, forcing either d or q coordinate of the
transformed voltage to be null [33]. This kind of approach is not valid for the estimation algorithm.
The PCC voltage is affected by the change in injected current. Since a minimum of two different
measurement points are required by the estimation algorithm, the injected current is bound to
change. This change is current would change the phase angle of PCC voltage, but, the PLL would
still synchronise itself to the new phase angle of PCC voltage, forcing either d or q coordinate to be
null. Hence, the change in operating point of the converter affects the phase information provided
by PLL. This change in phase, shifts the entire identification problem to a different reference frame,
which introduces error.
Figure 4.3: DQ Transformation
In order to avoid this problem, [19] proposes to integrate the frequency output of the PLL over a
certain period of time. But, in this thesis a slightly different approach is made. Figure 4.3 shows the
implementation of dq transformation used in this thesis. The phase information of measured values
24
are provided by a block named ”Discrete Virtual PLL” in this implementation. Since the frequency
of all sources in this simulation are constant at 50 Hz, the same is used as an input to that block. The
virtual PLL block integrates the frequency to give ωt as the output which varies periodically from
0 to 2π. This assumption of a constant 50 Hz frequency is justifiable for simulation environments
where the source is kept at constant frequency. In real life implementations, the method proposed
in [19] could be used.
From figure 4.3, it can be seen that, rate transition blocks are used between the input of measured
PCC values and dq transformation. In this implementation, the rate transition blocks are used as
Zero Order Hold (ZOH), because the estimation algorithm is run slower compared to sampling of
measured values. After abc to dq transformation, low pass filters are used before the measured
values are given as input to the estimation algorithm. The effect of different time constants of these
low pass filters on the estimation algorithm is presented in Chapter 7.
4.2.1.2 SCC Estimation Algorithm
The RLS algorithm for estimating the grid equivalent voltage and impedance were discussed in
detail in this Chapter. Short Circuit Capacity could be calculated numerically from the estimated
grid equivalent voltage and impedance. This section focuses on how exactly the RLS algorithm is
implemented on a Non Real-Time environment (MATLAB). Figure 4.4 shows an overview of the
subsystem which is used for the RLS estimation algorithm. It can be seen from figure 4.4 that, the
estimation algorithm takes PCC voltage and current in dq reference frame as inputs and outputs
the estimated resistance, reactance and voltage magnitude.
Figure 4.4: Overview of RLS Subsystem
Figure 4.5 shows the exact implementation of RLS algorithm in MATLAB Simulink environment.
The non-complex and non-matrix form of the RLS algorithm is implemented so that there
could be direct comparison of results to the real-time implementation. Equation A.1 is
represented by the subsystem ”Error terms output”, Equation A.2 is represented by the subsystem
”Outputs ab”, Equation A.3 is represented by the subsystem ”Outputs xy”, Equation A.4 is
represented by the subsystem ”Outputs Wk plus”, Equation A.5 is represented by the subsystem
”Final estimate output”, Equation A.6 is represented by the subsystem ”Intermediate to Pk plus”
and Equation A.7 is represented by the subsystem ”Outputs Pk plus”.
25
Figure 4.5: RLS Estimation Algorithm
In order to have an idea of how the different subsystems are implemented, Figure 4.6 shows
one of the subsystem in detail. Subsystem named ”Outputs Pk plus” is shown in Figure 4.6. The
initial values of Pk and other estimated parameters are given inside the unit delay block (1/z) in
this implementation. Thus, it can be seen that each subsystem would just contain simple addition,
subtraction, multiplication and division blocks depending on the equation which it represents. Hence
the computational load on this estimation algorithm is low and could be easily implemented in any
hardware. Since the measured PCC voltage and current values are in per unit, the estimated
parameters are also in per unit which is then converted to SI units using corresponding gain blocks
as shown in Figure 4.5.
Figure 4.6: Outputs Pk Plus
26
4.2.2 Real Time
For real time implementation, a real time digital simulator called OPAL-RT is used to simulate the
power system. The RLS estimation algorithm is implemented in an HVDC controller hardware
MACH from ABB. Similar point to point HVDC power transmission models are used as in
non real-time implementation, in order to compare the results. This section focuses on the
implementation of the RLS algorithm in a MACH controller along with the real time implementation
of the power system in OPAL-RT. Also the integration between OPAL-RT and MACH in real time
is discussed in this section.
4.2.2.1 Implementation in MACH
The non-complex and non-matrix form of RLS algorithm is implemented in MACH controller.
HiDraw Studio version 8.23 along with the System software version 6.00.00.8700 is used in this
thesis work. An overview of the implementation of RLS algorithm in MACH controller is shown in
Figure 4.7. Equations A.1 till A.7 is implemented on the same drawing page as shown in Figure 4.7.
This implementation of RLS algorithm in MACH controller is similar to the one in non real time
environment and hence the comparison of both results is possible.
Figure 4.7: Overview of the implementation in MACH
A zoomed in view of the implementation in the MACH controller is shown in Figure 4.8.
Figure 4.8 shows the portion where Equation A.5 is implemented and also the initialisation of the
estimated parameters. A switch is used in order to toggle between the initialisation value and the
normal operation. The control input to this switch is from the drawing page named ”Analog Input”
which is shown in Figure 4.10. A rising edge detector on the Analog input from the EtherCAT
modules is used to reset the estimated parameters and Pk to its initial value. An unit delay block
named ”PREVSMP” is used to close the loop of the estimated parameters and it can be seen as q−1
in Figure 4.8. All parameters computed in MACH have ”float” data-type with a length of 32 bits.
27
Figure 4.8: Zoomed view of the implementation in MACH
4.2.2.2 Implementation in OPAL-RT
The power system is modelled in OPAL-RT simulator. An overview of the implementation in
OPAL-RT is shown in Figure 4.9. Both switching and average model of the HVDC stations
are to be implemented for different scenarios. Hence, each HVDC station is implemented in
separate cores (SS Slave and SS Slave1) of OPAL-RT. The controller for both the HVDC stations
are implemented in a separate core (SS Master). Totally three cores were used in the OPAL-RT
simulator. ”SC Console” is usually used to view the results from simulator. However, in this thesis
all the required data are stored in the simulator itself using ”OpWriteFile” blocks and then retrieved
at the end of simulation.
Figure 4.9: Overview of the implementation in OPAL-RT
28
4.2.2.3 Integration of OPAL-RT and MACH
The RLS algorithm is implemented in MACH and the power system model is implemented
in OPAL-RT. The power system measurements are required by RLS algorithm to perform the
estimation. Hence OPAL-RT and MACH are to be integrated. The interface between OPAL-RT
and MACH is EtherCAT modules. OPAL-RT sends out the PCC voltage and current in form of
Analog outputs. These analog outputs from the OPAL-RT are read by EtherCAT analog input
module which is connected to the EtherCAT bus coupler EK1100. In turn, the EtherCAT bus
coupler is connected to MACH controller through an Ethernet cable. The analog inputs received
by the MACH controller are shown in Figure 4.10. Each analog input to the MACH controller is a
signed integer with a length of 16 bits in total.
Figure 4.10: Analog Inputs to MACH
Ideally the three phase PCC voltage and current are the inputs to the RLS estimation algorithm.
But, in the laboratory set-up of this thesis, only four analog inputs were available to the MACH
and hence it was decided to give the PCC voltage and current in dq reference frame as inputs to the
RLS estimation algorithm. This assumption is valid, as in an HVDC set-up the dq transformation
has to be computed fast and usually done in a DSP which can be accessed from the MACH main
controller.
Figure 4.11: Analog Outputs from MACH
29
Figure 4.11 shows the implementation of the storage procedure for estimated parameters. The
estimated parameters from MACH are given as analog outputs using the EtherCAT module, which
is in-turn connected to the analog inputs of OPAL-RT. Finally all the estimated parameters are
stored in real-time on the OPAL-RT simulator. Once the simulation is completed all the stored
values are retrieved to plot the results. The voltage range of EtherCAT modules used for analog
inputs and outputs is -10V to +10V. Hence the OPAL-RT is adjusted to accept values in the same
range. More detailed explanation regarding the co-simulation platform is provided in Chapter 6.
Both OPAL-RT and MACH controller cannot be started at the same instant of time. Hence, in
this thesis work, MACH controller is started first and is running to accept the analog inputs. Once
OPAL-RT is started, MACH receives the analog inputs corresponding to PCC voltage and current
and starts to compute the estimated parameters. This start-up procedure could also be seen in
Figure 4.10. The block called ”Task Active” is used to enable or disable a task. Hence when the
analog inputs to the MACH controller are below a set-value the RLS estimation task is disabled and
is started only if the OPAL-RT is started and the input is greater than the set-value.
The PCC voltage and current values in dq reference frame from OPAL-RT are in per-unit. Hence
-1 pu to 1 pu is scaled to -10V to 10V in the analog output of OPAL-RT. These analog values are
accepted by the EtherCAT module and given as analog input in the range of -32767 to +32767 to the
MACH controller. Hence, when the MACH controller accepts these analog inputs, it first converts
the value to ”float” data-type and goes through a low pass filter. Then it is divided by 32767 to get
back the per-unit values of PCC voltage and current. This could be verified from the Figure 4.10.
A similar approach is carried out while sending the estimated parameters back to OPAL-RT. There
is an option of saving all the estimated parameters using a ”Transient Fault Recorder” in MACH
controller’s memory itself. However, this option was realized at the end of thesis work and could not
be fully utilized due to the limited time frame. In the future it is advised to make use of Transient
Fault Recorders suitably in order to store the required outputs from MACH controllers.
In future, these estimated short circuit capacity could be communicated from MACH to
supervisory controllers through the communication blocks available in MACH. MACH could
communicate every 1 ms. So, one could choose the data rate for communication between MACH
and supervisory controller like 20 ms, 0.5 s or 1 s depending on the control application and how long
the estimation algorithm requires to compute the short circuit capacity. This part with supervisory
control is beyond the scope of this thesis, but, could be implemented with the present laboratory
set-up.
30
Chapter 5
Selection metrics for DC slack
converter
The selection of DC voltage controlling station in an HVDC grid has an impact on secure operation
of the DC grid. This thesis proposes a real-time quantitative evaluation of all the HVDC converters
in the DC grid to select a proper DC slack converter. Strength of the connected AC grid (SCC)
in each HVDC station along with its power margin are considered as the selection metrics for this
real-time estimation. Equation 5.1 provides the implementation of selection metrics in OPAL-RT.
This implementation is done for all the HVDC stations connected in that DC grid. Finally a ranking
is done based on the outputs from all the HVDC stations to select the DC voltage controlling station.
Final Evaluation value =
(Prated − |Poperation|
Pmax
)∗(SCCestimatedSCCmax
)(5.1)
where Prated is the active power rating of that HVDC station, Poperation is the current operating
point of active power in that HVDC station, Pmax is the maximum active power rating of all HVDC
stations connected in an HVDC grid. Similarly, SCCestimated is the current estimated short circuit
capacity of the AC grid connected to that HVDC station and SCCmax is the maximum deemed
short circuit capacity of AC network connected to all HVDC stations in an HVDC grid.
5.1 Short Circuit Capacity
Short circuit capacity of the connected AC grid is important for the selection of DC voltage
controlling station. Since the mismatch of power injection is compensated by the DC voltage
controlling station, there could be sudden change in the power set-points. Hence, if the SCC of
the connected AC grid is low, then there occurs some disturbance in the AC grid every time the
power set-point is changed. In case the SCC of the DC voltage controlling station is high enough,
then the change in set-points in the power to compensate for the mismatch in DC grid will not have
any effect on the AC grid.
The implementation for comparing the different HVDC stations for its suitability of performing
as DC voltage controlling station is given in equation 5.1. The second multiplication term in
31
Equation 5.1 is the SCC evaluation value. The SCC of each HVDC station as seen from its point of
common coupling is estimated using the RLS algorithm. The estimated SCC in the HVDC station is
divided by the largest deemed SCC in-order to get the evaluation value between 0 and 1. Apart from
using the estimated SCC for selecting the DC voltage controlling station, this information could also
be used for adjusting the converter control parameters in real-time. The control of HVDC stations
connected to a weak ac network is discussed in [34].
The effect of low and high values of SCC on the DC voltage controlling station is shown in
Scenario 2 of Chapter 7. AC voltage is the most affected parameter in case SCC of DC voltage
controlling station is low.
5.2 Power Margin
Power margin of the HVDC station is also an important factor for the selection of DC voltage
controlling station. As explained previously, the DC voltage controlling station changes its power
set point in order to compensate for the mismatch in DC grid. In case there is not enough power
margin in the DC voltage controlling station then it will just go to its maximum capability and
remaining mismatch may be provided by the droop control (if active). Hence it is not wise to choose
an HVDC station which is operating nears its power capacity as the DC voltage controlling station.
The implementation in OPAL-RT for producing a ranking of DC slack converters is given in
Equation 5.1. The first multiplication term in Equation 5.1 is the power margin evaluation value.
The current operating power point of each station is subtracted from its power capability and then
divided the largest deemed power capacity of an HVDC station in order to get a evaluation value
between 0 and 1. Consider a case where the DC voltage controlling station has low power margin
and a new mismatch in DC grid has caused it to change the power set-point above the converter’s
capability. Then, the converter will move its power set-point to its maximum capacity. In order
to compensate for the remaining mismatch, all other converters which are in droop control will
contribute. But, in order for these other converters to contribute in droop control, the DC voltage
at its terminal has to decrease. Hence the entire DC voltage profile in the DC grid would be reduced.
When the DC voltage decreases, the current has to increase to provide the same amount of power.
Since the current increases, the losses in the transmission lines are also increased.
The effect of low and high power margins in the DC voltage controlling station is shown in
Scenario 1 of Chapter 7. DC voltage magnitude and transmission losses are the most affected
parameters in case power margin of DC voltage controlling station is low.
Finally, both the power margin evaluation value and Short circuit capacity evaluation value is
multiplied in each HVDC station to get a final evaluation value in the range of 0 and 1. This final
evaluation value is available in all the HVDC stations connected to the DC grid. It is also possible
to send all the three evaluation values (SCC evaluation value, Power margin evaluation value and
final evaluation value) to the system operator or supervisory controller and let them decide the DC
voltage controlling station based on a suitable criterion.
In this thesis, a ranking among all the HVDC stations is done based on final evaluation value.
Scenario 4 in Chapter 7 deals with the ranking of HVDC stations for the selection of DC voltage
controlling station based on the calculated final evaluation values.
32
Chapter 6
Test Platform
6.1 Co-simulation platform
The performance of the SCC estimation algorithm has been evaluated using a co-simulation platform.
This co-simulation platform consists of an ABB industrial real-time controller (MACH), a real time
digital simulator called OPAL-RT and EtherCAT I/O modules. OPAL-RT is used to model the
physical power system. The estimation algorithm is run in the ABB’s controller MACH. The
measurements from the power system should be given as inputs to the estimation algorithm.
OPAL-RT provides the measurements needed for the estimation algorithm as analog outputs.
EtherCAT analog inputs are used to collect these measurements and give the required inputs to
ABB’s MACH controller. An overall view of this co-simulation platform is shown in Figure 6.1
Figure 6.1: Co-simulation platform
6.1.1 OPAL-RT
An off-the-shelf Hardware-in-the-Loop (HIL) simulator - OP5600 is used in this thesis. This
simulator has 12 powerful cores with 3.3 GHz each. It has a real-time operating system Red
Hat Linux. The physical power system model is simulated in this real-time simulator. This real
33
time simulator is connected to an analog output board OP5142. The entire model is hardware
synchronized in time to this board. The simulator is capable of giving analog outputs in the range
of +/-5 V, +/-10 V or +/-16 V in real-time.
The inputs required by the estimation algorithm are the 3-phase currents and voltages at the
point of common coupling of the HVDC station. Due to the limited number of available analog
inputs in the EtherCAT module in our laboratory set-up, the number of analog signals is limited
to four. Hence the dq transformed voltage and current signals are sent as analog outputs from
OPAL-RT. This is acceptable, as in real HVDC implementations, the dq voltages and currents can
be got directly from the digital signal processor (DSP) which already does this transformation for
station control.
6.1.2 ABB’s MACH Controller
These four analog outputs from the OPAL-RT simulator is received by the EtherCAT analog input
terminal ES3104. This EtherCAT analog input terminal is connected to a bus coupler EK1100.
This EtherCAT bus coupler EK1100 is in-turn connected to the ABB’s MACH controller. The SCC
estimation algorithm is implemented in MACH hardware. The analog input terminal ES3104 can
accept inputs in the range of -10V to +10V and its output have a resolution of 16 bits (including
sign). Hence the analog output board OP5142 in the OPAL-RT is configured for the suitable range
of voltage.
The estimated SCC can be recorded in the MACH hardware using a block named ”Transient
Fault Recorder”. Alternatively, the estimated SCC along with the estimated impedance and voltage
can be given as analog outputs from MACH hardware to the EtherCAT terminal ES4134. Then,
these analog outputs from ES4134 can be connected to the analog inputs of OPAL-RT. The latter
is used for analysing results in this thesis.
6.2 Power System Models
Two different kind of models were used in this thesis. The first model is used to verify the SCC
estimation. Hence a simple point to point HVDC transmission model is used for the verification of
the RLS algorithm. Once the SCC estimation is proven, the DC grid test model from CIGRE B4
group is used for the concept of selection of DC voltage controlling station.
6.2.1 HVDC model for SCC Estimation
The model used to verify the SCC estimation using RLS algorithm has to be generic and commonly
used. Hence the MATLAB example model named ”power hvdc vsc” is used in this thesis. There are
two HVDC stations in this model which can transmit 200 MVA from a 230 kV, 50 Hz AC system
to another identical AC system. An overall view of the MATLAB model can be seen in Figure 6.2.
MATLAB version 2014B is used for this SCC calculation.
Two different models were used to verify the usage of RLS algorithm in order to estimate the
SCC in HVDC stations. First is the average model, where the HVDC converter station was modelled
as an average VSC. The second is an actual switching model, where the HVDC station was modelled
34
as a 3-level VSC with IGBT/Diode.
The following is valid for both the average and switching model. Station 1 is connected to
Station 2 through two 75 km long cable. Each cable is modelled as two pi sections. In d-axis of
current, Station 1 is controlling active power and Station 2 is controlling DC voltage. In q-axis of
current, both Station 1 and Station 2 are controlling reactive power. The DC link is rated for +/-
100 kV. The description of the controllers used in Station 1 and Station 2 could be found from the
help of MATLAB by typing ”VSC-Based HVDC Link”.
The details of the converter Station 1 and Station 2 are described individually for average model
and switching model in the following subsections. AC system 1 will be changed from the original
MATLAB example model, as estimating the SCC of this AC system is the point of importance in
this thesis.
Figure 6.2: Overview of the MATLAB model
6.2.1.1 Average Model
The model of the converter station used in this average set-up is shown in Figure 6.3. 230 kV
supply connected to the AC system is stepped down to the voltage level of 100 kV using a converter
transformer. This converter transformer has an internal impedance of 0.15 pu. Then the supply goes
through the phase reactor with an impedance of 0.15 pu. The buses ”Bfilter1” and ”Bconv1” are
voltage and current measurement feedbacks in per unit for the controller. The converter transformer
used in this model is of the configuration star/delta. The 100 kV side is connected in delta and
thus does not have a neutral point. Hence a resistor ”R” is used to provide a reference point for
measuring the phase to neutral voltages in the 100 kV side.
The converter is an average-model based on VSC. The input to this average converter is directly
the three phase reference voltage waveforms and not the pulses for IGBTs.
Since an average model is used for converters, the DC side smoothing reactors, DC side 3rd
35
Figure 6.3: Average Model - Converter Station 1
harmonic filters and also the AC side higher order harmonic filters are not applicable. The DC side
consists of two shunt capacitors.
6.2.1.2 Switching 3-Level Model
The model of the converter station used in this switching set-up is shown in Figure 6.4. The converter
transformer, phase reactor and the DC capacitors are the same as explained for the average model.
The converter used in this set-up is a three phase, three-level voltage source converter based on
IGBTs with anti parallel diodes. There are 4 IGBTs in each leg and thus a total of 12 IGBTs in the
converter. Hence the input to this converter is the switching pulses of all these 12 IGBTs.
The use of IGBTs in this model creates harmonics due to its switching behaviour. Hence, there
are higher order harmonics filters on the 100 kV AC side. The switching frequency of the converter
is 1350 Hz and hence the harmonic filters are tuned for 27th and 54th harmonic. The switching
technique used for the converters is space-vector based pulse width modulation (SVPWM). This
model also contains a DC filter for the 3rd harmonics and two smoothing reactors of 8 mH each.
There is no separate resistor ”R” as seen in the average model, because, the AC side harmonic filters
already provide the required reference point for measurement of phase to neutral voltages in the 100
kV side.
Figure 6.4: Switching Model - Converter Station 1
36
AC System The point of interest in this thesis is to estimate the short circuit capacity of the
equivalent AC system connected to the PCC of each HVDC station. Hence the model of the AC
system 1 used in the simulations is shown in Figure 6.5. As shown in Figure 6.5, the impedance of
the AC system is 3.5 Ohm, 90 mH from start of the simulation till 9 seconds, which corresponds to a
SCC of 1.85 GVA. At 9th second, the breakers are opened and thus the impedance of the AC system
goes to 6 Ohm, 165 mH, which corresponds to a SCC of 1.01 GVA. The objective of implementing
this RLS algorithm is to estimate the initial SCC of the AC system (i.e 1.85 GVA) after which the
algorithm should identify the change in impedance and estimate the new SCC (i.e 1.01 GVA).
Figure 6.5: AC System 1
6.2.2 HVDC grid model for DC slack selection
The idea of providing real-time ranking for the selection of DC voltage controlling station is described
using different scenarios in CIGRE B4 DC grid test system. Also the importance for the selection
of DC voltage controlling station is explained using this model. This section details the overview of
the test model and provides some specific details about the modelling of AC-DC converter, DC-DC
converter and also the parameters used in the controller design.
A real time digital simulator called OPAL-RT is used for the simulation of this model. This
simulator can accept the simulation model from MATLAB version R2013B. Three cores are used in
this simulator to run this model in real time. The controllers of all stations are modelled in a single
core and the power system is divided into two other cores.
6.2.2.1 CIGRE DC Grid Test Model
This model has been designed by CIGRE work group B4-57 and B4-58 [4]. The main objective
of this model is to provide a common reference for studies concerning DC grids. There are some
changes done to the AC systems in the model considered in this thesis when compared to the model
presented in [4]. The AC systems Ba-B1, Ba-B2 and Ba-B3 are not interconnected in the model
considered in this thesis.
This DC grid test model considered in this thesis contains
37
• 4 onshore AC systems
– System A (A0 and A1)
– System B1
– System B2
– System B3
• 4 offshore AC systems
– System C (C1 and C2)
– System D (D1)
– System E (E1)
– System F (F1)
• 2 DC nodes, with no connection to AC
– B4
– B5
• 3 VSC-DC systems
– DCS1 (A1 and C1)
– DCS2 (B2, B3, B5, F1 and E1)
– DCS3 (A1,C2,D1,E1,B1,B4 and B2)
A detailed overall view of the test system is shown in Figure 6.6. All the lines in Figure 6.6
represent three lines for AC and two lines for DC. The line lengths are provided in the unit of
kilo meter. ”Ba” represents onshore AC buses, ”Bo” represents offshore AC buses, ”Bm” represents
monopole DC buses, ”Bb” represents bi-pole DC buses, ”Cm” represents monopole AC-DC converter
stations, ”Cb” represents bi-pole AC-DC converter stations and ”Cd” represents DC-DC converter
stations.
AC systems C, D and F are represented as offshore wind farms and the AC system E is considered
as an offshore load (oil platform). AC system A consists of two buses Ba-A1 and Ba-A0. AC systems
B1, B2 and B3 are each connected to an voltage source.
DCS1 is the first DC system which contains a two-terminal symmetric monopole (+/-200 kV)
HVDC link. This systems interconnects the offshore wind farm at C1 to the onshore node at A1.
DCS2 is a DC system which contains 4-terminal symmetric monopole (+/-200 kV) HVDC grid.
This system connects the offshore wind farm F1 and offshore load E1 to the onshore nodes B3 and
B2. DCS3 is a DC system which contains a 5-terminal bi-pole (+/-400 kV) meshed HVDC grid.
There exists no direct connection between DCS1 and DCS2. Whereas, DCS1 and DCS3 are
connected through the AC node at A1. Also, DCS2 and DCS3 are connected through the AC node
at B2 and also through a DC-DC converter station at E1. All three DC systems are based on VSC
technology. The basic details of the converter stations are provided in the following sections.
All the onshore AC systems have a voltage level of 380 kV, whereas the offshore AC systems
have a voltage level of 145 kV.
38
Figure 6.6: CIGRE DC Grid Test Model [4]
6.2.2.2 AC-DC converter
There are two different kinds of AC-DC converter stations in this model. One is mono-polar and
the other is bi-polar. The mono-polar converters have a DC link voltage of +/-200 kV, whereas
the bi-polar converters have a DC link voltage of +/-400 kV. Average model of VSC converters are
used for both mono-polar and bi-polar in order to reduce the computational load on the real-time
simulator. The power rating of all converter stations can be found in [4].
Monopole AC-DC converters Each mono-polar AC-DC converters depicted by ”Cm” in the
DC grid test model (Figure 6.6) is modelled as shown in Figure 6.7. All the converter stations are
operated in the same voltage level of 220 kV. Hence a transformer is used in all the stations to either
step-up or step-down the voltage to the required level. Phase reactor with an impedance of 0.15 pu
and DC capacitors are also used in all mono-polar converter stations.
Figure 6.7: Monopole AC-DC converter
39
Bi-pole AC-DC converters The design of bi-polar converters are similar to mono-polar
converters. In bi-polar converters, there are two VSC based converter stations. Hence two similar
mono-polar converter stations can be used to represent a bi-polar converter station. The voltage
rating of all the individual converters are the same. Each bi-polar AC-DC converters depicted as
”Cb” in the DC grid test model (Figure 6.6) is modelled as shown in Figure 6.8.
Figure 6.8: Bi-pole AC-DC converter
6.2.2.3 DC-DC converters
Average models are used for DC-DC converters as shown in Figure 6.9. The converter is modelled as
a current source with capacitor on the side where voltage is measured(H) and a voltage source with
inductor on the side where voltage is controlled(L). The DC-DC converter stations are depicted as
”Cd” in the DC grid test system (Figure 6.6). The DC-DC converter at station E1 consists of 800
kV on the voltage measurement side and 400 kV on the voltage controlling side. Also the DC-DC
converter station at B1 consists of 800 kV on both the sides.
Figure 6.9: DC-DC converter station
6.2.2.4 Controller
All the AC-DC converter stations use similar kind of controller in this model. The inner control
loop consists of de-coupled control in d-axis and q-axis currents. The outer control loop of d-axis
can be either active power control with DC voltage droop or just DC voltage control. Also the outer
control loop of q-axis can be either reactive power control with AC voltage droop or just AC voltage
control. The corresponding droop values can be set to zero in case only active power control or only
reactive power control is required.
40
The operational control modes of each AC-DC converter station, along with its control parameters
are detailed in Table 6.1. It can be seen from the Table 6.1 that converter stations Cb-B1 and Cb-B2
are operating in the control mode of active power with DC voltage droop. Each DC system has its
own DC voltage controlling station. Also, when two different converter stations are connected to the
same AC node (e.g.: Node A1, B2), the q-axis outer control cannot be the same for both of them.
It can be seen from Table 6.1 that Cm-A1 is in reactive power control and Cb-A1 is in AC Voltage
control for the outer control loop of q-axis. The same approach is also applicable for AC node B2.
DC
System
Converter
Station
Control Modes Controller Gains Droop parameters
d-axis q-axisOuter (d) Outer (q) Vdc droop
(MW/kV)
Vac droop
(MW/kV)Kp Ki Kp Ki
DCS1Cm-A1 Vdc Q (Vac) 3 300 0.05 20 - 0
Cm-C1 P (Vdc) Vac 0.5 30 0.05 20 0 -
DCS3
Cb-A1 Vdc Vac 3 40 0.05 20 - -
Cb-C2 P (Vdc) Vac 0.1 10 0.05 20 0 -
Cb-B1 P (Vdc) Vac 0.1 10 0.05 20 60 -
Cb-D1 P (Vdc) Vac 0.1 10 0.05 20 0 -
Cb-B2 P (Vdc) Vac 0.1 10 0.05 20 60 -
DCS2
Cm-B2 Vdc Q (Vac) 3 40 0.05 20 - 0
Cm-E1 P (Vdc) Vac 0.1 10 0.05 20 0 -
Cm-B3 P (Vdc) Vac 0.1 10 0.05 20 0 -
Cm-F1 P (Vdc) Vac 0.5 30 0.05 20 0 -
Table 6.1: Controller Parameters
The reference set points of power and voltages for all the converter stations are based on the
power flow results presented in [35]. All the lines in this DC grid test system (Figure 6.6) are
modelled as distributed line with parameters as presented in [4].
6.2.2.5 Real-Time Implementation of DC grid test model
In total there are twelve cores available in the processor of OPAL-RT simulator. In this thesis, three
cores were used. The physical power system of the model is designed in core 1 and core 2, whereas the
controllers for all the converter stations are modelled in core 3. Figure 6.10 shows the implementation
of the physical power system in core 1. Also, Figure 6.11 shows the implementation of the physical
power system in core 2. The sample time used in this model is 100 µs. The computational load
on all the three cores are less than half its capability, to ensure no overruns on the processor. The
timer of the real-time simulator was software synchronized.
Since the sample time was 100 µs, the communication of results from the simulator to the
workstation via Ethernet was not accurate to each time step. Hence, the storage memory inside
the simulator was used to record all the required results from the simulator and were fetched to
workstation after the simulation is completed.
41
Figure 6.10: Core 1
Figure 6.11: Core 2
42
Chapter 7
Simulations and Results
This chapter details different simulation scenarios along with their results. There are two major
type of simulation results, the first one is the short circuit capacity estimation using RLS algorithm
(both non real-time and HIL real-time). The second one is the selection of DC voltage controlling
station based on evaluated values in each HVDC station.
7.1 Estimation of Short Circuit Capacity
Estimation of short circuit capacity is based on RLS algorithm. This algorithm is first
implemented in MATLAB (non real-time system) and then extended to a real-time environment
with Hardware-in-the-Loop. The RLS algorithm results are always verified using an average VSC
model before evaluating its performance along with the switching of IGBTs. The models used for
simulation are explained in Chapter 6 and the implementation of RLS algorithm on both real-time
and non real-time environment are explained in Chapter 4.
7.1.1 Non Real-Time system
MATLAB Simulink environment is used to perform all the non real-time simulations. MATLAB
version R2014b has been used to perform all the simulations and obtain results. Actual grid
parameters used in the simulation is provided for reference in Table 7.1. The model of AC system
used in simulations is shown in Figure 6.5. One of the transmission lines is tripped at 9th second
which causes a change in impedance as shown in Table 7.1. The estimation algorithm is started at
3rd second. During first three seconds, switches in the power converters are de-blocked and also the
stations are slowly ramped up to their corresponding set-points. A sensitivity analysis on some of
the critical parameters is performed at the end of this section.
Simulation
Time
Actual
Resistance
Actual
Inductance
Actual
SCC
0-9 s 3.5 Ohm 90 mH 1.85 GVA
9-20 s 6 Ohm 165 mH 1.01 GVA
Table 7.1: Actual grid parameters used in simulation
43
7.1.1.1 Average Model
The objective of this simulation is to verify the performance of RLS algorithm for estimating grid
parameters. An average model of the converter is used in this simulation. The results from the
estimation algorithm is shown in Figure 7.1. The second measurement point required by the
algorithm is provided by a 3% change in active power set-point. This change in operating point
of the power converter is done at 5th second and again at 11th second. The grid parameters are
changed due to the loss of transmission line at 9th second.
As shown in Figure 7.1, the short circuit capacity is estimated with adequate accuracy once
the second measurement point is available to the algorithm. The loss of transmission line (change
in grid parameters) is detected by the algorithm and has reset itself at 9th second. Once again,
the estimated SCC value after the second measurement point has adequate accuracy. The value of
resistance estimated by the RLS algorithm is not accurate, but, it has very little influence on SCC
as the X/R ratio of grid is very high (inductive grid).
time (s)0 2 4 6 8 10 12 14 16 18 20
SC
C (
GV
A)
0
1
2
3Short Circuit Capacity (SCC) - Non Real-time (Average Model)
time (s)0 2 4 6 8 10 12 14 16 18 20
Indu
ctan
ce (
mH
)
0
50
100
150
200Inductance (mH) - Non Real-time (Average Model)
time (s)0 2 4 6 8 10 12 14 16 18 20
Res
ista
nce
(Ω)
-5
0
5
10Resistance (ohm) - Non Real-time (Average Model)
X: 7.005Y: 1.849
X: 7.005Y: 90.37
X: 7.005Y: 3.359
X: 15.01Y: 1.019
X: 15.01Y: 164.1
X: 15.01Y: 6.107
Figure 7.1: Average Model - Non Real Time
Resistance (ohm) Inductance (mH) SCC (GVA)
Simulation Time 0-9s 9-20s 0-9s 9-20s 0-9s 9-20s
Actual Value 3.5 6 90 165 1.85 1.01
Estimated Value 3.3559 6.107 90.37 164.1 1.849 1.019
Error (%) 4.12 1.78 0.41 0.55 0.054 0.89
Table 7.2: Result of average model - Non real-time
44
The estimated values before the introduction of second measurement point should not be
considered. Results from the average model are shown in Table 7.2 to compare the estimated
and actual grid parameters. It can be seen that the error in estimated short circuit capacity is less
than 1%. Two values of grid parameters are given in Table 7.2, the first one is before any grid
disturbance and the second one is after transmission line trip.
7.1.1.2 Switching Model
Since, RLS estimation algorithm gives satisfactory results with average model of converters, this
concept has been extended towards converters with PWM switching of IGBTs. Space vector pulse
width modulation (SVPWM) technique has been used in these simulation models. All the grid
parameters used in the simulation are the same as given in Table 7.1. The second measurement
point for the estimation algorithm is given by changing the set points of reactive power by 3%. This
change in operating point of power converter is done at 4th second and again at 10th second.
time (s)0 2 4 6 8 10 12 14 16 18 20
SC
C (
GV
A)
0
1
2
3Short Circuit Capacity (SCC) - Non Real-time (Switching Model)
time (s)0 2 4 6 8 10 12 14 16 18 20
Indu
ctan
ce (
mH
)
0
50
100
150
200Inductance (mH) - Non Real-time (Switching Model)
time (s)0 2 4 6 8 10 12 14 16 18 20
Res
ista
nce
(Ω)
0
2
4
6
8Resistance (ohm) - Non Real-time (Switching Model)
X: 7.005Y: 1.87
X: 7.005Y: 89.08
X: 7.005Y: 3.651
X: 15.01Y: 1.011
X: 15.01Y: 165.4
X: 15.01Y: 6.722
Figure 7.2: Switching Model - Non real-time
Resistance (ohm) Inductance (mH) SCC (GVA)
Simulation Time 0-9s 9-20s 0-9s 9-20s 0-9s 9-20s
Actual Value 3.5 6 90 165 1.85 1.01
Estimated Value 3.651 6.722 89.08 165.4 1.87 1.011
Error (%) 4.31 12.03 1.02 0.242 1.08 0.099
Table 7.3: Result of switching model - Non real-time
45
Results from the switching model are shown in Table 7.3 to compare the estimated and actual
grid parameters. The results of switching model are similar to the average model. Thus, it could
be concluded that the estimation algorithm is capable of handling higher order harmonics in their
measurement values caused by PWM switching of IGBTs. Besides, results in Table 7.3 shows that
the estimated short circuit capacity has good accuracy. As explained earlier, the error in estimation
of resistance, does not affect short circuit capacity as the grid is inductive in nature (high X/R
ratio).
7.1.1.3 Sensitivity Analysis
A sensitivity analysis is done to evaluate the performance of algorithm with different parameters.
All these analysis are done only on the switching model. The reason behind choosing some of the
parameters is explained using this sensitivity analysis.
1. Comparison of different execution times for RLS algorithm
RLS estimation algorithm could be run at different speeds. In order to decide the optimum
speed at which this algorithm should be executed, a quantitative analysis is performed. In the
switching model, two different sample times were used. All the power line components were
run with a sample time of 7.407µs, whereas the controllers were operated with a sample time
of 74.07µs. The RLS estimation algorithm could be run with the same sample time as the
controllers (1x) or slower. The results of estimated short circuit capacity, when the algorithm
was run at different speeds could be seen from Figure 7.3.
time (s)10 12 14 16 18 20
SC
C (
GV
A)
1
1.005
1.01
1.015
1.02
1.025
1.03
1.035
1.04
1.045
1.05Estimated Short Circuit Capacity (SCC) - with 3% Q change
1x2x3x5x10x
Figure 7.3: Switching Model - Different sample times
”2x” corresponds to a sample time of 148.14µs (2*74.07µs). Similarly sample times used for the
estimation algorithm could be calculated for ”3x”, ”5x” and ”10x”. From the results shown
in Figure 7.3, it was decided to have a sample time of 222.21µs (”3x”) for the estimation
algorithm in MATLAB environment. This speed was chosen as a compromise between the
accuracy of estimated results and computational load for the algorithm. All the remaining
parts of sensitivity analysis performed in this section has a sample time of 222.21µs for the
estimation algorithm.
46
2. Comparison of different time constants for low pass filter
Low pass filters are used in the output of dq transformation. The voltage and current
measurement values are passed through this low pass filter before entering into the estimation
algorithm. The value of time constant used in this low-pass filter is determined from this
quantitative analysis. The results of estimated short circuit capacity for different time
constants in the low pass filter could be seen from Figure 7.4.
time (s)10 12 14 16 18 20
SC
C (
GV
A)
0.96
0.98
1
1.02
1.04
1.06
Estimated Short Circuit Capacity (SCC) - with 5% Q change
5ms20ms50ms100ms200ms
time (s)10 12 14 16 18 20
SC
C (
GV
A)
1.005
1.01
1.015
1.02Estimated Short Circuit Capacity (SCC) - with 5% Q change
20ms30ms40ms50ms
Figure 7.4: Switching Model - Different time constants for filter
It could be seen from Figure 7.4 that the estimation algorithm diverges from both small and
large values of time constants. The algorithm has good accuracy in-case the time constants are
in the range between 20 ms and 50 ms. There is no major difference in the results of estimated
SCC within this range of time constants. Hence, 30 ms is chosen to be the time-constant of
low-pass filters. All the remaining parts of sensitivity analysis performed in this section has a
time constant of 30 ms for low pass filters.
3. Comparison of different ramp rates
Time (s)9.5 10 10.5 11 11.5
Rea
ctiv
e P
ower
(pu
)
-0.1
-0.08
-0.06
-0.04
-0.02
0
0.02
0.04
Different ramp rate
Step0.05s0.1s0.25s
time (s)10 12 14 16 18 20
SC
C (
GV
A)
1.005
1.01
1.015
1.02Estimated Short Circuit Capacity (SCC) - with 5% Q change
step0.05s0.1s0.25s
Figure 7.5: Switching Model - Change in ramp rates
47
As discussed in Chapter 4, the RLS algorithm requires at-least two measurement points to
converge with adequate accuracy. This second measurement point is provided by changing
the reactive power or active power operating point of power converters. Change in operating
point of power converters could be provided as a step change or a ramp change with different
ramp rates. Figure 7.5 shows the different ramp changes utilized for this quantitative analysis.
Whenever the operating point of a power converter is changed, it is brought back to its original
set-point after one second.
It can be seen from Figure 7.5 that the change of ramp rates does not have major effect on
the estimated short circuit capacity. All the remaining parts of sensitivity analysis performed
in this section has a ramp rate equivalent to 0.05 s for any change in operating point of power
converters. The maximum error between the estimated SCC and actual SCC was 0.198% with
a step change.
4. Different change in reactive power set-points
RLS estimation algorithm requires a minimum of two measurements point to settle down with
an accurate value. There are many possible ways to provide second measurement point to the
estimation algorithm. One of the method is to change reactive power set-point in that HVDC
station. This quantitative analysis is done in order to determine the optimal amount of change
in reactive power set-point. Figure 7.6 shows the result of estimated SCC for different percent
change in reactive power (Q) set-point.
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.85
1.9
1.95
2
2.05
2.1
2.15Estimated Short Circuit Capacity (SCC) - Q changed
0.5%1%3%5%10%
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.82
1.83
1.84
1.85
1.86
1.87
1.88
1.89
1.9Estimated Short Circuit Capacity (SCC) - Q changed
2%2.5%3%
Figure 7.6: Switching Model - Different change in Q
It can be seen from the Figure 7.6 that a higher amount of change in reactive power set-point
would provide more accurate results. But, on the other hand, grid side voltage would be
disturbed because of this change in reactive power set-point. There needs to be a compromise
between accuracy of estimated results and the chance of disturbing the grid. The error in
estimated SCC compared to the actual value is 0.864% for a 3% change in reactive power and
1.838% for a 2% change in reactive power. Hence, from the results shown in Figure 7.6 it was
decided to have a 3% change in reactive power set-point. This means that the operating point
of reactive power would be changed by 3% and brought back to its original value after 1 second
as shown in Figure 7.5.
48
5. Different change in active power set-points
Another possible method to provide the second measurement point to the estimation algorithm
is to change the active power set-point. This quantitative analysis is performed to determine
the optimal amount of change in active power set-point. Figure 7.7 shows the result of
estimated SCC for different percent change in active power (P) set-point.
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.85
1.9
1.95
2
2.05
2.1
2.15Estimated Short Circuit Capacity (SCC) - P changed
0.5%1%3%5%10%
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.84
1.85
1.86
1.87
1.88
1.89
1.9
1.91
1.92Estimated Short Circuit Capacity (SCC) - P changed
2%2.5%3%
Figure 7.7: Switching Model - Different change in P
Similar to the change in reactive power, higher the change in active power set-point provides
better accuracy. This could be verified from Figure 7.7. In this case, active power set-point
itself is changed and hence the scheduled power transfer is disturbed. This case is done only
to compare the results of estimated SCC along with other cases. The error between estimated
SCC and actual SCC is 1.24% for a 3% change in active power and 2.11% for a 2% change in
active power. It could be concluded from Figure 7.7 that a 2% to 3% change in active power
set-point would provide adequate accuracy (error less than 2.5%) in estimated SCC.
6. Different change in both active and reactive power set-points
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.84
1.86
1.88
1.9
1.92
1.94
1.96
1.98
2
2.02
2.04Estimated Short Circuit Capacity (SCC) - Both P & Q changed
0.5%1%3%5%10%
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.84
1.845
1.85
1.855
1.86
1.865
1.87
1.875
1.88Estimated Short Circuit Capacity (SCC) - Both P & Q changed
2%2.5%3%
Figure 7.8: Switching Model - Different change in PQ
49
Another possible way of providing the second measurement point for the estimation algorithm
is by changing the operating points of both active power and reactive power. Figure 7.8 shows
the result of short circuit capacity for different percent change in both active and reactive power
set-points. It could be seen from Figure 7.8 that the higher amount of change in set-points
would produce results with better accuracy.
This case is also done only to compare results of estimated SCC with other cases. Since, the
active power set-point is changed, the scheduled power transfer is disturbed. The error between
estimated SCC and actual SCC is 0.6485% for a 3% change and 0.756% for a 2% change. It
could be concluded from Figure 7.8 that a 2% to 3% change in both active and reactive power
set-points would provide good accuracy (error less than 1%) in estimated SCC.
7. Comparison of a change in P, change in Q and change in both P & Q
The objective of changing different set-points to provide second measurement point for the
estimation algorithm were to compare the final results. Figure 7.9 shows the comparison of
results from changing different set-points. The comparison is limited to 2% and 3% change in
set-points as they were considered to be good from the previous results.
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.84
1.85
1.86
1.87
1.88
1.89
1.9
1.91Estimated Short Circuit Capacity (SCC) - with 2% change
PQPQ
time (s)4 5 6 7 8 9
SC
C (
GV
A)
1.83
1.84
1.85
1.86
1.87
1.88
1.89
1.9Estimated Short Circuit Capacity (SCC) - with 3% change
PQPQ
Figure 7.9: Switching Model - Comparison of 2% & 3% change in P, Q & PQ
Changing the active power set-points is not desirable as it would change the scheduled power
transfer. Changing the reactive power set-points would have less effect on the grid as it would
just affect the voltage magnitude at its PCC. The change in reactive power could be set in such
a manner that the voltage magnitude is increased (and not decreased) by injecting reactive
power. It could be seen from Figure 7.9 that all the three cases have results close to each
other. Considering the factor of minimal disturbance to the grid, change in reactive power
set-point is chosen as the result of this quantitative analysis. Also, a 3% change is chosen for
the reactive power set-points. All the remaining parts of sensitivity analysis performed in this
section has a 3% change in reactive power set-point for providing the second measurement
point to estimation algorithm.
8. Comparison of the results for different grid conditions
The RLS estimation algorithm is executed under different grid conditions in order to verify
50
its performance. Different grid conditions are provided by changing the short circuit capacity
and the X/R ratio. The result of estimated SCC under different grid conditions is shown in
Figure 7.10. It could be seen from Figure 7.10 that the SCC is estimated with good accuracy
for grids with smaller SCC when compared to the ones with larger SCC. A 3% change in
reactive power is used to provide the second measurement point for the algorithm. When, the
short circuit capacity of the grid is large, the 3% change in reactive power is not be enough to
provide a good enough second measurement point. A larger change in reactive power would
provide better accuracy in these cases.
time (s)10 11 12 13 14 15 16 17 18 19 20
SC
C (
GV
A)
0
1
2
3
4
5
6
7
8
9
10Estimated Short Circuit Capacity
0.750GVA, X/R = 6, Error = -1.09% 1GVA, X/R = 5, Error = 1.04% 2GVA, X/R = 7, Error = -2.24% 3GVA, X/R = 10, Error = 2.93% 5GVA, X/R = 9, Error = -0.12% 7GVA, X/R = 7, Error = 5.90%
Figure 7.10: Switching Model - Different grid conditions
The error in SCC estimation under different grid conditions is shown in Table 7.4. It could
be seen from Table 7.4 that the error in SCC estimation is less than 7%. Also, the error in
estimation of resistance is reflected on the SCC if X/R ratio is low. Hence, from all these
sensitivity analysis, it could be concluded that RLS estimation algorithm can be used for
estimating grid parameters with adequate accuracy.
Table 7.5 shows the result of sensitivity analysis. The parameters mentioned in Table 7.5 is used
for all following simulations in this thesis.
7.1.2 Real-time Hardware-in-the-Loop simulations
The estimation algorithm is implemented in a real-time controller hardware to verify its performance.
Power system part of the simulation is implemented in a real-time digital simulator called OPAL-RT.
51
SCC (GVA) X/R Ratio Error (%)
0.75 6 -1.09
1 5 1.04
2 7 -2.24
3 10 2.93
5 9 -0.12
7 7 5.90
Table 7.4: Error in SCC estimation for different grid conditions
Parameter Value
Execution time for RLS algorithm 3x
Time constant for low pass filter 30ms
Ramp rate 0.05s
Second measurement point 3% change in reactive power
Table 7.5: Result of sensitivity analysis
EtherCAT modules are used to connect the controller hardware and OPAL-RT.
7.1.2.1 Noise analysis
A noise analysis is performed on the communication between OPAL-RT and MACH controller
hardware for the measurements. The analog outputs from OPAL-RT are read by the EtherCAT
modules and are given as input to MACH. The communication from OPAL to MACH is shown in
Figure 7.11. The signal which is sent out from OPAL is shown in red colour. This signal represented
by red colour does not correspond to the analog output signal from OPAL, but, it corresponds to
the input of analog card which sends out the signal. The signal which is received by MACH is
represented by the curves in blue colour in Figure 7.11.
0 5 10 150.698
0.699
0.7
0.701
0.702Analog Channel 1 - Communication from OPAL to MACH
MACH inputOPAL output
0 5 10 15-0.1
-0.0995
-0.099
-0.0985Analog Channel 2 - Communication from OPAL to MACH
MACH inputOPAL output
Figure 7.11: Noise in different analog channels
52
The noise present in analog channel 1 and 2 are fitted in a Generalised Extreme Value (GEV)
distribution (shown in Figure 7.12) [36]. It could also be seen in Figure 7.12 that the accuracy of
values received by MACH is not so good. The parameters of GEV distribution curves for analog
channel 1 and 2 are given in Table 7.6. Since, the RLS estimation algorithm is implemented in
MACH controller hardware, this kind of noisy measurement inputs are given to the algorithm.
GEV Distribution
parametersAnalog Channel 1 Analog Channel 2
Shape (k) -0.3281 -0.2889
Scale (sigma) 0.00058823 0.00019498
Location (mu) 0.7003 0.0989
Table 7.6: Noise distribution (GEV) in Analog channel 1 and 2
Value0.699 0.6995 0.7 0.7005 0.701 0.7015 0.702 0.7025
Pro
babi
lity
Den
sity
0
500
1000
1500
2000
2500Analog Channel 1 - Probability Density Function
empiricalgeneralized extreme value
Value0.0984 0.0986 0.0988 0.099 0.0992 0.0994 0.0996
Pro
babi
lity
Den
sity
0
2000
4000
6000
8000
10000
12000
14000Analog Channel 2 - Probability Density Function
empiricalgeneralized extreme value
Figure 7.12: Probability distribution function of Analog Channel 1 and 2
7.1.2.2 Accuracy of analog signals
The analog signals have low accuracy for the communication between OPAL and MACH. In order
to improve the accuracy of communication, the analog signals could be scaled to utilize only a
particular range of values. Scaling of analog signals could be understood from Figure 7.13 which
shows the communication of d-axis voltage. Voltage in d-axis could be selected to be in the range
of 0.93 to 0.98 pu in this example. Thus the values from 0.93 to 0.98 could be scaled to 0 to 10V
output in analog signals. Similar technique could be used for all other analog channels as well. The
range of values which are scaled in each analog channel would vary correspondingly.
Major drawback of scaling the analog inputs to some specific range is that the formulation is not
generic. Even though scaled analog signals would give good accuracy as well as perform exceedingly
for specific scenarios, this would not work for all possible scenarios as the values may go out of range
used in scaling. Thus, analog signals are not scaled to a specific range. In this case, -1 to 1 pu in
measurement values are represented as -10 to 10V in the analog signals.
53
time (s)4 6 8 10 12 14 16
Vol
tage
in d
-axi
s (p
u)
0.94
0.945
0.95
0.955
0.96
0.965
0.97
0.975
0.98Analog Channel 1 - Comparison of communication from OPAL to MACH
MACH input without Scaling in Analog channelMACH input with Scaling in Analog channelOPAL output
time (s)3 4 5 6 7 8 9
Vol
tage
in d
-axi
s (p
u)
0.9745
0.975
0.9755
0.976
0.9765
0.977
0.9775
0.978
0.9785
Analog Channel 1 - Zommed view of the comparison in communication from OPAL to MACH
MACH input without Scaling in Analog channelMACH input with Scaling in Analog channelOPAL output
Figure 7.13: Comparison of communication from OPAL to MACH
For an average model, the comparison of estimation results for scaled analog inputs and the
non-scaled analog inputs are shown in Figure 7.14. It could be seen from Figure 7.14 that the
results in both the cases are almost similar. Since the results are similar between the two cases, it
would be better to use to the case of non-scaled analog signals for further simulations. Also, in case
of non-scaled analog inputs, the noise in measurement would be higher. The estimation algorithm
is able to give good results even in presence of such high noises.
Similar type of comparison is also done for a switching model and the results are shown in
Figure 7.15. In case of a switching model, higher order harmonics are already present in the
measurement values. From the estimation results shown in Figure 7.15, it could be seen that the
algorithm is able to give accurate results even in presence of higher order harmonics and noise.
In case of switching model it should be noted that the sample time of MACH controller hardware
is 1ms. However, the OPAL-RT is operated with a sample time 7.407µs for the power lines and a
sample time of 74.07µs. Hence there is measurement values available every 7.407µs from OPAL,
but, it is utilized only in every 1ms by the MACH controller hardware. The difference in sample
time between OPAL and MACH is possible as the link in between them is just analog voltage.
54
time (s)4 6 8 10 12 14 16
SC
C (
GV
A)
0.5
1
1.5
2
2.5Short Circuit Capacity (SCC) - HIL Real-time (Average Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
time (s)4 6 8 10 12 14 16
Indu
ctan
ce (
mH
)
80
100
120
140
160
180Inducatance (mH) - HIL Real-time (Average Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
time (s)4 6 8 10 12 14 16
Res
ista
nce
(Ω)
0
2
4
6
8
10Resistance (ohm) - HIL Real-time (Average Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
X: 8.001Y: 3.769
X: 8.001Y: 90.17
X: 14Y: 6.005
X: 14Y: 164.4
X: 14Y: 1.017
X: 8.001Y: 1.86
Figure 7.14: Average model - Comparison of results from different type of communication
time (s)4 6 8 10 12 14 16
SC
C (
GV
A)
0.5
1
1.5
2
2.5Short Circuit Capacity (SCC) - HIL Real-time (Switching Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
time (s)4 6 8 10 12 14 16
Indu
ctan
ce (
mH
)
80
100
120
140
160
180Inducatance (mH) - HIL Real-time (Switching Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
time (s)4 6 8 10 12 14 16
Res
ista
nce
(Ω)
0
2
4
6
8
10Resistance (ohm) - HIL Real-time (Switching Model)
Results without Scaling in Analog channelResults with Scaling in Analog channel
X: 8.001Y: 1.833
X: 8.001Y: 91.64
X: 8.001Y: 3.074
X: 14.01Y: 1.012
X: 14.01Y: 166.2
X: 14.01Y: 6.26
Figure 7.15: Switching model - Comparison of results from different type of communication
55
7.1.3 Comparison of Non-Real Time and Real Time system with HIL
Finally the results from MATLAB environment (non real-time) and real-time are compared to verify
the performance of RLS estimation algorithm.
7.1.3.1 Average Model
The scenario of these simulations are the same as shown in Table 7.1. There is a trip in the AC
transmission line at 9th second which causes a change in grid parameters. The comparison of results
from simulations using an average model between real time and non real-time is shown in Figure 7.16.
It could be seen from Figure 7.16 that the results of estimated parameters are almost the same for
both non real-time and real-time simulations. The error between the estimated SCC value and actual
SCC value is -0.054% before the tripping of AC transmission line and 0.891% after the tripping.
In both cases, the estimation algorithm converges to a value with good accuracy (error less than
1%) as soon as the second measurement point is introduced. This could be verified at simulation
time 5th second and 11th second in Figure 7.16. In real-time systems there is presence of noise in
measurement values to the estimation algorithm and the results from that are comparable to that
just non-real time simulations.
time (s)4 6 8 10 12 14 16 18 20
SC
C (
GV
A)
0
1
2
3Average model - Comparison of Short Circuit Capacity (SCC) between non real-time and real-time
Real-TimeNon Real-Time
time (s)4 6 8 10 12 14 16 18 20
Indu
ctan
ce (
mH
)
100
150
200Average model - Comparison of Inducatance (mH) between non real-time and real-time
Real-TimeNon Real-Time
time (s)4 6 8 10 12 14 16 18 20
Res
ista
nce
(Ω)
0
2
4
6
8
10Average model - Comparison of Resistance (ohm) between non real-time and real-time
Real-TimeNon Real-Time
X: 14.01Y: 164.1
X: 14.01Y: 5.814
X: 7.002Y: 3.743
X: 7.002Y: 90.37
X: 7.002Y: 1.849
X: 14.01Y: 1.019
Figure 7.16: Average model - Comparison between real-time and non real-time
7.1.3.2 Switching Model
The scenario of these simulations are also the same as shown in Table 7.1. There is a trip in the AC
transmission line at 9th second which causes a change in grid parameters. The comparison of results
56
from simulations using switching model between real-time and non real-time is shown in Figure 7.17.
Similar to the results of average model, it could be seen from Figure 7.17 that the results of estimated
parameters are almost the same for both non real-time and real-time simulations. The error between
the estimated SCC value and actual SCC value is -1.73% before the tripping of AC transmission
line and 0.2% after the tripping. Hence it could be concluded that RLS estimation algorithm is able
to provide accurate results (error less than 2%) even in presence of noise and harmonics. Also, it
is proved that this algorithm could be implemented in HVDC installations to determine the grid
parameters.
time (s)4 6 8 10 12 14 16 18 20
SC
C (
GV
A)
0
1
2
3Switching model - Comparison of Short Circuit Capacity (SCC) between non real-time and real-time
Real-TimeNon Real-Time
time (s)4 6 8 10 12 14 16 18 20
Indu
ctan
ce (
mH
)
0
50
100
150
200Switching model - Comparison of Inducatance (mH) between non real-time and real-time
Real-TimeNon Real-Time
time (s)4 6 8 10 12 14 16 18 20
Res
ista
nce
(Ω)
0
2
4
6
8
10Switching model - Comparison of Resistance (ohm) between non real-time and real-time
Real-TimeNon Real-Time
X: 7.01Y: 1.818
X: 7.01Y: 91.69
X: 14.01Y: 5.572
X: 14.01Y: 166.1
X: 14.01Y: 1.012
X: 7.01Y: 2.713
Figure 7.17: Switching model - Comparison between real-time and non real-time
57
7.2 Selection of DC Voltage Controlling Stations
The selection of DC voltage controlling station based on evaluation values were introduced in
Chapter 5. All the simulations in this section were performed in OPAL-RT simulator. CIGRE
DC bus test system model, detailed in Chapter 6 is considered for these simulations. The results
shown in Figure 6.6 focuses on DCS3 (DC system 3). DCS3 contains five bi-polar HVDC stations.
7.2.1 Scenario 1 - Importance of Power margin in Voltage Controlling
Station
The bi-polar HVDC station Cb-A1 is chosen as the DC voltage controlling station in this scenario.
Cb-B1 and Cb-B2 are operating in active power control mode with DC voltage droop. Cb-C2 and
Cb-D1 are connected to wind-farms and thus operated with constant active power control mode.
Under normal conditions, Cb-A1 is operating with 85.79% of its power capacity to fulfil the mismatch
in DC grid (before 30th second in simulation). Hence the power margin left in this station is only
14.21% of its capacity.
At the 30th second, the active power set-point of Cb-B2 is increased from 0.7082 pu to 0.8837
pu. Now there is a mismatch in the DC power flow. The power demanded by Cb-B2 HVDC station
should be provided by some other stations in DC grid. Usually it is the slack converter which
contributes towards this kind of mismatch. But, in this case, Cb-A1 does not have enough power
margin to contribute the entire mismatch in HVDC grid. The active power operating point of Cb-A1
is increased to its maximum capability (1 pu). The remaining mismatch in DC grid is provided by
other HVDC stations which have droop control.
time (s)25 26 27 28 29 30 31 32 33 34 35
Pow
er (
pu)
-1
-0.5
0
0.5
1
Scenario 1 - AC Power (pu)
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
time (s)25 26 27 28 29 30 31 32 33 34 35
Vol
tage
(pu
)
0.97
0.98
0.99
1
1.01
1.02Scenario 1 - DC Voltage (pu)
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
Figure 7.18: Scenario 1: Importance of Power Margin in Slack Converter
In order to provide the remaining power mismatch through droop control, the DC voltage has to
decrease. Hence the DC voltage will reduce at stations contributing in droop control to give more
power output (similar to primary frequency control in AC grids). Since, the DC voltage in some
58
stations have reduced due to droop control, DC voltage of all other stations are also decreased to
maintain the proper power flow. Hence, the entire DC voltage profile is decreased. This decrease
in DC voltage corresponds to an increase in current to maintain the same amount of power. The
increase in current causes the transmission losses to increase.
Figure 7.18 shows the variation of DC voltage and active power at all HVDC stations in DCS3.
It could be concluded from Figure 7.18 that power margin is important for DC voltage controlling
station. Low power margins in DC voltage controlling station would lead to decrease in DC voltage
profile and ultimately increase in transmission losses.
7.2.2 Scenario 2 - Importance of SCC in Voltage Controlling Station
This Scenario is similar to Scenario 1. The importance of short circuit capacity in the AC grid
connected to DC voltage controlling station is explained in this scenario. Cb-A1 is chosen as the
DC voltage controlling station in this scenario too. At the 30th second, the active power set-point of
Cb-B2 is changed from 0.7082 pu to 0.812 pu. The mismatch in DC power is provided completely by
Cb-A1. Hence the active power operating point in Cb-A1 is changed from 0.8579 pu to 0.9613 pu.
Active power operating points of all HVDC stations connected in DCS3 are shown in Figure 7.19.
The same simulation is performed with three different cases of short circuit capacity to understand
time (s)15 20 25 30 35 40 45 50
Act
ive
Pow
er (
pu)
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1Scenario 2 - AC Power (pu)
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
Figure 7.19: Scenario 2: Active power flow in different HVDC stations
its effect. Since, Cb-A1 is chosen as the DC voltage controlling station, the short circuit capacity of
AC grid connected to this station is changed in all the three cases. In the first case (Case 1), short
circuit capacity of AC grid connected to Cb-A1 is 12.82 GVA. Whereas, in case 2 it is 10.04 GVA
and in case 3 it is 9.4 GVA.
Any mismatch of power flow in DC grid is compensated by the slack converter. In case the AC
grid connected to slack converter is weak, there would be disturbance in grid whenever the power
flow is changed. The effect of change in active power set-point in Cb-B2 at 30th second on the AC
voltage of Cb-A1 for different cases are shown in Figure 7.20. It could be seen from Figure 7.20 that,
lower the value of SCC in AC grid connected to slack converter, higher would be the disturbance in
AC voltage.
Figure 7.20 shows the importance of SCC in DC voltage controlling stations. However, the
59
time (s)29 30 31 32 33 34 35 36 37 38
Vol
tage
(pu
)
0.997
0.9975
0.998
0.9985
0.999
0.9995
1
1.0005Scenario 2 - AC Voltage (pu) @ Cb-A1
Case 3: SCC = 9.4 GVACase 2: SCC = 10.04 GVACase 1: SCC = 12.82 GVA
Figure 7.20: Scenario 2: Effect of different SCC on AC voltage at Cb-A1
change of SCC in AC grid connected to HVDC station could also have an effect in station controls.
Figure 7.21 shows an example, where the SCC of AC grid is changed from 12.82 GVA to 6 GVA
at the 20th second in simulation time. When SCC of the connected AC grid becomes low, the
control strategy of HVDC stations need to be changed. [34] explains some of the control strategies
for HVDC station in case of weak AC networks. Change of control strategies for weak ac networks
are not discussed as it is beyond the scope of this thesis.
It could be concluded from Scenario 1 and 2 that, both short circuit capacity and power margin
are important parameters, required for the selection of DC voltage controlling station.
time (s)15 20 25
Vol
tage
(pu
)
0.97
0.98
0.99
1
1.01
1.02
1.03Scenario 2 - DC Voltage (pu), SCC changed from 12.82 GVA to 6 GVA @ 20s
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
Figure 7.21: Scenario 2: HVDC station connected to weak AC grid
60
7.2.3 Scenario 3 - Second measurement point for SCC estimation
algorithm
RLS estimation algorithm requires a minimum of two measurement points to converge to a result with
adequate accuracy. Different methods for providing the second measurement point is discussed in
Chapter 4. This scenario details the use of droop control or load changes as the second measurement
point for estimation algorithm. This scenario is similar to the case 2 explained in scenario 2. The
SCC of AC grid connected to Cb-A1 is changed from 12.82 GVA to 10.04 GVA at the 20th second.
Figure 7.22 shows the result of estimated short circuit capacity in station Cb-A1.
time (s)10 15 20 25 30 35 40 45 50
SC
C (
GV
A)
0
5
10
15
20
25Scenario 3 - Estimated Short Circuit Capacity (GVA) @ Cb-A1
X: 18.06Y: 12.82
X: 40.1Y: 10.04
Figure 7.22: Scenario 3: Estimated Short circuit capacity
At the 30th second, the active power set-point of Cb-B2 is changed from 0.7082 pu to 0.812
pu. The mismatch in power flow is provided entirely by Cb-A1. The active power flow of HVDC
stations shown in Figure 7.19 is applicable for this scenario too. The change in SCC is caused by
tripping a transmission line in simulation. This change in SCC at the 20th second is detected by
the estimation algorithm and it resets itself. After the change in SCC, two measurement points are
required for the algorithm to converge at its result. The change in operating point of Cb-A1 due to
the change in active power set-point at Cb-B1 provides the second measurement point at the 30th
second. It could be seen from Figure 7.22 that the estimation algorithm converges with adequate
accuracy, immediately after the introduction of second measurement point.
Hence any considerable change in load or change in active power set-points at an HVDC station
could provide the second measurement point after disturbance. Since, these kind of changes could
not be guaranteed to happen after every disturbance, manual change of reactive power set-points
were discussed earlier in this chapter.
7.2.4 Scenario 4 - Slack Converter Ranking
The selection metrics explained in Chapter 5 is utilized in this scenario. An evaluation value for each
HVDC station in DC grid is calculated based on SCC and power margin. Later these evaluation
values are sorted to form a ranking among HVDC stations to choose the slack converter by DC
61
grid operator. This scenario has two cases. The first case has Cb-A1 as voltage controlling station,
whereas, the second case has Cb-B1 as voltage controlling station. At 25th second the ranking of
slack converters is detailed in Table 7.7.
It could be seen from Table 7.7 that Cb-B1 is the best choice of DC voltage controlling station.
There is a line trip at 20th second which caused the SCC of Cb-A1 to reduce. This reduction in
SCC has caused the ranking of Cb-A1 to go to 3rd favourable DC voltage controlling station. At the
30th second the active power set-point of Cb-B2 is increased from 0.7086 pu to 0.8713 pu, similar to
scenario 1.
HVDC
Station
Estimated SCC
(GVA)
Power Margin
(MW)
Evaluation
Value
Slack converter
Ranking
Cb-A1 13.15 316.32 0.0693 3
Cb-B1 14.89 878.16 0.2182 1
Cb-B2 9.06 699.36 0.1057 2
Table 7.7: DC Voltage Controlling Station Ranking at 25th second
The evaluation value shown in Table 7.7 is a value in-between 0 and 1. This is done by multiplying
SCC and Power margin (both in the range of 0 to 1). In order to achieve a value of SCC in the
range from 0 to 1, the estimated SCC value is divided by 25 GVA in this case. Also, in order to
achieve a value of power margin in the range of 0 to 1, the power margin is divided by 2400 MW in
this case. The value used for dividing SCC and power margin could be chosen based on scenarios
(maximum attainable value). Cb-D1 and Cb-C2 are not included in the slack converter ranking as
they are connected to wind-farms.
time (s)25 26 27 28 29 30 31 32 33 34 35
Act
ive
Pow
er (
pu)
-1
-0.5
0
0.5
1
Scenario 4 - AC Power (pu)
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
time (s)25 26 27 28 29 30 31 32 33 34 35
Vol
tage
(pu
)
0.97
0.98
0.99
1
1.01
1.02Scenario 4 - DC Voltage (pu)
Cb-A1Cb-C2Cb-D1Cb-B1Cb-B2
Figure 7.23: Scenario 4: Comparison between Cb-A1 (solid) and Cb-B1 (dotted) as slack converter
62
Figure 7.23 shows the comparison of active power flows and DC voltage in HVDC stations when
two different stations are controlling DC voltage. The one with solid lines represent results with
Cb-A1 as voltage controlling station. The other with dotted lines represent results with Cb-B1 as
voltage controlling station. Since, power margin in Cb-A1 is low, the entire DC voltage profile is
lowered in case this was the slack converter. It could directly be seen from Figure 7.23 that the DC
voltage profile is improved when Cb-B1 is chosen as the slack converter. Also the change in active
power set-point in Cb-B2 is compensated by the chosen slack converter and could be verified from
Figure 7.23.
time (s)29.5 30 30.5 31 31.5 32 32.5 33
Vol
tage
(pu
)
0.997
0.9975
0.998
0.9985
0.999
0.9995
1
1.0005
1.001
1.0015Scenario 4 - AC Voltage (pu) @ Cb-A1
Cb-A1 (DC Voltage control mode)Cb-A1 (P-Droop control mode)
time (s)29.5 30 30.5 31 31.5 32 32.5 33
Vol
tage
(pu
)
0.997
0.9975
0.998
0.9985
0.999
0.9995
1
1.0005
1.001
1.0015Scenario 4 - AC Voltage (pu) @ Cb-B1
Cb-B1 (DC Voltage control mode)Cb-B1 (P-Droop control mode)
Figure 7.24: Scenario 4: Effect of slack converter selection on AC voltage
Figure 7.24 shows the effect of slack converter selection in AC voltages. Cb-A1 has a low short
circuit capacity. In case Cb-A1 is chosen as the slack converter, the change in operating point would
cause disturbance in AC grid. The mismatch created in DC grid due to the change of active power
set-point in Cb-B2 is compensated by Cb-A1 and its effect on AC voltage is shown in Figure 7.24.
In the other case, if Cb-B1 was chosen as the voltage controlling station, then the disturbance in
AC grid would shift towards Cb-B1. The mismatch created in DC grid due to the change of active
power set-point in Cb-B2 is compensated by Cb-B1 and its effect on AC voltage is also shown in
Figure 7.24. Comparing both the options shown in Figure 7.24, it could be concluded that choosing
Cb-B1 as the slack converter would have less disturbance in AC grid.
Hence, it could be concluded that choosing a proper DC voltage controlling station is important.
If the system operator has chosen Cb-B1 as the slack converter instead of Cb-A1, there would be
advantages like better DC voltage profile, lower transmission losses and less disturbance in AC grid.
The evaluation value provided in real-time could be used to inform the system operator of the
desirable choice for DC voltage controlling station. Then the system operator could take a decision
based on this choice to order a bumpless transfer of control mode for desirable stations.
The final ranking of desirable DC voltage controlling stations could be achieved in many different
ways. For example, the ranking could be achieved from the properly scaled weighted sum of power
margin and SCC evaluation values. The ranking used in this thesis is based on multiplication of
power margin and SCC evaluation values, which is just one way of considering both the influences.
However, this approach considered in this thesis need not be followed always.
63
Chapter 8
Conclusions
A Recursive Least Square (RLS) algorithm is suitable for estimating short circuit capacity of
connected AC grids in HVDC stations. This RLS algorithm has been first verified using a simple
point-to-point transmission model in non real-time environment. Further, the algorithm has been
reformulated and simplified to be implemented on ABB’s industrial real-time controller (MACH).
The performance of real-time implementation has been evaluated using a co-simulation platform. In
addition to the evaluation of real-time implementation, a sensitivity analysis has been carried out to
assess the impact of different parameters and operational conditions on the performance of estimation
algorithm. Finally, the results show that RLS algorithm can be very efficiently implemented for the
estimation of SCC considering hardware limitations and operational complexity in the estimation.
This thesis proposes a real-time quantitative evaluation of HVDC converters in a DC grid to
select the proper DC slack converter. This concept of selecting DC voltage controlling station has
been evaluated by running different simulation scenarios in CIGRE B4 DC grid test system. The
importance of short circuit capacity and power margin in DC voltage controlling station were also
realised using these simulations. The results show that the proper selection of the slack station can
improve AC system response and DC voltage drops during disturbances.
Initially these evaluation values from each converter station could be provided to the system
operator to take an informed decision on DC voltage controlling station. The system operator could
then order a bump-less transfer of control modes between stations, if deemed necessary. Later this
concept could be extended to on-line selection of DC voltage controlling station, where a supervisory
controller could automatically change the control modes of stations based on evaluation values.
64
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67
Appendix A
Non-Complex and Non-Matrix
representation of RLS algorithm
The objective of this thesis is to implement the SCC estimation algorithm in a real hardware. In
order to accomplish this goal, the RLS algorithm has to be simplified in-order to avoid complex
terms and matrices. This section deals with the derivation of RLS algorithm in order to represent
in a form which contains no complex terms and matrices. Hence, the objective is to reach a
non-complex and non-matrix representation of equations 4.8 to 4.10.
Assumptions:
Ik+1 = Id + jIq; Zk = R+ jX; (E0)k = Ed + jEq; yk+1 = Vd + jVq;
Zk+1 = R1 + jX1; (E0)k+1 = Ed1 + jEq1;
Error = Error1 + jError2; (I + BT∗PkB) = a+ jb; [I + BT∗PkB]−1 = x+ jy;
Pk =
[Pk11 + jPk12 Pk21 + jPk22
Pk31 + jPk32 Pk41 + jPk42
]
Pk+1 =
[Pk1 11 + jPk1 12 Pk1 21 + jPk1 22
Pk1 31 + jPk1 32 Pk1 41 + jPk1 42
]
[I −Wk+1BT∗] =
[A11 + jA12 A21 + jA22
A31 + jA32 A41 + jA42
]
Wk+1 =
[W11 W12
W21 W22
]
Error is the difference between calculated grid voltage based on measurements and the estimated
grid voltage. In these assumptions all the variables are represented in their corresponding matrix
and complex forms.
68
Derivation:
From equation 4.3, the error term can be represented as
Error =[Id + jIq 1
] [ R+ jX
Ed + jEq
]−[Vd + jVq
]Error = (IdR− IqX + Ed − Vd) + j(IqR+ IdX + Eq − Vq)
Error = Error1 + jError2
Error1 = (IdR− IqX + Ed − Vd); Error2 = (IqR+ IdX + Eq − Vq) (A.1)
Also,
BT∗PkB =[Id + jIq 1
] [Pk11 + jPk12 Pk21 + jPk22
Pk31 + jPk32 Pk41 + jPk42
][Id − jIq
1
]BT∗PkB = Pk11 ∗ (I2d + I2q ) + Id ∗ [Pk21 + Pk31] + Iq ∗ [Pk32 − Pk22] + Pk41+
jPk12 ∗ (I2d + I2q ) + Id ∗ [Pk22 + Pk32] + Iq ∗ [Pk21 − Pk31] + Pk42
I + BT∗PkB = 1 + Pk11 ∗ (I2d + I2q ) + Id ∗ [Pk21 + Pk31] + Iq ∗ [Pk32 − Pk22] + Pk41+
jPk12 ∗ (I2d + I2q ) + Id ∗ [Pk22 + Pk32] + Iq ∗ [Pk21 − Pk31] + Pk42
a = 1 + Pk11 ∗ (I2d + I2q ) + Id ∗ [Pk21 + Pk31] + Iq ∗ [Pk32 − Pk22] + Pk41
b = Pk12 ∗ (I2d + I2q ) + Id ∗ [Pk22 + Pk32] + Iq ∗ [Pk21 − Pk31] + Pk42(A.2)
From the assumptions, it can be said that
I + BT∗PkB = a+ jb
[I + BT∗PkB]−1 =1
a+ jb=
1
a+ jb∗ a− jba− jb
=a− jba2 + b2
[I + BT∗PkB]−1 = x+ jy
x =a
a2 + b2; y = − b
a2 + b2(A.3)
Hence,
B ∗ [I + BT∗PkB]−1 =
[Id − jIq
1
] [x+ jy
]B ∗ [I + BT∗PkB]−1 =
[(Idx+ Iqy) + j(Idy − Iqx)
x+ jy
]
PkB ∗ [I + BT∗PkB]−1 =
[Pk11 + jPk12 Pk21 + jPk22
Pk31 + jPk32 Pk41 + jPk42
][(Idx+ Iqy) + j(Idy − Iqx)
x+ jy
]
PkB ∗ [I + BT∗PkB]−1 = Wk+1 =
[W11 W12
W21 W22
]
69
W11 = IdxPk11 + IqyPk11 − IdyPk12 + IqxPk12 + xPk21 − yPk22
W12 = IdxPk12 + IqyPk12 + IdyPk11 − IqxPk11 + xPk22 + yPk21
W21 = IdxPk31 + IqyPk31 − IdyPk32 + IqxPk32 + xPk41 − yPk42
W22 = IdxPk32 + IqyPk32 + IdyPk31 − IqxPk31 + xPk42 + yPk41
(A.4)
Now, Equation 4.10 can be represented as
Wk+1 ∗ Error =
[W11 W12
W21 W22
]∗[Error1 + jError2
]Wk+1 ∗ Error =
[(W11Error1 −W12Error2) + j(W12Error1 −W11Error2)
(W21Error1 −W22Error2) + j(W22Error1 −W21Error2)
][Z
E0
]k+1
=
[Z
E0
]k
−[Wk+1 ∗ Error
]
[R1 + jX1
Ed1 + jEq1
]=
[R+ jX
Ed + jEq
]−
[(W11Error1 −W12Error2) + j(W12Error1 −W11Error2)
(W21Error1 −W22Error2) + j(W22Error1 −W21Error2)
]
R1 = R−W11Error1 +W12Error2; X1 = X −W12Error1 −W11Error2;
Ed1 = Ed −W21Error1 +W22Error2; Eq1 = Eq −W22Error1 −W21Error2;(A.5)
Also,
Wk+1BT∗ =
[W11 W12
W21 W22
] [Id + jIq 1
]Wk+1B
T∗ =
[(IdW11 − IqW12) + j(IdW12 + IqW11) W11 + jW12
(IdW21 − IqW22) + j(IdW22 + IqW21) W21 + jW22
]
[I −Wk+1BT∗] =
[1 0
0 1
]−
[(IdW11 − IqW12) + j(IdW12 + IqW11) W11 + jW12
(IdW21 − IqW22) + j(IdW22 + IqW21) W21 + jW22
]
[I −Wk+1BT∗] =
[(1− IdW11 + IqW12)− j(IdW12 + IqW11) −W11 − jW12
(−IdW21 + IqW22)− j(IdW22 + IqW21) (1−W21)− jW22
]
[I −Wk+1BT∗] =
[A11 + jA12 A21 + jA22
A31 + jA32 A41 + jA42
]
A11 = 1− IdW11 + IqW12; A12 = −IdW12 − IqW11;
A21 = −W11; A22 = −W12;
A31 = −IdW21 + IqW22; A32 = −IdW22 − IqW21;
A41 = 1−W21; A42 = −W22;
(A.6)
Finally, the value of Pk+1 can be calculated from
70
[I −Wk+1BT∗]Pk =
[A11 + jA12 A21 + jA22
A31 + jA32 A41 + jA42
][Pk11 + jPk12 Pk21 + jPk22
Pk31 + jPk32 Pk41 + jPk42
]
[I −Wk+1BT∗]Pk = Pk+1 =
[Pk1 11 + jPk1 12 Pk1 21 + jPk1 22
Pk1 31 + jPk1 32 Pk1 41 + jPk1 42
]
Pk1 11 = A11Pk11 −A12Pk12 +A21Pk31 −A22Pk32
Pk1 12 = A12Pk11 +A11Pk12 +A22Pk31 +A21Pk32
Pk1 21 = A11Pk21 −A12Pk22 +A21Pk41 −A22Pk42
Pk1 22 = A12Pk21 +A11Pk22 +A22Pk41 +A21Pk42
Pk1 31 = A31Pk11 −A32Pk12 +A41Pk31 −A42Pk32
Pk1 32 = A32Pk11 +A31Pk12 +A42Pk31 +A41Pk32
Pk1 41 = A31Pk21 −A32Pk22 +A41Pk41 −A42Pk42
Pk1 42 = A32Pk21 +A31Pk22 +A42Pk41 +A41Pk42
(A.7)
Using equations A.1 to A.7 in the RLS algorithm shown in Figure 4.2, will result in a non-complex
and non-matrix form of representing the algorithm.
71
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