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Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林林林 ) Date: Nov. 29, 2007 Publisher/Conf. : Journal of Internet T echnology, 2007 Dept. of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C.
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Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

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Page 1: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Scalable IPv6 Lookup/Update Design for High-Throughput

Routers

Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin (林意勝 ) Date: Nov. 29, 2007 Publisher/Conf. : Journal of Internet Technology, 2007

Dept. of Computer Science and Information Engineering National Cheng Kung University,

Taiwan R.O.C.

Page 2: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Outline

1. Introduction

2. Longest Prefix Matching with Parallel Memory Lookup

3. Lookup Table Initialization and Update

4. System Implementation

5. Simulation System and Results

6. Conclusion

Page 3: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Introduction

First, we propose the use of a parallel CRC technique to reduce table sizes.

Second, the arrangement of the parallel tables in the hierarchy reduces the number of memory accesses

More importantly, we present the scalable pipeline design which is not previously unveiled.

Page 4: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Longest Prefix Matching with Parallel Memory Lookup

Page 5: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Longest Prefix Matching with Parallel Memory Lookup

The first-level table is the TLA-table (TLAT) which has 213 entries storing all the possible route prefixes

Second-level tables are used for the different ranges of prefix length.

1. SLT40 : stores the prefixes of length that is greater than 24 bits and up to 40 bits.

2. SLT48, and SLT56 : store all the route prefixes that are equal to 48 bits and 56 bits respectively.

Third-level table (TLT) stores the rest of the route prefixes ( x : prefix length, 40<x<48 , 48<x<56, and 56<x<64)

The reason : put the most likely prefix distributions in the second-level tables for parallel accesses.

Page 6: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Longest Prefix Matching with Parallel Memory Lookup

Page 7: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Longest Prefix Matching with Parallel Memory Lookup

Suppose that a prefix P is to be inserted : 1. If P ‘s prefix length < 24 Output port is stored in the TLAT table,

Otherwise, store base address for accessing the second level.

2. If 24< P’s prefix length <=40Prefix length in this range is allocated 240− prefix _ length entries in the SLT40 table.

3. If 40< P’s prefix length <48 248− prefix _ length entries in the TLT.

4. If 48< P’s prefix length <56 256− prefix _ length entries in the TLT

5. If 56< P’s prefix length <64 264− prefix _ length entries in the TLT

6. Else stores in SLT 48 or SLT 56.

Example,20:01:00:13/32 is allocated 256 entries (240-32) in SLT40, ranging from 01:13:00 to 01:13:FF

Page 8: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Lookup Table Initialization and Update

Constructing the linked-list data structure that is used to initialize and update the lookup tables when a route change occurs.

Each node in the linked-list has four items: prefix64, length, limit, and hop.

Example : prefix Y is 20:12:00:01:E4:5F:70/52

1. prefix64 : 20:12:00:01:E4:5F:70:00 (padding 0 to 64 bits.)

2. length : simply the prefix length.

3. Limit : the number of entries to be allocated

(in this case 256 - 52 entries in TLT)

4. Hop : output port.

Page 9: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Lookup Table Initialization and Update

Page 10: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Lookup Table Initialization and Update

Page 11: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Lookup Table Initialization and Update

Page 12: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

System Implementation

Page 13: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

System Implementation

Page 14: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

System Implementation

The address queue is a circular queue which buffers lookup requests in case of stalling due to the on-going

update process. Each queue entry has three fields :

1. the status

2. incoming destination address

3. the output result The status field : clear, wait, finish, block.

Page 15: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Simulation System and Results

Page 16: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Simulation System and ResultsNumber of Memory Accesses in Multi-Cycle

Architecture

Page 17: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Simulation System and ResultsMemory Requirement

Page 18: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Simulation System and ResultsPipeline Throughput

Page 19: Scalable IPv6 Lookup/Update Design for High-Throughput Routers Authors: Chung-Ho Chen, Chao-Hsien Hsu, Chen -Chieh Wang Presenter: Yi-Sheng, Lin ( 林意勝.

Conclusion

The multi-cycle implementation requires only an average

of 1.6 memory accesses for each lookup request. Performance simulation shows that the number of queue

entries significant affects the lookup throughput when frequent table updates happen.