SAT0050 FPD-Link III to I2C Analyzer Board test procedureprocessors.wiki.ti.com/images/7/7f/File-SAT0050_test_procedure.pdf · Note that connectors J4 and J5 must be modified to remove

SAT0050 FPD‐Link III to I2C Analyzer Board test procedure

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SAT0050 FPD-Link III to I2C Analyzer Board test procedure

1. Visual inspection a. Verify that R47 is not installed. b. Verify that all other components are installed. c. Check for solder bridges, flux or other contaminants, or any evidence of cracked or damaged

components. d. Note that connectors J4 and J5 must be modified to remove the alignment tab on the bottom side,

in order to be installed in the E1 circuit board. This is due to an error in the board outline. e. Check that one switch on S1 is in the ON position, and all other switches on S1 are in the OFF

position. Do the same for S2. f. Check that one jumper is installed to set the U1 Address (one jumper on J2) and one jumper is

installed to set the U2 Address (one jumper on J3). The address selected for U1 and U2 should be different, so the jumpers should be on different positions on the respective headers.

Figure 1 Photo of SAT0050 board

2. Power supplies a. Apply +12Vdc through the barrel connector J6.

NOTE: Before making the connection to J6, make sure the polarity on the power cable is such that the center contact is +12V with respect to the outside contact.


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b. Verify that the orange POWER indicator LED (D5) is illuminated. i. This indicator is controlled by the PG (power good) output from the TPS62152 buck

converter (U4). A high level on PG will illuminate D5, and indicates that the output voltage (3.3Vdc) is at the proper level, and that no faults are detected such as over-temperature or under-voltage.

ii. Note that the green PASS indicator LED (D3) will also be illuminated. c. Measure the 3.3Vdc level at test point TP3 (orange test point) with respect to ground (TP0, black

test point). The level should be 3.3V, with not more than 50 mV of ripple. (see figures below)

Figure 2 DC-coupled (left) and AC-coupled measurements of board +3.3Vdc with 12Vdc input on J6

d. Apply 5Vdc through a USB cable to J7 (USB B-type connector) e. Verify that the orange POWER indicator LED (D5) is illuminated.

i. This indicator is controlled by the PG (power good) output from the TPS62152 buck converter (U4). A high level on PG will illuminate D5, and indicates that the output voltage (3.3Vdc) is at the proper level, and that no faults are detected such as over-temperature or under-voltage.

ii. Note that the green PASS indicator LED (D3) will also be illuminated. f. Measure the 3.3Vdc level at test point TP3 (orange test point) with respect to ground (TP0, black

test point). The level should be 3.3V, with not more than 50 mV of ripple.


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Figure 3 DC-coupled (left) and AC-coupled measurements of board +3.3Vdc with 5Vdc input on J7 (USB)

g. If a +12Vdc supply is not available, the board will also operate with other supply levels applied to the barrel connector. The supply current will vary slightly with the supply voltage, as shown by the typical values in the table below.

Supply voltage Supply current Board voltage POWER LED < 3.4V 0 0 V OFF 3.5V 240 mA 3.1 V ON 4V 220 mA 3.3 V ON 5V 180 mA 3.3 V ON 9V 100 mA 3.3 V ON 12V 80 mA 3.3 V ON 15V 70 mA 3.3 V ON

3. Indicators and switches a. With power applied but no other connections to the board, the indicator LEDs should be:

LED Name Color State Description D3 PASS Green On Pass/Fault indicator from FPD-Link deserializer D4 LOCK Yellow Off Indicates deserializer lock to incoming FPD-Link signalD5 POWER Orange On Indicates 3.3Vdc board power is correct D6 USER Red Off User-defined indicator, controlled by MSP430

b. Press the “Master RESET” momentary switch (S3). Verify that the green PASS indicator LED turns off when the button is pushed, and then illuminates when the button is released.

i. NOTE: Some boards may not have sufficient internal pull-down strength on the PASS output to drive the PASS state low.

c. Press the “Reset Lock” momentary switch (S4). Verify that the yellow LOCK indicator LED turns off when the button is pushed, and then illuminates when the button is released.


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4. Connection to DS90Ux925 EVB

Figure 4 DS90Ux925 EVB (left) and SAT0050 board (right)

a. Connect the SAT0050 board to a DS90Ux925 EVB, using an appropriate cable to bring the FPD-Link III signals to the J4 connector on the SAT0050 board.

b. Set-up the DS90Ux925 EVB in accordance with the DS90UB925QSEVB User’s Guide1. c. Apply 3.3Vpower to the DS90Ux925 EVB. d. Connect the DS90Ux925 EVB to a computer running Analog LaunchPAD (ALP). e. Open the ALP application and select the DS90Ux925 in the Devices section. Go to the

Information tab; you should now see the information for both the DS90Ux925 EVB as the “device” and the SAT0050 board as the “partner”. See figure.

f. When correctly connected to the DS90Ux925 EVB, the LINK indicator LED should be illuminated. If not, press and release the “Reset Lock” button. If the LINK indicator is still not illuminated, check the connection to the DS90Ux925 EVB.

g. Verify that the status of the SAT0050 board is being correctly communicated to the DS90Ux925 EVB.

i. Check that the information displayed in the “partner” section of the Information tab matches the settings for S1 (deserializer mode) and J2 (deserializer address) on the SAT0050 board.

ii. Change the setting of the deserializer mode (S1) and deserializer address (J2) on the SAT0050 board, and then press and release the “Master RESET” button.

iii. Verify that the new settings are shown on the Information tab for the “partner”.

1 See http://www.ti.com/lit/pdf/snlu113


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Figure 5 Screen shot of ALP application with DS90Ux925 EVB and SAT0050 connected


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5. Connection to DS90Ux925 EVB (“upstream”) and DS90Ux926 EVM (“downstream”)

Figure 6 DS90Ux925 EVB (left), SAT0050 board (center), and DS90Ux926 EVB (right)

a. In addition to the previous connections to the DS90Ux925 EVB, connect the SAT0050 board to a DS90Ux926 EVB, using an appropriate cable to bring the FPD-Link III signals to the J5 connector on the SAT0050 board.

b. Set-up the DS90Ux926 EVB in accordance with the DS90UB926QSEVB User’s Guide2. c. Apply 3.3Vpower to the DS90Ux926 EVB (this can be the same power supply as used for the

DS90Ux925 EVB). d. Connect the DS90Ux925 EVB to a computer running Analog LaunchPAD (ALP). e. When correctly connected, the green LINK indicator LED on the DS90Ux926 EVB should be

illuminated. If the LINK indicator is not illuminated, check the connections to the SAT0050, and from the SAT0050 board to the DS90Ux925 EVB.

f. Open the ALP application and select the DS90Ux925 in the Devices section. g. Verify that the ALP application correctly receives information from the DS90Ux926 EVB

through the chain of boards. Do this by opening the “System Topology” tab in the ALP application. The DS90Ux926 EVB should be identified as an active node in the layer of nodes to the right of the SAT0050 board.

2 See http://www.ti.com/lit/pdf/snlu114


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Figure 7 Screen shot of ALP app System Topology tab with all three boards connected, SAT0050 in repeater mode

h. Change the mode settings for the SAT0050 deserializer (S1) and serializer (S2) from repeater mode (S1 and S2 position 3 or 4) to non-repeater mode (S1 and S2 position 1 or 2). Press and release the Master RESET button on the SAT0050 so that these changes take effect. Verify that the “System Topology” diagram updates such that the serializer (DS90Ux925) on the SAT0050 board and the DS90Ux926 EVB are no longer visible as active nodes.

Figure 8 System topology diagram with SAT0050 in repeater mode (left) and in non-repeater mode (right)


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6. Test pattern display a. Set up a display monitor, using either the FPD-Link III serial signal from the SAT0050 board (if

you have an FPD-Link III compatible monitor) or using the parallel RGB-24 signals from the DS90Ux926EVB (if you have an RGB-24 compatible monitor) or using the HDMI signals from the FPD23DAEVM3 (if you have an HDMI compatible monitor).

b. In the ALP application, go to the Pattern Generator tab. Select the Enable Generator, Enable Scrolling, and 18-bit Color check boxes. Set the video timing and format to match the capabilities of your monitor.

Figure 9 Pattern Generator tab of ALP application

c. Verify that the monitor is displaying patterns corresponding to the selected patterns. d. Disable the pattern generator, and verify that the monitor stops displaying patterns.

3 See SNLU144 “FPD23DAEVM User’s Guide” – presently draft version


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7. I2C communication to DS90Ux925 a. Connect an I2C analyzer (such as TotalPhase Aardvark) to the SAT0050 board through the J9

connector. Use the I2C address corresponding to the address selected on J2. b. Read the RX ID registers to verify correct communication with the DS90Ux925

i. read register 0xF3, should return data 0x39 ii. read register 0xF4, should return data 0x32

iii. read register 0xF5, should return data 0x35 c. Configure the DS90Ux925EVB board to generate scrolling test patterns by sending write data

commands to the DS90Ux925EVB board: i. write 0x11 to register 0x64 (enable pattern generator)

ii. write 0x05 to register 0x65 (24-bit color, internal timing, non-inverted scrolling color patterns)

d. Verify that the monitor is displaying patterns corresponding to the selected patterns. e. Configure the DS90Ux925EVB board to stop generating test patterns by sending a write data

command to the DS90Ux925EVB board: i. 0x10 to register 0x64 (disable pattern generator)

f. Verify that the monitor is no longer displaying test patterns. 8. I2C communication to DS90Ux926

a. Connect an I2C analyzer (such as TotalPhase Aardvark) to the SAT0050 board through the J9 connector. Use the I2C address corresponding to the address selected on J3.

b. Read the RX ID registers to verify correct communication with the DS90Ux926 i. read register 0xF3, should return data 0x39

ii. read register 0xF4, should return data 0x32 iii. read register 0xF5, should return data 0x36

c. Configure the DS90Ux926EVB board to generate scrolling test patterns by sending write data commands to the DS90Ux926EVB board:

i. 0x11 to register 0x64 (enable pattern generator) ii. 0x05 to register 0x65 (24-bit color, internal timing, non-inverted scrolling color patterns)

d. Verify that the monitor is displaying patterns corresponding to the selected patterns. e. Configure the DS90Ux926EVB board to stop generating test patterns by sending a write data

command to the DS90Ux926EVB board: i. 0x10 to register 0x64 (disable pattern generator)

f. Verify that the monitor is no longer displaying test patterns.

SAT0050 FPD-Link III to I2C Analyzer Board test procedureprocessors.wiki.ti.com/images/7/7f/File-SAT0050_test_procedure.pdf · Note that connectors J4 and J5 must be modified to remove

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