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SAM E70 Xplained Ultra User's Guide
Introduction
This user’s guide provides detailed information about the SAM
E70 Xplained Ultra Evaluation kit and itsvarious features. The
figure below illustrates the SAM E70 Xplained Ultra Evaluation
kit.
Figure 1. SAM E70 Xplained Ultra Evaluation Kit with PHY
Daughter Board
FeaturesThe following are key features of the SAM E70 Xplained
Ultra Evaluation kit.
• ATSAME70Q21 Microcontroller• One Mechanical Reset Button• One
Mechanical User Push Button• Two User LEDs• 12.0 MHz Oscillator
(DSC6003)• 32.768 kHz Oscillator (DSC6083)• 2-MB SDRAM• 4-MB QSPI
Flash (SST26VF032BA)
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• Ethernet Interface with External IEEE® 802.3az
10Base-T/100Base-TX Ethernet RMII PHY on aDaughter Board
• AT24MAC402 256KB EEPROM with EUI-48 Address• ATA6561 CAN
Transceiver• Micro SD Card Connector with SDIO Support• Camera
Interface Connector• Two Xplained Pro Extension Headers• Graphics
Card Interface• CoreSight® 20 Connector for 4-bit ETM• Arduino MEGA
Shield Connector• External Debugger Connector• USB Interface,
Device and Host Mode• Embedded Debugger:
– Programming and debugging through USB interface– Auto-ID for
board identification in Atmel Studio and MPLAB® X IDE– One yellow
status LED– One green board power LED– Symbolic debug of complex
data types including scope information– Data Gateway Interface:
SPI, I2C, and four GPIOs– Virtual COM port (CDC)
• External Power Input (5-14V) or USB Power• X32 Daughter Board
Interface to Support Audio and Bluetooth®
• One mikroBus™ Interface
Kit OverviewThe Microchip PIC32 SAM E70 Xplained Ultra
Development Kit (DM320113) provides a modulardevelopment system for
Microchip’s line of 32-bit Cortex® microcontrollers.
For a free Microchip demonstration code and additional
information, visit the MPLAB Harmony™ webpage at:
http://www.microchip.com/MPLABHarmony.
The Atmel SAM E70 Xplained Ultra Dvelopment Kit is a hardware
platform to evaluate the MicrochipATSAME70Q21. The kit offers a set
of features that enables the ATSAME70Q21 users to start with theSAM
E70 peripherals and understand how to integrate the device in their
design.
The SAM E70 Xlpained Ultra kit contains the following items:
• One SAM E70 Xplained Ultra Development Kit• One KSZ8061
Ethernet PHY• One Graphics card set up for 565 (16-bit color)
graphics
Note: If any items are missing in the kit, contact Microchip
sales office for assistance. A list of Microchipsales offices is
provided on the last page of this document.
The figure below illustrates the SAM E70 Xplained Ultra
Evaluation Kit features.
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http://www.microchip.com/MPLABHarmny
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Figure 2. SAM E70 Xplained Ultra Evaluation Kit
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The table below provides the SAM E70 Xplained Ultra Evaluation
kit feature descriptions.
Table 1. SAM E70 Xplained Ultra Evaluation Kit Feature and
Location
Number Description
1 CAN interface
2 X32 Daughter Board interface
3 Mikro interface
4 Ethernet PHY interface
5 Ethernet Clock enable/disable jumper1. Shorted = disabled2.
Open = enabled
6 EXT1/EXT2 interface
7 Debugger USB1. Programming2. Power3. DGI
8 External Reset Button
9 User Button
10 MCU current measurement jumper
11 SAM E70 Host/Device USB
12 CoreSite® 20 (SWD + ETM) debugging interface
13 Barrel power input (2.1mm)
14 User defined LEDs
15 LED2/USB detect jumper
16 Image Sensor interface
17 SWD debugger interface
18 Graphics card interface
19 ATSAME70Q21B
20 SQI external Flash memory
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Table of Contents
Introduction......................................................................................................................1
1. Getting
Started..........................................................................................................
7
2. Xplained
Ultra............................................................................................................
9
3. Embedded
Debugger..............................................................................................
103.1. Hardware Identification
System..................................................................................................10
4. System Level Block
Diagram...................................................................................12
5. Hardware
Features..................................................................................................135.1.
Xplained Pro Standard Extension
Header..................................................................................135.2.
Graphics Connectors or GFX Card
Interface.............................................................................
145.3. SDRAM and LCD
Connections..................................................................................................
175.4. Camera
Connector.....................................................................................................................195.5.
USB
Connectivity.......................................................................................................................
205.6. Chip Erase
Header.....................................................................................................................215.7.
Audio
Connectivity......................................................................................................................215.8.
mikroBUS™
Header...................................................................................................................
235.9.
CAN............................................................................................................................................235.10.
Ethernet......................................................................................................................................245.11.
Debug USB
Connectivity............................................................................................................255.12.
Switches.....................................................................................................................................255.13.
AT24MAC402 Serial
EEPROM..................................................................................................
265.14. Power
Sources...........................................................................................................................27
6.
Hardware.................................................................................................................
296.1. SAM E70 Main Board
Schematics.............................................................................................
296.2. Ethernet Daughter Board
Schematics........................................................................................516.3.
565 LCD Adapter
Schematics....................................................................................................526.4.
Bill of
Materials...........................................................................................................................53
7. Revision
History.......................................................................................................58
The Microchip Web
Site................................................................................................
59
Customer Change Notification
Service..........................................................................59
Customer
Support.........................................................................................................
59
Microchip Devices Code Protection
Feature.................................................................
59
Legal
Notice...................................................................................................................60
Trademarks...................................................................................................................
60
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Quality Management System Certified by
DNV.............................................................61
Worldwide Sales and
Service........................................................................................62
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1. Getting Started
SAM E70 Xplained Ultra Evaluation Quick StartFollow these steps
to explore the Atmel SAM E70 Xplained Ultra evaluation kit:
1. Download and install MPLAB X IDE.2. Launch MPLAB X IDE.3.
Install MPLAB Harmony 3™.
When Microchip SAM E70 Xplained Ultra is connected to the
computer for the first time, by default, theoperating system will
install a driver software. The driver file supports both 32-bit and
64-bit versions ofMicrosoft® Windows® XP/ Vista /7/8/10.
Once the kit is powered, the green power LED will be lit and
MPLAB X IDE will auto-detect the kit andidentify which Xplained Pro
extension boards are to be connected. MPLAB X IDE will provide
relevantinformation, such as data sheets and kit documentation. The
SAM E70 device is programmed anddebugged by the on-board Embedded
Debugger, hence no external programmer or debugger tool
isneeded.
Design Documentation and Relevant LinksThe following list
provides detailed information about relevant documents and software
for the SAM E70Xplained Ultra.
• Xplained Pro products– Atmel Xplained Pro is a series of
small-sized and easy-to-use evaluation kit for Microchip
microcontrollers and other Microchip products. It consists of a
series of low-cost MCU boards forevaluation and demonstration of
features and capabilities of different MCU families.
• Microchip MPLAB Integrated Development Environment– A free
Microchip MPLAB X IDE for development of C/C++ and assembler code
for Microchip
microcontrollers.• MPLAB Harmony
– A free MPLAB Harmony code base is available for user
application. The latest MPLAB Harmonycode is available for download
at: http://www.microchip.com/MPLABHarmony.
• EDBG User Guide– This user’s guide provides additional
information about the on-board Embedded Debugger.
• Data Visualizer– Data Visualizer is a program used for
processing and visualizing data. The Data Visualizer can
receive data from various sources, such as the Embedded Debugger
Data Gateway Interfacefound on the Xplained Pro boards and COM
ports.
• IAR Embedded Workbench® for Arm®
– A commercial C/C++ compiler that is available for ARM. A
30-day evaluation version and a codesize limited kick-start version
are also available for download from their web site. The code
sizelimit is 16-KB for devices with M0, M0+, M1 cores, and 32-KB
for devices with other cores.
• Keil MDK-ARM Microcontroller Development Kit– The MDK-ARM is a
complete software development environment for Cortex®-M,
Cortex-R4,
ARM7™, and ARM9™ processor-based devices. The MDK-ARM is
specifically designed formicrocontroller applications, it is user
friendly yet powerful enough for the most demandingembedded
applications.
Getting Started
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• Design Documentation– Package containing schematics, BOM,
assembly drawings, 3D plots, layer plots, and so on.
• Hardware Users Guide– PDF version of this user guide.
Getting Started
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2. Xplained UltraThe SAM E70 Xplained Ultra implements several
Xplained Pro standards, such as extension headersand connectors.
Xplained Pro is an evaluation platform that provides a full
Microchip microcontrollerexperience. The platform consists of a
series of Microcontroller (MCU) boards and extension boards thatare
integrated with the Microchip MPLAB X IDE that supports data
streaming. The Xplained Pro MCUboards support a wide range of
Xplained Pro extension boards, such as audio DACs/CODECs,
EthernetPHYs, graphics cards, and mikroBUS™ that are connected
through a set of standardized headers andconnectors. Each extension
board has an identification (ID) chip to uniquely identify which
boards areconnected to a Xplained Pro MCU board. This information
is used to present relevant user guides,application notes, data
sheets, and example code through MPLAB X IDE.
Xplained Ultra
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3. Embedded DebuggerThe SAM E70 Xplained Ultra contains
Microchip Embedded Debugger (EDBG) for on-board debugging.The EDBG
is a composite USB device, which is based on the following
interfaces:
• Debugger• Virtual COM Port• Data Gateway Interface (DGI)
Together with the Microchip MPLAB X IDE, the EDBG debugger
interface can program and debug theATSAME70Q21. On the SAM E70
Xplained Ultra, the SWD interface is connected between the EDBGand
the ATSAME70Q21.
The Virtual COM Port is connected to a UART on the ATSAME70Q21
and provides an easy way tocommunicate with the target application
through the terminal software. It offers variable baud rate,
parity,and Stop bit settings. The settings on the ATSAME70Q21 must
match the settings given in the terminalsoftware.
Note: If not set automatically, Data Terminal Ready (DTR) must
be set in the terminal software.
The DGI consists of several physical interfaces for
communication with the host computer.Communication over the
interfaces is bidirectional. It can be used to send events and
values from theATSAME70Q21, or as a generic printf-style data
channel. Traffic over the interfaces can be timestampedon the EDBG
for accurate tracing of events. Note that timestamping imposes an
overhead that reducesmaximal throughput. The Data Visualizer is
used to send and receive data through DGI.
The EDBG controls two LEDs on SAM E70 Xplained Ultra: a power
LED and a status LED.
The following table describes how the LEDs are controlled in
different operation modes.
Table 3-1. EDBG LED Control
Operation Mode Power LED Status LED
Normal operation The power LED is lit when power isapplied to
the board.
Activity indicator, LED flashes when anycommunication happens to
the EDBG.
Bootloader mode(idle)
The power LED and the status LEDblinks simultaneously.
The power LED and the status LEDblinks simultaneously.
Bootloader mode(firmware upgrade)
The power LED and the status LEDblinks in an alternating
pattern.
The power LED and the status LEDblinks in an alternating
pattern.
For additional information on EDBG, refer to the EDBG User
Guide.
3.1 Hardware Identification SystemAll Xplained Pro-compatible
extension boards have an Microchip ATSHA204 CryptoAuthentication™
chipmounted. This chip contains information that identifies the
extension with its name and data. When anXplained Pro extension is
connected to an Xplained Pro MCU board, the information is read and
sent tothe MPLAB X IDE. The Microchip kits extension, installed
with MPLAB X IDE, provides relevantinformation, such as code
examples, and links to relevant documents. The following table
provides thedata fields stored in the ID chip with content
examples.
Embedded Debugger
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Table 3-2. Xplained Pro ID Chip Content Example
Data Field Data Type Example
Manufacture ASCII string Microchip’\0’
Product Name ASCII string
Product Revision ASCII string 04’\0’
Product Serial number ASCII string 1774020200000010’\0’
Minimum Voltage (mV) uint16_t 3000
Maximum Voltage (mV) uint16_t 3600
Maximum Current (mA) uint16_t 30
Embedded Debugger
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4. System Level Block DiagramThe following figure illustrates
the high-level signal block diagram of the SAM E70 Xplained
UltraDevelopment Kit.Figure 4-1. Signal Level Block Diagram
Wire buses that are tied together are connected together. In
this system the SPI bus data and clock areshared across several
interfaces. The SPI Slave selects are addressed individually with
GPIO.
System I2C uses I2C0 and connects to the debugger, EXT1, EXT2,
and mikroBus/X32. Touch I2C usesI2C2 and only goes from the
microcontroller to the graphics connector.
The debugger has the following interfaces connected: DGI SPI,
DGI I2C, DGI UART, and SWD.
UART wires from the microcontroller to the blocks are not shared
with each other.
System Level Block Diagram
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5. Hardware Features
5.1 Xplained Pro Standard Extension HeaderAll Xplained Ultra
Kits have many dual-row, 20-pin, 100 mil extension headers.
Xplained Ultra MCUboards have male headers, while Xplained Ultra
extensions have their female counterparts as shown inthe image
below.
Note: All pins are not always connected.
The extension headers can be used to connect a variety of
Xplained Pro extensions to Xplained UltraMCU boards or to access
the pins of the target MCU on Xplained Ultra MCU boards
directly.
Figure 5-1. Extension Headers
All connected pins follow the defined pinout description as
shown in the following table.
Table 5-1. Xplained Pro Standard Extension Header
Pin number Name Description
1 ID Communication line to the ID chip on an extension board
2 GND Ground
3 ADC(+) Analog-to-Digital Converter (ADC), alternatively
positive part ofdifferential ADC
4 ADC(-) Analog-to-Digital Converter (ADC), alternatively
negative part ofdifferential ADC
5 GPIO1 General purpose I/O
6 GPIO2 General purpose I/O
7 PWM(+) Pulse-Width Modulation, alternatively positive part of
differential PWM
8 PWM(-) Pulse-Width Modulation, alternatively negative part of
differential PWM
9 IRQ/INT/GPIO Interrupt request line and general purpose
I/O
10 SPI SS B/GPIO SPI Slave Select or general purpose I/O
11 I2C SDA Data line for I2C interface. Always implemented, bus
type
12 I2C SCL Clock line for I2C interface. Always implemented, bus
type
Hardware Features
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...........continuedPin number Name Description
13 UART RX Receiver line of target device UART
14 UART TX Transmitter line of target device UART
15 SPI SS A/GPIO SPI Slave Select or general purpose I/O
16 SPI MOSI Master Out Slave In line of serial peripheral
interface. Alwaysimplemented, bus type.
17 SPI MISO Master In Slave Out line of serial peripheral
interface. Alwaysimplemented, bus type.
18 SPI SCK Clock for serial peripheral interface. Always
implemented, bus type.
19 GND Ground
20 VCC Power for extension boards (3.3V)
5.2 Graphics Connectors or GFX Card InterfaceThe SAM E70
Xplained Ultra Development Kit is designed to have a modular
graphics interface. Thisinterface enables using several graphics
cards, which allow for expandability and different use cases. A565
adapter card is included in the kit, which takes 16-bit parallel
LCD data and converts it to 24-bit data.This card also provides
access to ADC for resistive touch screens, hence an external
controller is notneeded. See table below for pin descriptions.
Table 5-2. Graphics Interface Pinout
Pin Number Name Description
1 GND Ground
2 GND Ground
3 MCLR Master Clear, Controlled by the debuggers. Allows for
acomplete system reboot.
4 IRQ1 (LCD Touch) Interrupt request line for cap touch
device
5 5.0v VCC 5.0v
6 IRQ2 (Q Touch) Interrupt request line for Q touch devices
7 LCDEN LCD Data Enable
8 IRQ3 (Display Controllers) Interrupt request line for external
display controllers
9 LCDHSYNC/NCS3 LCD Horizontal Sync
10 IRQ4 (Resistive touch) Interrupt request line for resistive
touch controllers
11 LCDVSYNC/nWE LEC Vertical Sync or Write enable
(active-low)
12 5.0v VCC +5.0v
13 LCDPCK/nRD LCD pixel Clock or Read Enable (active-low)
Hardware Features
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...........continuedPin Number Name Description
14 I2C SDA Data line for I2C interface. Always implemented, bus
type.
15 LCD D0 LCD Data bit 0
16 I2C SCL Clock line for I2C interface. Always implemented, bus
type.
17 LCD D1 LCD Data bit 1
18 SPI SCK Clock for serial peripheral interface. Always
implemented, bustype.
19 LCD D2 LCD Data bit 2
20 SPI MOSI Master Out Slave In line of serial peripheral
interface.
21 LCD D3 LCD Data bit 3
22 SPI MISO Master In Slave Out line of serial peripheral
interface.
23 LCD D4 LCD Data bit 4
24 SPI SS SPI Slave Select
25 LCD D5 LCD Data bit 5
26 UART RX Receiver line of target device UART
27 LCD D6 LCD Data bit 6
28 UART TX Transmitter line of target device UART. (from MCU to
GFXcard)
29 LCD D7 LCD Data bit 7
30 UART RTS UART Ready To Send (from MCU to GFX card)
31 LCD D8 LCD Data bit 8
32 UART CTS UART Clear To Send (from MCU to GFX card)
33 LCD D9 LCD Data bit 9
34 LCD PWM LCD PWM back light control
35 LCD D10 LCD Data bit 10
36 PWM2 Pulse-Width Modulation,
37 LCD D11 LCD Data bit 11
38 GPIO1 General purpose I/O
39 LCD D12 LCD Data bit 12
40 GPIO2 General purpose I/O
41 LCD D13 LCD Data bit 13
42 GPIO3 General purpose I/O
43 LCD D14 LCD Data bit 14
Hardware Features
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...........continuedPin Number Name Description
44 STBY/RST/GPIO4 Standby/Reset or general purpose I/O. For
resetting devicesattached to the GFX connector.
45 LCD D15 LCD Data bit 15
46 STBY/RST/GPIO5 Standby2/Reset2 or general purpose I/O
47 LCD D16 LCD Data bit 16 (Not Implemented on this design)
48 ID pin Communication line to the ID chip on an extension
board
49 LCD D17 LCD Data bit 17 (Not Implemented on this design)
50 ADC 0 Analog-to-Digital Converter to MCU
51 LCD D18 LCD Data bit 18 (Not Implemented on this design)
52 ADC1 Analog-to-Digital Converter to MCU
53 LCD D19 LCD Data bit 19 (Not Implemented on this design)
54 ADC2 Analog-to-Digital Converter to MCU
55 LCD D20 LCD Data bit 20 (Not Implemented on this design)
56 ADC3 Analog-to-Digital Converter to MCU
57 LCD D21 LCD Data bit 21 (Not Implemented on this design)
58 ADC4 Analog-to-Digital Converter to MCU
59 LCD D22 LCD Data bit 22
60 ADC5 Analog-to-Digital Converter to MCU
61 LCD D23 LCD Data bit 23
62 ADC6 Analog-to-Digital Converter to MCU
63 3.3V VCC +3.3V VCC
64 ADC7 Analog-to-Digital Converter to MCU
65 GND Ground
66 3.3V VCC +3.3V VCC
67 GND Ground
68 GND TAB Mounting Tab
69 GND TAB Mounting Tab
Hardware Features
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5.3 SDRAM and LCD ConnectionsThe external bus interface (EBI) on
SAM E71 Xplaned Ultra is controlled by the static memory
controller(SMC) and SDRAM controllers modules in the
ATSAME70Q21B.
ATSAME70Q21B has on-die series termination on very I/O pin as
shown in figure below.
Figure 5-2. On-Die Termination
The EBI is connected to the on-board SDRAM and the Xplained Pro
Graphics connector. The followingfigure shows how the SDRAM and LCD
share the same sets of data pins, and displays the location of
theseries termination resistors.
Figure 5-3. LCD and SDRAM
As the I/O pins have on-die series termination, the impedance of
the drivers must be matched to theimpedance of the EBI tracks on
the PCB using series resistors. The EBI tracks are routed as 50Ω
onSAM E70 Xplained Ultra. The clock and address lines are only
driven by the ATSAME70Q21B, while thedata lines are driven by the
ATSAME70Q21B and the on-board SDRAM.
Hardware Features
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Simulation of the transmissions lines using IBIS files for the
ATSAME70Q21B and the SDRAM gave theresults are shown in the table
below.
Table 5-3. EBI Simulation Results
Driving Circuit Signal Type Driver Impedance(from ibis)
SeriesTermination
Z0
ATSAME70Q21B Data/Address 22Ω 24Ω ≈ 22Ω 50Ω
Clock 21Ω 25Ω ≈ 22Ω 50Ω
SDRAM Data 11Ω 32Ω ≈ 33Ω 50Ω
The routing of the data lines to the LCD connector causes stubs
on the data lines at the SDRAM (thestubs are even longer when a
cable is plugged in). The 200Ω resistors are placed close to the
SDRAM tocreate a high-impedance path for the signal to the stubs,
improving the signal integrity whencommunicating with the
SDRAM.
TIP:
• The series-termination is always placed near to the driving
pin.• The 200Ω resistors are placed close to the intersection
between the SDRAM routing and the routing
to the LCD connector.• All designs must be simulated using an
IBIS file for the ATSAMV71Q21B and the target peripherals
to check whether the signals are within the limits of the
devices.
Hardware Features
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5.4 Camera ConnectorA 2 x 15, 100 mil pin-header camera
connector is implemented to provide access to the SAM E70'sparallel
Image Sensor Interface (ISI).
Table 5-4. Camera Interface Pin Description
Pin Number Name Function
1 VCC +3.3v
2 GND Ground
3 VCC +3.3v
4 GND Ground
5 Reset Reset
6 PWD ISI PWD
7 I2C SCK Clock line for I2C interface. Always implemented, bus
type.
8 I2C SDA Data line for I2C interface. Always implemented, bus
type.
9 GND Ground
10 MCK Master Clock
11 GND Ground
12 VSYNC Image Sensor Vertical Sync
13 GND Ground
14 HSYNC Image Sensor Horizontal Sync
15 GND Ground
16 Pixel Clock Image Sensor Pixel Clock
17 GND Ground
18 ISI D0 Image Sensor Data Bit 0
19 ISI D1 Image Sensor Data Bit 1
20 ISI D2 Image Sensor Data Bit 2
21 ISI D3 Image Sensor Data Bit 3
22 ISI D4 Image Sensor Data Bit 4
23 ISI D5 Image Sensor Data Bit 5
24 ISI D6 Image Sensor Data Bit 6
25 ISI D7 Image Sensor Data Bit 7
26 ISI D8 Image Sensor Data Bit 8
27 ISI D9 Image Sensor Data Bit 9
28 ISI D10 Image Sensor Data Bit 10
Hardware Features
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...........continuedPin Number Name Function
29 ISI D11 Image Sensor Data Bit 11
30 GND Ground
5.5 USB ConnectivityUsers can connect to the PIC32 USB
microcontroller using any one of the following modes:
• Host mode: If connecting the device to the Type-A/B Micro
connector, an adapter is required. Usingthis method, a maximum of
400 mA can be supplied from the debug USB port to the host port. If
afull 500 mA supply is needed, an external supply must be connected
to the application board.
• Device mode: Connect the SAM E70 to the target USB Micro-A/B
port using a USB cable. This isenough to power the board as a
device. If programming and debugging is required, connect theDebug
USB Micro-A/B port. The other end of the cable must have a Type-A
connector, to connect itto a USB host.
• On-The-Go (OTG) mode: Connect the starter kit to the OTG
device by using an OTG Micro-A/Bcable to the Micro-A/B port.
There is a 1x3, 100mil pin-header marked VBUS on the kit. The
PB08 pin on the SAM E70 can beconnected to the LED2 or to the
target USB VBUS DETECT signal by placing a jumper between pin 1and
pin 2, or pin 2 and pin 3 on this pin-header. The USB VBUS DETECT
is the target USB voltagedivided by 1.64. When connected to the
PB08 pin the signal can be used to detect power on the targetUSB
connector.
Table 5-5. USB Jumper Description
Pin number Name Description
1 LED2 LED2 active-low
2 PB08 Pin and Port to microcontroller
3 VBUS_ Detect VBUS Detect, used to detect when a device cable
(micro-B) is pluggedinto the SAM E70
The SAM E70 Xplained Ultra has a Micro-USB connector to use with
the SAM E70 USB module labeledas TARGET USB on the kit. In USB Host
mode, the VBUS voltage is provided by the kit, and must beenabled
by setting the VBUS Host Enable pin to low. When a USB OTG cable is
plugged in, it willautomatically trigger the power supply.
Table 5-6. USB Interface Pin Description
Pin on SAM USB Function
PA08 VBUS Host Enable
HSDM USB -
HSDP USB +
Hardware Features
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5.6 Chip Erase HeaderA 1x2 pin-header is connected to the SAM
E70 chip erase pin, PB12, and 3V3 is marked ERASE. Thisheader can
be used to chip erase the SAM E70 by placing the jumper on the
header and toggle power tothe board. After the power is toggled,
the jumper must be removed. Using the chip erase jumper may bethe
only way to erase a chip with the security bit set, and
applications that immediately set invalid clockoptions, or go into
deep sleep without any wake-up sources enabled.
5.7 Audio ConnectivityThe SAM E70 provides an audio connection
through the X32 interface to the two main audio modules inthe chip,
such as the SSC and the I2S. On this board, the SSC interface is
considered to the main audiointerface as shown in the image
below.
There is a 32-pin interface to the board to support the audio
codec or DACs and Bluetooth radios. Thisinterface has two audio
supply interfaces, such as the SSC and the I2S. Addition to this
other control linesand data interfaces are available.
Figure 5-4. SSC/I2S Block Diagram
The table below provides the X32 audio interface pin names and
descriptions.
Hardware Features
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Table 5-7. X32 Audio Interface Pin Description
Pin Number Name Description Interface
1 GND Ground Power
2 GND Ground Power
3 UART RX UART RX, receive to MCU from DB UART
4 UART CTS UART Clear to send UART
5 UART TX UART TX, transmit from MCU to DB UART
6 UART RTS UART Ready to send UART
7 I2C SCL Clock line for I2C interface I2C
8 STBY/RST Standby/Reset control GPIO
9 I2C SDA Data line for I2C interface I2C
10 Audio WS/LRCLK Audio Word Select/ Left Right Clock SSC
11 Audio In Audio into MCU, out from CODEC SSC
12 Audio CLK Audio clock SSC
13 Audio out Audio out of MCU, in to CODEC/DAC SSC
14 REFCLK/MCK Reference clock #1 REFCLK
15 GND Ground -
16 GND Ground -
17 NC Legacy hold over -
18 +3.3v VDD -
19 NC Legacy hold over -
20 +5.0v VDD -
21 (1) Audio WS/ Audio LRCLK Audio Word Select/ Left Right Clock
I2S
22 (2) ADC/Card ID pin Analog-to-Digital Converter to read
voltage on thedaughter card
ADC
23 (3) Audio CLK Audio Clock I2S
24 (4) NC - -
25 (5) Audio IN Audio into MCU, out from CODEC I2S
26 (6) NC -
27 (7) Audio OUT Audio out of MCU, in to CODEC/DAC I2S
28 (8) NC - -
29 (9) REFCLK2/MCK2 Reference clock #2 REFCLK
30 (10) NC - -
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 22
-
...........continuedPin Number Name Description Interface
31 (11) GND Ground -
32 (12) GND Ground -
5.8 mikroBUS™ HeaderThe mikroBUS™ interface enables using the
additional click boards. For additional information and toidentify
the boards to be used with this development kit, visit the
following web site: https://www.mikroe.com/.
Table 5-8. mikroBUS™ interface Pin Description
Pin Number Name Function
1 GND Ground
2 +5V +5.0V
3 SDA I2C SDA
4 SCL I2C SCL
5 TX UART TX
6 RX UART RX
7 INT Interrupt request line
8 PWM Pulse-Width Modulation
9 GND Ground
10 +3.3V Ground
11 MOSI Master Out Slave In line of serial peripheral
interface
12 MISO Master In Slave Out line of serial peripheral
interface
13 SCK Clock for serial peripheral interface
14 CS Chip Select for serial peripheral interface.
(Active-low)
15 RST Reset
16 AN Analog-to-Digital Converter.
5.9 CANThe development kit provides access to the a CAN-FD
interface that is post transceiver. The SAM E70Xplained Ultra has
two MCAN modules that perform communications according to
ISO11898-1 (RobertBosch GmbH CAN specification 2.0 part A and B).
Bosch CAN FD specification V1.0. MCAN1 isconnected to an on-board
ATA6561 CAN physical-layer transceiver. These connections are
described inthe following table.
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 23
https://www.mikroe.com/https://www.mikroe.com/
-
Table 5-9. Connections Between the ATSAME70Q21 and the
ATA6561
Pin Number Name Description
1 CAN_H CAN High Signal
2 GND Ground
3 CAN_L CAN Low Signal
5.10 EthernetThe SAM E70 Xplained Ultra kit has a modular
Ethernet PHY system that enables different PHYs to beplugged into
the board. This interface is set up to use a Reduced
Media-Independent Interface (RMII) anda SPI bus interface with
GPIO. The figure below illustrates the Ethernet PHY header
configuration.
Figure 5-5. Ethernet PHY Header Configuration
The table below provides the Ethernet PHY interface pinout
descriptions.
Table 5-10. Ethernet Interface Pinout Description
Pin Number Name Description
1 GPIO General purpose I/O
2 GPIO General purpose I/O
3 RXD1 Receive Data 1
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 24
-
...........continuedPin Number Name Description
4 RXD0 Receive Data 0
5 RXER Receive Error
6 RXDV Receive Data Valid
7 MDC -
8 MDIO -
9 IRQ Interrupt request line
10 RESET Reset control to the Ethernet PHY
11 GPIO General purpose I/O
12 EGND Shield Ground
13 (1) TXEN Transmit Enable
14 (2) TXD0 Transmit Data
15 (3) TDX1 Transmit Data
16 (4) MOSI Master Out Slave In line of serial peripheral
interface
17 (5) MISO Master In Slave Out line of serial peripheral
interface
18 (6) GND Ground
19 (7) NC No Connect
20 (8) REFCLK (in) Reference Clock input (50 MHz)
21 (9) GND GND
22 (10) +3.3v VDD +3.3V VDD
23 (11) CS Chip Select for serial peripheral interface
24 (12) SCK Clock for serial peripheral interface
25 -30 EGND Shield Ground
5.11 Debug USB ConnectivityThe starter kit includes an EDBG USB
microcontroller that provides debugger connectivity over the
USB.The EDBG MCU is hard-wired to the SAM E70 device to provide
protocol translation.
An external programmer, such as MPLAB ICD4, may be used with the
development kit through either theSWD interface or through the
Coresite 20 interface.
5.12 SwitchesThe starter kit provides two push button switches:
User switch and Reset switch. The push buttonswitches do not have
any debounce circuitry, hence require the use of internal pull-up
resistors. This
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 25
-
enables the user to investigate the software debounce
techniques. When Idle the switches are pulledhigh (+3.3V,) and when
pressed the switches are grounded.
5.13 AT24MAC402 Serial EEPROMThe development board has an
onboard 2-Kbit I2C serial EEPROM available for user applications.
Thisserial EEPROM has an unique EUI-48, EUI-64, and 128-bit serial
number. These unique numbers can beseen in the Microchip MPLAB
Xplained window or Atmel Studio Xplained window after the kit is
pluggedinto the PC. The figure below shows the SAM E70 Xplained
Ultra window.
Figure 5-6. SAM E70 Xplained Ultra Window
Note: The above figure provides an example of the Xplained
window with the MAC48 address.
Users can change the device address using the solder pads on the
board, but all address bits have beendefaulted to one, refer to
schematics for additional information. For additional usage
information of on thispart, refer to the “AT24MAC402 and AT24MAC602
Data Sheet”, which is available for download from the
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 26
-
following location:
http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8807-SEEPROM-AT24MAC402-602-Datasheet.pdf.
5.14 Power SourcesThe SAM E70 Xlplained Ultra evaluation kit has
several power systems to it. This section covers thepower sub
system in detail. Figure below shows a high-level block diagram of
the power system.
Figure 5-7. Power Sources Block Diagram
The following options can be used to power the development kit:•
Using the Micro-USB connector that is connected to the EDBG known
as Debug USB.• Using the Micro-USB connector which is known as
Target USB.• Using the Barrel Jack. This input can take a large
range of power inputs from 5.5V to 19V.• Using the Arduino headers.
This has several options one must be careful of when using this
method.
Not all power rails are protected from the user error. VIN
connects to the input side of the main bucksupply (step down), and
it is similar to the barrel jack (2.1 mm).
• Using the 2 x 2 x 0.1 header, located on the side of the
board, which has a 3.3v and 5.0v capableinputs.
The SAM E70 Xplained Ultra kit can be powered by several power
sources as described in the followingtable.
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 27
http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8807-SEEPROM-AT24MAC402-602-Datasheet.pdfhttp://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8807-SEEPROM-AT24MAC402-602-Datasheet.pdf
-
Table 5-11. Power Sources for SAM E70 Xplained Ultra
Power Input Voltage Requirements Current Requirements
ConnectorMarking
External Power 5V ±2% (±100 mV) for USBhost operation. 4.3V to
5.5V ifUSB host operation is notrequired.
Recommended minimum current is1A to be able to provide
enoughcurrent for the connected USBdevices and the
board.Recommended maximum current is2A due to the input
protectionmaximum current specification.
5V0
EmbeddedDebugger USB
4.4V to 5.25V (according toUSB spec.)
500 mA (according to USB spec.) DEBUG USB
Target USB 4.4V to 5.25V (according toUSB spec.)
500 mA (according to USB spec.) TARGET USB
External JackInput
5.5v to 19V 1A minimum, 2.5A is recommended.6A maximum.
VIN
The development kit will detech and choose the available power
sources based on the following options:
• External jack input• External power• Embedded debugger USB•
Target USB
Hardware Features
© 2019 Microchip Technology Inc. DS70005389B-page 28
-
6. Hardware
6.1 SAM E70 Main Board Schematics
SJ-5
076
E1
SJ-5
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Hardware
© 2019 Microchip Technology Inc. DS70005389B-page 29
-
VC
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it pr
otec
tion
Hardware
© 2019 Microchip Technology Inc. DS70005389B-page 30
-
AT32
UC3A
4256
J-C1U
RAT
32UC
3A42
56J-C
1 UR
PA00
/ PA
18G
8
VDDIO F6VDDIO F2VDDIO B6
GNDIO C8
VDDIO J5
GNDIO E2GNDIO H3
GNDIO F5
VDDIO B5
GNDIO E6
GNDIO C3
GNDCORE F10VDDCORE E10
GNDPLL B10VDDIN D10
VDDANA J6
VDDIN D9
GNDANA H8
VDDIO E5
PA01
/ PA
17G
10
PA02
/ PX
47E1
PA03
F9
PA04
E9
PA05
G9
PA06
/ PA
13E8
PA07
/ PA
19H
10
PA08
F8
PA09
D8
PA10
C10
PA11
C9
PA12
/ PA
25G
7
PA14
/ PX
11K
7
PA15
/ PX
45J7
PA16
E7
PA20
/ PX
18H
9
PA21
/ PX
22K
10
PA23
/ PX
46G
6
PA24
/ PX
17J1
0
PA26
/ PB
05F7
PA27
A2
PA28
A1
PA29
B4
PA30
A4
PA31
C2
PA22
/ PX
20H
6
PC00/PX14K5
PC01K6
PC02A5
PC03A6
PC04B7
PC05A7
TMS
H7
TDO
J8TD
IK
8TC
KK
9
RES
ET_N
J9
DM
HS
A9
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8
DM
FSB
9
DPF
SB
8
USB
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US
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USB
_VB
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PB00B1
PB01B2
PB02B3
PB03C4
PB04A3
PB06D7
PB07D6
PB08C6
PB09C5
PB10D5
PB11C1
PX00
G4
PX01
G2
PX02
G3
PX03
J1
PX04
H1
PX05
G1
PX06
F3
PX07
F4
PX08
E3
PX09
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PX10
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PX13
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PX21
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PX23
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PX24
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PX25
H4
PX26
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PX27
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PX28
K3
PX29
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PX30
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RX
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VC
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GN
D
GN
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ND
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D
VC
C_E
DB
G_U
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G_U
SB_H
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SS
VC
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DB
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I_SD
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G_D
GI_
SCL
DG
I_G
PIO
0D
GI_
GPI
O1
DG
I_G
PIO
2D
GI_
GPI
O3
DGI_GPIO
DG
I_G
PIO
0D
GI_
GPI
O1
DG
I_G
PIO
ID_1
ID_2
ID_4
ID_S
YS
ID_S
YS
ID1
ID1
ID2
EDB
G_F
OR
CE_
BO
OT
Cur
rent
lim
iters
, 10m
A @
3.3V
Cur
rent
lim
iter,
10m
A @
3.3V
GN
D
GN
D
EDB
G_F
OR
CE_
BO
OT
EDB
G_R
ESET
_N
EDB
G_J
TAG
_TM
SED
BG
_JTA
G_T
DO
EDB
G_J
TAG
_TD
IED
BG
_JTA
G_T
CK
VC
C_E
DB
G_P
3V3
GN
DVC
C_E
DB
G_P
3V3
ED
BG
Pow
er a
nd S
tatu
s LE
Ds
GN
D
SCL
SDA
DG
I_I2
C
EDB
G_A
DC
0
ID2
GN
D
VC
C_E
DB
G_P
3V3
GN
D
SWC
LKSW
DIO
TAR
GET
_CH
IP_R
ESET
TRA
CES
WO
EDB
G_S
WD
EDB
G_S
WD
EDBG_SWDIO
EDBG_SWCLK
EDB
G_R
ESET
TAR
GET
_RES
ET_S
ENSE
DG
I_G
PIO
2D
GI_
GPI
O3
2 1
EL17
-21S
YG
C
D30
1
2 1
EL17
-21U
YC
/A3
D30
2
4
5
3
2N70
02D
W
Q30
2A
2
16
2N70
02D
W
Q30
2B
330RR331
330RR333
0RR
321
330R
R32
6
0RR
329
0RR
327 T
P302
TP30
3TP
304
TP30
6
TP30
5
TP30
7
39R
R31
8
39R
R31
6
BLM
18PG
471S
N1
L300
1 nF
C0G
C30
11
nF C
0GC
302
BLM
18PG
471S
N1
L301
100n
C30
5
1 nF
C0G
C30
7
2.2u
F
C30
6
GN
D
100n
C31
0
2.2u
F
C30
8
1kR313
1kR314
0RR
303
0RR
304 TP
301
TP30
0
330R
R30
7
330R
R30
8
330R
R30
9
330R
R31
0
330R
R30
60R
R30
5
0RR
311
0RR
312
13
24
12.00
MHz
XC
300
4.7n
DN
P
C30
010
p
C30
3
22p
C30
422
p
C30
9
1M1M R30
0
1M1MR330
1M1MR
332
6.81kR320
VC
C_E
DB
G_P
3V3
330R
R32
2
330R
R32
3
330R
R32
4
330R
R32
5
GN
DG
ND
0RR30
1
EGN
D_E
DB
G
EGN
D_E
DB
G
GN
D
EDB
G_T
AR
GET
_RES
ET
GN
D
0RR
302
1kR315
ID4
TAR
GET
_VO
LTA
GE
GN
D
100n
C31
1
100n
C31
2
100n
C31
3
2.2u
F
C31
4
2.2u
FC
315
VC
C_E
DB
G_P
3V3
GR
EE
NY
EL
LO
W
39R
39R
R32
8
CO
NN
USB
MIC
RO
B R
ECPT
SM
T R
/A
VB
US
1
D-
2
D+
3
GN
D5
SHIE
LD1
6
SHIE
LD2
7
ID4
SHIE
LD3
8
SHIE
LD4
9
J300
35
GN
D
VC
C
21IO
1IO
2IO
34
D30
0TP
D3E
001D
RLR
GN
D
GN
D
VC
C_E
DB
G_P
3V3
100kR31
9
1
23
DM
N20
75U
Q30
1M
OSF
ET_N
_GSD
3
1
2
IRLM
L520
3PBF
Q30
0M
OSF
ET_P
_GSD
100k
R31
7
LED
1LE
D 2
Inpu
t filt
er o
n U
SB
pow
er in
put.
Con
nect
the
test
poi
nts d
urin
g st
artu
p of
th
e ED
BG
to fo
rce
it in
to b
ootlo
ader
m
ode.
The
test
poi
nts s
houl
d be
cov
ered
with
so
lder
so th
at it
is e
asie
r to
get a
goo
d co
ntac
t.
Prog
ram
min
g in
terf
ace
of th
e em
bedd
ed d
ebug
ger.
The
test
po
ints
will
be
conn
ecte
d by
nee
dles
in
the
test
fixt
ure
for p
rogr
amm
ing.
G
ND
test
poi
nt is
TP4
00.
Hardware
© 2019 Microchip Technology Inc. DS70005389B-page 31
-
PC31
PC00
PC01
PC02
PC03
PC04
PC05
PC06
PC07
PC08
PC09
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PD02
PD03
PD04
PD05
PD06
PD07
PD08
PD09
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PE00
PE01
PE02
PE03
PE04
PE05
PA00
PA01
PA02
PA03
PA04
PA05
PA06
XIN
_32
PA08
PA09
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB00
PB01
PB02
PB03
PB04
PB05
PB06
PB07
XIN
_12
PB12
PB13
GN
D
VD
DO
UT
100n
C41
3
GN
DG
ND+
2.2u
F
C41
7
100n
C41
5
100n
C41
2
JS40
1GN
D
GN
DV
DD
CO
RE
BLM18PG471SN1
L404
BLM18PG471SN1
L403
VDDPLL
VDDUTMIC
100n
C40
7
100n
C40
8GN
D
GN
DBLM18PG471SN1L402
BLM18PG471SN1
L401
VC
C_T
AR
GET
_P3V
3
GN
D
10p
C40
4
5.62kR406
GN
D
BLM
18PG
471S
N1
L400
100n
C40
1
GN
D
VDDPLLUSB
VDDUTMII
TP40
2TP
401
TST
JTA
GSE
L
TAR
GET
_RES
ET
PD00
PD01
DIG
DIG
22
DIG
23
DIG
24
DIG
25
DIG
26
DIG
27
DIG
28
DIG
29
DIG
30
DIG
31
DIG
32
DIG
33
DIG
34
DIG
35
DIG
36
DIG
37
DIG
38
DIG
39
DIG
40
DIG
41
DIG
42
DIG
43
DIG
44
DIG
45
DIG
46
DIG
47
DIG
48
DIG
49
DIG
50
DIG
51
DIG
52
DIG
53
DIGSP
ISP
I_M
ISO
SPI_
MO
SISP
I_SC
KR
ESET
SPI
TAR
GET
_RES
ET
0RR
404
SPI0
_SPC
KSP
I0_M
OSI
SPI0
_MIS
O
PD22
PD20
PD21
PA18
PCK
2
PA21
RX
D1
PB00
TFPD
19C
TS2
39R
39R
R40
1
DG
I_G
PIO
DG
I_SP
I
EDB
G_U
AR
T
PA23
PA02
GPI
O /
BTN
0G
PIO
/ LE
D0
GPI
O /
EXT2
PIN
9
PD21
PD20
PD22
SPI0
_MO
SISP
I0_M
ISO
SPI0
_SPC
KPD
12SP
I0_N
PCS2
PA09
PA21
RX
D1
PD28
GPI
O /
EXT1
PIN
9
PB04
TXD
1
SWC
LKSW
DIO
TAR
GET
_CH
IP_R
ESET
TRA
CES
WO
SWD
SWD
PB12
ERA
SEPB
05TR
AC
ESW
O
PB06
SWD
IOPB
07SW
CLK
MIS
OM
OSI
SCKSS
DGI_SPI DG
I_G
PIO
0D
GI_
GPI
O1
DG
I_G
PIO
2D
GI_
GPI
O3
DGI_GPIO
RX
DTX
DED
BG
_UA
RT I
O0
IO1
IO2
IO3
CLK C
S
QSPI
QSP
I
PA13
PA12
PA17
PD31
PA14
PA11
PWM
C1_
PWM
L1PW
MC
1_PW
MH
0PW
MC
0_PW
MH
3IS
I_D
11
WK
UP7
/PIO
DC
5(3)
GPI
O_I
NT
AD
CL
AD
0A
D1
AD
2A
D3
AD
4A
D5
AD
6A
D7
ADCL
AD
CH
AD
8A
D9
AD
10A
D11
DA
C0
DA
C1
CA
NR
XC
AN
TX
ADCH
CO
M
DIG
14D
IG15
DIG
16D
IG17
DIG
18D
IG19
DIG
20D
IG21
COM
AD
VR
EF
IOL
DIG
0D
IG1
DIG
2
DIG
3D
IG4
DIG
5D
IG6
DIG
7
IOL
0RR
414
0RR
415
PA04
PA03
TWD
0TW
CK
0
PB03
PB02
CA
NR
X0
CA
NTX
0
PB13
PD00
DA
C0
DA
C1
SPI0
_SPC
K
SPI0
_MO
SI
SPI0
_MIS
OPD
22PD
20
PD21
PD25
SPI0
_NPC
S1
PD27
SPI0
_NPC
S3
PD26
TD
PD24
RF
PA10
RD
PA22
RK
0RR
424
0RDNP
R42
00R
DNP
R41
90R
DNP
R41
8
AFE
0_A
D8
PC13
AFE
1_A
D1
PA05
PA06
PWM
C1_
L3G
PIO
PD11
PC19
PA02
PWM
C0_
H0
PWM
C0_
H2
PWM
C0_
H1
LED
_TIO
B7
PD16
PD15
TXD
2R
XD
2PD
19PD
18U
TXD
4U
RX
D4
PD27
PD28
TWD
2TW
CK
2
PB01
TXD
0PB
00R
XD
0
PC30
PA17
PC12
PC31
AFE
1_A
D5
AFE
1_A
D6
AFE
0_A
D3
AFE
0_A
D3
0RR
421
0RR
422
0RR
423
0RR
417
39R
39R
R41
3
0RR
416
PA19
PD30
AFE
0_A
D0
PC31
AFE
1_A
D06
PD28
UR
XD
3PD
30U
TXD
3
PC09
I2C
PA03
PA04
TWC
K0
TWD
0
PD10
PWM
C0_
L2
IOH
DIG
9D
IG10
DIG
11D
IG12
DIG
13
DIG
8
AR
EF
I2C
_SC
LI2
C_S
DA
IOH
PD11
GTS
UC
OM
P
PA17
PWM
C0_
PWM
H3
0RDNP
R40
70R
R40
8
0RDNP
R40
90R
R41
0
SDA
SCL
I2C
1k1kR41
21k1k
R41
1
PIN
1_A
DC
(+)
PIN
2_R
STPI
N3_
CS
PIN
4_SC
KPI
N5_
MIS
OPI
N6_
MO
SIPI
N11
_SD
API
N12
_SC
LPI
N13
_TX
PIN
14_R
XPI
N15
_IR
QPI
N16
_PW
M(+
)
MikroBUS
Mik
roB
US
PC31
AFE
1_A
D06
PA00
PWM
C0_
H0
PD28
WK
UP5
PB01
TXD
0PB
00R
XD
00R
R42
70R
R42
8
PA03
TWD
0PA
04TW
CK
0
PD21
SPI0
_MO
SIPD
20SP
I0_M
ISO
PD22
SPI0
_SPC
K39
R39
RR
426
PA05
GPI
OPD
11VC
C_T
AR
GET
_P3V
3
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
EBI
EBI
SDR
AM
PC00
PC01
PC02
PC03
PC04
PC05
PC06
PC07
PE00
PE01
PE02
PE03
PE04
PE05
PA15
PA16
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
SDA
10B
A0
CA
SB
SDC
KE
SDC
K
SDC
S
A0/
NB
S0
RA
SB
NW
R1/
NB
S1
SDW
E
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PD13
PA20
PD17
PD14
PD23
PC15
PC18
PD16
PD15
PD29
MC
CD
AM
CC
KM
CD
A3
MC
DA
2M
CD
A1
MC
DA
0
DET
ECT
SD_CARD
SD_C
AR
D
PC16
GPI
O
MC
DA
0M
CD
A1
MC
DA
2M
CD
A3
MC
CK
MC
CD
A
PA30
PA31
PA26
PA27
PA25
PA28
AU
DIO
PIN
9_I2
C_S
DA
PIN
7_I2
C_S
CL
PIN
14_P
CK
2
PIN
5_TX
D0
PIN
4_C
TS0
PIN
6_R
TS0
PIN
11_R
DPI
N13
_TD
PIN
8_IR
QR
EFC
LK
PIN
3_R
XD
0
PIN
10_R
FPI
N12
_TK
RK
PIN
10_T
F
PIN
2_A
DC
(+)
PIN
9_A
FEO
_AD
8PI
N3_
BA
O
AUDIO
PA03
PA04
0RR
435
0RR
437
0RR
441
0RR
438
0RR
439
0RR
436
0RR
434
TWC
K0
TWD
0
0RR
440
PB00
RX
D0
PB01
TXD
0PB
02C
TS0
PB03
RTS
0
PA18
PCK
2
PD21
TIO
A11
PD11
GPI
O
0RR
429
0RR
430
0RR
431
0RR
432
PD24
RF
PB01
TKPA
22R
KPB
00TF
PA10
RD
PD26
TD
0RR
442
0RR
433
PD30
AFE
0_A
D0
CA
SR
AS
CS
CLK
CK
E
WE
LDQ
MU
DQ
M
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
SDRAM
0RR
443
PA19
PA20
TIO
A11
BA
O
CA
MER
A
MC
KV
SYN
CH
SYN
CPC
KD
0D
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
11
I2C
_SC
KI2
C_S
DA
RST
PWD
CAMERA
PD21
PB03
PA09
PA05
PD11
PD12
PA27
PD27
PD28
PD30
PD31
PD24
PA06
PA24
PC19
PA13
PD25
PA04
TWC
K0
ISI_
PWD
GPI
OPC
K0
ISI_
PCK
ISI_
HSY
NC
ISI_
VSY
NC
ISI_
D0
ISI_
D1
ISI_
D2
ISI_
D3
ISI_
D4
ISI_
D5
ISI_
D6
ISI_
D7
ISI_
D8
ISI_
D9
ISI_
D10
ISI_
D11
39R
39R
R48
4
PA03
TWD
0
PD22
PA02
WK
UP2
PD28
WK
UP5
PA06
GPI
OIR
Q4
(R T
ouch
)
IRQ
2 (Q
Tou
ch)
IRQ
3 (D
ispl
ay C
ntrl)
h)0R
R48
5
PD28
WK
UP5
PA03
PA04
PD20
PD21
PD25
PD22
TWC
K0
TWD
0
SPI0
SPC
KSP
I0 M
OSI
SPI0
MIS
OSP
I0 N
PCS1
LCD
PWM
USA
RT_
RX
USA
RT_
TXU
SAR
T_R
TSU
SAR
T_C
TSLE
D T
IOB
7
AD
C0
AD
C1
AD
C2
AD
C3
AD
C4
AD
C5
AD
C6
AD
C7
LCD
DIS
PST
BY
/RST
AFE
0 A
D0
RX
D1
AFE
1 A
D06
AFE
1 A
D1
PB01
TX
D0
GPI
O4
ON
E W
IRE
INTE
RFA
CE
ID3
/ ID
4R
ESET
2GPI
O1
PWM
C0
H2 GPI
O2
GPI
O3
GPI
O5
PC09
PC13
PD30
PA21
PC31
PC13
PD19
PD11
TRA
CE
SWD
IOSW
CLK
TRA
CEC
LKTR
AC
ED0
TRA
CED
1TR
AC
ED2
TRA
CED
3
nRES
ET
SWO
TRACE
PB06
PB07
TAR
GET
_RES
ETPD
08PD
04PD
05PD
06PD
07
TRA
CEC
LKTR
AC
ED0
TRA
CED
1TR
AC
ED2
TRA
CED
3
PB05
TRA
CES
WO
SWD
IOSW
CLK
CA
NTX
CA
NR
X
CAN
CA
NPC
14PC
12C
AN
TX1
CA
NR
X1
EXT2
EXT1
PIN
10_S
PI_S
S_B
/GPI
OPI
N11
_TW
I_SD
API
N12
_TW
I_SC
LPI
N13
_UA
RT_
RX
PIN
14_U
AR
T_TX
PIN
15_S
PI_S
S_A
PIN
16_S
PI_M
OSI
PIN
17_S
PI_M
ISO
PIN
18_S
PI_S
CK
PIN
3_A
DC
(+)
PIN
4_A
DC
(-)
PIN
5_G
PIO
PIN
6_G
PIO
PIN
7_PW
M(+
)PI
N8_
PWM
(-)
PIN
9_IR
Q/G
PIO
EXT1
PIN
10_S
PI_S
S_B
/GPI
OPI
N11
_TW
I_SD
API
N12
_TW
I_SC
LPI
N13
_UA
RT_
RX
PIN
14_U
AR
T_TX
PIN
15_S
PI_S
S_A
PIN
16_S
PI_M
OSI
PIN
17_S
PI_M
ISO
PIN
18_S
PI_S
CK
PIN
3_A
DC
(+)
PIN
4_A
DC
(-)
PIN
5_G
PIO
PIN
6_G
PIO
PIN
7_PW
M(+
)PI
N8_
PWM
(-)
PIN
9_IR
Q/G
PIO
EXT2
0RR
486
0RR
487
PB03
PB02
PC30
PA00
PC17
PA04
PA03
PB00
PB01
PD25
PD21
PD20
PD22
RTS
0C
TS0
TIO
B5
PWM
C0_
H0
GPI
OTW
D0
TWC
K0
RX
D0
TXD
0SP
I0_N
PCS1
SPI0
_MO
SISP
I0_M
ISO
SPI0
_SPC
K
PC13
PA06
PD11
PC19
PD26
PA02
PA24
PD27
PD21
PD20
PD22
SPI0
_MO
SISP
I0_M
ISO
SPI0
_SPC
K
AFE
1_A
D1
GPI
OG
PIO
PWM
C0_
H2
PWM
C0_
L2W
KU
P2G
PIO
SPI0
_NPC
S3
0RR
489
39R
39R
R49
0
39R
39R
R48
8
PA04
PA03
TWD
0TW
CK
0
AFE
0_A
D8
PA19
PA21
RX
D1
PC31
AFE
1_A
D06
PD30
AFE
0_A
D0
PD28
WK
UP5
PB04
TXD
1
TXD
0TX
D1
TXEN
TXC
K
RX
D0
RX
D1
MD
CM
DIO
RX
ER
RX
DV
RES
ETSI
GD
ETM
OSI
MIS
OSC
LKC
SG
PIO
0G
PIO
1G
PIO
2
ETHERNET
ETH
ERN
ETPA
29G
PIO
GPI
O
PD00
PD01
PD02
PD03
PD04
PD05
PD06
PD07
PD08
PD09
PC10
GTX
CK
GTX
ENG
TX0
GTX
1G
RX
DV
GR
X0
GR
X1
GR
XER
GM
DC
GM
DIO
GPI
O
PA19
0RR
503
0RR
504
0RR
505
0RR
506
0RDNP
R50
7
0RR
502
0RR
501
0RR
500
0RR
499
0RR
498
39R
39R
R49
739
R39
RR
496
39R
39R
R49
439
R39
RR
493
0RR
492
39R
39R
R49
1
0RR
495
PD21
SPI0
_MO
SIPD
20SP
I0_M
ISO
PD22
SPI0
_SPC
KPC
19IS
I_PW
D
GN
D39RR405 G
ND39R
R405
TP40
0
2 1
EL17-21UYC/A3
D400
VC
C_P
3V3
330RR400
USE
R B
UTT
ON
USE
R L
ED
PA05USER_LED0
PA11 USER_BUTTON0
GN
D
VC
C_P
3V3
GN
D
GN
D
VC
C_P
3V3
_
GN
D
RES
ET b
utto
n w
ith c
urre
nt li
mit
and
noise
filte
r
0RR
515
TAR
GET
_RES
ET
2.2kR512
100p
FC
421
330RR513
330R
R51
0
PA05
USE
R_L
ED0
USE
R_B
UTT
ON
0PA
11
AD
VR
EF
22R
22R
R44
822
R22
RR
449
22R
22R
R45
022
R22
RR
451
22R
22R
R45
222
R22
RR
453
22R
22R
R45
422
R22
RR
455
22R
22R
R45
622
R22
RR
457
22R
22R
R45
822
R22
RR
459
22R
22R
R46
022
R22
RR
461
22R
22R
R46
222
R22
RR
463
22R
22R
R46
422
R22
RR
465
22R
22R
R46
622
R22
RR
467
22R
22R
R46
822
R22
RR
469
22R
22R
R47
022
R22
RR
471
22R
22R
R47
222
R22
RR
473
22R
22R
R47
422
R22
RR
475
22R
22R
R47
622
R22
RR
477
22R
22R
R47
822
R22
RR
479
22R
22R
R48
022
R22
RR
481
22R
22R
R48
222
R22
RR
483
0RR
425
0RR516
TARGET_RESET_SENSE
YELLOW
0RR
508
0RR
509
100n
C41
6
100n
C41
4
100n
C41
1
100n
C41
0
100n
C40
6
100n
C40
5
100n
C40
3
100n
C40
2
100n
C40
0
GN
DG
ND
VD
DC
OR
EV
DD
IO
100n
C40
6
100n
C40
5
100n
C40
3
100n
C40
2
100n
C40
0
GN
D
VD
DIO
VD
DIO
De-
Cou
plin
gcl
ose
to p
ins 3
0, 4
3, 7
2, 8
0 an
d 96
100n
C41
6
100n
C41
4
100n
C41
1
100n
C41
0
GN
D
VD
DC
OR
EV
DD
CO
RE
De-
Cou
plin
gcl
ose
to p
ins 2
9, 3
3, 5
0, 8
1 an
d 10
7
100n
C41
8
PB12
ERA
SE
VC
C_T
AR
GET
_P3V
3
JS40
0
TARGET_RESET
EDBG_TARGET_RESET
10uF
/10VC40
9
TAR
GET
_USB
_NTA
RG
ET_U
SB_P
SDA
SCL
DG
I_I2
CD
GI_
I2C
PA03
PA04
TWC
K0
TWD
0 GPI
O
SWC
LKSW
DIO
TAR
GET
_CH
IP_R
ESET
TRA
CES
WO
EDB
G_S
WD
EDB
G_S
WD
PB12
ERA
SEPB
05TR
AC
ESW
O
PB06
SWD
IOPB
07SW
CLK
PD28
WK
UP5
PA02
WK
UP2
PWM
C1_
PWM
L3PA
05PA
29TC
LK2
PB03
RTS
0PB
13SC
K0
PA13
PWM
C1_
PWM
L1
PA25
CTS
1
PA30
PWM
C1_
PWM
EXTR
G0
PB02
CTS
0
PC14
CA
NTX
1
PC12
CA
NR
X1
PA18
PWM
C1_
PWM
EXTR
G1
0RR
403
PB01
TKPD
17SC
K2
PA01
WK
UP1
(1)
PA26
PWM
C1_
PWM
FI1
PD18
RTS
2
PA12
PWM
C1_
PWM
H0
PA31
PWM
C1_
PWM
H2
PB04
TXD
1PA
24R
TS1
PA23
PWM
C0_
PWM
H0
PA28
PWM
C1_
PWM
FI2
JS40
2
GPI
O
PC11
VD
DIO
PC11
ATS
AM
E70Q
21B
-AN
TA
TSA
ME7
0Q21
B-A
NT
PA00
102
PA01
99PA
0293
PA03
91PA
0477
PA05
73PA
0611
4PA
0735
PA08
36PA
0975
PA10
66PA
1164
PA12
68PA
1342
PA14
51PA
1549
PA16
45PA
1725
PA18
24PA
1923
PA20
22PA
2132
PA22
37PA
2346
PA24
56PA
2559
PA26
62PA
2770
PA28
112
PA29
129
PA30
116
PA31
118
PC00
11PC
0138
PC02
39PC
0340
PC04
41PC
0558
PC06
54PC
0748
PC08
82PC
0986
PC10
90PC
1194
PC12
17PC
1319
PC14
97PC
1518
PC16
100
PC17
103
PC18
111
PC19
117
PC20
120
PC21
122
PC22
124
PC23
127
PC24
130
PC25
133
PC26
13PC
2712
PC28
76PC
2916
PC30
15PC
3114
PD00
1PD
0113
2PD
0213
1PD
0312
8PD
0412
6PD
0512
5PD
0612
1PD
0711
9PD
0811
3PD
0911
0PD
1010
1PD
1198
PD12
92PD
1388
PD14
84PD
1510
6PD
1678
PD17
74PD
1869
PD19
67PD
2065
PD21
63PD
2260
PD23
57PD
2455
PD25
52PD
2653
PD27
47PD
2871
PD29
108
PD30
34PD
312
PB00
21PB
0120
PB02
26PB
0331
PB04
105
PB05
109
PB06
79PB
0789
PB08
141
PB09
142
PB12
87PB
1314
4
HSD
P13
7H
SDM
136
NR
ST83
TST
85JT
AG
SEL
104
VR
EFP
9V
REF
N8
VB
G14
0
PE00
4PE
016
PE02
7PE
0310
PE04
27PE
0528
GN
D_0
144
GN
D_0
261
GN
D_0
395
GN
D_0
411
5G
ND
_05
135
GN
D_0
613
8
VDDIO_01 30VDDIO_02 43VDDIO_03 72VDDIO_04 80VDDIO_05 96
VDDIN 5
VDDUTMII 134
VDDPLLUSB 143
VDDPLL 123
VDDUTMIC 139
VDDOUT 3
VDDCORE_01 29VDDCORE_02 33VDDCORE_03 50VDDCORE_04 81VDDCORE_05
107
U40
0
TP40
3
1 2J40
0
HEA
DER
1x2
12
J401
HEA
DER
1x2
12
Pin
head
er 1
x2 R
AJ4
02
134 2
TS604VM1-035CR
SW400
134 2
TS604VM1-035CR
SW401
GFX
-CTR
L
PIN
6_IR
Q2
PIN
8_IR
Q3
PIN
10_I
RQ
4
PIN
4_IR
Q1
PIN
14_D
0PI
N16
_D1
PIN
18_D
2PI
N20
_D3
PIN
22_D
4PI
N24
_D5
PIN
26_D
6PI
N28
_D7
PIN
30_D
8PI
N32
_D9
PIN
34_D
10PI
N36
_D11
PIN
38_D
12PI
N40
_D13
PIN
42_D
14PI
N44
_D15
PIN
60_D
23PI
N58
_D22
PIN
56_D
21PI
N54
_D20
PIN
52_D
19
PIN
46_D
16PI
N48
_D17
PIN
50_D
18
PIN
62_D
24PI
N64
_D25
GFX-CTRL
PC30
PC11
PD19
nCS
NW
R
DC
XnR
D
PC08
PIN
11_L
CD
VSY
NC
PIN
13_L
CD
PCLK
PIN
9_LC
DH
SYN
CPI
N7_
LCD
EN
GFX-SYNC
GFX
-SY
NC
PA08
PB08
VB
US
HO
ST E
NV
BU
S_H
OST
_EN
DET
ECT/
LED
330R
R44
4
10n
C42
2
LED3
12 M
Hz
Osc
illat
or
XIN
_12
0RR51
1
STB
1G
ND
2O
UT
3
VD
D4
DSC
6003
CI2
A-0
12.0
000
Y40
1
GN
D
100n
C41
9 GN
D
VC
C_T
AR
GET
_P3V
3
XIN
_12
0RR51
1
123 4
STB
GN
DO
UT
VD
D
DSC
6003
CI2
A-0
12.0
000
Y40
1
GN
D
100n
C41
9 GN
D
VC
C_T
AR
GET
_P3V
3
32.7
68 k
Hz
Osc
illat
or
XIN
_32
0RR51
4O
UT
1
GN
D2
NC
3V
DD
4
DSC
6083
CE2
A-0
32K
768
Y40
0
100nC42
0
GN
DG
ND
XIN
_32
0RR51
41 2
34O
UT
GN
DN
C
VD
D
DSC
6083
CE2
A-0
32K
768
Y40
0
100nC42
0
GN
DG
ND
VC
C_T
AR
GET
_P3V
3