Safe and Efficient Supervised Memory Systems Jayaram Bobba Mark D. Hill, and David A. Wood Department of Computer Sciences University of Wisconsin-Madison † Intel Corporation ‡ Universitat Politècnica de Catalunya † ‡ Work done while at University of Wisconsin- 1) Out-of-band metadata per data block 2) Monitor, control (supervise) data accesses 3) Run handlers on specific metadata states
Safe and Efficient Supervised Memory Systems. 1) Out-of-band metadata per data block 2) Monitor, control (supervise) data accesses 3) Run handlers on specific metadata states. Jayaram Bobba † , Marc Lupon ‡ , Mark D. Hill , and David A. Wood. Department of Computer Sciences - PowerPoint PPT Presentation
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Safe and Efficient Supervised Memory Systems
Jayaram Bobba†, Marc Lupon‡, Mark D. Hill, and David A. Wood
Department of Computer SciencesUniversity of Wisconsin-Madison
†Intel Corporation ‡Universitat Politècnica de Catalunya
† ‡ Work done while at University of Wisconsin-Madison
1) Out-of-band metadata per data block2) Monitor, control (supervise) data accesses3) Run handlers on specific metadata states
Wisconsin Multifacet Project 2
SW more complexProductivity Wall
HW more powerful
Hardware TMEmpty/full-bits
Why Supervised Memory Systems?
Hardware Support to Improve Productivity
MemTracker,SafeMem,iWatcher Supervised (Memory) Systems
2/15/2011
Deterministic Shared Memory
Hardware-assisted GCInformation Flow Tracking
Wisconsin Multifacet Project 3
• Many supervised memory systems• Assume SC, but few systems do SC1. Moving to TSO (x86 & SPARC) non-trivial2. Supervised Memory for TSO– TSOall: TSO for data & metadata slow– TSOdata: TSO for data & metadata tricky
3. Safe Supervision– Metadata for X only controls data at X– Fast & Simple
Formal Foundation
Current/Future Supervised Systems
Executive Summary
2/15/2011
Wisconsin Multifacet Project 4
Outline
• Introduction• Move To TSO non-trivial– Case Study: Deterministic Multiprocessor (DMP)
• Supervised Memory for TSO• Safe Supervision• Evaluation
2/15/2011
04/22/2023 Wisconsin Multifacet Project 5
A TSO-compliant system
Proc
esso
r PC
Stor
e Bu
ffer
r1r2
Reordering can be incorrect
r3M
emor
y
PC
r1r2r3
ST 1, [A]LD [B], r1ST 2,[C]LD [C], r3
ST 0x01, A
ST 0x10, C
MetadataBlock DataA 0x00
B 0x01
C 0x11
0x01
0x10
ST ALD B
P1 P2
04/22/2023 Wisconsin Multifacet Project 6
DMP-ShTab [Devietti et al., ASPLOS 09]Pr
oces
sor PC
r1r2r3
Mem
ory
PC
r1r2r3
LD [Y], r2ST r2, [Y]ST 2,[A]LD [B], r3
Metadata
Owned@T1
Owned@T2
Block DataA 0x10
B
X 0x11
Y 0xff
LD [X], r1LD [B], r2ST 1, [B]
T1T2
0x110xff
STALL STALL
Owned@T2
Shared@T1,T2Owned@T2
Shared@T1,T20x000x01
0x000x01
Owned@T1
Private
Shared
Reordering can be incorrect
P1 P2
04/22/2023 Wisconsin Multifacet Project 7
Is reordering safe? A Case Study DMP-ShTab on TSO
Proc
esso
r PC
r1r2r3
Mem
ory
PC
r1r2r3
Stor
e Bu
ffer
LD [Y], r2ST r2, [Y]ST 2,[A]LD [B], r3
Metadata
Owned@T1
Owned@T2
Block DataA 0x10
B
X 0x11
Y 0xff
Explore relaxed supervised systems
LD [X], r1LD [B], r2ST 1, [B]
T1T2
0x110xff
STALL STALL
Owned@T2
Shared@T1,T2
0x00
0x00
ST 0x10, A
Case1: LD B does not pass ST A r3 gets 0x01
Case2: LD B passes ST A r3 gets 0x00
Reordering can be incorrect
P1 P2Private
Shared
Wisconsin Multifacet Project 8
Outline
• Introduction• Move To TSO non-trivial• Supervised Memory for TSO– Define Supervised Memory– TSOall: Simple but Slow
– TSOdata: Fast but tricky
• Safe Supervision• Evaluation
2/15/2011
04/22/2023 Wisconsin Multifacet Project 9
Supervised Memory
• Each memory location A,– data (A.d)– metadata (A.m)
• New operations– Supervised Load (sLD A)– Supervised Store (sST A)
• Jump on reading special metadata (Optionally)– Hardware exception
Reorder, Performance (TSOdata)• Observation: – Simple supervised programs rely only on certain orders– Ignore non-essential orders. Still appears as TSOall
Safe Supervision• A location’s metadata is only used to control access to that
location’s data
• Most uses of supervision are safely supervised. E.g.,• Heap Checker: Initialized/Uninitialized values• Transactional Memory: Conflict Detection information
• OpenSPARC case study– How to handle reordering issues?– Metadata overhead
2/15/2011
Wisconsin Multifacet Project 26
• Many supervised memory systems• Assume SC, but few systems do SC1. Moving to TSO (x86 & SPARC) non-trivial2. Supervised Memory for TSO– TSOall: TSO for data & metadata slow– TSOdata: TSO for data & metadata tricky
3. Safe Supervision– Metadata for X only controls data at X– Fast & Simple
Executive Summary
2/15/2011
Formal Foundation Current/Future Supervised Systems
Wisconsin Multifacet Project 272/15/2011
04/22/2023 Wisconsin Multifacet Project 28
Deterministic Shared Memory (DMP)[Devietti et al., ASPLOS 2009]
“depending upon the consistency model of the underlying hardware, threads must perform a memory fence at the edge of a quantum”
• Insert a fence after the last operation in the quantum
• Insert a fence before the first shared operation in the quantum
I3: Reordered metabit-reads
Illustration
Explore relaxed supervised systems
04/22/2023 Wisconsin Multifacet Project 29
Is reordering trivial?Empty/full-bits
Proc
esso
r PC
Stor
e Bu
ffer
r1r2r3
Mem
ory
PC
r1r2r3
ST 1, [A]LD [B], r1ST 2,[C]LD [C], r3
ST 0x01, A
ST 0x10, C
MetadataFull
None
Empty
Block DataA 0x00
B 0x01
C 0x11
0x01
Explore relaxed supervised systems
LD
ST
ST
Exception
Empty Full
LD
None LD/ST
I2: NO LOAD BYPASS
EXCEPTION
I3: LATEEXCEPTIONS
04/22/2023 Wisconsin Multifacet Project 30
TSOdata on OpenSPARC T2
• Goal: Explore low-level issues on a real design• Late Exceptions with deferred handlers– Dump store buffer entries on exception– Enhance store buffer to carry Virtual Address (VA)– ~200 cycles to read out 4 entries
• Disable store buffer bypassing for supervised loads
• Low space overhead for adding metabits (~4%)
04/22/2023 Wisconsin Multifacet Project 31
Existing proposals assume SC
• Assume SC or don’t deal with multiprocessorsProposal Base