Techniques and Tools for Product-Specific Analysis Templates Towards Enhanced CAD-CAE Interoperability for Simulation-Based Design and Related Topics Russell Peak Senior Researcher Manufacturing Research Center Georgia Tech 2002 International Conference on Electronics Packaging (ICEP) JIEP/ IMAPS Japan, IEEE CPMT Japan Chapter Dai-ichi Hotel Seafort, Tokyo, Japan April 17-19, 2002 http://eislab.gatech.edu/pubs/conferences/2002-jiep-icep-peak/
40
Embed
Russell Peak Senior Researcher Manufacturing Research Center Georgia Tech
2002 International Conference on Electronics Packaging (ICEP) JIEP/ IMAPS Japan, IEEE CPMT Japan Chapter Dai-ichi Hotel Seafort, Tokyo, Japan April 17-19, 2002. - PowerPoint PPT Presentation
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Techniques and Tools for Product-Specific Analysis TemplatesTowards Enhanced CAD-CAE Interoperability for Simulation-Based Design and Related Topics
Russell Peak
Senior Researcher
Manufacturing Research Center
Georgia Tech
2002 International Conference on Electronics Packaging (ICEP)JIEP/ IMAPS Japan, IEEE CPMT Japan Chapter
Dai-ichi Hotel Seafort, Tokyo, JapanApril 17-19, 2002
Techniques and Tools for Product-Specific Analysis TemplatesTowards Enhanced CAD-CAE Interoperability for Simulation-Based Design and Related Topics
Design engineers are becoming increasingly aware of “analysis template” pockets that exist in their product domain. For example, thermal resistance and interconnect reliability analysis are common templates for electronic chip packages, while tire-roadway templates exist to verify handling, durability, and slip requirements. Such templates may be captured as paper-based notes and design standards, as well as loosely structured spreadsheets and electronic workbooks. Often, however, they are not articulated in any persistent form.
Some CAD/E software vendors are offering pre-packaged analysis template catalogs like the above; however, they are typically dependent on a specific toolset and do not present design-analysis idealization associativity to the user. Thus, it is difficult to adapt, extend, or transfer analysis template knowledge. As noted in places like the 2001 International Technology Roadmap for Semiconductors (ITRS), domain- and tool-independent techniques and related standards are necessary.
This paper overviews infrastructure needs and emerging analysis template theory and methodology that addresses such issues. Patterns that naturally exist in between traditional CAD and CAE models are summarized, along with their embodiment in a knowledge representation known as constrained objects. Industrial applications for airframe structural analysis, circuit board thermomechanical analysis, and chip package thermal resistance analysis are noted.
This approach enhances knowledge capture, modularity, and reusability, as well as improves automation (e.g., decreasing total simulation cycle time by 75%). The object patterns also identify where best to apply information technologies like STEP, XML, CORBA/SOAP, and web services. We believe further benefits are possible if these patterns are combined with other efforts to enable ubiquitous analysis template technology. Trends and needs towards this end are discussed, including analogies with electronics like JEDEC package standards and mechanical subsystems.
3
Nomenclature ABB-SMM transformation idealization relation between design and analysis attributes APM-ABB associativity linkage indicating usage of one or more i
ABB analysis building blockAMCOM U. S. Army Aviation and Missile CommandAPM analyzable product modelCAD computer aided designCAE computer aided engineeringCBAM context-based analysis modelCOB constrained objectCOI constrained object instanceCOS constrained object structureCORBA common ORB architectureDAI design-analysis integrationEIS engineering information systemsESB engineering service bureauFEA finite element analysisFTT fixed topology templateGUI graphical user interfaceIIOP Internet inter-ORB protocolMRA multi-representation architectureORB object request brokerOMG Object Management Group, www.omg.comPWA printed wiring assembly (a PWB populated with components)PWB printed wiring boardSBD simulation-based designSBE simulation-based engineeringSME small-to-medium sized enterprise (small business)SMM solution method modelProAM Product Data-Driven Analysis in a Missile Supply Chain (ProAM) project (AMCOM)PSI Product Simulation Integration project (Boeing)STEP Standard for the Exchange of Product Model Data (ISO 10303).VTMB variable topology multi-bodyXAI X-analysis integration (X= design, mfg., etc.)XCP XaiTools ChipPackage™
XFW XaiTools FrameWork™
XPWAB XaiTools PWA-B™
4
Contents
Motivation Introduction to Information Modeling and
Knowledge Representation Analysis Template Applications International Collaboration on Engineering
Frameworks Recommended Solution Approach
5
Motivation: Product ChallengesTrend towards complex multi-disciplinary systems
Source: www.ansys.com
MEMS devices
3D interconnects
http://www.zuken.com/solutions_board.asp
Demanding End User Applications
6
Motivation: Engineering Tool Challenges2001 International Technology Roadmap for Semiconductors (ITRS)
http://public.itrs.net/Files/2001ITRS/Home.htm
Design Sharing and Reuse– Tool interoperability– Standard IC information model– Integration of multi-vendor and internal design
technology– Reduction of integration cost
Simulation module integration– Seamless integration of simulation modules – Interplay of modules to enhance design effectiveness
7
Advances Needed in Engineering Frameworks2001 International Technology Roadmap for Semiconductors (ITRS)
http://public.itrs.net/Files/2001ITRS/Home.htm
8
AnalogyPhysical Integration Modules Model Integration Frameworks
Fragment from an instance model - (a.k.a. Part 21 “STEP File” - ISO 10303-21)#1=TWO_SPRING_SYSTEM(#2,#3,1.81,3.48,10.0);#2=SPRING(8.0,5.5,0.0,9.81,9.81,1.81,10.0);#3=SPRING(8.0,6.0,9.8,19.48,9.66,1.66,10.0);
14
PWB Stackup Design & Analysis Tool
15
Application-Oriented Information Model - Express-G notation PWB Stackup Design & Analysis Tool
16
Contents
Motivation Introduction to Information Modeling and
Knowledge Representation Analysis Template Applications International Collaboration on Engineering
Frameworks Recommended Solution Approach
17
Analysis Template Catalog:Chip Package Simulation
thermal, hydro(moisture), fluid dynamics(molding), mechanical and electrical behaviors PakSi-TM and PakSi-E tools
http://www.icepak.com/prod/paksi/ as of 10/2001 Chip package-specific behaviors:
thermal resistance, popcorning, die cracking, delaminating, warpage & coplanarity, solder joint fatigue, molding, parasitic parameters extraction, and signal integrity
Increase quality, reduce costs, decrease time (ex. 75%):» Capture engineering knowledge in a reusable form » Reduce information inconsistencies» Increase analysis intensity & effectiveness
27
Contents
Motivation Introduction to Information Modeling and
Knowledge Representation Analysis Template Applications International Collaboration on Engineering
Frameworks Recommended Solution Approach
28
Product Enclosure
ExternallyVisible Connectors
Printed Circuit Assemblies
Die
Package
Packaged Part
InterconnectAssembly
Printed Circuit Substrate
Die
Adapted from Rockwell Collins Inc.
Today: - Monolithic software applications; Few interchangeable “parts” Next Steps: - Identify other formal patterns and use cases
(natural subsystems / levels of “packaging”)
- Define standard architectures and interfaces among subsystems
Towards Greater Standards-Based Interoperability Target Analogy with Electronics Systems
Systems Engineering• Standard: AP233• Software: Statemate, Doors, Matrix-X, Slate, Core, RTM• Status: In development / Prototyped• BAE SYSTEMS, EADS, NASA
PDM• Standard: STEP PDM Schema/AP232• Software: MetaPhase, Windchill, Insync• Status: In Production • Lockheed Martin, EADS, BAE SYSTEMS, Raytheon
Life-Cycle Management• Standard: PLCS• Software: SAP • Status: In Development• BAE SYSTEMS, Boeing, Eurostep
Propulsion• Standard: STEP-PRP• Software:- • Status: In Development• ESA, EADS
2001-12-16 - Jim U’Ren, NASA-JPL
33
Product Enclosure
External Interfaces
Printed Circuit Assemblies(PCAs/PWAs)
Die/Chip Package
Packaged Part
InterconnectAssembly
Printed Circuit Substrate (PCBs/PWBs)
Die/Chip
STEP AP 210 (ISO 10303-210) Domain: Electronics DesignR
~800 standardized concepts (many applicable to other domains)Development investment: O(100 man-years) over ~10 years
Adapted from 2002-04 - Tom Thurman, Rockwell-Collins
34
Rich Features in AP210: PWB tracesAP210 STEP-Book Viewer - www.lksoft.com
35
Rich Features in AP210: Via/Plated Through Hole
Z-dimension details …
36
Rich Features in AP210: Electrical Component
The 3D shape is generated from these “smart features” which have electrical functional knowledge. Thus, the AP210-based model is much richer than a typical 3D MCAD package model.
210 can also support the detailed design of a package itself (its insides, including electrical functions and physical behaviors).
37
Rich Features in AP210: 3D PCB Assembly
38
PWA/PWB Assembly Simulation using AP210
Rules (FromDefinitionFacility)
Generic Manufacturing Equipment Definitions
SpecificManufacturing Equipment Used
User Alerted on Exceptions to ProducibilityGuidelines
2002-03 - Tom Thurman, Rockwell-Collins
39
AnalogyPhysical Integration Modules Model Integration Frameworks
» Identify who will “supply”/develop these “components”– Develop & prototype solutions– Advocate solution standardization and vendor support– Test in pilots– Deploy in production usage