1 Henning Braunisch – Rough Surface Modeling August 5, 2010 Rough-Metal-Surface Propagation Loss Modeling Henning Braunisch * , Xiaoxiong Gu † , Alejandra Camacho-Bragado * , and Leung Tsang † * Intel Corporation Components Research Chandler, Arizona, USA † University of Washington Department of Electrical Engineering Seattle, Washington, USA IEEE Waves & Devices Phoenix Chapter Seminar Series
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Off-chip interconnect structures often exhibit rough metal surfaces with RMS roughness Rq in the order of microns• As deposited or deliberately roughened to enhance adhesion
At 5 GHz, skin depth into a smooth conductor made of non-ideal copper based on classical electrodynamics is about 1 µm• Impact on wave propagation is non-negligible
Cross-section of flex-circuit with rough trace over rough ground plane
• Fast algorithm for isotropic random rough surfaces
• Process single image instead of hundreds
• Given surface height profile h(x,y):
1. Utilizing 1-D fast Fourier transform (FFT), average the squared magnitude spectra along all lines in the x and y directions of the sampled surface height function.
2. Take an inverse FFT to obtain an estimate of the correlation function of the isotropic rough surface.
3. Obtain the PSD estimate by computing a Fourier-Bessel transform of order zero (also known as Bessel or Hankel transform).
• For example, signaling rate of 10 Gb/s corresponds to:• Fundamental frequency of f0 = 5 GHz
• Highest frequency of interest fu = 1.5 f0 = 7.5 GHz
• As shown by data on previous slide, impact due to surface roughness is similar to that of dielectric loss
• Many high-speed channels are primarily return loss (reflection) and cross-talk limited• Smoother lines and lower dielectric loss could still lead to somewhat
improved system performance
• Packages and board contribute to (largely additive) insertion loss
• Should improve contributions in a balanced approach
• Optimized low-loss or long channels can be significantly impacted
• Developed new methodology for the modeling of interconnect surface roughness impact on signaling• Good agreement with measurements for a package substrate
• Applications in:• Interconnect design, especially when insertion loss becomes limiting, for
example on long channels
• Package-level and board-level substrate process technology development
• Current and future work:• Modeling and correlation with measurements for different substrate
types
• Imaging metrology refinement• Blind spots in interferometry
• Testing of a new AFM scanner
• Multi-roughness modeling using effective conductivity
• Advanced theoretical and numerical work at University of Washington