RFID: Reader Designs3.amazonaws.com/zanran_storage/137.189.34.238/ContentPages/... · is usually used in transmission line and components related circuit whereas IE3D is used in Microstrip

THE CHINESE UNIVERSITY OF HONG KONG

RFID: Reader Design

Cheung Hing Hung

香港中文大學電子工程學系

DEPARTMENT OF ELECTRONIC ENGINEERING

RFID: Reader Design

Author: Cheung Hing Hung

Student I.D.: 02668093

Supervisor: Professor K.K.Cheng

Associate Examiner: Professor K.T.Chan

A project report presented to the Chinese University of Hong Kong

in partial fulfillment of the Degree of Bachelor of Engineering

Department of Electronic Engineering The Chinese University of Hong Kong

April 2006

2

A. Abstract RFID (Radio Frequency Identification), also called electronic labeling, is a new wireless

technology. Reader (Interrogator) can read from or write to a specified identity tag without

any mechanic or optical contact whereas it is done by radio frequency communication.

An RFID system can be simplified into three parts; they are data acquisition, reader and

tag.

In this project, I am responsible for the RFID interrogator and design the system based

on the ISO 18000-6 specification. The interrogator is dedicated to communicate with passive

tags.

Interference is a fatal problem in RFID system, therefore, I designed a technique to due

with it in order to improve the detecting range, and hence, system performance.

Circuit of individual functional blocks, including VTO, AM modulator, power amplifier,

antenna, LNA and mixer, with simulated result and experimental result are evaluated. The

data acquisition capability of a simplified transceiver is also tested.

3

B. Acknowledgements Professor Cheng Kwok Keung, Michael (B.Sc., Ph.D. (London), MIEEE, AMIEE), who

is the supervisor of this project, sets up the goal of this project and gives advice when I faced

some technical problems.

Professor Chan Kam Tai (B.Sc. (Hong Kong), Ph.D. (Cornell), MIEEE) is the associate

examiner of this project.

Kong Cheuk Pang (M.Phil), who is the tutor of this project, helps me to understand the

microwave circuit theory, laboratory instrument, simulation tools and patch antenna theory.

4

C. Content A. Abstract ………………………………………………………………………... P.3

B. Acknowledgements ……………………………………………………………. P.4

C. Contents ……………………………………………………………………..… P.5

D. Introduction………………………………………………………….…………. P.7

E. Theory and Paper Design

1. System specification ……………………………………………………… P.9

2. Estimation of System performance ……………..……………………….... P.13

3. Challenge and solution ……………………………………………………. P.15

4. Materials selection …..…………………………………………………..... P.22

F. Experimental Results

1. Varactor-Tuned Oscillator ……………..…………..……….……..…......... P.24

2. AM modulator …………………………………….…..…………………... P.30

3. Power Amplifier ........................................................................................... P.32

4. Antenna ……………………………………………….…..………………. P.36

5. Variable attenuator …………………………...……...................………….. P.40

6. Voltage Limiter ……………………………………….….………….…….. P.43

7. LNA ……………………………………………………………………….. P.45

8. Mixer ………………………….….....………....…………………………... P.49

5

9. A simplified Interrogator ……….....………....…………………………... P.53

G. Cost Summary ………………………………………….….….……..…………. P.55

H. Discussions and Conclusions …………………………..….…..……………….. P.58

I. Reference ……………………………………………….……...……………….. P.60

J. Appendices

1. Equation of maximum detection range…………………………….…...…. P.61

2. Simulation result of 16-element patch antenna array ……..………….…… P.62

3. Stabilization of HBFP0405 ………………………………………..…. …... P.65

6

D. Introduction The reader is a radio frequency transceiver therefore the design of parameters must fulfill

the radio regulation of local government, on the other hand, International Organization of

Standard (ISO) has designed a clear standard on RFID system, and the name of the document

is ISO 18000-6 [7].

Firstly, one of the specifications is chosen from the document based on the functionality

of desired system. Then, the feasibility and performance of the overall system should be

verified carefully. After it, the specification of individual functional block set can be

confirmed.

Secondly, materials used by the project are selected. The most critical one is apparently

substrate, and other components include microwave transistors, diodes, resistors, inductor,

capacitors, IC chips, SMT connectors and cable.

Firdly, the circuit design of individual block set is concerned. The circuits are tested

under simulation tools like Agilent Advanced Design System (ADS) and Zeland IE3D. ADS

is usually used in transmission line and components related circuit whereas IE3D is used in

Microstrip Antenna design.

7

Fourthly, individually functional block is fabricated and their performance are vertified.

Finally, integrate all the functional blocks into a complete transceiver. The signal

transmission, reception and data acquisition capability are tested.

In this project, I have simulated all the functional blocks that are required in my design

of RFID transceiver. The functional blocks include VTO, modulator, power amplifier, antenna,

LNA, variable attenuator, voltage limiter and mixer. In which, VTO, modulator, power

amplifier and mixer are fabricated. A simplified complete transceiver is also built to test the

data acquisition capability of my design.

8

E. Theory and Paper Design 1. System specification

To begin with, specification of passive backscatter RFID is checked from the ISO

18000-6 document [7]. Table 1.1.1 shows two types of RFID system.

Table 1.1.1

Type

Type B can support more tags and have larger potential in logistic industry therefore it is

selected. There are many parameters but only Modulation index and Data rate is related to my

9

design. They affect the design of modulator and bandwidth of my reader respectively.

Modulation Index

18% modulation index is chosen because it gives a relatively stable power supply to the

passive tag.

Data Rate

10 kbps data rate is chosen because another student, who is responsible for data

acquisition part, plan to build a slow speed system first. In fact, no matter the selected data

rate is 10 or 40 kbps, the turn out bandwidth is still negligible in the radio frequency

transceiver section.

Carrier Frequency

Another important parameter is the carrier frequency. Base on ISO specification, carrier

frequency can be 135 kHz, 13.56 MHz, 433 MHz, 860-960 MHz and 2.45GHz. 860-960MHz

is chosen because antenna gain is higher, size of circuit is more compact and antenna is

smaller at high frequency, but 2.45GHz is not considered because tolerance and side effect

during fabrication can be high for such a high frequency. On the other hand, local radio

regulation further restricts the range to 865-868 MHz & 920-925 MHz, 866 MHz is selected

10

as the carrier frequency in my design finally.

EIRP

By local radio regulation, maximum EIRP is limited by 4W, which is 36dBm. My design

will fully meet this limit in order to provide sufficient power to drive the passive tags.

DC Power Supply

9V battery is used so that the reader can be portable.

The interrogator

Figure 1.1.1 shows a simplified version of the schematic of the interrogator.

Simplified version of the schematic of the interrogator

Figure 1.1.1

11

The transmitting path of the transceiver work as follow:

1. The oscillator gives a power of 10dBm and then it is pre-amplified to 18dBm.

2. Negligible power, about 0dBm, is coupled to the mixer by the non-ideal isolation of a

high impedance capacitor.

3. Most of the power is passed to the AM modulator.

4. The power is further amplified to 26dBm by power amplifier.

5. A quadrature coupler is used to imitate an circulator. The isolated port is connected to

the receiver whereas the two output ports are used to drive an antenna

6. The antenna, with 10dB gain, gives an EIRP of 36dBm, which is the maximum

power limit of a RFID transmitter.

The receiving path of the transceiver work as follow:

1. Received power from the antenna is passed to the quadrature coupler. Half of the

power is lost to the transmiting path and half of the power is passed to the receiving

path

2. Received signal is amplified by LNA, interference are suppressed and output power

is automatically adjusted by AGC before passing to the mixer.

3. Received signal is passed to the mixer and then down-convert to base-band signal

directly.

12

2. Estimation of System performance

Let R be reader, T be tag, d be the distance between the reader and the tag, S be the

received signal power, n be the minimum SNR for detection divided by the isolation between

the transmitting path and the receiving path. The maximum detection range is

πλ

×××

×⎟⎠⎞

⎜⎝⎛=

41)(

41TR GG

ndMax #1 (Proof in Appendix 1)

Table 1.2.1 lists the maximum detection range of the interrogator, based on #1 with

different inputs.

Maximum detection range of the interrogator

GR GT n Max (d)

10 1 1.00E-03 0.49022 m

10 1 1.00E-04 0.87175 m

10 1 1.00E-05 1.55022 m

10 1 1.00E-06 2.75673 m

10 1 1.00E-07 4.90223 m

1 0.1 1.00E-03 0.04902 m

Table 1.2.1

The n parameter is critical to the system performance, a value of 10-3 can be achieved

easily, but a value of 10-6 or 10-7 is challenging. Details will be discussed in next section.

13

The last row of the table shows a bad case with reader antenna gain of 0 dB, tag antenna gain

of -10 dB and n = 10-3, the maximum detection range is about 5 cm only.

14

3. Challenge and solution

RFID system works like a radar system with amplitude modulation, it greatly simplify

the modulation and demodulation processes, especially in the design of tags, it is very

important if a cheap and small tag is desired.

However, interference becomes a big problem because transmitted signal and returned

signal compose of the same carrier frequency; on the other hand, phase is not concerned;

therefore, they are only different in amplitude. Signal must has a larger power than

interference in order to be received.

i.e. where n << 1. Smaller the n, longer the detecting ranges. RPnS ×≥

Figure 1.3.1 shows three sources of interference:

Source of interference

Figure 1.3.1

15

1. Non-ideal isolation of quadrature coupler

2. Reflection from antenna

3. Reflection from external environment

The three interferences listed above have the same frequency but different amplitude and

phase, therefore it is impossible to distinguish between them and eliminate them one by one.

Fortunately, the envelope of mixed interference should be quite stable because the

hardware and external environment will not change rapidly.

Two techniques are required in order to improve detecting range.

1. Interference suppression – if the tag is far from the reader, interference will dominate.

2. Automatic gain control – if the tag is very close to the reader, returned signal will be too

strong and will impact the LNA

Figure 1.3.2 is the schematic circuit I designed to suppress those interferences

16

Schematic diagram of improved system

Figure 1.3.2

Because the envelope of interference varies slowly (say, 0 - 100 Hz) whereas envelope of

wanted signal varies much faster (10 kHz). On one hand, my design tries to suppress all the

signals, which envelope varies slowly, at the input of LNA. On the other hand, wanted signal,

which envelope varies rapidly, can escape from the suppression and can reach the mixer.

The interference suppression loop work as follow:

1. a Wilkinson power divider is used as an adder, in fact, a subtraction

2. Feedback loop with ππ +n2 phase shift is used to allow the feedback signal to

cancell the interference

3. A voltage limiter is used to give a stable power source regardless of the power of the

input signal

4. An envelope detector acquires the output power from LNA, higher voltage implies

17

higher interference

5. The magnitude of canceling signal is controlled by a logic.

Figure 1.3.3 demonstrates how the logic block works. In order to simply the case, I

assume the ππ +n2 phase loop works very well, therefore, the feedback signal can suppress

the interference very well, and then the envelop of interference can be represented by DC

(more accurately, very low frequency signal).

Logic that control the feedback loop

Figure 1.3.3

Starting by the interference at the right top corner, the canceling signal tries to eliminate

the interference, the output will be either

1. canceling signal is too weak, interference still dominates, or

18

2. good canceling, the interference greatly reduced, or

3. canceling signal too strong, it dominates

Passed through the LNA, the signal is strong enough for computing, the envelope of the

signal is regarded as “interference voltage”, after passing through the differential OpAmp, the

output shows the “interference voltage” is rising or falling. If

1. it is rising (say, logic 1), the output of the XOR gate complement

2. it is falling (say, logic 0), the XOR remains the same output

The output of the XOR is charging or discharging a low pass filter (say,τ =0.1) which

gives the canceling signal, therefore, the canceling signal response to the slow changing

interference envelope but not the fast changing data envelope.

Figure 1.3.4 shows a simulation result that use canceling-signal to due with the

interference.

19

Simulating result of interference cancellation

Figure 1.3.4

V1 is input signal (10 kHz Manchester code) plus envelop of interference (imitates by

100Hz sin wave). The interference dominates the signal. If the signal passes through an

Automatic Gain Control, the interference together with the wanted signal will be compressed

this is not desired. Fortunately, with the canceling voltage (V2) keep tracking with the

envelope of the interference, the output remains the wanted signal (Vo) only.

On the other hand, the envelope detector controls the Automatic Gain Control which is

also a voltage controlled attenuator. Unlike the interference canceling system, the AGC

responses to the envelope of the signal instantly when the input signal level is too high.

20

Details of functional blocks of the system will be discussed in experimental results

section.

P.S. White noise is not considered in system design because interference from the transmitter

always dominates.

For example,

Bandwidth = 0.1×Carrier Frequency = MHz 6106.86 ×

T = 300 K

Then,

N = kBT = = 357 fW #2 300)106.86()10374.1( 623 ×××× −

Which is extremely small compared with the interference.

21

4. Materials selection

FR4 is the substrate selected for this project simply because it is cheap. FR4 has rε of

4.3 and cδtan of 0.02. In fact, rε is too low, it makes the size of the circuit and

transmission line quite large; cδtan is high, it is a disaster especially on the efficiency of

patch antenna.

FR4 comes with two substrates’ thickness, 0.8 mm and 1.6 mm. 0.8 mm is used in normal

circuit because it makes the width of transmission line reasonable with respect to the size of

components.

Table 1.4.1 shows the width of strip-line with different substrate thickness whereas the

characteristic impedance is fixed at Ω50 .

Width of strip-line vs substrate thinkness

Thickness Width of strip-line with Ω= 50OZ

0.8 mm 1.54 mm

1.6 mm 3.10 mm

Table 1.4.1

Nevertheless, 3.2 mm thick substrate is used for patch antenna by overlapping two 1.6

mm substrates, this configuration increase the fringe field at the edge, thus, increase

bandwidth and antenna efficiency.

22

For RF transistors and diodes, they should operate up to several gigahertz, several

multiple of the carrier frequency.

In the design of power amplifier, the RF transistors should have high power dissipation.

In the design of low noise amplifier, the RF transistors should have high gain.

In the design of oscillator, the RF transistors should be unstable at the desired frequency.

In the design of variable attenuator, the PIN diodes should have low impedance when

forward current is high; high impedance when forward current is low and small junction

capacitance all the time.

For SMT components i.e. chip resistors, chip inductors and chip capacitors. They should

be sophisticated so that parasitic effect does not happen at the desired frequency. 0603 chip

components, available in the microwave laboratory, are a good choice.

23

F. Experimental Results 1. Varactor-Tuned Oscillator

An accurate oscillator should contain a crystal oscillator, phase comparator,

voltage-controlled oscillator and down converter. In this project, only a varactor-tuned

oscillator is built; whatever, it is sufficient to gives the carrier signal.

There are two main types of oscillator, feedback oscillator and negative-resistance

oscillator. Negative-resistance oscillator is usually used in radio and microwave frequencies.

The design of varactor-tuned oscillator starts from one-port negative-resistance

oscillator.

A negative-resistance device is represented by

),(),(),( ωωω AjXARAZ INININ += where 0),( <ωARIN #3

The load device is represented by

)()()( ωωω LLL jXRZ += #4

The circuit oscillates when

1)(),( =ΓΓ OLOOIN A ωω #5

Which gives

0)(),( =+ OLOOIN RAR ωω and 0)(),( =+ OLOOIN XAX ωω #6

24

Kurokawa [8] has proofed the condition for stable oscillation. It is

0)()()()(>

∂∂

∂∂

−∂

∂∂

∂

==== OOOO

L

AA

INL

AA

IN RA

AXXA

AR

ωωωω ωω

ωω #7

In many case,

0)(=

ωω

ddR L #8

Then, #7 is simplified to

)1()(M

OIN AARAR −−= #9

Power delivered to is LR

)(21]Re[

21 2* ARIVIP IN== #10

By solving dAdP , a convenient value of , which maximizes the oscillator power, is LR

3O

LR

R = #11

The theory of a two-port negative-resistance oscillator is very close to that of a one-port

negative-resistance oscillator. The procedure is:

1. Firstly, use a potentially unstable transistor at the frequency of oscillation.

2. Design the terminating network to make 1>ΓIN . Series or shunt feedback can be used to

increase INΓ i.e. make the RF transistor more unstable at the desired frequency

3. Design the load network to resonate , and to satisfy the start of oscillation condition in INZ

(5.2.22). That is )()( OINOL XX ωω −= and 3O

LR

R = #12

25

n etwork is a com te of strip

igure 2.1.1 is the schematic diagram of the VTO

the VTO is

The RF transistor is at the middle. A tub, at the base of the transistor,

ita t

In order to make the oscillator tunable, the desig of load n posi

line and a capacitor. The capacitor is replaced by a varactor diode finally so that the output

frequency is tunable by varying the property of load network

F

The schematic of

Figure 2.1.1

short circuit s

im tes an inductor to make the transistor more unstable at the desired frequency. On lef

hand side, it is the terminating network. On the right hand side, the load network is a

composite of strip line and capacitor. The bottom-right capacitor will be replaced by a

varactor diode so that the oscillating frequency can be tuned by voltage.

26

Figure 2.1.2 shows layout of the VTO

The layout of the VTO

Figure 2.1.2

27

Figure 2.1.3 shows the relationship between output frequency and tuning voltage. When

the tuning voltage increased from 0V to 9V, the output frequency increased from 610MHz to

925MHz. At the desired frequency, 866MHz, the tuning voltage is six volts.

Frequency vs Control-Voltage

Figure 2.1.3

28

Figure 2.1.4 shows the output power of the VTO across the tunable spectrum. The output

power of fundamental frequency and first harmonic are 9dBm and -13dBm respectively. The

power difference between fundamental frequency and first harmonic is 21dB, which is good.

The power of fundamental frequency and first harmonic

Figure 2.1.4

29

2. AM Modulator

The AM modulator modulates the carrier with two discrete amplitudes, in fact, it is

simply a variable attenuator switched by PIN diodes. Because 18 % modulation index is

selected, the two amplitude levels have the ratio of 1: 0.835. Figure 2.2.1 shows the layout of

the modulator

Layout of AM modulator

Figure 2.2.1

Control voltages are used to turn on or turn of two pairs of PIN diodes, hence, allow RF

signal to pass through either the lower path of the upper path.

The lower path does not attenuate the signal whereas the upper path gives attenuate the

signal with S21=0.835 by a T attenuator.

30

Table 2.2.1 shows the measurement of the modulator. The reflection coefficient remains

lower than -16dB therefore the circuit is matched to both input and output all the time. The

transmission coefficient has a different of -1.48 dB i.e. 0.843 in magnitude, which is quite

close to desired value, 1:0.835.

Measurement of AM modulator

Digital Siganl High (dB) Low (dB)

S11 -16.69 -20.4

S21 -0.96 -2.44

S12 -0.99 -2.48

S22 -16.57 -20.55

Table 2.2.1

31

3. Power Amplifier

For the design of power amplifier, the choice the transistor is very critical. Unfortunately,

there are limited choices from the market.

The RF transistor being used is BFQ-19S. It has a maximum power dissipation of 1W

whereas my target output power is 400mW.

The bias condition is different from other small signal application. Large

collector-emitter voltage and collector current is selected in order to deliver high power. In my

design, Vce of 8V and Ic of 70mA is used.

In the traditional design of power amplifier, the source and load matching network is

selected to have low impedance values so that the power amplifier gives high output power

provided that voltage or current is fixed. However, since I am going to build a complete

transceiver, an un-matched functional block will affect the properties of other functional

blocks and complicate the whole circuit design, therefore, I chose to match both input and

output port to the transmission line. Fortunately, the performance of the power amplifier does

not deteriorate much.

32

Figure 2.3.1 shows the layout of the power amplifier

Layout of power amplifier

Figure 2.3.1

33

Figure 2.3.2 shows the S-parameters of the power amplifier. The reflection coefficient of

input and output ports are -17.6dB and -16.44dB respectively, therefore they are matched.

S-parameters of power amplifier

Figure 2.3.2

34

Figure 2.3.3 shows the relationship between input power and output power. The power

amplifier has a maximum output power of 24.3dBm and a gain of 9dB.

Output power vs Input power

Figure 2.3.3

The power dissipation of the power amplifier = Vce× I = 7.5×0.1 = 750mW

The maximum RF output power of fundamental frequency = 24.3dBm = 270mW

The efficiency of the power amplifier = 270 / 750 = 36%

35

4. Antenna

As discussed in Materials Selection section, substrate with 3.2 mm thickness and an

antenna of 10 dB gain is required by the system specification. Performance of signal patch

antenna is not satisfactory therefore patch array is used.

Figure 2.4.1 shows the E-field, voltage, current and impedance distribution inside a

rectangular patch antenna.

Properties of single patch antenna

Figure 2.4.1

Length isλ /2 for the desired frequency to resonate. W is optimized to #13 in order to

maximize the gain [4].

2)1(2 +

=r

of

cWε

#13

Most current flow in the middle but not along the edge, therefore an impedance wall is

formed at the edge; proper impedance matching is required in order to feed the patch.

36

Figure 2.4.2 shows a linear 4-element array,

Linear array of four elements

Figure 2.4.2

Length of both patch and feed line areλ /2 so that all patches resonate in phase. From

right to left, the impedance of the feed line is transformed from a high value to a low value,

hence, lower radiating resistance and higher radiating power.

37

Figure 2.4.3 shows a 16-element antenna array; all feed lines are proper designed so that

all rectangular patches resonate in phase.

Patch array of 16 elements

Figure 2.4.3

Simulating result of 16 elements patch array antenna is shown in appendix 2

Table 2.4.1 shows the simulated result of various number of arrays. The efficiency is

limited by the quality of the substrate and the relatively low carrier frequency. The size of the

antenna array can be greatly reduced by using a higher carrier frequency, say 2.4Ghz, whereas

38

the theory of design is almost the same.

The gain of the 16 patches antenna is 1.5 dB above the 10 dB target. The excess gain can

be reserved to compensate other loss in the circuit

Simulating result with different number of elements

number of patches Gain efficiency size

1 ~ 1.5 dB ~ 33 % ~ 11 * 9 cm

4 ~ 6.5 dB ~ 32 % ~ 11 * 65 cm

16 ~ 11.5 dB ~ 31 % ~ 60 * 65 cm

Table 2.4.1

39

5. Variable Attenuator

Bridged-T attenuator [6] is used as the basis of attenuator because only two variable

resistors are required and it is achieved by replacing variable resistors by PIN diodes.

Figure 2.5.1 shows the circuit of a bridged-T attenuator and a voltage-controlled variable

attenuator

Bridged-T attenuator

Figure 2.5.1

Where )110(1 20 −=L

OZR and 110

420 −

= LOZ

R #14

40

In my design, three bridged-T attenuators are cascaded in order to enhance the

performance. The schematic diagram is shown in Figure 2.5.2

Schematic diagram of variable attenuator

Figure 2.5.2

Figure 2.5.3 shows the relationship between transmission coefficient and control-voltage.

Attenuation changes with control voltage. From 0V to 8V, the attenuation varies from

about 20 dB to 80 dB, therefore a dynamic range of 60 dB. The dynamic range implies the

variation of incoming signal that the system can handle. Signals, that out of the dynamic

range, will either saturate the amplifier or not strong enough to be detected.

The minimum attenuator is about 20 dB, it sounds awful. In fact, it will not downgrade

the signal to noise ratio because white noise is negligible. However, a more powerful LNA is

required to boost the power again.

41

S21 vs control-voltage

Figure 2.5.3

Figure 2.5.4 shows the transient response with different control-voltage. The phase

remains constant with different attenuations, it is very important to ensure the ππ +n2

interference suppression loop works.

Transient analysis vs control-voltage

Figure 2.5.4

42

6. Voltage Limiter

This device works like a DC voltage regulator; it gives a constant AC output regardless

of the power of input signal. Figure 2.6.1 shows the schematic diagram of a voltage limiter.

Schematic diagram of the voltage limiter

Figure 2.6.1

43

Figure 2.6.2 shows the simulated result of the voltage limiter. The upper graph is the

input voltage with different magnitude whereas the lower graph is the output. Power is

grounded by PIN diode if the input voltage is either too positive or too negative; therefore, the

output remains almost constant regardless of input power.

Simulating result of voltage limiter

Figure 2.6.2

Besides, the output voltage amplitude depends on the forward threshold voltage of the

PIN diodes.

Again, the output phase remains the same, it is very important to ensure the ππ +n2

loop works.

44

7. Low Noise Amplifier (LNA)

As discussed in Challenge and Solution, white noise is negligible in the system design,

therefore LNA is simply a high gain amplifier.

In this state, the actual gain we required is not confirmed because it depends on the

isolation of interference from LNA and the minimum attenuation of variable attenuator,

however, a high gain amplifier is usually helpful.

In order to obtain high gain and high output voltage swing, two transistors are used. The

first one is HBFP0405, which has very high gain but low output voltage; the second one is

BFR183, which has relatively low gain but high output power. Table 2.7.1 shows the bias

condition of the two RF transistor.

Bias condition of HBFP0405 and BFR183

HBFP0405 BFR183

Vce 2 V 4.5 V

Ic 5 mA 15 mA

Table 2.7.1

Unfortunately, HBFP0405 is unstable from 0 – 7.3 GHz. In order to prevent it from

oscillating, a shunt resistor is added to the output to stabilize the transistor. The

resistor seldom put at the input of the transistor because it will make the output very noisy.

Ω250

45

The corresponding stability diagram is shown in Appendix 3 and the schematic diagram

of a stabilized HBFP0405 transistor is shown in Figure 2.7.1

Schematic diagram of a stabilized HBFP0405

Figure 2.7.1

Table 2.7.2 shows the S-parameters of the two RF transistors after proper biasing and

stabilization.

S parameter of the two transistors

polar HBFP0405 BFR183

S11 0.779 / -40.199 0.091 / -178.41

S12 0.020 / 69.763 0.118 / 72.115

S21 9.569 / 155.77 4.507 / 80.900

S22 0.622 / -13.571 0.391 / -24.389

Table 2.7.2

For HBFP0405, S12 is very low, therefore, unilateral conjugate matching is used, i.e.

571.13622.0199.40779.0

*22

*11

∠==Γ∠==Γ

SS

L

S #15

46

dBS

SS

GTU 8.2586.3791

11

12

22

2212

11max, ==

−−= #16

For BFR183, S12 is quite large; therefore, bilateral conjugate matching is used,

2

22

222

1

21

211

24

24

CCBB

CCBB

ML

MS

−±=Γ

−±=Γ

#17

Where

*11222

*22111

2211

2222

2222

2111

11

SSCSSC

SSBSSB

∆−=∆−=

∆−−+=

∆−−+=

#18

And #19 21122211 SSSS −=∆

2112

2222

211

21

SSSS

K∆+−−

= #20

Solving #6, #7, #8 and #9, finally gives 02.1

9.24783.0181691.0

=∠=Γ∠=Γ

KML

MS

#21

And dBKKSS

GT 1528.31)1( 2

12

21max, ==−−= #22

Cascading the two amplifiers, the total gain = 25.8 + 15 = 40.8 dB #23

Making use of the four values obtained, all ports of the two transistors are matched by

microstrip. Figure 2.7.2 shows the schematic diagram of two-state LNA

Γ

47

Schematic diagram of two-state LNA

Figure 2.7.2

Figure 2.7.3 shows the gain of the two-state LNA verse frequency. The gain is 40.262dB at

the desired frequency, which is very close to the calculated result in #12 that is 40.8 dB.

Gain of LNA verse frequency

Figure 2.7.3

48

8. Single-Balanced Mixer

A mixer is a three-port network with two input, local oscillator and radio frequency, and

one output, intermediate frequency. Mixers are commonly used to multiply signals of

different frequencies in an effort to achieve frequency translation.

A mixer can be divided into three sections. A simple block diagram of a general mixer is

depicted in Figure 2.8.1

Structure of a general mixer

Figure 2.8.1

The first section combine or multiply LO signal with RF signal, in addition, isolation

between LO and RF is very important, otherwise, LO signal will contribute noise to RF signal

or RF signal will distort other functional blocks in the system.

The second section is a non-linear device, which produce multiple frequency

components from the combined signal, LO and RF. Diodes and transistors, with proper

biasing, are commonly used as the non-liner device.

The last section is an IF filter, on one hand, it extracts the desired frequency component

from those frequency components generated by the non-linear device; on the other hand, it

49

suppress unwanted frequency components.

In my design, I chose to use passive single-balanced mixer because, on one hand, it has

higher efficiency than single-ended mixer; on the other hand, the double-balanced and active

properties is not required because the effect of spurious mode is small and the RF signal is

sufficiently strong. Figure 2.8.1 depicts the schematic diagram of the mixer.

Schematic diagram of the mixer

Figure 2.8.1

A quadrature coupler acts as the combiner of LO and RF signal. Because RF and LO signal

compose of the same frequency, a hybrid coupler is an ideal choice to combine the two signals,

in addition, provide excellent isolation between the two input port, LO and RF.

A pair of diodes acts as the non-linear device. The products are base-band signal,

fundamental frequency and harmonics only because the mixer is a direct conversion mixer.

The two-way configuration cancels the phase different of the output of the quadrature

coupler.

O90

50

The last section, IF filter, is simply a low pass filter with a large capacitor. It is easy to

extract the IF signal, base-band signal, because the closest unwanted frequency is 866MHz,

which is very large compared with the wanted signal, proximately 10kHz.

Figure 2.8.2 depicts the layout of the mixer. Strip-lines of the quadrature coupler are bent

in order to reduce the size.

Layout of the mixer

Figure 2.8.3

Figure 2.8.4 depicts the power of IF, which is DC, with different input power of LO and

RF. For a fixed LO power, 0dBm or 10dBm, the IF output power increases with RF-input

power. Nevertheless, if RF power is too low, the IF output stop dropping due to non-ideal

51

isolation between LO and RF; contrary, if the RF power is too high, there is a weird behavior

at the IF output because the effect of harmonics emerges.

IF (i.e. DC) output power with different LO and RF power

-60

-50

-40

-30

-20

-10

0

-40 -30 -20 -10 0 10

RF input power (dBm)

IF,

DC

(dB

m)

LO=0dBm

LO=-10dBm

Figure 2.8.4

The measurement result in Figure 2.8.4 stands on the ground of a DC output. Whatever,

it should also work in the case 10kHz base-band signal, the data rate of the RFID interrogator,

because 10kHz is in the pass-band of the IF filter, which is a low-pass filter.

52

9. A simplified interrogator

In order to test the data acquisition capability of the system, a simplified

interrogator is built. The interrogator contains five major functional blocks. The layout is

depicted in Figure 2.9.1

A Simplified Interrogator

Figure 2.9.1

The first functional block is a VTO, which gives the carrier signal. Most of the power

goes to the transmission path and some power couples to the mixer as the LO signal.

The second one is modulator. In order to make the result more obvious, a modulator with

100% modulation index is used.

The third one is a power amplifier.

53

The fourth one is the quadrature coupler, which imitate a circulator. The two output ports

are terminated with an almost-match load, which little amount of incoming signal is reflected.

The weak returned signal imitates the back-scattered signal from tags.

The last one is a mixer, which converts the RF signal back to base-band signal.

Due to non-ideal isolation of the quadrature coupler and incomplete matching of the two

“almost matched” loads, the RF signal goes to the mixer is sufficiently strong, therefore, LNA

is not required in the simplified interrogator.

Figure 2.9.2 depicts the experimental result of the transceiver

Modulating signal and Demodulated signal

Figure 2.9.2

The demodulated signal is weak and has much noise. One of the reasons is, although

individual functional block works properly, their measurements stand on the ground that both

source and load are Ω50 . However, when they are inter-connected, input and output

impedance of one functional block may affect that of other function blocks.

54

G. Cost Summary This project involves many RF and microwave discrete components.

RF transistors and diodes are bought from “www.rshongkong.com”, an electronic

products retailer. In fact, most of the components are cheap but buying each of them

individually is expensive. These components are about 60% cheaper if the purchase quantity

is more than 100. The price can be further reduced for a more bulky purchase.

Other materials, like dielectric substrate, SMT connectors, chip resistors, chip inductors

and chip capacitors can be obtained from microwave laboratory or supervisor.

55

Table 3.1.1 lists some of the major materials and components used in this project.

Table of expenditure

Materials and components Quantities Cost (HKD)

FR4 substrate ~ 4 pieces of A3 size $0 (from laboratory)

SMT connector 5 $0 (from supervisor)

RF transistor, BFR-183 15 $8.21

RF transistor, BFQ-19S 15 $10.20

PIN diode, BAR-64-05 8 $10.20

Tuning diode, BB-833 5 $5.84

Schottky Diode BAT-62 3 $15.70

Chip resistors, inductors and capacitors ~ 200 $0 (from laboratory)

solder --- $0 (from laboratory)

Others --- $100

Total cost $534.05

Table 3.1.1

56

Equipments used:

Microwave Network Analyzer

Microwave Signal Generator

Microwave Spectrum Analyzer

Cathode Ray Oscilloscope

DC Power Supply

Software used:

Agilent Advanced Design System 2004

IE3D

57

H. Discussions and Conclusions Interference

In the design of RFID interrogator for passive tags, a more complex design of the

interrogator trades off for the simple design of passive tags. For example, on one hand, tags

do not require generating carrier signal nor doing frequency translation, they can

communicate with the interrogator by back scattering. On the other hand, it is very difficult

for the interrogator to distinguish back-scattered signal from various types of interference.

In order to suppress the interference, hence, increase the detection range, the isolation

between the transmitting path and the receiving path is very important. In my design, I have

suggested a solution to due with this problem but how good is it is still a question.

There is a difficulty to simulate the system because it involves high carrier frequency and

base-band algorithm, therefore only transient analysis can be used but the computation power

required for the simulation will be extremely large.

An alternative is to assume the phase canceling loop works perfect and to use low

frequency signal to represent the envelope of the carrier frequency. I have tested the system

by this method in software simulator. It works as expected.

Design Technique

Software simulators play an important role through the whole project. Luckily,

58

simulators usually accurately predict the behavior of the circuit provide that the software

model of those components exist.

Measurement

When the RF power is large, say, above 20dBm, measurement becomes more difficult,

because the maximum power output of the microwave signal generator is 20dBm only. In

addition, RF cables become very lossy at high power. The loss can be as high as 5dB, which is

a disaster.

Other equipments, like network analyzer and spectrum analyzer, are easy to use and give

precious data.

What I have learned

I this project, I have learned many things. It strengthens my practical experience in

microwave circuit design.

Firstly, I learned how to start a project by following the international standard of a

product. Secondly, estimate system performance and design parameters for each functional

block set. Thirdly, simulate individual functional block by software simulator. Fourthly, carry

out measurements by various instruments. Finally, record design procedures and measurement

results. Also, writing project.

59

I. Reference [1] Guillermo Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, second

edition

[2] http://www.daycounter.com/Calculators/Complete-RF-Amplifier-Design-Analysis-Calcula

tor.phtml

[3] http://ihome.cuhk.edu.hk/~s026680/MWcal.htm

[4] Constantine A. Balanis, .Antenna theory: analysis and design, 1938.

[5] David M. Pozar. Pozar, David M, Microwave engineering

[6] http://www.odyseus.nildram.co.uk/RFMicrowave_Circuits_Files/Attenuator.pdf

[7] Information technology automatic identification and data capture techniques — Radio

frequency identification for item management air interface — Part 6: Parameters for air

interface communications at 860-960 MHz, ISO/IEC FDIS 18000-6:2003(E)

[8] K. Kurokawa, “Some Basic Characteristics of Broadband Negative Resistance Oscillator

Circuits,” The Bell System Technical Journal, July 1969.

60

J. Appendices 1. Equation of maximum detection range

Let R be reader, T be tag, d be the distance between reader and tag, S be the received

signal power, n be the ratio of transmitting power coupled to LNA (interference). Also, P be

power and G be gain.

In forward transmission path,

Power density at Tag 24)(

dGPP RR

d ×××

=π

#A

Power received by Tag πλ

××

×=×=4

)(2

TdTdT

GPAPP #B

In backscattering path

Assume the tag backscatter all the power.

Power density at Reader 20 4)(

dGPP TT

×××

=π

#C

Power received by Reader πλ

××

×=×=4

)(2

00R

RGPAPS #D

Solving #A, #B, #C and #D, gives

4

4222

2

2

2 )4(4444 dGGPG

dGG

dGPS TRRRTTRR

×××××

=××

×××

×××

××××

=π

λπλ

ππλ

π #E

πλ

×××

×⎟⎠⎞

⎜⎝⎛=

4

41TRR GG

SPd #F

RPnS ×≥ is necessary in order to detect the backscattered signal. It is discussed in the

Challenge and Solution section, therefore,

πλ

×××

×⎟⎠⎞

⎜⎝⎛=

41)(

41TR GG

ndMax #1

61

2. Simulating result of 16 elements patch array antenna

Figure 4.2.1 shows the return loss, S11, of the 16-element patch antenna array. At the

desired frequency, the return loss is 17dB.

Return loss (S11)

Figure 4.2.1

62

Figure 4.2.2 shows the 3D diagram of the directivity of the 16-element patch antenna

array. The directivity is 16.6dBi

Directivity

Figure 4.2.2

63

Figure 4.3.3 shows the 3D diagram of the gain directivity of the 16-element patch

antenna array. The maximum gain is 11.5dBi

Gain

Figure 4.3.3

Efficiency of the antenna = 11.52 dB - 16.6 dB = -5.08 dB = 31 % #J

64

3. Stabilization of HBFP0405

Figure 4.3.1 shows the source and load stability circles on smith chart before

stabilization. Red circles show the source and load stability circles from 100 MHz to 5 GHz.

Circles in other colors show the gain of source and load conjugate matching. They overlap

with stability circles.

Source and Load stability circles before stabilization

Figure 4.3.1

The amplifier is conditionally stable and unilateral conjugate matching cannot be

applied.

65

Figure 3.3.2 shows the source and load stability circles on smith chart after stabilization.

The amplifier is still conditionally stable, fortunately, unilateral conjugate matching of source

and load at 866 MHz are located in the stable region for all the frequencies.

Source and Load stability circles after stabilization

Figure 4.3.2

66