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i) Power Supply.ii) IR Trace passing.iii) Signal conditioning.iv) Motor Feedback.v) LED Indicator.vi) PMDC motor.vii) Bi-directional DC motor Driver.viii) Serial Interface Unit.ix) Mother Board.x) 4-input AND gate.xi) 4X3 Matrix keyboard Interface.xii) LCD Interface.xiii) Buzzer driver.
4. FUTURE EXPANSION5. CONCLUSION6. APPENDIX
DC MOTOR
2 31
58
64
8 93
7
0 #*
KEYBOARD
IR TX IR RX
IR TX
IR RX
BI-DIRECTIONAL
MOTOR DRIVER
MOTHER BOARD
BUZZER DRIVER
L.C.D
S.I.U
RFIDREADER
RFID CARD
POWERSUPPLY
+5V +12V
BUZZER DRIVER
ENTRY
EXIT
BLOCK DIAGRAM
1. INTRODUCTION
In the present scenario security and access control is one of the major application area
in the consumer and industrial segments. The access control system can be designed
with different technology. The manual password entry type system, barcode type
system, magnetic strip type system, RFID tag based system, Finger print reader based
system and finally retina scanning based system. Among all of these technologies the
RFID based system is best and economical.
A significant advantage of RFID devices over the others mentioned above is that
the RFID device does not need to be positioned precisely relative to the scanner. We're
all familiar with the difficulty that store checkout clerks sometimes have in making sure
that a barcode can be read. And obviously, credit cards and ATM cards must be swiped
through a special reader. In contrast, RFID devices will work within a few feet (up to 20
feet for high-frequency devices) of the scanner.
RFID technology has been available for more than fifty years. It has only been recently
that the ability to manufacture the RFID devices has fallen to the point where they can
be used as a "throwaway" inventory or control device.
One reason that it has taken so long for RFID to come into common use is the lack of
standards in the industry. Most companies invested in RFID technology only use the
tags to track items within their control; many of the benefits of RFID come when items
are tracked from company to company or from country to country.
Credit card companies are claiming the following advantages for contact less credit
cards:
The card is faster to use. To make a purchase, the card owner just waves his
card over the RFID reader, waits for the acceptance indicator - and goes on his
way. American Express, visa and Mastercard have all agreed to waive the
signature requirement for contact less credit card transactions under $25.
If you want to look at the numbers, here is where this technology is taking us in
our need for speed (average transaction speeds):
1. Contact less credit card transaction: 15 seconds
2. Magnetic strip card transaction: 25 seconds
3. Cash transaction: 34 seconds
The contact less cards uses highly secure data transmission standards.
Contact less cards make use of the most secure encryption standards practical
with current technology. 128-bit and triple DES encryption makes it nearly
impossible for thieves to steal your data.
The contact less card never transmits your card number
Instead, the RFID chip within the card creates a unique number for the
transaction; if a criminal intercepted the number, it would be useless even if
successfully decrypted.
Contact-less cards probably use other measures
although this is just speculation, there are certainly other ways to secure the data
on the card. For example, the RFID reader that sits on the merchant's counter
may use some sort of special signal, or offer a special set of frequencies, that
would be difficult for a thief with an off-the-shelf reader to duplicate. One
additional fact that is known about contact less cards is definitely an advantage
for merchants - consumers may feel otherwise. In a 2004 study, the average
number of transactions at a retail location rose by about one percent, and the
average "spend" rose fifteen percent for all contact less credit card users. So, it
appears that there is a correlation between ease of use and total spending.
Contact less Credit Card Disadvantages
The following disadvantages have been noted with contact less credit cards:
Contact less cards are more exposed than regular credit cards.
If you want to keep your credit card secure, you could keep it safely in an
enclosed wallet or purse; thieves would have absolutely no way to even know if
you have a credit card. However, a thief armed with a suitable reader, within a
few feet of you, would be able to interrogate all of the cards in your wallet or
purse without your knowledge.
Also, a regular credit card transaction is fairly secure; the magnetic strip is
swiped at very close range (less than a millimeter). However, a thief with a
suitable reader could monitor your contact less card transaction while standing at
the counter with you, or just behind you.
These concerns have, of course, been carefully noted by credit card companies.
The RFID chip in the contact less credit card responds to the merchant reader
with a unique number used for that transaction only; it does not simply transmit
the consumer's account number. This number is also encrypted.
It is easier to spend. Studies have demonstrated that consumers will be more
likely to spend, and will spend more frequently, with contact less credit cards.
Privacy advocates are particularly concerned about this technology; it is feared that
having this much information available "in the open air" will lead inevitably to problems.
2. DESIGN PRINCIPLE
RFID stands for Radio-Frequency Identification. The acronym refers to small
electronic devices that consist of a small chip and an antenna. The chip typically is
capable of carrying 2,000 bytes of data or less.
The RFID device serves the same purpose as a bar code or a magnetic strip on the
back of a credit card or ATM card; it provides a unique identifier for that object. And, just
as a bar code or magnetic strip must be scanned to get the information, the RFID
device must be scanned to retrieve the identifying information.
How does RFID work? A Radio-Frequency Identification system has three parts:
A scanning antenna
A transceiver with a decoder to interpret the data
A transponder - the RFID tag - that has been programmed with information.
The scanning antenna puts out radio-frequency signals in a relatively short range. The
RF radiation does two things:
It provides a means of communicating with the transponder (the RFID tag) AND
It provides the RFID tag with the energy to communicate (in the case of passive
RFID tags).
This is an absolutely key part of the technology; RFID tags do not need to contain
batteries, and can therefore remain usable for very long periods of time (maybe
decades).
The scanning antennas can be permanently affixed to a surface; handheld antennas are
also available. They can take whatever shape you need; for example, you could build
them into a door frame to accept data from persons or objects passing through.
When an RFID tag passes through the field of the scanning antenna, it detects the
activation signal from the antenna. That "wakes up" the RFID chip, and it transmits the
information on its microchip to be picked up by the scanning antenna.
In addition, the RFID tag may be of one of two types. Active RFID tags have their own
power source; the advantage of these tags is that the reader can be much farther away
and still get the signal. Even though some of these devices are built to have up to a 10
year life span, they have limited life spans. Passive RFID tags, however, do not require
batteries, and can be much smaller and have a virtually unlimited life span.
RFID tags can be read in a wide variety of circumstances, where barcodes or other
optically read technologies are useless.
The tag need not be on the surface of the object (and is therefore not subject to
wear)
The read time is typically less than 100 milliseconds
Large numbers of tags can be read at once rather than item by item.
Here in this sub section Bi-directional Dc motor driver is configured as relay driver to
remove the loading effect from input to output circuit.
Here we drive a PMDC motor in both the direction using two electromagnetic
relay. When relay1 will ON it rotate in clockwise direction and when relay2 will ON it
rotate in anti clockwise direction of particular motor.
The operation of the relay driver is given below:
Relay driver:
This application is in some ways a continuation of he discussion introduced for diodes
how the effects of inductive kick can be minimized through proper design. In the below
figure (a), a transistor is used to established the current necessary to energize the relay
in the collector circuit. With no input at the base of the transistor, the base current,
collector current, and the coil current are essentially 0A, and the relay sits in the
unenergized state (normally open, NO).
However when a positive pulse is applied to the base, the transistor turns ON,
establishing sufficient current through the coil of the electromagnet to close the relay.
Problem can be now develop when the signal is removed from the base to turn OFF the
transistor and de-energized the relay. Ideally, the current through he coil and the
transistor will quickly drop to zero, the arm of the relay will be released, and the relay
will simply remain dormant until the next “ON” signal. However we know from our basic
circuit courses that the current through the coil cannot change instantaneously, and in
fact the more quickly changes, greater the induced voltage across the coil as defined
by,
VL = L (diL / dt).
In this case, the rapid changing current through the coil will develop a large voltage
across the coil with the polarity shown in figure (a), which will appear directly across the
output of the transistor. The chances are likely that its magnitude will exceeds the
maximum ratings of the transistor, and the semiconductor device will be permanently
damaged. The voltage across the coil will not remain at its highest switching level but
will oscillate as shown until its level drops to zero as the system settles down.
The destructive action can be subdued by placing a diode across the coil as
shown in below figure (b). During the “ON” state of the transistor, the diode is back
biased: it sits like an open circuit and does not affect the thing. However, when the
transistor turns “OFF”, the voltage across the coil will reverse and will forward biased
the diode, placing the diode in its “ON” state. The current through the inductor
established during “ON” state of the transistor can then continue to flow through the
diode, eliminating the severe change in current level. Because the inductive current is
switched to diode almost instantaneously after the “OFF” state is established, the diode
must have a current rating to match the current through the inductor and the transistor
when is in “ON” state. Eventually, because of the resistive elements in the loop,
including the resistance of the coil windings and the diode, the high frequency (quickly
oscillating) variation in voltage level across the coil will decay to zero and the system
will settle down.
RbV i Q1
NC
-
COMVL
NO
V cc
+
At turn-off
VCE ≈ VL
+
-
(a)
Vi
t
VON
VOFF
Trouble!
VL
t
High voltage spike
At turn OFF
(b)
When transistor turned “OFF”
VL
Rb
+
V i Q1
NC
COM
NO-
V cc
D1
10u F
RELAY DRIVER
1.5K
BC 547
DATAINPUT
IN 4007
REL A Y SPDT
35
412
V CC
Circuit operation:
At normal condition the output of the controller is low thus making the relay driver
transistor is in off condition means relay is in de-energized condition means the
contactor point i.e. COM & NC is in that position means is in same potential.
When the RFID card is swap, the controller sends a high bit to the one of the input of
the motor driver (relay driver). Then that signal goes to the bi-directional dc motor driver
means to the base of the transistor driver (Relay driver) as shown in below figure.
Whenever a high voltage appears at the input of the base of the particular transistor
driver (Relay driver) thus the transistor goes to ON condition then making the particular
relay in energized condition which gives a (+VE) potential voltage to the particular load
(DC motor) and the DC motor moves in forward direction means the gate is open.
Whenever the authorized passes or interrupts the trace-passing ckt, the
controller sends a high bit to the base of another input of the motor driver (relay driver).
Then that signal goes to the bi-directional dc motor driver means to the base of the
transistor driver (Relay driver) as shown in below figure. Whenever a high voltage
appears at the input of the base of the particular transistor driver (Relay driver) thus the
transistor goes to ON condition then making the particular relay in energized condition
which gives a (-VE) potential voltage to the particular load (DC motor) and the DC motor
moves in reverse direction means the gate is closed.
BC 547
V cc=+12V
1N
40
07
+
MOTOR DRIVER
V cc=+12V
1k
L ED
1.5k
L ED
RE
LA
Y-0
2
BC 547
RE
LA
Y-0
1
1k
10
uF
10
uF
MV cc=+12V
1.5k
-
1N
40
07
viii) Serial Interface Unit:
Introduction:
Serial port is a popular means of transmitting data between a computer and a peripheral device such as a programmable instrument or even another computer. Serial communication uses a transmitter to send data, one bit at a time, over a single communication line to a receiver. You can use this method when data transfer rates are low or you must transfer data over long distances. Serial communication is popular because most computers have one or more serial ports, so no extra hardware is needed other than a cable to connect the instrument to the computer or two computers together.
Figure 1: 1: RS-232 Instrument,2: RS-232 Cable, 3: Serial Port
Serial communication requires that you specify the following four parameters:
The baud rate of the transmission The number of data bits encoding a character The sense of the optional parity bit The number of stop bits
Each transmitted character is packaged in a character frame that consists of a single start bit followed by the data bits, the optional parity bit, and the stop bit or bits. Figure 2 shows a typical character frame encoding the letter m.
Figure 2
Baud rate is a measure of how fast data are moving between instruments that use serial communication. RS-232 uses only two voltage states, called MARK and SPACE. In such a two-state coding scheme, the baud rate is identical to the maximum number of bits of information, including control bits, that are transmitted per second.
MARK is a negative voltage, and SPACE is positive. Figure 2 shows how the idealized signal looks on an oscilloscope. The following is the truth table for RS-232: Signal>3V=0 Signal>-3V=1
The output signal level usually swings between +12 V and -12 V. The dead area between +3 V and -3 V is designed to absorb line noise.
A start bit signals the beginning of each character frame. It is a transition from negative (MARK) to positive (SPACE) voltage. Its duration in seconds is the reciprocal of the baud rate. If the instrument is transmitting at 9,600 baud, the duration of the start bit and each subsequent bit is about 0.104 ms. The entire character frame of eleven bits would be transmitted in about 1.146 ms.
Data bits are transmitted upside down and backwards. That is, inverted logic is used, and the order of transmission is from least significant bit (LSB) to most significant bit (MSB). To interpret the data bits in a character frame, you must read from right to left and read 1 for negative voltage and 0 for positive voltage. This yields 1101101 (binary) or 6D (hex). An ASCII conversion table shows that this is the letter m.
An optional parity bit follows the data bits in the character frame. The parity bit, if present, also follows inverted logic, 1 for negative voltage and 0 for positive voltage. This bit is included as a simple means of error handling. You specify ahead of time whether the parity of the transmission is to be even or odd. If the parity is chosen to be odd, the transmitter then sets the parity bit in such a way as to make an odd number of ones among the data bits and the parity bit. This transmission uses odd parity. There are five ones among the data bits, already an odd number, so the parity bit is set to 0.
The last part of a character frame consists of 1, 1.5, or 2 stop bits. These bits are always represented by a negative voltage. If no further characters are transmitted, the line stays in the negative (MARK) condition. The transmission of the next character frame, if any, is heralded by a start bit of positive (SPACE) voltage.
RS-232 Waveforms
So far we have introduced RS-232 Communications in relation to the PC. RS-232 communication is asynchronous. That is a clock signal is not sent with the data. Each word is synchronized using it's start bit, and an internal clock on each side, keeps tabs on the timing.
The diagram above, shows the expected waveform from the UART when using the common 8N1 format. 8N1 signifies 8 Data bits, No Parity and 1 Stop Bit. The RS-232 line, when idle is in the Mark State (Logic 1). A transmission starts with a start bit which is (Logic 0). Then each bit is sent down the line, one at a time. The LSB (Least Significant Bit) is sent first. A Stop Bit (Logic 1) is then appended to the signal to make up the transmission.
The diagram shows the next bit after the Stop Bit to be Logic 0. This must mean another word is following, and this is it's Start Bit. If there is no more data coming then the receive line will stay in it's idle state(logic 1). We have encountered something called a "Break" Signal. This is when the data line is held in a Logic 0 state for a time long enough to send an entire word. Therefore if you don't put the line back into an idle state, then the receiving end will interpret this as a break signal.
The data sent using this method, is said to be framed. That is the data is framed between a Start and Stop Bit. Should the Stop Bit be received as a Logic 0, then a framing error will occur. This is common, when both sides are communicating at different speeds.
The above diagram is only relevant for the signal immediately at the UART. RS-232 logic levels uses +3 to +25 volts to signify a "Space" (Logic 0) and -3 to -25 volts for a "Mark" (logic 1). Any voltage in between these regions (ie between +3 and -3 Volts) is undefined. Therefore this signal is put through a "RS-232 Level Converter". This is the signal present on the RS-232 Port of your computer, shown below.
Figure 5 : RS-232 Logic Waveform
The above waveform applies to the Transmit and Receive lines on the RS-232 port. These lines carry serial data, hence the name Serial Port. There are other lines on the RS-232 port which, in essence are Parallel lines. These lines (RTS, CTS, DCD, DSR, DTR, RTS and RI) are also at RS-232 Logic Levels.
RS-232 Cabling
Devices that use serial cables for their communication are split into two categories. These are DCE and DTE. DCE are devices such as a modem, TA adapter, plotter, and so on, while DTE is a computer or terminal. RS-232 serial ports come in two sizes, the D-Type 25-pin connector and the D-Type 9-pin connector. Both of these connectors are male on the back of the PC. Thus, you require a female connector on the device. Table 1 shows the pin connections for the 9-pin and 25-pin D-Type connectors.
The DB-9 connector is occasionally found on smaller RS-232 lab equipment. It is compact, yet has enough pins for the core set of serial pins (with one pin extra).
Note: The DB-9 pin numbers for transmit and receive (3 and 2) are opposite of those on the DB-25 connector (2 and 3). Be careful of this difference when you are determining if a device is DTE or DCE.
RS232 bit streams
The RS232 standard describes a communication method where information is sent
bit by bit on a physical channel. The information must be broken up in data words. The
length of a data word is variable. On PC's a length between 5 and 8 bits can be
selected. This length is the net to information length of each word. For proper transfer
additional bits are added for synchronisation and error checking purposes. It is
important, that the transmitter and receiver use the same number of bits. Otherwise, the
data word may be misinterpreted, or not recognized at all.
With synchronous communication, a clock or trigger signal must be present which
indicates the beginning of each transfer. The absence of a clock signal makes an
asynchronous communication channel cheaper to operate. Less line is necessary in the
cable. A disadvantage is that the receiver can start at the wrong moment receiving the
information. Resynchronization is then needed which costs time. All data received in the
resynchronization period is lost. Another disadvantage is that extra bits are needed in
the data stream to indicate the start and end of useful information. These extra bits take
up bandwidth.
Data bits are sent with a predefined frequency, the baud rate. Both the transmitter
and receiver must be programmed to use the same bit frequency. After the first bit is
received, the receiver calculates at which moments the other data bits will be received.
It will check the line voltage levels at those moments.
With RS232, the line voltage level can have two states. The on state is also known
as mark, the off state as space. No other line states are possible. When the line is idle,
it is kept in the mark state.
Start bit
RS232 defines an asynchronous type of communication. This means, that sending
of a data word can start on each moment. If starting at each moment is possible, this
can pose some problems for the receiver to know which is the first bit to receive. To
overcome this problem, each data word is started with an attention bit. This attention bit,
also known as the start bit, is always identified by the space line level. Because the line
is in mark state when idle, the start bit is easily recognized by the receiver.
Data bits
Directly following the start bit, the data bits are sent. A bit value 1 causes the line to
go in mark state, the bit value 0 is represented by a space. The least significant bit is
always the first bit sent.
Parity bit
For error detecting purposes, it is possible to add an extra bit to the data word
automatically. The transmitter calculates the value of the bit depending on the
information sent. The receiver performs the same calculation and checks if the actual
parity bit value corresponds to the calculated value. This is further discussed in another
paragraph.
Stop bits
Suppose that the receiver has missed the start bit because of noise on the
transmission line. It started on the first following data bit with a space value. This causes
Basically, the parity bit can be calculated in two ways. When even parity is used, the
number of information bits sent will always contain an even number of logical 1's. If the
number of high data bits is odd, a high value parity bit is added, otherwise a low bit will
be used.
Odd parity
The odd parity system is quite similar to the even parity system, but in this situation, the
number of high bits will always be odd.
RS-232 Level Converters
Almost all digital devices which we use require either TTL or CMOS logic levels. Therefore the first step to connecting a device to the RS-232 port is to transform the RS-232 levels back into 0 and 5 Volts. As we have already covered, this is done by RS-232 Level Converters.
Two common RS-232 Level Converters are the 1488 RS-232 Driver and the 1489 RS-232 Receiver. Each package contains 4 inverters of the one type, either Drivers or Receivers. The driver requires two supply rails, +7.5 to +15v and -7.5 to -15v. As you could imagine this may pose a problem in many instances where only a single supply of +5V is present. However the advantages of these I.C's are they are cheap.
Above: (Figure 6) Pinouts for the MAX-232,RS-232 Driver/Receiver.
Right: (Figure 7) Typical MAX-232 Circuit.
Another device is the MAX-232. It includes a Charge Pump, which generates +10V and -10V from a single 5v supply. This I.C. also includes two receivers and two transmitters in the same package. This is handy in many cases when you only want to use the Transmit and Receive data Lines. You don't need to use two chips, one for the receive line and one for the transmit. However all this convenience comes at a price, but compared with the price of designing a new power supply it is very cheap.
There are also many variations of these devices. The large value of capacitors are not only bulky, but also expensive. Therefore other devices are available which use smaller capacitors and even some with inbuilt capacitors. (Note : Some MAX-232's can use 1 micro farad Capacitors). However the MAX-232 is the most common, and thus we will use this RS-232 Level Converter in our examples.
Circuit operation:
In this sub section S.I.U shown in the below figure the output of the RFID Reader is
fed to the Microcontroller through a SIU circuit, because the transition output signal of
the RFID Reader is not compatible with the Microcontroller serial port. The SIU unit will
converts the TTL output signal into serial transition output signal which is compatible
with the serial port of the controller.
At normal condition, the controller continuously scans or search a serial data to the
RFID reader through SIU unit during the non-swap of the RF tag card at the receiver.
The LCD display the alpha numeric letter on the LCD screen.
Whenever the RF tag card is swap at the RFID reader, the RFID reader reads the
serial data of particular tag and transmits a serial data to the controller through SIU
which converts serial data into a TTL logic level compatible to the serial port of the
controller.
5
TO SERIAL PORT
10uF
MAX2327
5
MOTHERBOARD
10
uF
2
2
1
10uF
10
V cc =+5v
10uF
3
P3.1(TxD)
163
8
CONNECTOR46
0.1
uF
SERIAL PORT INTERFACING(MAX232)
15
ix) Mother Board:
The motherboard of this project is designed with a MSC –51 core compatible micro
controller. The motherboard is designed on a printed circuit board, compatible for the
micro controller. This board is consisting of a socket for micro controller, input /output
pull-up registers; oscillator section and auto reset circuit.
Introduction
Despite it’s relatively old age, the 89C51 is one of the most popular Micro controller
in use today. Many derivatives Micro controllers have since been developed that are
based on--and compatible with--the 8051. Thus, the ability to program an 89C51 is an
important skill for anyone who plans to develop products that will take advantage of
Micro controller.
Many web pages, books, and tools are available for the 89C51 developer.
The 89C51 has three very general types of memory. To effectively program the 8051 it
is necessary to have a basic understanding of these memory types.
The memory types are illustrated in the following graphic. They are: On-Chip Memory,
External Code Memory, and External RAM.
On-Chip Memory refers to any memory (Code, RAM, or other) that physically exists on
the Microcontroller itself. On-chip memory can be of several types, but we'll get into that
shortly.
External Code Memory is code (or program) memory that resides off-chip. This is often
in the form of an external EPROM.
External RAM is RAM memory that resides off-chip. This is often in the form of
standard static RAM or flash RAM.
Code Memory
Code memory is the memory that holds the actual 8051 program that is to be run. This
memory is limited to 64K and comes in many shapes and sizes: Code memory may be
found on-chip, either burned into the Microcontroller as ROM or EPROM. Code may
also be stored completely off-chip in an external ROM or, more commonly, an external
EPROM. Flash RAM is also another popular method of storing a program. Various
combinations of these memory types may also be used--that is to say, it is possible to
have 4K of code memory on-chip and 64k of code memory off-chip in an EPROM.
When the program is stored on-chip the 64K maximum is often reduced to 4k, 8k, or
16k. This varies depending on the version of the chip that is being used. Each version
offers specific capabilities and one of the distinguishing factors from chip to chip is how
much ROM/EPROM space the chip has.
However, code memory is most commonly implemented as off-chip EPROM. This is
especially true in low-cost development systems and in systems developed by students.
Programming Tip: Since code memory is restricted to 64K, 89C51 programs are
limited to 64K. Some assemblers and compilers offer ways to get around this limit when
used with specially wired hardware. However, without such special compilers and
hardware, programs are limited to 64K.
External RAM
As an obvious opposite of Internal RAM, the 89C51 also supports what is called
External RAM.
As the name suggests, External RAM is any random access memory which is found off-
chip. Since the memory is off-chip it is not as flexible in terms of accessing, and is also
slower. For example, to increment an Internal RAM location by 1 requires only 1
instruction and 1 instruction cycle. To increment a 1-byte value stored in External RAM
requires 4 instructions and 7 instruction cycles. In this case, external memory is 7 times
slower!
What External RAM loses in speed and flexibility it gains in quantity. While Internal RAM
is limited to 128 bytes (256 bytes with an 8052), the 8051 supports External RAM up to
64K.
Programming Tip: The 8051 may only address 64k of RAM. To expand RAM beyond
this limit requires programming and hardware tricks. You may have to do this "by hand"
since many compilers and assemblers, while providing support for programs in excess
of 64k, do not support more than 64k of RAM. This is rather strange since it has been
my experience that programs can usually fit in 64k but often RAM is what is lacking.
Thus if you need more than 64k of RAM, check to see if your compiler supports it-- but if
it doesn't, be prepared to do it by hand.
On-Chip Memory
As mentioned at the beginning of this chapter, the 89C51 includes a certain amount of
on-chip memory. On-chip memory is really one of two types: Internal RAM and Special
Function Register (SFR) memory. The layout of the 89C51's internal memory is
presented in the following memory map:
As is illustrated in this map, the 8051 has a bank of 128 bytes of Internal RAM. This
Internal RAM is found on-chip on the 8051 so it is the fastest RAM available, and it is
also the most flexible in terms of reading, writing, and modifying it’s contents. Internal
RAM is volatile, so when the 8051 is reset this memory is cleared.
The 128 bytes of internal ram is subdivided as shown on the memory map. The first 8
bytes (00h - 07h) are "register bank 0". By manipulating certain SFRs, a program may
choose to use register banks 1, 2, or 3. These alternative register banks are located in
internal RAM in addresses 08h through 1Fh. We'll discuss "register banks" more in a
later chapter. For now it is sufficient to know that they "live" and are part of internal
RAM.
Bit Memory also lives and is part of internal RAM. We'll talk more about bit memory very
shortly, but for now just keep in mind that bit memory actually resides in internal RAM,
from addresses 20h through 2Fh.
The 80 bytes remaining of Internal RAM, from addresses 30h through 7Fh, may be
used by user variables that need to be accessed frequently or at high-speed. This area
is also utilized by the Microcontroller as a storage area for the operating stack. This fact
severely limits the 8051’s stack since, as illustrated in the memory map, the area
reserved for the stack is only 80 bytes--and usually it is less since this 80 bytes has to
be shared between the stack and user variables.
SFR Descriptions
There are different special function registers (SFR) designed in side the 89C51 micro
controller. In this micro controller all the input , output ports, timers interrupts are
controlled by the SFRs. The SFR functionalities are as follows.
This section will endeavor to quickly overview each of the standard SFRs found in the
above SFR chart map. It is not the intention of this section to fully explain the
functionality of each SFR--this information will be covered in separate chapters of the
tutorial. This section is to just give you a general idea of what each SFR does.
P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of this
SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 0
is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high
level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and P3), if your
hardware uses external RAM or external code memory (i.e., your program is stored in
an external ROM or EPROM chip or if you are using external RAM chips) you may not
use P0 or P2. This is because the 8051 uses ports P0 and P2 to address the external
memory. Thus if you are using external RAM or code memory you may only use ports
P1 and P3 for your own use.
SP (Stack Pointer, Address 81h): This is the stack pointer of the Microcontroller. This
SFR indicates where the next value to be taken from the stack will be read from in
Internal RAM. If you push a value onto the stack, the value will be written to the address
of SP + 1. That is to say, if SP holds the value 07h, a PUSH instruction will push the
value onto the stack at address 08h. This SFR is modified by all instructions which
modify the stack, such as PUSH, POP, LCALL, RET, RETI, and whenever interrupts are
provoked by the Microcontroller.
Programming Tip: The SP SFR, on startup, is initialized to 07h. This means the stack
will start at 08h and start expanding upward in internal RAM. Since alternate register
banks 1, 2, and 3 as well as the user bit variables occupy internal RAM from addresses
08h through 2Fh, it is necessary to initialize SP in your program to some other value if
you will be using the alternate register banks and/or bit memory. It's not a bad idea to
initialize SP to 2Fh as the first instruction of every one of your programs unless you are
100% sure you will not be using the register banks and bit variables.
DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and DPH
work together to represent a 16-bit value called the Data Pointer. The data pointer is
used in operations regarding external RAM and some instructions involving code
memory. Since it is an unsigned two-byte integer value, it can represent values from
0000h to FFFFh (0 through 65,535 decimal).
Programming Tip: DPTR is really DPH and DPL taken together as a 16-bit value. In
reality, you almost always have to deal with DPTR one byte at a time. For example, to
push DPTR onto the stack you must first push DPL and then DPH. You can't simply
plush DPTR onto the stack. Additionally, there is an instruction to "increment DPTR."
When you execute this instruction, the two bytes are operated upon as a 16-bit value.
However, there is no instruction that decrements DPTR. If you wish to decrement the
value of DPTR, you must write your own code to do so.
PCON (Power Control, Addresses 87h): The Power Control SFR is used to control
the 8051's power control modes. Certain operation modes of the 8051 allow the 8051 to
go into a type of "sleep" mode, which requires much, less power. These modes of
operation are controlled through PCON. Additionally, one of the bits in PCON is used to
double the effective baud rate of the 8051's serial port.
TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control SFR is
used to configure and modify the way in which the 8051's two timers operate. This SFR
controls whether each of the two timers is running or stopped and contains a flag to
indicate that each timer has overflowed. Additionally, some non-timer related bits are
located in the TCON SFR. These bits are used to configure the way in which the
external interrupts are activated and also contain the external interrupt flags which are
set when an external interrupt has occurred.
TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure the
mode of operation of each of the two timers. Using this SFR your program may
configure each timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or
two separate timers. Additionally, you may configure the timers to only count when an
external pin is activated or to count "events" that are indicated on an external pin.
TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken together,
represent timer 0. Their exact behavior depends on how the timer is configured in the
TMOD SFR; however, these timers always count up. What is configurable is how and
when they increment in value.
TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken together,
represent timer 1. Their exact behavior depends on how the timer is configured in the
TMOD SFR; however, these timers always count up. What is configurable is how and
when they increment in value.
P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of this
SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 1
is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high
level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.
SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR is
used to configure the behavior of the 8051's on-board serial port. This SFR controls the
baud rate of the serial port, whether the serial port is activated to receive data, and also
contains flags that are set when a byte is successfully sent or received.
Programming Tip: To use the 8051's on-board serial port, it is generally necessary to
initialize the following SFRs: SCON, TCON, and TMOD. This is because SCON controls
the serial port. However, in most cases the program will wish to use one of the timers to
establish the serial port's baud rate. In this case, it is necessary to configure timer 1 by
initializing TCON and TMOD.
SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and
receive data via the on-board serial port. Any value written to SBUF will be sent out the
serial port's TXD pin. Likewise, any value which the 8051 receives via the serial port's
RXD pin will be delivered to the user program via SBUF. In other words, SBUF serves
as the output port when written to and as an input port when read from.
P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of this
SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 2
is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high
level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and P3), if your
hardware uses external RAM or external code memory (i.e., your program is stored in
an external ROM or EPROM chip or if you are using external RAM chips) you may not
use P0 or P2. This is because the 8051 uses ports P0 and P2 to address the external
memory. Thus if you are using external RAM or code memory you may only use ports
P1 and P3 for your own use.
IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable
and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the
specific interrupts, where as the highest bit is used to enable or disable ALL interrupts.
Thus, if the high bit of IE is 0 all interrupts are disabled regardless of whether an
individual interrupt is enabled by setting a lower bit.
P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of this
SFR corresponds to one of the pins on the Micro controller. For example, bit 0 of port 3
is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high
level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.