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Multiharmonic Tuning Behavior of
MOSFET RF Power Amplifiers
by Yucai Zhang
A thesis submitted in conformity with the requirements for the
degree of Master of Applied Science
Edward S. Rogers Sr. Department of Electrical and Computer
Engineering University of Toronto
2001
O Copyright by Yucai Zhang 2001
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Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
Master of Applied Science, 200 1
Yucai Zhang
Edward S. Rogers Sr. Department of Electrical and Cornputer
Engineering
University of Toronto
Abstract
This thesis investigates multiharmonic tuning of RF power
amplifiers using power
MOSFETs implemented in bulk silicon CMOS technology. The use of
this technique may
lead to the low-cost implementation of the RF power amplifier
integrated on the sarne chip
as the rest of the wireless transceiver.
The work proposes a complete classification of multiharmonic
tuning into fow basic
modes: both odd/even harmonics SHORT (SS), odd harmonics SHORT
and even harmonics
OPEN (SO), odd harmonics OPEN and even harmonics SHORT (OS), and
both oddeven
harmonics OPEN (00) . Conventional power amplifiers c m then be
characterized using
these modes of operation in so far as multiharmonic tuning is
concerned. A systematic
multiharmonic tuning optimization procedure is introduced to
find the optimal harmonic
terrninations.
The newly proposed 00 mode features a sinusoidal drain curent
waveform containing
no harmonics, resulting in little or no energy wasted at
harmonic fiequencies and yielding
high eficiency.
To study the multiharmonic tuning behavior of MOSFET RF power
amplifiers, power
MOSFETs were implemented in a 0.25pm silicon CMOS process. For
power amplifiers
using these MOSFETs, at 1.88GH2, the 00 mode yields the highest
efficiency (PAE4lYo)
with a 23.3dBm output power at a 12dBm input power and at a 2.OV
supply voltage.
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Acknowledgrnents
1 would like to express my sincere gratitude to Professor C.A.T.
Salama for his
insightful guidance and invaluable assistance throughout the
course of this work.
1 am indebted to Mr. J. Illowski, Mr. P. Watson and Mr. M.
Stubbs from Nortel
Networks for their technical advice and assistance with
load-pull measurements.
My appreciation extends to al1 the staff and students in the
Microelectronic Research
Laboratory. 1 am specially grateful to Jaro Pristupa for his
assistance with CAD tools and
Dana Reem for her technical assistance during the chip testing.
Thanks go to Anthoula
Kampouris, Richard Barber, Milena Khazak, Farhang Vessal, Mathew
Atekwana Amberetu,
Dusan Suvakovic, Mehrada Ramezani, Sotoudeh Hamedi-Hagh, John
Ren, Namdar Saniei
for al1 their help.
Thanks also to my wonderfùl fiiends who made my Iife at Uofï
pleasant and
unforgettable. Especially, 1 would like to express my
appreciation to Song Ye, Zhixian Jiao,
Rick Kubowicz and Wei An, for valuable discussion both
technically and personally, and
the rest of my fî-iends: Hongfei Lu, I-leng Jin, Shuo Chen, Wei
Yang, Mike Sheng, Edward
Chun Keung Yu, 1-Shan Michael Sun for constructive discussions
and cheerfbl chats.
Special thanks to my other fnends, Ting Lu, Jun Zhang, Tingju
Zhu, Yajuan Su,
Mengsi You, Jian Yang, for sharing both my hard tirne and good
time.
My deepest appreciation goes to my parents and sister for their
constant support and
encouragement.
This work was supported by the Natural Sciences and Engineering
Research Council of
Canada, Micronet, CITO, Gennwn, Mitel, Nortel Networks and PMC
Sierra.
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Table of Contents
Page
...............................................................................................
CHAPTER 1 Introduction 1
I . I RF Power Amplifiers for Wireless Communications
............................................. 2
..............................................................................................
1.2 RF Power Amplifiers 4
....................................................................
1.3 Objectives and Outline of the Thesis 1 1
CHAPTER 2 Theoretical Multiharmonic Tuning Behavior of MOSFET RF
Power Amplifiers
.....~..~.........b........................................ 14
2.1 Introduction
...........................................................................................................
14
...................................................................
2.2 Analysis of Power Amplifier Modes 1 4
....................................................... 2.2.1
Conventional Power Amplifier Modes 1 4
....................................... 2.2.2 Classification of
Multiharmonic Tuning Behavior 21
................................................... 2.3
Multiharmonic Tuning Optimization Procedure 23 2.4 Multiharmonic
Tuning Behavior of MOSFET PAS
.............................................. 25
...............................................................................................
2.4.1 Device Design 25 2.4.2 MHT Optimization for PAE
........................................................................
28
2.5 Summary
................................................................................................................
34
CHAPTER 3 Experimental Results
...........................................................................
*..38
3.1 Power MOSFET Implementation
.........................................................................
38
...............................................................................
3.2 Power Device Characteristics 41
.................................................................................
3.3 MOSFET PA Characteristics 45 3 -4 Summary
...............................................................................................................
-49
...........................................................................................
CHAPTER 4 Conclusions ...51
APPENDIX A Harmonic Load Pull Measurement
................................................ ....*53
iii
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List of Figures
Page
............................................... . Fig 1 . 1.
Block diagram of a generic digital RF transceiver 2
............................. Fig . 1.2. A generic schematic of
Class A.B. AB or C Power Amplifier 6
Fig . 1.3. RF power and drain eficiency as a lùnction of
conduction angle ....................... 7 Fig . 1.4. Class F power
amplifier with even harmonic trap
............................................... 8 Fig . 1.5. Power
and Efficiency contours vs . phases of TL of the MESFET PA
................. 9
.................................................................................
. Fig 1.6. Inverse Class F wavefoms 10
...............................................................................
Fig . 2.1 : Waveforms of Class A/B/C 1 5
Fig . 2.2. Waveforms of ideal Class F mode
.....................................................................
17 ....................................................... Fig .
2.3. Conceptual "target" waveforms of Class E 1 9
Fig . 2.4: (a) Schematic of basic (low-order) Class E power
amplifier
......................................................................................................
(b) Actual waveforms -20
.............................................. . Fig 2.5 :
Classification of multiharmonic tuning behavior -22
............................................................ . Fig
2.6. Basic circuit used in MHT optimization 24
............................ . Fig 2.7. Drain current for
different gate width (gate length=0.25pm) 26
........................................................ Fig . 2.8.
Modified BSIM3V3 CMOS device mode1 -27
Fig . 2.9. Schematic used in ADS simulator
......................................................................
28 ........................................ Fig . 2.10. PAE and
Pout contours for SS mode (Pin=12dBm) -30
........................................ Fig . 2.1 1 : PAE and Pout
contours for OS mode (Pin= 12dBm) 30
........................................ . Fig 2.12. PAE and Pout
contours for SO mode (Pin= 12dBm) 31
....................................... Fig . 2.1 3: PAE and Pout
contours for 00 mode (Pin= 12dBm) 31
Fig . 2.14. PAE. Pout and Gain vs . Pin of the MOSFET
................................................... 32
.................................... Fig . 2.15. Drain voltage and
current wavefoms in the 00 mode 32
.... Fig . 2.16. PAE and Pout contours vs . phases of TL of the
MOSFET power amplifier 33
...................................................... Fig . 3.1 :
RF MOS ce11 layout with substrate contacts 39
.......................................................................................
Fig . 3.2. RF input pad structure -39
.....................................................................................
. Fig 3.3. Layout of test structures 40
...............................................................................
Fig . 3.4. Micrograph of the test chip -40 ....... Fig . 3.5.
Ids-Vgs transfer characteristics of the MOSFET (W/L=200Opm/0.25pm)
41
....................................................... Fig .
3.6. Breakdown characteristics of the MOSFET 42 ...................
Fig . 3.7. IDs-VDs characteristics of the MOSFET
(W/L=200qim/0.25pm) 42
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.............................................................. .
Fig 3.8. fT andf,, of the CMOS power device 44
................................. Fig . 3.9. Harmonic on-wafer
load-pull measurement system setup 46
............................. . Fig 3.10. Measured
characteristics of the MOSFET power amplifier 48 . .
......................................................... Fig A 1 :
Harmonic Load Pull Measurement Setup -54
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List of Tables
Page
...............................................................
Table 1 . 1 : Characteristics of Wireless Standards 4 Table 2.1 :
Optimal ZL(oO) of the MOSFET
..................................................... optimized
for maximum PAE (Pin= 12dBm) 29 ............... Table 2.2.
Simulated characteristics of the power device and power amplifier
35
Table 3.1 : Measured and Simulated fT and f,,
............................................................... 44
............................. Table 3.2. Measured and simulated
performance of each MHT mode 47
.................. Table 3.3 : Measured and Simulated Parameters
of power MOSFET and PA 49
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Chapter 1: Introduction 1
Introduction
In addition to persona1 communication products such as pagers
and cellular phones,
wireless technology has impacted many other rapidly growing
markets, for instance,
wireless local area networks (WLANs), global positioning systems
(GPS), and RF
identification systems (RFIDs). A wide variety of system
standards have been adopted to
support these applications. The explosive market of wireless
communications is motivating
extensive research and design effort to develop communications
devices with increasingly
higher performance, lower cost and low power consurnption.
Wherever there are wireless communications, there are
transmitters; wherever there are
transmitters, there are RF power amplifiers. Power amplifiers
(PAS) are used to amplie the
signal being transmitted to the necessary level needed to drive
the antema at a particular
power output level, so that it can be received and decoded by
the receiver within a certain
geographical area. Power amplifiers typically dominate the power
consumption of the
transmitters (or transceivers), thus have critical impact on
system performance and cost,
especially in low-voltage, low-power portable applications.
Advances in conventional CMOS technology have made this
technology a promising
alternative for low-cost, low-voltage implementation and
integration of wireless transceiver
building blocks, such as Digital Signal Process (DSP) cores, Low
Noise Amplifiers,
Mixers, and other front-end ICs. However, RF power amplifiers,
the bottleneck of wireless
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 2
transceivers, are still being implemented in expensive GaAs
technologies or specific RF
LDMOS technologies, which prevent the integration of the power
amplifiers into
transceivers. To enable a single-chip transceiver implementation
and furiher reduce system
costs, it is highly desirable to develop RF power amplifiers h l
ly compatible with
conventional CMOS technologies.
1.1 RF Power Amplifiers for Wireless Communications
Power Amplifiers in Wireless Transceivers
Digital Voice Modulator
Voice Coding Pulse O) ,* cornPressior * Interieaving *
Shaping
I 1 Amplifier
Carrier
Down Converter
Ampl ifter Carrier
De-interleaving Voice 1
Decoding * Decompression - DAC - i Audio Speaker Amplifier
(b)
Fig. 1 . 1 : Block diagram of a generic digital RF transceiver
(a) transmitter, (b) receiver
A generic digital RF transceiver is s h o w in Fig. 1 .la. On
the transmitter side (Fig.
l.la), the voice signal is first digitized by an
analog-to-digital converter (ADC) and
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 3
compressed to reduce the bit rate and hence the required
bandwidth. Then, the data
undergoes "coding" and "interleaving" to format the data such
that the receiver can detect
and minimize errors by performing the reverse process. Since
rectangular pulses are usually
not optimum for modulation, the data is "shaped and modulated by
the RF carrier
fiequency. After filtering, the signal is applied to the power
amplifier which drives the
antenna. As illustrated in Fig. 1.1 b, on the receiver side, the
signal received by the antenna
is amplified, downconverted, and digitized. Subsequently,
demodulation, equalization,
decoding, de-interleaving, and decompression are performed in
the digital domain. The
resulting data is then converted to an analog signal by a
digital-to-analog converter (DAC),
amplified, and applied to the speaker.
Wireless Communication Modulation Schemes
The type of power amplifier in a wireless system depends on the
type of modulation
standard used in the system. Digital modulation with binary
baseband waveforms can be
performed by one of the following methods [ 1 ] : Amplitude
Shift Keying (ASK), Frequency
Shift Key ing (FSK), Phase Shi fi Key ing (PSK), or Quadrature
Amplitude Modulation
(QAW
In many applications, "quadrature modulation" is used to reduce
the bandwidth
requirement [2]. Quadrature modulation includes two broad
categories: quadrature phase
shift keying (QPSK) and minimum shift keying (MSK). QPSK
includes specific options
such as Offset QPSK (OQPSK) and d4-QPSK. MSK has a widely used
subset known as
Gaussian MSK (GMSK).
These modulation schemes fa11 into two general categories:
linear modulation and
constant envelope modulation, depending on the envelope shape of
the modulated
waveforms. In linear modulation schemes, such as QPSK and QAM,
the abrupt phase
changes in the modulated waveform result in envelope variations
if a filtcr limits the
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: introduction 4 - - -
bandwidth. Such variations in turn require a linear power
amplifier to avoid spectral
degradation. On the other hand, constant envelope modulation
signals, such as FSK and
GMSK signals, c m be processed by high efficiency noniinear
power arnplifiers. Table 1.1
lists some of the characteristics of several wireless standards
such as Digital European
Cordless Telephone (DECT), Personal Handyphone System (PHs),
Personal
Communications Services at l9OOMHz (PCS 1900) and Universal
Digital Portable
Communications (UDPC). The power amplifiers to be studied in
this thesis target non-
linear power arnplifiers used in conjunction with constant
envelope modulation schemes.
Table 1.1 : Charactenstics of Wireless Standards [3,4]
1 Standard II DECT 1 P H s 1 PCS1900 1 UDPC 1
1.2 RF Power Amplifiers
Modulation
Envelope
Power Amp
Power Amplifier Metrics
The most commonly used metric to characterize the efficiency of
a power amplifier is
the Power Added Eficiency (PAE), which is defined as
FSK
constant
non-linear
PAE = POUT -Pm p~~
where Pour is the RF power delivered to the load, PIN is the
available input power and PDc
is the total power taken fiom the DC supply.
d4-QPSK
variable
linear
Another metric of efficiency is the drain (or collector)
efficiency given by
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Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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GMSK
constant
non- linear
d4-QPSK
variable
linear
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Chapter 1: Introduction 5 - - -- -
Linearity is another concem in power arnplifier design. When the
input power is small,
the gain (POUdPIlv) of a power arnplifier is almost constant.
When the input power
increases, the output power is a compressive function of the
input due to the nonlinearity of
the amplifier, that is, the gain approaches zero for
sufficiently high input levels. The
nonlinearity of a power arnplifier can be characterized by the
"1-dB compression point",
defined as the input signal power level that causes the
smail-signal gain to drop by 1 dB.
Conventional Power Amplifiers (PAS)
Power amplifiers have been traditionally categorized as Class A,
B, AB, C, D, E, F and
S 151. They cm be classified into three families:
Unsaturated PA: The output power is a function of the input
power. This family
includes Class A, B, AB, C, and F. The power transistor in these
PAS operates as a
current source. Class A, AB, and B PAS may be used as linear
PAS, whereas Class C
power amplifiers are more nonlinear in nature.
Saturated PA (or switching-mode PA): This family includes Class
D, E, and S. In
these classes, the power transistor operates as a switch. The
transistor "on" voltage
is usually as close to zero as possible.
Mixed-mode PA: This family includes Class AB, B or C where the
power transistors
are over driven into gain compression at fûll output to improve
efficiency. The
transistor saturates during part of the "on" portion of the RF
cycle, acting as a
switch; for the rest period of the "on" portion, the transistor
operates as a current
source.
Fig. 1.2 shows a generic schematic of Class A, B, AB, or C power
arnplifier using a
MOSFET and a tuned load. The primary distinction between these
classes is the gate bias
voltage of the transistor that determines the fraction
(conduction angle a) of the RF cycle
for which the transistor conducts. For Class A power amplifiers,
the transistor is on for the
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 6
entire cycle (a=2n, device biased far above threshold VI),
whereas it is on for half the cycle
for Class B PAS (a-, device biased ai threshold), is on for
greater than half the cycle for
Class AB PAS (a-, device biased slighily above threshold), and
is on for less than half the
cycle for Class C PAS (a
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Chapter 1: Introduction 7
1.5 Po
Po(C1ass A) - -
1 .& +-- RF Power -
- - -
0.5 0% 27~ x Conduction angle
Class A AB B C
Fig. 1.3: RF power and drain efficiency as a function of
conduction angle. (optimum load, harmonic short and zero-Vsat
assumed)
classical PAS such that the voltage or current waveform of the
transistor is clipped
significantly at both ends [SI. Although undesirable distortion
is introduced, there can be
usefiil trade-off between eficiency enhancement and linearity
that can be utilized in low or
intermediate envelope amplitude applications. Appropriate
harmonic termination at the
output can also help enhancing the performance. An example
involves replacing the
sinewave voltage at the device output with a flatter,
square-like periodic waveform. This
can result in important benefits in both power and efficiency,
both of which can be traded
effectively for linearity. This method results in Class F power
amplifiers [ 5 ] and other
subtypes [6]. An implementation of Class F is show in Fig. 1.4,
where the basic structure is
that of a Class B power amplifier but with a quarterwave SCSS
(short-circuit shunt stub)
used as an even harmonic trap. A maximum esciency of 88.4% can
be achieved for such a
power amplifier using an ideal transistor.
In Class D, E, and S, the transistor acts as a switch. An ideal
switch has either zero
voltage across it or zero current through it, thus it consumes
no power. Therefore switching
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 8
RF Shon Vdc
l ' t l
Even Harmonic Trap W4) (SCSS) Series LC @Io
Input Match
RL
I
Fig. 1.4: Class F power amplifier with even harmonic trap
type power amplifiers have ideally 100940 eff~ciency. Class D
power amplifiers need a high-
side device which makes them unsuitable for RF applications,
both in terms of parasitic
reactances and drive requirements. Class E power amplifiers are
attracting attention in RF
communications applications [7,8]. Theoretical efficiency of
around 90% can be achieved,
but with an RF output power lower than that obtainable from the
same device in a
conventional Class AB power amplifier, and with a peak voltage
as high as 3.6 times the
DC supply. Class S power amplifiers are similar to a pulse-width
modulator with a low pass
filter at its output and are not suitable for high frequency
operation.
Multiharmonic Tuning of Power Amplifiers
The conventional power amplifier theones are generally based on
waveforrn analysis
for ideal power devices. However, real devices exhibit
parasitics such as finite on-state
resistance and output capacitance. Conventional PA theories
cannot be used to analysis the
effects of these parasitics on the overall PA performance, thus
preventing improvements in
PA performance.
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 9
Multiharmonic tuning techniques, combined with harmonic balance
simulations, have
recently been proposed for GaAs MESFET and HEMT power amplifiers
to provide M e r
insights in improving power amplifier performance[9-141. The key
idea is to control the
shape and overlap of the drain voltage ancilor current waveforms
using appropriate muhi-
harmonic terminations. Two kinds of multihannonic tuning
behavior were reported:
The first one is the widely known Class F. The drain voltage
waveform is square-
like. Staudinger et al. [9,10] studied the multiharmonic tuning
effect on a set of
GaAs MESFET power amplifiers. Fig. 1.5 shows the output power
and efficiency
contours versus the phases of TL at 200 and 3a0. The variations
of eficiency and
Po,, are insensitive to the phase of TL(3mn); in another words,
the results exhibit a
strong dependence of efficiency and output power on the second
harmonic
termination and a weaker dependence on the third and higher
hannonic
terminations. These results suggest that significant
improvements in linearity,
eficiency and output power c m be achieved with proper harmonic
terminations.
Specifically, the best performance can be obtained when the 2nd
harmonic is SHORT
and the 3rd harmonic is OPEN (Class F operation).
ma(r,@ - D.B AM@@ =O) - ~.t( (a) (b)
Fig. 1.5: Power and Eniciency contours vs. phases of load
reflection coefficients (rL) of the MESFET PA [IO]
Multiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
University of Toronto
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Chapter 1: Introduction 10
The second type is the opposite to the first one, Le., the 2nd
harmonic is OPEN and
the 3rd harmonic is SHORT. Or in generai, the drain current
waveform is square-
like, containing only odd harmonics, and the drain voltage
waveform containing
only even harmonics, as shown in Fig. 1.6. This type is referred
as Inverse Class F.
Drain Voltage
Fig. 1.6: Inverse Class F waveforms
This mode was first reported in power amplifiers using GaAs
MESFET or HEMT
power devices [11,12]. A more complete analysis of this type of
behavior was
performed recently [13,14]. The eficiency of power amplifiers in
this mode can be
expectcd to be higher than Class F. However, the peak drain
voltage swing is larger
than that in Class F and hence power devices with higher
breakdown voltages are
required.
Muitiharmonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 11
Unresolved Issues
Even though the multiharmonic tuning technique has been proposed
and successfully
used in power amplifier design, there are still some unresolved
issues. First, there is no
complete classification of multiharmonic tuning behavior.
Second, the relationship between
conventional power amplifier modes (Class AB, E, F, etc.) and
multiharmonic w i n g modes
is vague. Finally, there is no systematic procedure to find the
best mode and corresponding
optimal multiharmonic impedances for power amplifier design.
These issues restrict the
practical design of power amplifiers using multiharmonic tuning
techniques.
1.3 Objectives and Outline of the Thesis
As the channel length of a conventional MOS device is reduced
into the deep
submicron range, its high frequency performance improves and it
becomes attractive for
low-cost integrated implementations of RF power ampli fiers [16-
191.
The objective of this thesis is to study the multihmonic tuning
behavior of RF power
amplifiers using power MOSFETs implemented in conventional bulk
silicon CMOS
technologies. The MOSFET power amplifiers are targeted to
operate at 1.88GHz fiom a 2V
supply with an output power of 2OOmW suitable for wireless
applications.
In Chapter 2 the multiharmonic tuning behavior is analyzed and
classified into four
basic modes and conventional power amplifier modes are
characterized using this
classification. A systematic multiharmonic tuning optimization
procedure is proposed to
find the best mode and corresponding optimal harmonic
terminations. The multiharmonic
tuning behavior of bulk silicon MOSFET RF power amplifiers is
then studied by
simulation. The power devices used are implemented in a 0.25pm
CMOS process. Device
characterization and measured power amplifier performance are
then presented in Chapter 3
[20]. Finally, Chapter 4 summarizes the results and outlines
fbture work.
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Chapter 1: Introduction 12
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R. Pandya, "Mobile and Persona1 Communication Services and
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L. E. Larson, "RF and Microwave Circuit Design for Wireless
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Multiharrnonic Tuning Behavior of MOSFET RF Power Amplifiers
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Chapter 1: Introduction 13
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[17] D. Su and W. McFarland, "A 2.5-V 1-W Monolithic CMOS RF
Power Amplifier," IEEE Custom Integrated Circuits Conference,
Proceedings, pp. 1 89-1 92, 1997.
[18] T. Ohguro, M. Saito, E. Morifuji, K. Murakami, K.
Matsuzaki, T. Yoshitomi, T. Morim- oto, H.S. Momose, Y. Katsumata
and H. Iwai, "High eficiency 2 GHz power Si-MOS- FET design under
low supply voltage down to IV," IEEE Int. Electron Devices Meeting,
Technical Digest, pp.83-86, 1996.
[19] 1. Yoshida, M. Katsueda, Y. Maruyarna, and 1. Kohjiro, "A
Highly Escient 1.9-GHz Si High-Power MOS Amplifier," IEEE Trans.
Electron Devices, Vo1.45, pp.953-956, 1998.
[20] Y.-C. Zhang and C. A. T. Salama, "Multiharmonic Tuning
Behavior of MOSFET RF Power Amplifiers," IEEE MTT-S [nt. Microwave
Symp., May 2001.
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Chapter 2: Theoretical Multiharrnonic Tuning Behavior of MOSFET
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CHAPTER 2
Theoretical Multiharmonic Tuning Behavior of MOSFET RF Power
Amplifiers
2.1 Introduction
In this chapter the conventional power amplifier modes and
multiharmonic tuning
modes are analyzed. Multiharmonic tuning is then classified into
four basic modes and
conventional power arnplifiers are characterized using this
classification. A systematic
multiharmonic tuning optimization procedure is proposed to find
the optimal fundamental
and harrnonic terminations. The multiharmonic tuning behavior of
MOSFET RF power
arnplifiers is then studied using the proposed multiharmonic
tuning optimization procedure.
2.2 Analysis of Power Amplifier Modes
2.2.1 Conventional Power Amplifier Modes
In this section each power amplifier mode is first analyzed in a
traditionai way and then
analyzed fiom a multiharmonic tuning point of view and the
requirements of load
impedance at the harmonic fiequencies are given.
Class A, B, AB and C
Class A, B, AB and C power amplifiers are the conventional power
arnplifiers. In these
PAS the drain voltage waveform is assumed to be sinusoidal. The
drain current can be
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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modeled as a complete or truncated sinewave of amplitude Im and
with a DC component Iq
as shown in Fig. 2.1.
Fig. 2.1 : Wavefonns of Class A/B/C (The value of a de fines the
class of operation)
In general, the drain current I (8 ) can be expressed as
where a ( O 5 a < 2n ) is the conduction angle (as defined on
page 5). The Fourier series
expansion o f this waveform is given by
where
is the DC component and
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where i l is the fundamental fiequency current and in (n>l)
is the n-th order harmonic
component.
The DC component of the drain current can be used to calculate
the average power
drawn fiom the power supply. With an appropnately designed load
network, only the
fiindamental component of the drain current will be fed to the
load resistor.
In order to obtain the maximum voltage swing at the drain, an
optimal load resistance
RL must be present at the drain. For a given a, RL is given
by
where Vdd is the drain supply voltage, V, is the MOSFET
saturation (knee) voltage and
iI(a) is the amplitude of the fundamental fiequency current for
the specified a.
The output power is
Given the above, the drain efficiency is
Vdd - Vsat , a - sina '1 =
V d d +in a - a cos 7 a>
Thus ideal Class AB power amplifiers have drain efficiency
ranging fiom 50% to 78% and
ideal Class C power ampli fiers have an efficiency ranging from
78% to 100%.
As stated previously, the classical PA modes assume a sinusoidal
drain voltage
waveform at the fundamental fiequency. The drain voltage V(0)
can be expressed as
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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where ZL is the load impedance, ZLO is the DC load resistance,
ZLi is the load
impedance at the fundamental fiequency, and ZLn ( n N ) is the
load impedance at the n-th
order harrnonic fiequency. The load impedance at al1 harmonic
fiequencies (ZLn (n>l))
MUST be ZERO (short circuit) in order to produce the required
sinusoidal waveform.
Class F
The sinusoidal drain voltage wavefom assurnption in the above PA
modes restricts the
efficiency and output power. If the drain voltage waveform is
shaped to reduce the overlap
of the voltage and current waveforms, a significant improvement
in efficiency and power
can be achieved [ 1 1.
In the Class F mode, improvements of both efficiency and output
power are
accomplished by using odd harmonics to cause the drain voltage
waveform to approximate
a square waveform and using even harmonics to cause the drain
current to approximate a
half sinusoid.
Drain Voltage
Fig. 2.2: Waveforms of ideal Class F mode
The ideal wavefoms are depicted in Fig. 2.2. The total
peak-to-peak drain voltage is
twice the supply voltage Vdd. The amplitude of the fundamental
component is given by
Fourier analysis as
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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The load network is designed so that only the fundamental
fiequency power can be
delivered to the load. Thus the output power is given by
where RL is the fundamental load resistance presented at the
drain. Note that the value of Vi
exceeds Vdd which indicates higher output power can be delivered
to the sarne fundamental
load RL compared to Class B mode. The eficiency of the ideal
Class F mode is 100%.
The presence of harmonics in the voltage/current waveforms
requires the correct load
impedances at the harmonic fiequencies. For ideal Class F mode,
since only odd harmonics
exist in the voltage waveform and only even harmonics exist in
the current waveform, the
load impedance should be M F N T E (open circuit) at ODD
harmonics and be ZERO (short
circuit) at EVEN harmonics.
It is practically diKicult to realize the waveforms of ideal
Class F mode. Other
alternatives of Class F mode utilize only the third harmonic
frequency (and the fifih
harmonic frequency) to maximally flatten the drain voltage
waveform to approximate a
square waveform [Il]. They require INFMTE load impedance at the
THlRD (and FIFTH)
harmonics and ZERO load impedance at EVEN harmonics. The
eficiency ranges from 88.4%
(for using only the third harmonic) to 92% (for using both the
third and fifth harrnonics).
Class E
Power amplifier eficiency is maximized by minimizing power
dissipation, while
providing a desired output power. The largest power dissipation
occurs usually in the RF
power transistor and is determined by the average integration of
the product of transistor
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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voltage and transistor current over the RF period. This power
dissipation can be minimized
by avoiding simultaneous occurrence of high voltage and high
current. Fig. 2.3 shows the
conceptual transistor voltage and current waveforms needed to
meet the high eficiency
requirements. For this case,
Drain Current
7 ; switch : a I I
I on state ; I I I Drain I I I I
1 I 1 Voltage I I I
1 I I I I I I I I ~ i m e D
0 x 2n 3x 4n
Fig. 2.3: Conceptual "target" waveforms of Class E
(a) The voltage across the switch (transistor) at the turn on
time must be zero. (b) the
slope of the voltage across the switch (transistor) at the turn
on time must be minimized,
and (c) the rise of the voltage across the switch at turn-off
must be delayed till the current
drops to zero.
Thus the power delivered to the load RL equals the power
provided by the power
supply source, achieving 100% efficiency. A Class E power
amplifier containing a switch
and a load network meets the above critena [IO].
Fig. 2.4(a) shows the basic Class E circuit implementation
(named "low-order Class
E") which consists of an ideal switch (transistor) shunted by a
capacitor C I , a senes LC
circuit Lr-C2a resonating at the fundamental frequency fo, an
additional reactance Ca to
adjust the phase of the voltage of capacitor C I , and the RF
load resistor RL [9]. An RF choke
LI provides power supply to the switch. The wavefonns generated
by such circuit
approximate the conceptual waveforms shown in Fig. 2.4(b). Note
that these actual
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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waveforms meet al1 three criteria listed
is part of a sinusoid, the current through
'A' I C2a C2b
above. Even though the current through the switch
the load resistor is sinusoidal.
Switch Voltage
r Load Current . -
Fig. 2.4: (a) Schematic of basic (low-order) Class E power
amplifier (b) Actual waveforrns
The design equations for the Class E amplifier obtained by time
domain analysis are
surnrnarized below [9,1 O]
RFC with X usually > 1 OXc
Q$L RnfO
where fo is the fundamental frequency, QL (>1.7879) is the
network loaded Q factor
(chosen by the designer as a trade-off), CI includes Co, of the
switch transistor, C2 includes
in series with C2b.
The harmonic impedances do not play a direct part in the
conventional time domain
analysis of Class E mode. However, the network topology itself
provides the hannonic
terminations, which is analyzed below. In Fig. 2.4(a), if the
impedance of the RF choke LI
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is assumed to be infinite and Cl is treated as the output
capacitance of the switch, the load
impedances ZL at reference plane A-A' is then given by
Substituting (2.15) into (2.16), ZL at the fündarnental
frequency fo is
which is equivalent to a resistor RL in series with an inductor
L less than L2,
And ZL at the harmonic frequencies nf, (m 1) is
zL( nfo) = j2nnf,L2 - \ 1 - 1 }+RL (2.18) n2[ 1 + 1.1 10 /(QL -
1.7879)]
which is equivalent to a resistor RL in series with an inductor
L approximately equal to L,.
At radio frequencies, the absolute value of ZL(nfo) is very
large and can be assurned to be
INFNTE (open circuit).
As a conclusion, the load irnpedances of Class E mode at al1
harmonic fiequencies are
INFINITE (open circuit).
2.2.2 Classification of Multiharmonic Tuning Behavior
Based on the analysis of conventional power amplifier mdoes and
the characteristics of
the multiharmonic tuning power amplifiers, this section proposes
a complete classification
of multiharmonic tuning behavior. As shown in Fig. 2.5, this
behavior can be classified into
four basic types according to the phases of the harmonic load
reflection coefficients rL (the magnitudes are assumed to be close
to 1 .O). The four basic modes are:
SS mode: Soth odd and even hannonics are SHORT. The drain
VOLTAGE waveform
is sinusoidal, containing no harmonic components. This type
includes conventional
Class A, AB, B and C.
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180" 1) (short) .- OS mode SS mode (Class F) (Clé ss A, B,C)
00 mode SO mode (Class E)
f \ \ J
-1 80" 0" 180" (short) (open) (short)
Phase of TL at odd harmonics
Fie. 2.5: Classification of multiharmonic tuning behavior
OS mode: Odd harmonics are OPEN and even hannonics are SHORT.
The drain
VOLTAGE waveform is square-like, containing only odd harmonic
components. This
type corresponds to the Class F [2,3].
SO mode: Odd hannonics are SHORT and even harmonics are OPEN.
The drain
CURRENT waveform is square-like, containing only odd harmonics.
The peak
voltage is higher than twice the power supply. This type
corresponds to the Inverse
Class F 16-71.
00 mode: Both odd and even harmonics are OPEN. The drain CURRENT
waveforrn
is sinusoidal, containing no harmonics, resulting in little or
no energy wasted at
harmonic frequencies and yielding high eficiency. The peak
voltage is also higher
than twice the power supply. This type includes the low-order
Class E [9]. This
mode has not been reported in previous work on multiharmonic
tuning.
Compared to the low-order Class E, the 00 mode has a few
advantages. First, it
does not require rectangular gate driving waveforms, easing the
design of the
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dnving stage; second, it exhibits lower peak drain voltage,
relieving the voltage
stress on the power device; third, the power device can be
biased at a conduction
angle other than 180°, enabling trade-offs between efficiency
and output power.
However, the 00 mdoe may result in a Iower eficiency than the
low-order Class E.
In Fig. 2.5 it is interesting to note that the OS mode (Inverse
Class F) is the dual of the SO
mode (Class F), and the 00 mode (Class E) is the dual of the SS
mode (Class A, B, C).
This classification reveals that there are other possible high
efficiency multiharmonic
tuning modes besides the reported Class F and Inverse Class F.
Furthemore, the
relationship between the conventional power amplifier modes and
multiharmonic tuning
modes is also shown in Fig. 2.5'.
2.3 Multiharmonic h i n g Optimization Procedure
Traditionally, the load-pull measurements have been used to find
the optimal load
terminations (at fundamental and harrnonic fiequencies) for
power amplifier design. But the
experiments are time consuming. The proposed simulation
procedure [8] c m help find the
optimal load impedances. However, this procedure does not
consider the effect of harmonic
teminations on the optimal fundamental load impedance.
This section describes a systematic optimization procedure to
find the optimal load
tenninations. Fig. 2.6 shows the basic circuit used in harmonic
balance (HB) simulations
using an HB simulator such as Agilent Technologies' ADS [16]. On
the load side, only the
2nd and 3rd harmonics are considered and the magnitudes of their
reflection coefficients are
set to be 0.99. Because higher order harmonics have smaller
amplitudes and hence do not
have a significant effect, they can be ignored by terminating
them to 5 M l On the source
side, al1 harmonics are also terminated to 5CKZ The optimization
takes into account the
1. The SS mode can be further classified into Clam A, AB, B or
C, according to the conduction angle. Furthermore, all
multiharmonic tuning modes can be biased at a conduction angle
between O" and 360".
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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mutual effects of the harmonic terminations on the choice of the
optimal fundamental load
impedance.
Fig. 2.6: Basic circuit used in MHT optimization
DUT
The procedure used to find the optimal harmonic terminations is
as follows:
Tuner 2
Estimate the load resistance RL at the fundarnental frequency
(oo) according to the
available power supply Vdd and the required output power
Pour:
where V,, is the saturation voltage, usually estimated to be O.
1 VdK0.2 Vdd.
Then determine the fundamental source impedance Z'(on) for good
input match.
I w r
For each multiharmonic tuning mode, set the phases of rL(20d and
rL(3a/9,
perforrn load-pull simulations to find the optimal fundarnental
load impedance
ZLo(mo) Retuning Zs(oo) may be necessary.
2s
For each ZLo(wo) obtained in Step 2, simultaneously sweep the
phases of TL(2qJ
and rL(3wd. Compare the results and chose the best mode and
corresponding
load impedance.
Z-param ZL block
TL
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Chapter 2: Theoreticai Multiharmonic Tuning Behavior of MOSFET
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2.4 Multiharmonic Tuning Behavior of MOSFET PAS
As previously mentioned, Class F (OS mode) or Inverse Class F
(SO mode) have been
found to achieve the highest efficiency for GaAs MESFET or HEMT
power amplifiers[2-
71. An important difference between GaAs devices and silicon
MOSFETs for power
amplifier applications is that GaAs devices have smaller
drain-source capacitances (Cd*)
because of the semi-insulating substrate. For devices with large
drain-source capacitance,
such as power MOSFETs implemented on bulk silicon substrate, the
question is which
multiharmonic tuning mode yields the highest eficiency.
In order to investigate this issue, power MOSFETs implemented in
a conventional
0.25pm bulk silicon CMOS technology were used. The technology
features single poly,
five metal layers and a minimum drawn channel length of 0.25pm7
suitable for RF and high
speed mixed signal circuits.
2.4.1 Device Design
Device Sizing
Determining the size of the power MOSFET is an iterative process
where the initial
guess originated from the 1-V characteristic of the power
transistor and is based on the
traditional load line theory [ I l .
The first step is to calculate the maximum drain current
according to the power supply.
The drain supply voltage Vdd was chosen to be 2V for low voltage
applications. (The
maximum Vdd is limited by the drain-gate oxide breakdown voltage
BVgd of the MOSFET.
BVgd for the 0.25pm CMOS technology was estimated to be above
SV) To obtain an output
power of 250mW, the optimum load resistance ROpl was firstly
estimated to be
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And the peak current through the load was then given by
According to the load line theory, the maximum drain current Idm
is about twice I& i.e.,
Idm = 2 Ipk = 580mA (2.22)
Ih occurs when the gate voltage reaches its peak value VP. The
maximum amplitude of
the driving (gate) signal was around Vdd and thus the peak gate
voltage was given by
Vg,, Va + Vdd = 2.7V (2.23)
where Vgg is the gate biasing voltage (which equals 0.7V as
described in Section 2.4.2).
The next step is to obtain an initiai guess of the transistor
size. Fig. 2.7 shows the drain
current for 0.25pm N-MOSFETs with different gate width at a gate
voltage of 2.7V. It can
be seen that a gate width of 900pm can provide 600mA drain
current. Therefore the initial
guess of the transistor size was obtained as
Gate Width (urn)
Fig. 2.7: Drain current for different gate width (gate
length=0.25pm)
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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Once the initial size was seîected the more accurate RF behavior
of the MOSFET was
then found by load-pull simulations which indicated that the
initial size is not sufficient to
obtain the required output power. Afier a few steps of
iteration, the device size was finally
chosen to be
W / ' = 2 0 0 0 ~ m f l . 2 5 ~ m
Device Modeling
The BSIM3V3 device model was used in simulations. It was
reported that BSIM3V3
model is basically adequate as a nonlinear physical large signal
model for power amplifier
design [12,13]. However, to improve simulation accuracy, the
BSIM3V3 model was further
enhanced to take parasitics into account, as shown in Fig. 2.8
and described below.
Fig. 2.8: Modified BSIM3V3 CMOS device model
The gate resistance and substrate resistances were added to the
model as shown in
Fig. 2.8 [14]. The gate resistance Rg was calculated to be 0.34Q
from the
interdigitated transistor layout and the resistivity of the gate
material. The substrate
resistances Kubd was estimated to be 3.5R frorn simulations
[14,15]. Cjd and Cjs are the drain and source junction capacitance,
respectively, and were set to be the
same corresponding values in the BSIM3V3 model.
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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The layout parasitics such as pad capacitances and in te rco~ec
t overlap
capacitances were added in p s t layout simulations.
2.4.2 MHT Optimization for P A .
Before MHT optimization, DC and S-parameter simulations were
performed to obtain
some key device parameters as follows: W/L=200ûpm/0.25pm,
Vth=O.6V, BVd,=7.0Vy
%,=0.55*, gm=330mS/mrn, Cd,=2.8pFy f ~ 3 1 GHz, fm,=28GHz.
The final circuit schematic used in multiharmonic tuning
optimization is shown in Fig.
2.9. The device was biased at Vdd=2.0V and Vgg=0.7V through RF
chokes. The RF choke
parasitic resistances (032) were measured and included in the
schematic. The DC blocks
separate the RF input/output signals to DC supplies. The
probe-pad contact resistance Rpp
(OSSI) (especially the contact resistance at the drain terminal)
in the on-wafer load-pull test
setup was also included in the schematic. This value is small
but must be included to match
the simulation and experimental results.
DC block
- -
Fig. 2.9: Schematic used in A D S simulator
2-param Tuner 2
model
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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Using the MHT optimization procedure described in Section 2.3,
the fhdamental load
resistance RL to obtain over 200mW output power at 1.88GHz was
estirnated to be 6 0 and
Zs(od was determined to be 6+j14.8R The optimal fundamental
impedances obtained
from load-pull simulations for each harrnonic tuning mode are
shown in Fig. 2.10, Fig. 2.1 1,
Fig. 2.12, Fig. 2.13 and compared in Table 2.1. The highest
eficiency was achieved in the
00 mode where ZL(od=5.6+j7.8Q Since the corresponding output
power was only
22.4dBm, further trade-off between output power and efficiency
must be made to achieve
high eficiency and the required power simultaneously. By
inspecting the PAE and power
contours shown in Fig. 2.13, the optimal ZL(Wd was finally
chosen to be 6.5+j4.OR
Table 2.1 : Optimal ZL'd of the MOSFET optimized for maximum PAE
(Pi,=12dBm)
Fig. 2.14 shows the power, gain and eficiency variation as a
function of the input
power for the various modes considered. At low gain compression,
the 00 mode and OS
mode (Class F) exhibit higher efficiency than the SO mode
(Inverse Class F) while at higher
gain compression, the 00 mode achieves the highest eficiency of
64% with an output
power of 23.6dBm (230rnW) at an input power of 12dBm.
OS mode
SO mode
00 mode
Fig. 2.15 displays the drain voltage and current wavefonns of
the 00 mode at
Pi,=12dBm. The peak drain voltage is 4.4V, greater than 2*V&
(4V); the drain current
wavefonn is sinusoidal, implying little or no energy wasted at
hannonic frequencies.
Fig. 2.16 shows the PAE and Peut contours versus the phases of
TL at 2a0 and 3a0 for
Pi,=12dBm. The variations of PAE and P, are insensitive to the
phase of TL(3ao)
59.1
68.1
68.9
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6.3+j3.7
5.8+j7.7
5.6-ej7.8
23.1
22.2
22.4
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Chapter 2: Theoretical Multihannonic Tuning Behavior of MOSFET
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Fig. 2.10: PAE and Po,, contours for SS mode (Pi,= 12dBm)
Fig. 2.1 1 : PAE and Po,, contours for OS mode (Pi,= 12dBm)
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Fig. 2.12: PAE and Po,, contours for SO mode (Pin=l 2dBm)
Fig. 2.13: PAE and Po,, contours for 00 mode (Pin=12dBm)
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7 0 ~ 1 - 00 mode 1 I 4 I
-5 O 5 10 15
Pin (dBm)
Fig. 2.14: PAE, Pout and Gain vs. Pin of the MOSFET
Fig. 2.15: Drain voltage and current waveforrns in the 00
mode
Furthemore, In Fig. 2.16(a) the white region is the region of
the highest efficiency and is
somewhat independent of the phases of rL(2mO) and ïL(300),
enabling easy
implementation of the load network.
The above simulation results demonstrate that the 00 mode yields
the highest
efficiency at high gain compression for bulk silicon MOSFET RF
power amplifiers.
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PAE scale :%)
51-53 53-55 57-59
EZI 59-61 O 61-63 O 63-65 7
-150 -100 -50 O 50 100 150
Phase of ïL(3a0)
(a) PAE contours
Phase of rL(3m0)
(b) POM contours
Fig. 2.16: PAE and Po,, contours vs. phases of ïL of the MOSFET
power amplifier (ZL(wd=6.5+j4.m Pin=l 2dBm)
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Chapter 2: Theoretical Multiharmonic Tuning Behavior of MOSFET
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It is worthy to compare previous results to the multiharmonic
tuning behavior of GaAs
MESFET or HEMT power amplifiers[2-71. As mentioned before, an
important difference
between GaAs devices and silicon MOSFETs for power amplifier
applications is that GaAs
devices have smaller drain-source capacitances (CdJ because of
the semi-insulating
substrate. The cornparison suggests that Cds may play an
important role for the 00 mode to
achieve higher efficiency than other modes.
The conventional power amplifier modes and multiharmonic tuning
modes were
analyzed in this chapter. A complete classification of
multiharmonic tuning behavior was
proposed. Multiharrnonic tuning was classified into four basic
modes and conventional
power amplifier modes can also be characterized using this
classification. A systematic
multiharmonic tuning optirnization procedure was proposed to
find the optimal harmonic
tenninations. The multiharmonic tuning behavior of bulk silicon
MOSFET RF power
amplifiers was studied. The results showed that the 00 mode
yields the highest efficiency
at high gain compression for the bulk silicon MOSFET RF power
amplifiers. Table 2.2
sumrnarizes the simulated characteristics of the power device
and power amplifier.
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Table 2.2: Simulated characteristics of the power device and
power amplifier
-
Operating Voltage (V) 11 2.0
Device Chawteristics
Size WiL (pxdpm)
Threshold Voltage (V)
Vduës
2000/0.25
Ron at Vgs=2.5V (Cl) (1 0.55
Best mode for highest PAE 11 O 0 mode Peak PAE (%) 11 64
Corresponding Po,, (am) 11 23.6 Corresponding Pi, (dBm) II 12
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