Resonant Boost Converter for Distributed Maximum Power Point Tracking in Grid-Connected Photovoltaic Systems by Gregor Simeonov A thesis submitted in conformity with the requirements for the degree of Masters of Applied Science Graduate Department of Electrical and Computer Engineering University of Toronto Copyright c 2010 by Gregor Simeonov
117
Embed
ResonantBoostConverterforDistributedMaximumPower …...Abstract Resonant Boost Converter for Distributed Maximum Power Point Tracking in Grid-Connected Photovoltaic Systems Gregor
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Resonant Boost Converter for Distributed Maximum Power
Point Tracking in Grid-Connected Photovoltaic Systems
by
Gregor Simeonov
A thesis submitted in conformity with the requirementsfor the degree of Masters of Applied Science
Graduate Department of Electrical and Computer Engineering
A programmable microcontroller from the Microchip dsPIC33FJ [16] series was selected
to perform the converter control and communication tasks. The 40 MIPS digital signal
controller is a powerful but cost-effective 16-bit microcontroller featuring several ADC
ports and an advanced PWM module capable of variable frequency control. Microchip’s
MPLAB integrated development environment (IDE) with a free C compiler was used for
Chapter 3. Photovoltaic System Design and Implementation 38
software development. In addition, a PICKit2 in-circuit serial programmer and debugger
provided a simple and efficient debugging process. The C code for the microcontroller
main program is provided in Appendix E. The implementation details of the MPPT con-
trol and communication systems are discussed in Chapter 4 and Chapter 5, respectively.
A digital PWM module of the dsPIC33FJ is responsible for generating the gating
signals for the switches S1, S2 and Sr. As mentioned previously, switch S1 is gated
complementary to S2, but in phase with Sr. Two gate driver chips were required to drive
the three switches. A standard low-side FET driver was used to drive the IGBT Sr as
the emitter terminal is referenced to ground. The half bridge circuit uses a high/low side
driver employing a bootstrap circuit to drive the high side MOSFET S1. The switching
nature of the converter indicates that the high-side switch will never have a duty cycle
of more than 50%, which occurs at the maximum switching frequency. Consequently, no
additional percautions needed to be taken to ensure the bootstrap capacitor circuit is
charged over the entire operating range of the converter. An external 3.3 V supply was
used to power the microcontroller, and a 10 V supply for powering the gate drivers. A
final design would include on-board supplies to power the logic and gate drivers.
3.1.7 PCB Design
A printed circuit board was designed to integrate the resonant boost converter power
stage, microcontroller and gate drivers circuits into one platform. A compact design was
used for the prototype, shown in Figure 3.7, to increase power density of the circuit as
well as to minimize trace lengths and associated parasitics. A schematic of the PCB
is provided in Appendix A, and a bill of materials in Appendix B. The resonant boost
converter parameters were recalculated based on the actual values of the sourced Lr and
Cr, and a summary of the power stage parameters is provided in Table 3.1.
Chapter 3. Photovoltaic System Design and Implementation 39
Converter Parameter Value
Rated Power (Pnom) 506 WNominal input voltage (Vi) 100 VNominal output voltage (Vo) 800 VNominal switching frequency (fs,nom) 40.7 kHzResonant capacitor (Cr) 68 nF/630 Vrms
Resonant inductor (Lr) 224 µH/16 Apk
Input capacitor (Cin) 39 µF/100 VMOSFET (S1, S2) 200 V /26 AIGBT Sr 1200 V/30 AFreewheeling diode Dr 1200 V /20 AOutput diode Do 2 series 1000 V /8 ASnubber diode Ds 1000 V /8 A
Table 3.1: Resonant boost converter parameters.
A
B
C
D
F
G
I
E
H
Figure 3.7: Converter PCB showing A) S1, S2, B) Lr, C) Sr, D) Cin, E) Ds, F) Do, G)gate drivers, H) communication header, and I) dsPIC33FJ microcontroller.
Chapter 3. Photovoltaic System Design and Implementation 40
3.2 PV Emulator Design
The input of the PV system testbench consists of a PV emulator switch-mode power
supply that has a programmable output current and voltage profile to emulate the I-V
characteristics of a PV panel. The PV emulator was a low cost solution to test and
validate the MPPT controller developed in Chapter 4.
Several PV simulator technologies were reviewed to get an understanding of potential
power stage and control elements to be implemented. In [17], a buck-boost converter
is operated with current control when the panel voltage Vpv < VMPP , and with voltage
control when Vpv > VMPP . While this dual control mode provides superior stability,
the converter and controller design were too complicated for the purpose of this project.
In [18], a DC-DC chopper using voltage regulation simulates a PV characteristic by
measuring the load resistance and then calculating the desired voltage reference. A
similar concept was used for the PV emulator implementation, although the design was
further simplified using a more embedded architecture.
3.2.1 PV Emulator Implementation
The PV emulator is a DC-DC one-quadrant chopper using inductor current-mode control.
The converter circuit, shown in Figure 3.8, is switched at a frequency of 100 kHz and
has a large 20 A, 5 mH inductor operated in continuous conduction mode (CCM). CCM
operation is ensured given the large inductor size, and assuming that the converter will
not be operated under very light loads. The input MOSFET Q is rated for 200 V /17 A,
while the freewheeling Silicon Carbide diode D is rated for 10 A and has negligible reverse
recovery losses. A 150 V DC supply is used to power the circuit, thus the converter is
theoretically capable of outputting to a voltage range of 0 to 150 VDC.
The I-V curve generator and converter controller are implemented entirely on a Mi-
crochip dsPIC33FJ microcontroller. Up to two PV profiles can be programmed in the
Chapter 3. Photovoltaic System Design and Implementation 41
DC150 V
5 mHQ
D
iPV
PVv
+
−
ADC
LUT
[ ]PVv n
pvi
pvv
[ ]PVi n
[ ]refi n+
−Σ
[ ]e nK
DPWM
[ ]d n
dsPIC33F Digital Controller
Figure 3.8: PV emulator power and control circuit architecture.
microcontroller provided that the I-V characteristics have a maximum short circuit circuit
Isc = 6.37 A and an open circuit voltage Voc = 123 V . When the microcontroller is pow-
ered on, two I-V curve look-up-tables (LUT) are generated based on user-programmed
PV panel parameters and the PV model described in the following section.
Every sampling interval, the microcontroller senses the output panel voltage vpv and
generates a current reference iref from the I-V curve LUT. A proportional digital current
controller is then responsible for regulating the output current ipv to follow iref . This
control mode works well in the constant current region of an I-V curve, where a PV
panel behaves like a constant current source. It was found that in some cases the current
controller would become unstable as the operating point on the I-V curve approaches the
open-circuit voltage. In the future, this could be mitigated by implementing a voltage
controller in the region to the right of the maximum power point vpv > VMPP . Although
conversion efficiency was not a priority in the PV emulator design, a peak efficiency of
98.5% was recorded at 50% duty cycle with a 500 W load. The PV emulator worked
sufficiently well, and provided a low cost platform for testing the MPPT control system.
Chapter 3. Photovoltaic System Design and Implementation 42
3.2.2 PV Cell Model
sR 0=
shR → ∞ pv
V
+
−
pvI
Figure 3.9: PV cell electrical model.
The PV emulator generates the I-V curves using an algorithm sourced from [15],
based on the PV circuit model depicted in Figure 3.9. Assuming an ideal cell, the series
resistance Rs and shunt resistance Rsh are neglected in the I-V curve calculations. Given
the sensed panel voltage Vpv, the panel current is then calculated as follows:
Ipv = Isc
[
1− C1
(
eVpv
C2Voc − 1
)]
(3.9)
Where
C1 =
(
1− Imp
Isc
)
· e−Vmp
C2Voc (3.10)
and
C2 =
Vmp
Voc− 1
ln(
1− Imp
Isc
) (3.11)
The parameters Voc, Isc, Vmp, and Imp are user-inputted parameters that define the PV
panel open circuit voltage, short circuit current, maximum power voltage, and maximum
power current, respectively. The PV cell’s dependence on temperature and irradiance
level was also added to the model, provided by the additional inputs of the panel cur-
rent temperature coefficient α, and voltage temperature coefficient β. The algorithm
describing the complete model can be found in the PV emulator source code, Appendix
F.
Chapter 3. Photovoltaic System Design and Implementation 43
3.3 Inverter Emulator Design
To emulate a DC bus regulated by a three-phase grid-tied voltage-source converter, a
high voltage DC supply was designed and built in the lab that functioned as the load of
the resonant boost converter. The 800 V variable DC power supply was implemented
using a 110 Vrms AC line input, followed by a variable autotransformer (variac) to step
up the voltage to 575 Vrms, and a full bridge rectifier followed by a DC filter. The circuit,
shown in Figure 3.10, has a 1.1 kΩ passive load and is capable of supplying 580 W of
power at 800 VDC . A 3.2 mF capacitor bank is used to provide power decoupling and
filtering of the 60 Hz rectified sinusoidal voltage. The 120 Hz voltage ripple on the bus
is 3 Vpk−pk at maximum power, sufficiently small to assume a stiff DC voltage.
Full BridgeRectifier
DCC
oV
+
−
oi
1 : 1
rms110 : 575 V DC1000 V
30Ω
3.2 mF
4.3 kVA av10 A
oR
1.1 kΩ
ac110 V
Variac
DC+800 V
Figure 3.10: Schematic of high voltage supply used to emulate DC bus of a grid-tiedinverter.
The resonant boost converter outputs to the same load as the high voltage DC supply.
The variac, pictured in Figure 3.11, is then used to adjust the desired bus voltage.
Chapter 3. Photovoltaic System Design and Implementation 44
Figure 3.11: Image of DC supply showing variac and parallel RC load.
Chapter 4
Maximum Power Point Tracking
Control System
In this chapter a novel reduced sensor maximum power point tracking (MPPT) controller
is developed for the resonant boost converter. A brief discussion on MPPT algorithms is
first provided, leading to the motivation for the proposed algorithm. The theory for the
reduced sensor algorithm is then derived, followed by a description of the control system
implementation.
4.1 MPPT Control Strategy
Under varying irradiance and cell temperature levels, the maximum power point (MPP)
and corresponding operate voltage of a PV cell continuously changes. Consequently, au-
tonomous tracking of the MPP is essential to any PV power system to provide maximum
energy harvesting at all times. In the proposed PV system, maximum energy harvesting
of the PV plant is provided by sub-dividing the plant into smaller, parallel-connected
PV arrays, and providing local MPPT of each array via the resonant boost converter
interface. Many MPPT algorithms have been proposed, varying in complexity, accuracy,
convergence speed and cost. A good summary of offline and online MPPT methods is
45
Chapter 4. Maximum Power Point Tracking Control System 46
provided in [19].
The most widely applied algorithms are the hill-climbing and perturb and observe
(P&O) methods. Both methods involve the perturbation of either the duty ratio (hill-
climbing) or the input voltage reference (P&O) of the power converter and measuring
the change in power due to the perturbation. Figure 4.1 shows the P-V characteristic
of a PV panel and how the P&O algorithm adjust the operating point on the curve. A
voltage increment ∆V (decrement) to the left of the maximum power point voltage VMPP
results in an increase (decrease) in the power produced by the PV panel. Therefore if the
algorithm determines that the perturbation has resulted in a positive (negative) change
in power ∆P , the following perturbation is maintained (reversed), until the maximum
power point PMPP has been reached.
PPV
VPV
MPP
V
MPPP
V+V
∆
V-V
∆V
P
P+ P∆
P- P∆
Figure 4.1: P-V characteristic of panel for the P&O algorithm.
Hill-climbing and P&O methods rely on power feedback, requiring both a voltage and
a current sensor to measure the DC power generated by the PV panel. By eliminating the
DC current sensor element, the system cost can be significantly reduced and reliability
increased. A voltage-sensing based MPPT algorithm was proposed in [20]. By defining
Chapter 4. Maximum Power Point Tracking Control System 47
an objective function P ∗pv ∝ Vpvf(D), where D is the duty cycle of a buck or boost
converter, the MPP can be identified since the maxima of Ppv and P ∗pv coincide. Since
the duty cycle D is an internal control parameter, only a low-cost input voltage sensor
is required to implement the controller. The principle of relating the PV power to a
function dependent on converter control parameters was applied in the development of
the MPPT controller for the resonant boost converter.
4.2 Controller Model and MPPT Algorithm
The proposed MPPT algorithm relates the power generated by the PV panel to a function
of the converter input voltage Vi and the switching frequency fs. Since fs is a control
parameter set internally by the microcontroller, the MPP tracking system effectively
requires only one external sensor to operate.
The DC power generated by a PV source is given by:
Ppv = VpvIpv (4.1)
From energy conservation, the average input power of the resonant boost converter can
be equated to the PV power.
Ppv = Pi =2CrViV
2o
Vo − Vi
fs (4.2)
Where Vi = Vpv is the voltage at the input of the converter and therefore the PV panel
terminal voltage. If the DC bus voltage is regulated, the output voltage Vo is assumed
to be constant. Under dynamic conditions, the power equation (4.2) then becomes a
function of the panel voltage and the switching frequency.
Ppv = f(vpv)f(fs) (4.3)
Chapter 4. Maximum Power Point Tracking Control System 48
By defining the power function Pm that is directly proportional to Ppv, the MPP can
be dynamically tracked by maximizing the vpv and fs relationship using a MPPT power
feedback algorithm of choice.
Pm =Ppv
2CrV 2o
=vpv
Vo − vpvfs (4.4)
Note that equation (4.3) describes a general relationship between panel power and con-
verter switching frequency, while (4.4) explicitly applies to the resonant boost converter.
The reduced sensor MPPT methodology described above can be extended to the class of
pulse frequency modulation (PFM) mode converters, as long as the converter power can
be expressed as a function of the switching period.
Figure 4.2 shows the Pm-fs relationship of the resonant boost converter supplied by
a PV panel. The graph indicates a characteristic similar to the P-V curve shown in
Figure 4.1, meaning classical hill-climbing techniques can be applied to track the MPP.
Moreover, the maxima occurs when the slope of the curve is zero ∂Pm
∂fs= 0, a condition
that the algorithm can utilize to identify when the MPP has been reached.
mNormalized P
Switching Frequency, f (kHz)s
0 5 10 15 20 25 30 35 40 450
0.2
0.4
0.6
0.8
1
1.2
∂ = ∂ MPP 0m
s
P
f
Figure 4.2: Power function vs. switching frequency curve of resonant boost converter.
Chapter 4. Maximum Power Point Tracking Control System 49
The hill-climbing algorithm developed aims to maximize equation (4.4) by perturbing
the converter switching frequency by a fixed step size ∆F to locate the MPP. This process
is summarized by the flow chart in Figure 4.3. Each sampling interval n, the PV panel
voltage vpv and the switching frequency fs are read. The power function Pm is then
calculated and compared with the previous value. If the previous step has resulted in an
increase in Pm, the same perturbation is applied in the following interval. However, if
the previous step has resulted in a decrease in Pm, the step direction is reversed. Finally,
if Pm is equal to the previous value, the converter is operating at the MPP and therefore
no perturbation should be applied.
4.3 Converter Control System
The MPPT control system is implemented using various peripherals of the dsPIC33FJ
digital microcontroller. A block diagram of the system is shown in Figure 4.4. The only
components external to the microcontroller are the switch gate drivers and the voltage
sensor conditioning circuit.
The advanced high-speed PWM module PWM1 on board the dsPIC33FJ is used
to generate complementary logic-level gating signals via the PWM1H and PWM1L
output pins. A key feature of the PWM1 module is its capability of variable frequency
operation by adjusting the PWM and duty cycle periods via the PTPER and MDC
special function registers. The variable length hold state used to control the resonant
boost converter is achieved by dynamically changing the value of PTPER in software. As
previously discussed, the “on” time ton of the high side switch S1 and interrupt switch Sr
is constant for nominal operating conditions. Consequently the MDC register contains a
fixed value reflecting the period ton.
Panel voltage sensing is achieved by using a voltage divider circuit followed by a low-
pass filter capacitor to reduce switching noise feeding the microcontroller. The 10-bit
Chapter 4. Maximum Power Point Tracking Control System 50
Figure 6.7 shows a comparison of the converter efficiency versus the input power for
the three control modes. At maximum power, the converter waveforms are identical
for the three modes. Consequently, the peak efficiency is higher with frequency control
and pulse skip modulation since the conduction losses associated with Sr and Dr are
eliminated. Note that the measurements acquired with pulse skipping are discontinuous
to highlight the fact that the converter operating points are very discrete in this mode of
control. The weighted efficiency results of the converter are provided in Table 6.3. The
results clearly indicate that the hold state control method provides superior performance
over a wider operating range.
Chapter 6. Experimental Results 76
0 50 100 150 200 250 300 350 400 450 5000
10
20
30
40
50
60
70
80
90
100Efficiency, (%)
η
iInput Power, P (W)
Frequency control
Pulse skip modulation
Hold state
Figure 6.7: Converter efficiency versus input power.
Control Method CEC Efficiency, ηCEC EU Efficiency, ηEU
Hold state 89.53% 88.45%Pulse skip modulation 85.81% 81.9%Frequency control 75.59% 68.99%
Table 6.3: Weighted efficiency results.
Chapter 6. Experimental Results 77
With hold state control, the weighted efficiency is close to the peak efficiency, demon-
strating that the converter performance is insusceptible to conditions of varying power
production from the PV panels. Nevertheless, improvements to the converter design are
required to achieve the 95% efficiency goal. We have several ideas on how to improve
converter efficiency for future work. One factor that will lead to better performance is
to improve the design of the high frequency inductor Lr. Moving from the purchased E
Craftsman inductor mentioned in Chapter 3 to a custom inductor made in the lab re-
sulted in efficiency improvements on the order of three to four percent. We would expect
an additional improvement of one to two percent by moving to thicker copper gauge and
larger core size. Also, by lumping the series output diodes into a single device would
lower the forward biased voltage and reduce the Do conduction losses.
Furthermore, modifying the converter topology by adopting a full bridge instead of
half bridge circuit to drive the resonant tank would significantly improve the converter
efficiency. In the half bridge topology, the negative half cycle of the tank current is free-
wheeling and does not contribute to the net power delivered by the converter. Using a
full bridge switch would result in power drawn from the input during the entire resonant
period, effectively doubling the maximum power of the converter but maintaining com-
parable losses in the resonant circuit as the half bridge topology. Silicon carbide diodes
may be required in the output rectifier stage to maintain low losses.
6.3 MPPT Performance
The PV emulator was used as the input stage to the resonant boost converter to verify
the operation of the MPPT control system. Two I-V profiles were programmed in the
emulator, providing a method to analyze the transient and steady state behaviour of the
MPP tracker.
Chapter 6. Experimental Results 78
6.3.1 PV Emulator Parameters
The PV panel specifications chosen to test the PV emulator are shown in Table 6.4. With
a peak power voltage of 90 V and peak power current of 4.5 A, the selected PV profile
is capable of supplying 405 watts.
Parameter Value Units
Rated Power (Pmp) 405 WMaximum Power Voltage (Vmp) 90 VMaximum Power Current (Imp) 4.5 AOpen Circuit Voltage (Voc) 120 VShort Circuit Current (Isc) 4.77 AVoltage Temperature Coefficient (β) -0.172 V/KCurrent Temperature Coefficient (α) 0.88 mA/KReference Temperature (Tr) 25 C
Table 6.4: Emulated PV panel parameters.
Two irradiance levels were selected for the testbench, and the measured I-V and P-V
characteristics are compared with the theoretical curves shown Figure 6.8 and Figure 6.9
respectively. The measured results indicate I-V curves sufficiently close to the theoretical
values, although some offset is evident in the constant current portion of the curves.
6.3.2 MPPT Results
The MPPT controller test was performed by initializing the PV emulator on the 800
W/m2 operating curve, then applying a step change in irradiance to 500 W/m2. In prac-
tice, a PV panel would experience a gradual change in irradiance due to cloud movement
or over the course of a day, but the test provided a convenient method of analyzing
the converter’s response to large disturbances of input power. Using a fixed step size of
∆F = 500 Hz for the MPPT controller, the converter input voltage vpv and power ppv
over time are shown in Figure 6.10.
Following the turn-on transients, the waveforms demonstrate that the MPPT con-
troller is capable of tracking the correct peak power of the PV emulator according to the
Chapter 6. Experimental Results 79
0 20 40 60 80 100 120 1400
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
PV Current, i
(A)
PV
PV Voltage, v (V)PV
2800 , 25W Cm
°
2500 , 25W Cm
°
Figure 6.8: Measured (points) and theoretical (curve) I-V characteristics under two shad-ing conditions.
0 20 40 60 80 100 120 1400
50
100
150
200
250
300
350
400
X: 93.2Y: 339.2
X: 88.7Y: 201.7
PV Power, p
(W)
PV
PVPV Voltage, v (V)
2800 , 25W Cm
°
2500 , 25W Cm
°
Figure 6.9: Measured (points) and theoretical (curve) P-V characteristics highlightingmaximum power points.
Chapter 6. Experimental Results 80
pvv
time [2 s/div]
[20 V/div]
pvp [120 W/div]
93 V87 V
336 W
201 W
2W800m 2
W500m
Figure 6.10: Waveforms showing converter tracking MPP of two emulated PV profiles.
expected values documented in Figure 6.9. At 800 W/m2, the MPPT controller reaches
steady state and oscillates about the MPP voltage of 93 V , which matches closely with
the expected value of 93.2 V .
As the step change from 800 W/m2 to 500 W/m2 is applied, the operating point
of the converter shifts and the input voltage drops. The MPPT controller responds to
the change by hill-climbing to the MPP of the new I-V characteristic. In this case, the
magnitude of the steady state oscillations are larger due to the fact that the fixed 500
Hz step size incurs a larger gain in power at the lower irradiance level. Recall that the
power drawn by the converter is directly proportional to the frequency. This issue can
be mitigated by adopting an adaptive hill-climbing algorithm that dynamically adjusts
the step size to achieve better steady-state and transient performance.
Overall, the ability of the MPPT controller to correctly track the MPP of the two I-V
curves validates the model and algorithm developed in Chapter 4. While the steady-state
performance of the controller was sub-optimal due to the fixed step size, modifications
to the algorithm discussed in section 4.4 can be applied in future work.
Chapter 7
Conclusion
Grid-connected photovoltaic power systems today are moving from central inverter topolo-
gies to distributed MPPT strategies. By dividing the PV panel array and localizing peak
power tracking on a sub-array or per-panel level, the energy harvesting of the plant can
be significantly improved, requiring fewer solar panels to effectively generate the same
amount of power at the grid. Many distributed MPPT systems have been proposed, some
of which have been reviewed in Chapter 1. However many concepts suffer from high cost
and/or low reliability when it comes to commercial or utility scale installations.
This thesis proposed a new PV system architecture that provides improved energy
harvesting versus cost by connecting the low-voltage panels in parallel to increase power
production and to reduce susceptibility to partial shading. The panels are then interfaced
to a high voltage DC bus to minimize cabling costs. A three-phase inverter is employed
to avoid 120 Hz ripple power on the DC link. This eliminates the need for unreliable
electrolytic DC link capacitors. A DC-DC switch-mode converter capable of high step-up
conversion ratios at high efficiency was required to practically achieve this architecture.
This created a research opportunity to investigate the viability of the system by devel-
oping a microconverter interface featuring a DC-DC step-up topology, MPPT controller,
and embedded communication.
81
Chapter 7. Conclusion 82
A testbench PV system was designed and implemented. The focus of the system was
on a prototype for a 500 W microconverter employing a novel resonant boost converter
topology capable of achieving large voltage gains by resonating a series LC circuit at its
natural frequency. By interrupting the resonant current and introducing a lossless hold
state, the converter operates over a wide power range with a near constant efficiency.
To emulate the high voltage DC bus interface, a 4.3 kW , 800 V DC power supply was
designed, providing regulation of the bus voltage level with a variac. In addition, a
programmable photovoltaic emulator capable of supplying 780 W at efficiencies up to
98.5% was introduced to test the MPPT controller of the microconverter. The low cost
PV emulator proved to be an effective testing tool and is readily available in the lab for
future use.
A peak power tracker using minimal sensing components was developed for the res-
onant converter. The maximum power point was tracked by exploiting the relationship
between input voltage and converter switching frequency. This effectively reduced the
cost and increased the reliability of the control system by eliminating the need for a DC
current sensor to perform MPPT. The methodology used to derive the reduced sensor
algorithm can be generally applied to a broad class of converters that use pulse fre-
quency modulation control. A wireless communication system using the standardized
ZigBee protocol was implemented, providing advanced control, monitoring, and protec-
tion features to the PV system. A flexible framework was created to allow addressing
of multiple converters per communication module, distributing the cost per watt of the
communication system.
The designed system provided promising results in asserting the viability of the
parallel-panel PV architecture. For a system using ten 500 W converters per communica-
tion board, an estimated cost of 87.16 $kW
was determined for the smart microconverter
technology including the power stage, MPPT controller and embedded communications,
Figure 7.1. Compared with a benchmark price of 6106 $kW
for a 50 kW commercial system
Chapter 7. Conclusion 83
[27], the microconverter technology is a low cost solution for providing distributed MPPT
to achieve higher energy yield and return from the PV system. The parallel architecture
improves on the modularity and ease of installation over competing series-string systems.
In addition, high reliability was achieved by eliminating electrolytics from the design,
and the safety benefits of low-voltage panel connections are further complimented by the
central communication system. With a weighted efficiency of around 89%, further work
must be done on the converter design to meet the 95% goal. We believe this milestone
could be met with a better magnetics design, a modification of the converter to a full
bridge topology, and possibly introducing the use of silicon carbide in the output rectifier
stage.
Figure 7.1: Cost distribution of microconverter components.
Bibliography
[1] A. Jager-Waldau, “European Commission Joint Research Centre: PV Status Report
2008,” http://www.jrc.ec.europa.eu, September 2008.
[2] “MarketBuzz 2010: The Leading Annual World Solar PV Industry Report,” Solar-
Buzz, http://www.solarbuzz.com/marketbuzz2010-intro.htm, July 22, 2010.
[3] “Feed-in Tariff Program: Program Overview,” Ontario Power Authority,
http://fit.powerauthority.on.ca, July, 2010.
[4] “SolarMagic Power Optimizer,” SolarMagic Datasheet,
http://www.solarmagic.com/, July 20, 2010.
[5] L. Linares, R.W. Erickson, S. MacAlpine, and M. Brandemuehl, “Improved Energy
Capture in Series String Photovoltaics via Smart Distributed Power Electronics,”
Applied Power Electronics Conference and Exposition, 2009, pp. 904-910, 2009.
[6] S. Kjaer, J. Pedersen, and F. Blaabjerg, “A Review of Single-Phase Grid-Connected
Inverters for Photovoltaic Modules,” IEE Transansaction on Industry Applications,
vol. 41, no. 5, pp. 1292-1306, Sep./Oct. 2005.
[7] “Enphase Microinverter M210,” Enphase Energy Datasheet,
http://www.enphaseenergy.com/, July 20, 2010.
[8] “Sunergy Extra Low Voltage Inverters,” Sustainable Energy Technologies Datasheet,
http://www.sustainableenergy.com/, July 20, 2010.
84
Bibliography 85
[9] 2002 National Electrical Code, National Fitre Protection Association, Inc., Quincy,
MA, 2002.
[10] R. W. Erickson and D. Maksimovic, Funamentals of Power Electronics: Second
Edition. University of Colorado: Kluwer Academic Publishers, 2001.
[11] O. Abutbul, A. Gherlitz, Y. Berkovich, and A. Ioinovici, “Step-Up Switching-Mode
Converter With High Voltage Gain Using a Switched-Capacitor Circuit,” IEEE
Transactions on Circuits and Systems, vol. 50, no. 8, pp. 1098-1102, Aug. 2003.
[12] D. Jovcic, “Step-up DCDC converter for megawatt size applications,” IET Power
Electron 2009, vol. 2, Iss. 6, pp. 675-685, Nov. 2008.
[13] D. Jovcic and B.T. Ooi, “High-Power, Resonant DC/DC Converter for Integration
of Renewable Sources,” IEEE Bucharest Power Tech Conference, July 2, 2009.
[14] L. H. Dixon, “Eddy Current Losses in Transformer Windings and Circuit Wiring,”
Unitrode/TI Magnetics Design Hand-book, TI Literature No. SLUP132, Topic R4,
2000.
[15] M. Buresch, Photovoltaic Energy Systems: Design and Installation. Toronto:
McGraw-Hill, 1983.
[16] “dsPIC33FJ06GS202 Data Sheet: High Performance 16-bit Digital Signal Con-
trollers,” Microchip Datasheet, http://www.microchip.com, July 20, 2010.
[17] S. Poshtkouhi, J. Varley, R. Popuri, and O. Trescases, “Analysis of Distributed Peak
Power Tracking in Photovoltaic Systems,” 2010 International Power Electronics
Conference, pp. 942-947, 2010.
[18] Q. Zeng, P. Song, and L. Chang, “A Photovoltaic Simulator Based on DC Chopper,”
2002 IEEE Canadian Conference on Electrical and Computer Engineering, vol. 1,
pp. 257-261, 2002.
Bibliography 86
[19] T. Esram and P. Chapman, “Comparison of Photovoltaic Array Maximum Power
Point Tracking Techniques,” IEEE Transactions on Energy Conversion, vol. 22, no.
2, pp. 439-449, June 2007.
[20] N. Dasgupta, A. Pandey, and A. Mukerjee, “Voltage-sensing-based photovoltaic
MPPT with improved tracking and drift avoidance capabilities,” Solar Energy Ma-
terials & Solar Cells 92, pp. 1552-1558, 2008.
[21] W. Xiao and W. Dunford, “A Modified Adaptive Hill Climbing MPPT Method
for Photovoltaic Power Systems,” 35th Annual IEEE Power Electronics Specialists
Conference, vol. 3, pp. 1957-1963, 2004.
[22] J. Jiang, T. Huang, Y. Hsiao, and C. Chen, “Maximum Power Point Tracking for
Photovoltaic Power Systems,” Tamkang Jounral of Science and Engineering, vol. 8,
no. 2, pp. 147-153, 2005.
[23] E. Roman, R. Alonso, P. Ibanez, S. Elorduizapatarietxe, and D. Goitia, “Intelligent
PV Module for Grid-Connected PV Systems,” IEEE Transactions on Industrial
Electronics, vol. 53, no. 4, pp. 1066-1073, August 2006.
[24] “ZigBee Specification,” ZigBee Alliance, http://www.zigbee.org, August 20, 2010.
[25] “XBee/XBee-PRO ZB RF Modules,” Digi International product manual,
http://www.digi.com, August 20, 2010.
[26] W. Bower, C. Whitaker, W. Erdman, M. Behnke, and M. Fotzherald, “Performance
Test Protocol for Evaluating Inverters Used in Grid-Connected Photovoltaic Sys-
tems,” California Energy Commission and the California Public Utilities Commis-
sion, http://www.gosolarcalifornia.org, August 1, 2010.
[27] “Solar Electricity Global Benchmark Price Indices: September 2010 Survey Results,”
SolarBuzz, http://www.solarbuzz.com/solarindices.htm, September 24, 2010.
Appendix A
Converter PCB Schematics
The circuit schematics of the resonant boost converter prototype PCB are provided here.
Many components in the circuit are used for debugging purposes, and would not be
included in a final design. Figure A.1 contains the converter power stage, Figure A.2
provides the gate driving circuit, and Figure A.3 contains the microcontroller and analog
sensing circuits. The PCB was designed using Altium’s DXP 2004 CAD platform. The
bill of materials of the main converter components are provided in Appendix B.
87
Appendix
A.
ConverterPCB
Schematics
88
Vin1
Gnd2
CN4
VIN_CON
316uH
L1Inductor
Vout1
Gnd2
CN3
VOUT_CON
11
22
TP12Bridge
TP6
Vin+
Vosens
Visens_in
Isens_in
Visens
Isens
12 2.2u 875V
C25Cap
12 39u 100V
C26Cap
1
23
Q3IGBT-N
11
22
TP11Bridge
Q1IRFS4615
68nF
C11Cap
11
22
TP10
Bridge
11
22
TP8
BridgeFET_HI
FET_LO
VBRIDGE
Vosens_inVosens
IGBT_LO
TP15
Vc-
TP16
Gnd
PGND
10mH
FB1
Inductor
PGND
2
1
3
Q2IRFS4615
11
22
TP9
Bridge
TP7
Vo
31
D4Diode
IP+
1IP
+2
IP+
3IP
+4
IP-
5IP
-6
IP-
7IP
-8
GN
D9
VZ
CR
10
FIL
TE
R11
VIO
UT
12
FA
UL
T13
VC
C14
VO
C15
FA
UL
T_
EN
16
Cu
rren
t S
enso
r
IS1CurrentSensor
+3V3
12
10nC12
12
0.8nC13
Isens
0.1uC18
Visens
12
10uC14
3 1D2
Diode
3 1D1
Diode
3 1D3
Diode
Figu
reA.1:
Reson
antboost
converter
pow
erstage
schem
atic.
Appendix
A.
ConverterPCB
Schematics
89
IGBT Driver
+10V
+10V
NC1
INA2
GND3
INB4
!OUTB5
VDD6
!OUTA7
NC8
U3
TC427
0.1u
C23
+10V
0.1u
C24
IN_HI1
IN_LO2
GND3
DR_LO4
VCC5
BRG6
DR_HI7
VBOOT8
U2
NCP518110
R22
FET_HI
FET_LO
+10V
VBRIDGE
1kR191kR21
1 2D5
Diode
5.1R18
FET_HI_DRVFET_LO_DRV
IGBT_LO1kR24
Bridge Driver
TP17
Qhi
TP18
Qlo
12
10uC15
12
10uC17
Vin1
Gnd2
Gnd3
CN2
TER_3
+10V
12 10u
C16
+10V
10
R20
10
R23
0.1uC19
0.1uC20
PGND
PGNDPGND
PGND
PGND
PGND
Figu
reA.2:
Gate
drivers
circuitsch
ematic.
Appendix
A.
ConverterPCB
Schematics
90
+3V3
+3V3
12 10u
C4
+3V3
0.1uC8
0.1uC9
S5
SW-PB
+3V3
10kR13
Reset
30k
R1
820
R7
Visens_in
1nC1
Cap
2.7M
R2
Vosens_in Isens_in
Isens_MCUVosens_MCUVisens_MCU
Sensing Circuits
S2SW-PB
+3V3
10kR4
S1SW-PB
+3V3
10kR3
RB8
MCU I/Os
Vin1
Gnd2
Gnd3
CN1
TER_3
+3V3
+3V3
12 10u
C5
1 2
10u
C3
TP3
Vis
TP4
Vos
TP5
Is
FET_HI_DRVFET_LO_DRV
Visens_MCUVosens_MCUIsens_MCU
PGED2PGEC2
MCLR
Debugger/Programmer
VPP1
VDD2
GND3
PDAT4
PCLK5
NC6
JP2
PIC_PROG
MCLR
0.1uC10
+3V3
PGED2PGEC2
1 23 45 67 89 10
JP1
Header 5X2
Communication Connector
+3V3
10kR14
10kR15
10kR16
10kR17
S3SW-PB
+3V3
10kR5
300
R11
DS3
300
R12
DS4
RB8
RB9RB10
RB11
MCLR!1
AN0/CMP1A2
AN1/CMP1B3
AN2/CMP2A4
AN3/CMP2B5
AN4/RB96
AN5/RB107
Vss8
CLKIN9
CLKO10
PGED2/RB311
PGEC2/EXTref12
Vdd13
RB814
RB15/RP1515
RB5/RP516
RB6/RP617
RB7/RP718
Vss19
Vcap20
RB1121
RB1222
PWM2H/RB1323
PWM2L/RB1424
PWM1H25
PWM1L26
AVss27
AVdd28
U1
DSPIC33FJ06GS202
RB9 RB10 RB11
TP2
RB11
10k
R81nC2
Cap
Figu
reA.3:
Micro
controller
andan
alogsen
sorssch
ematic.
Appendix B
Converter PCB Bill of Materials
The bill of materials for the resonant boost converter PCB prototype is provided here.
Note that only the main components of the power stage and microcontroller circuit are
provided, with designators corresponding to the PCB schematic provided in Appendix A.
Some components were either used for debugging or prototyping purposes, and would not
be in a final design, hence were omitted from the bill of materials. Some elements such
as an on-board power supply for the gate drivers and microcontroller were not included
in the prototype design, and will have to be added in the future.
The high frequency inductor L1 was built in the lab using 34 turns (2 layers) of 13
AWG litz wire (650 strands of 40 AWG) on a Ferroxcube 3C95 core.
91
Appendix
B.
ConverterPCB
BillofMaterials
92
Designator Description Part Quantity Unit Price (CAD)
Power Stage ComponentsQ1,Q2 MOSFET N-CH 200 V, 26 A, 21 mΩ IRFI4227PBF 2 1.50Q3 IGBT Ultra Fast 1200 V, 30 A IRG4PH40KPBF 1 2.65
D1,D2,D3 Diode Ultra Fast 1000 V, 8 A MUR8100EG 3 0.54D4 Diode Fast Rec. 1200 V, 20 A 20ETF12 1 2.53L1 Inductor HF 221 µH, 16 A N/A 1 15.00 (est.)C11 Capacitor PolyFilm 68 nF, 630 VAC 940C20S68K-F 1 1.82C26 Capacitor Film 39 µF, 100 V FFB34E0396K 1 8.04U2 MOSFET Driver HI/LO 600 V NCP5181PG 1 1.56U3 MOSFET Driver LO 1.5 A TC427CPA 1 0.97D5 Bootstrap Diode 400 V, 1 A US1G-13-F 1 0.08
Table D.1: Communication module PCB bill of materials.
Appendix E
Converter Microcontroller Source
Code
Software development was done using the Microchip MPLAB IDE with an academic
license for the C30 C compiler. The Microchip PICKit 2 was used for in-circuit program-
ming and debugging of the microcontroller.
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗Pro j ect : Resonant Boost Converter MPPT and Communication Cont r o l l e r∗∗FileName : CONVERTER main. c∗Proces sor : Microchip dsPIC33FJ06GS202∗Author : Gregor Simeonov∗Company : Univer s i ty o f Toronto − Energy Systems Group∗Date : 08/20/2010∗∗Notes : A Maximum Power Point Tracking (MPPT) c o n t r o l l e r f o r a resonant boost conver ter∗ with va r i ab l e f r equency con t r o l us ing a h i l l c l imbing MPPT algor i thm with a∗ f i x ed s tep s i z e . Nominal sw i tch ing f r equency o f the conver ter i s 40 . 7kHz ,∗ sw i tches are gated in a complementary f a sh i on us ing the PWM1 module∗ o f the m i c r o c on t r o l l e r ( port outputs PWM1L and PWM1H) .∗∗ An app l i c a t i on l aye r communication p r o to co l i s used to send ADC r e g i s t e r contents∗ and r e c e i v e s t a r t / stop gat ing /MPPT commands f o r the conver ter . This i s implemented∗ us ing the I2C module o f the m i c r o c on t r o l l e r with a hard−coded I2C bus addres s∗ o f the dev i ce de f i ned in the code . The conver ter i s an I2C s l ave dev i ce .∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/#inc l ude ” p33 f j 06gs202 . h” // i n c l ude conta ins s t r u c t s f o r a s s i gn i ng i nd i v i d u a l b i t s
//Def ine I /O b i t p o s i t i o n s#de f i n e LO DRV (0 x0008 )#de f i n e HI DRV (0 x0010 )#de f i n e LED ON (0 x0800 )#de f i n e BIT0 (0 x0001 )#de f i n e BIT1 (0 x0002 )#de f i n e BIT2 (0 x0004 )#de f i n e BIT3 (0 x0008 )#de f i n e BIT4 (0 x0010 )#de f i n e BIT5 (0 x0020 )#de f i n e BIT6 (0 x0040 )#de f i n e BIT7 (0 x0080 )
97
Appendix E. Converter Microcontroller Source Code 98
#de f i n e BIT8 (0 x0100 )#de f i n e BIT9 (0 x0200 )#de f i n e BIT10 (0 x0400 )#de f i n e BIT11 (0 x0800 )#de f i n e BIT12 (0 x1000 )#de f i n e BIT13 (0 x2000 )#de f i n e BIT14 (0 x4000 )#de f i n e BIT15 (0 x8000 )
//MPPT Cont r o l l e r cons tants and va r i a b l e s#de f i n e Ts MIN 2890#de f i n e Ts MAX 60000#de f i n e AVGNUM 256#de f i n e DELTA F 500#de f i n e VOUT 6606 //800V∗(2ˆ10)/124 = 6767 , s c a l e s with 10−b i t Vin sensor
i n t initMPPT ;uns igned i n t ADC Vin , ADC Iin , ADCcount ;uns igned i n t Vavg , Iavg ;uns igned long Vacc , Iacc ;uns igned long Pmk, Pmk 1 , Fk ,Vk,Tk ;i n t s tep = 0 ;
//I2C Communication constants , va r i ab l e s , and s t r u c t#de f i n e CONVADDRESS 0x0008#de f i n e I2CTX SIZE 5#de f i n e I2XRX SIZE 1s t r uc t UDP
uns igned char Status ;uns igned char Vin [ 2 ] ;uns igned char I i n [ 2 ] ;
uns igned char I2CTXBuffer [ 5 ] ;uns igned i n t I2CTXIndex ;
;s t r u c t UDP Converter ;
i n t main ( void )
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ In t e r na l O s c i l l a t o r Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗///Fosc= Fin∗M/(N1∗N2) , Fcy=Fosc /2 , Fin = 7.37 Mhz//Fosc= 7.37∗(43)/(2∗2)=80Mhz f o r Fosc , Fcy = 40Mhz
builtin write OSCCONH (0 x01 ) ; // New Os c i l l a t o r FRC w/ PLLbuiltin write OSCCONL (0 x01 ) ; // Enable Switch
whi le (OSCCONbits.COSC != 0b001 ) ; // Wait f o r new Os c i l l a t o r to become FRC w/ PLLwhi le (OSCCONbits.LOCK != 1 ) ; // Wait f o r P l l to Lock
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ I /O Port Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/ADPCFG = 0xFFF8 ; // Set AN0 and AN1, AN2 as analog input
TRISA = 0x0000 ; //PORT A − s e t analog p ins as inputsTRISA |= BIT0 + BIT1 + BIT2 ;
TRISB = 0x0000 ; //PORTB − s e t push buttons as inputsTRISB |= BIT8 + BIT9 + BIT10 ;
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PWM and ADC Clock Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗///PWM and ADC Clock = ( (FRC ∗ 16) / APSTSCLR ) = (7 . 37 ∗ 16) / 1 = ˜ 120MHzACLKCONbits .FRCSEL = 1 ; //FRC prov ides input f o r Aux i l i a ry PLL ( x16 )ACLKCONbits .SELACLK = 1 ; // Auxi l i a ry O s c i l l a t o r prov ides c l ock sour ce f o r PWM & ADCACLKCONbits .APSTSCLR = 7 ; //Divide Aux i l i a ry c l ock by 1ACLKCONbits .ENAPLL = 1 ; //Enable Aux i l i a ry PLL
Appendix E. Converter Microcontroller Source Code 99
whi le (ACLKCONbits .APLLCK != 1 ) ; //Wait f o r Aux i l i a ry PLL to LockPWMCON1bits.CAM = 0 ; //Edge−Aligned ModePWMCON1bits.MDCS = 1 ; //Duty cyc l e sour ce = Master Duty Cycle r e g i s t e r
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PWM Module Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/PTCON2bits .PCLKDIV = 3 ; //Clock Pr e s ca l e r = 8
PTPER = 2890; //PWM Per iod PTPER = P des i r ed /( p r e s c a l e r ∗1.04 e−9)// P des i r ed = 1/Fs = 40 .7 kHz
MDC = PTPER/2; //FIXED ON TIME at 50% Duty o f MAX Fs
IOCON1bits .PENH = 0 ; //PWM1H i s c on t r o l l e d by PWM moduleIOCON1bits .PENL = 0 ; //PWM1L i s c on t r o l l e d by PWM moduleIOCON1bits .PMOD = 0 ; // S e l e c t Complementary Output PWM mode
DTR1 = 0 ; //No Deadtime = (65 ns / 1 . 04 ns ) where 65ns i s d e s i r ed deadtimeALTDTR1 = 0 ; //No ALTDeadtime = (65 ns / 1 . 04 ns ) where 65ns i s d e s i r ed deadtimePHASE1 = 0 ; //No phase s h i f t
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ ADC Module Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/ADCONbits .FORM = 0; // In t eg e r data formatADCONbits . EIE = 0 ; //Early In t e r r up t d i s ab l edADCONbits .ORDER = 0 ; //Convert odd channel f i r s tADCONbits .SEQSAMP = 0 ; // S e l e c t s imultaneous samplingADCONbits .ADCS = 0 ; //ADC clock = FADC/6 = 120MHz / 6 = 20MHz
IFS6b i t s .ADCP0IF = 0 ; //Clear ADC Pair 0 i n t e r r up t f l a gIPC27bits .ADCP0IP = 5 ; // Set ADC Pair 0 i n t e r r up t p r i o r i t yIEC6bits .ADCP0IE = 1 ; //Enable the ADC Pair 0 i n t e r r up t
ADSTATbits .P0RDY = 0 ; //Clear Pai r 0 data ready b i tADCPC0bits . IRQEN0 = 1 ; //Enable ADC Inte r r up t pa i r 0ADCPC0bits .TRGSRC0 = 4 ; //ADC Pair 0 t r i g g e r e d by PWM1 Tr igger
TRGCON1bits .DTM=0; //SINGLE t r i g g e r modeTRIG1bits .TRGCMP=0; //Primary t r i g compare value
TRGCON1bits .TRGDIV = 0xF ; // Tr i gger generated every 15 th PWM cyc l eTRGCON1bits .TRGSTRT = 63; //Enable Tr i gger generated a f t e r 63 PWM cyc l e sTRIG1 = 1445; // Tr i gger compare value , compare at MDC/2 = 1445 o f the PTPER
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ I2C Module Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/I2C1BRG = 0x188 ; //100 kHz operat i on at 40 MIPs
IPC4 = 0x0006 ; //I2C Slave In t e r r up t p r i o r i t y l e v e l 6IEC1bits . SI2C1IE = 1 ; //Enable s l av e i n t e r r up tIFS1b i t s . SI2C1IF = 0 ; //Clear s l av e i n t e r r up t f l a g
I2C1CONbits .STREN = 1 ; //Enable c l ock s t r e t c h i n gI2C1CONbits .A10M = 0 ; //7 b i t addres s ing used f o r s l av eI2C1CONbits .GCEN = 1 ; //Enable g ene r a l c a l l s f o r emergency shut down f ea tu r eI2C1ADD = CONVADDRESS; //Address o f s l av e dev i ce
I2C1CONbits . I2CEN = 1 ; //Enable I2C module , s e t port I /Os f o r module
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ Main Program Loop∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/Converter . Status = 0x00 ;
//Monitors communication r e g i s t e r to enable / d i s a b l e MPPT/ gat ingwhi le (1)
//MPPT/ gat ing d i s ab l ed in conver ter s t a tu s r e g i s t e ri f ( ( Converter . Status&0x01)==0)
//MPPT o f f , re− i n i t i a l i z e MPPT parametersVacc = 0 ;Iacc = 0 ;ADCcount = 0 ;
Appendix E. Converter Microcontroller Source Code 100
initMPPT = 0 ;PTPER = Ts MIN ; // Set PWM to maximum fr equency
IOCON1bits .PENH = 0 ; //PWM1H i s c on t r o l l e d by PORTAIOCON1bits .PENL = 0 ; //PWM1L i s c on t r o l l e d by PORTAPTCONbits .PTEN = 1 ; // Di sab l e PWMADCONbits .ADON = 0 ; // Di sab l e ADC module /MPPT
PORTA &= ˜LO DRV & ˜HI DRV; //Turn o f f sw i tchesPORTB &= ˜LED ON; //Turn o f f s t a tu s LED
//MPPT/ gat ing enabled in conver ter s t a tu s r e g i s t e re l s e
IOCON1bits .PENH = 1 ; //PWM1H i s c on t r o l l e d by PWM moduleIOCON1bits .PENL = 1 ; //PWM1L i s c on t r o l l e d by PWM modulePTCONbits .PTEN = 1 ; //Enable PWMADCONbits .ADON = 1 ; //Enable ADC module/MPPTPORTB |= LED ON; //Turn on s ta tu s LED
//Update conver ter s t a tu s and sensor va lues f o r communicationConverter . I2CTXBuffer [ 0 ] = Converter . Status ;Converter . I2CTXBuffer [ 1 ] = Vavg>>8;Converter . I2CTXBuffer [ 2 ] = Vavg&0x00FF ;Converter . I2CTXBuffer [ 3 ] = Iavg>>8;Converter . I2CTXBuffer [ 4 ] = Iavg&0x00FF ;
r e turn 1 ;
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ ADC Inte r r up t Se r v i c e Routine and MPPT Cont r o l l e r Algorithm∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/void a t t r i b u t e ( ( i n t e r r u p t , no auto psv ) ) ADCP0Interrupt ( )
IFS6b i t s .ADCP0IF=0;
ADC Vin = ADCBUF0; //10− b i t ADC Vin sensor readADC Iin = ADCBUF1; //10− b i t ADC I i n sensor read
Vacc += ( long ) ADC Vin ; //Vin accumulator f o r averag ingIacc += ( long ) ADC Iin ; // I i n accumulator f o r averag ingADCcount++;
i f (ADCcount==AVGNUM)
// Cal cu l ate average value o f Vin and I i nVavg = ( i n t ) Vacc/AVGNUM;Iavg = ( i n t ) Iacc /AVGNUM;
Vacc = 0 ;Iacc = 0 ;ADCcount = 0 ;
i f ( initMPPT == 0)
Vk = ( long ) Vavg ;Fk = ( long ) 120192308/PTPER;//Fk = 1/ t r /PTPER = 1/(8∗1 . 04 e−9)/PTPERPmk = Vk∗Fk/(VOUT−Vk) ; // Cal cu l ate power f unc t i on PmPmk 1 = Pmk;
s tep = −DELTA F; //Assign i n i t i a l per turbat i on d i r e c t i o ninitMPPT = 1 ; //MPPT i n i t i a l i z a t i o n complete
e l s e
Vk = ( long ) Vavg ;Fk = ( long ) 120192308/PTPER;Pmk = Vk∗Fk/(VOUT−Vk) ; // Cal cu l ate power f unc t i on Pmk
//MPPT Hi l l−c l imbing Algorithmi f (Pmk>Pmk 1)
// I f pr ev i ous s tep was 0 , apply new stepi f ( s tep==0)
Appendix E. Converter Microcontroller Source Code 101
s tep = −DELTA F;//Else , keep same per turbat i on d i r e c t i o ne l s e
s tep = step ;
e l s e i f (Pmk<Pmk 1)
// I f pr ev i ous s tep was 0 , apply new stepi f ( s tep==0)
s tep = DELTA F;//Else , r ev e r s e per turbat i on d i r e c t i o ne l s e
s tep = −s tep ;
e l s e
s tep = 0 ;//Update old value o f PmPmk 1 = Pmk;
//Apply s tep by changing PTPER r e g i s t e r , apply f r equency l im i t e ri f ( s tep !=0)
//Convert f r equency to per i od f o r PTPER r e g i s t e rFk = Fk + step ;Tk = 120192308/ Fk ;
//Apply swi tch ing f r equency ( per i od ) l i m i t e ri f (Tk>=Ts MAX)
PTPER = Ts MAX;e l s e i f (Tk <= Ts MIN)
PTPER = Ts MIN ;e l s e
PTPER = ( i n t ) Tk ;
ADSTATbits .P0RDY = 0 ; // Clear s t a tu s b i t i n d i c a t i n g data has been read
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ I2C Slave In t e r r up t Se r v i c e Routine and Communication Cont r o l l e r∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/void a t t r i b u t e ( ( inter rupt , no auto psv ) ) SI2C1Inter rupt ( void )
uns igned char din ;
//Detect that communication has s ta r t ed with START b i ti f ( I2C1STATbits . S==1)
//Write to s l av e operat i oni f ( I2C1STATbits .RW==0)
// I f l a s t wr i te was an addres si f ( I2C1STATbits .D A==0)
din = I2C1RCV ; //need to read r e c e i v e bu f f e r to prevent over f l owe l s e
Appendix E. Converter Microcontroller Source Code 102
Converter . Status = I2C1RCV ;// r e l e a s e SCL i f c l ock s t r e t c h occuredI2C1CONbits .SCLREL = 1 ;
//Read from s l ave operat i one l s e i f ( I2C1STATbits .RW==1)
//Need to read addres s b e f o r e sending f i r s t bytei f ( I2C1STATbits .D A==0)
din = I2C1RCV ; //need to read r e c e i v e bu f f e r to prevent over f l ow
// send f i r s t byteConverter . I2CTXIndex = 0 ;I2C1TRN = Converter . I2CTXBuffer [ Converter . I2CTXIndex ] ;Converter . I2CTXIndex++;I2C1CONbits .SCLREL = 1 ;
//Send remainder o f bytese l s e
// check i f master i s done r e c e i v i ng , i e . s l av e done transmi tt ingi f ( I2C1STATbits .ACKSTAT==1)
I2C1CONbits .SCLREL = 1 ;//done transmi tt ing !
e l s e
// check tx bu f f e r rangei f ( Converter . I2CTXIndex==5)
IFS1b i t s . SI2C1IF = 0 ; //Clear the DMA0 In t e r r up t Flag ;
Appendix F
PV Emulator Microcontroller
Source Code
Software development was done using the Microchip MPLAB IDE with an academic
license for the C30 C compiler. The Microchip PICKit 2 was used for in-circuit program-
ming and debugging of the microcontroller.
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗Pro j ect : Photovo l ta i c I−V Curve Emulator Cont r o l l e r∗∗FileName : PV main . c∗Proces sor : Microchip dsPIC33FJ06GS202∗Author : Gregor Simeonov∗Company : Univer s i ty o f Toronto − Energy Systems Group∗Date : 06/07/2010∗∗Notes : D i g i t a l buck conver ter c o n t r o l l e r implementing up to two independent PV∗ I−V ch a r a c t e r i s t i c s . A vo l tage loop measures output vo l tage and r e gu l a t e s a∗ cur r ent r e f e r e n c e cor r espond ing to the I−V ch a r a c t e r i s t i c o f the programmed∗ PV curve .∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/#inc l ude ” p33 f j 06gs202 . h”#inc l ude ”math . h”
//Def ine I /O b i t p o s i t i o n s#de f i n e LO DRV (0 x0008 )#de f i n e HI DRV (0 x0010 )#de f i n e PB START (0 x0100 )#de f i n e LED ON (0 x0800 )#de f i n e PB SEL (0 x0200 ) // b i t 9
//PV I−V Curve Model Var i ab l e sf l o a t Voc , Isc ,Vmp, Imp , Ct , Tr , Rs , Di ,C1 ,C2 , Ins ,A,B;f l o a t Vr ;f l o a t Va ;f l o a t I r ;f l o a t Ia ;i n t Vpv ;
//ADC Var iab l e s#de f i n e DMAX 9231i n t ADC Ipv a t t r i b u t e ( ( addres s (0 x850 ) ) ) ;i n t ADC Vpv a t t r i b u t e ( ( addres s (0 x852 ) ) ) ;
103
Appendix F. PV Emulator Microcontroller Source Code 104
//Current c o n t r o l l e r v a r i a b l e s#de f i n e K 1/2i n t IREF ;i n t Ik ;i n t Duty ;i n t Dpre ;i n t Dnew ;i n t e r r ;
//LUT f o r I−V ch a r a c t e r i s t i cuns igned char Ipv [ 2 5 6 ] ;uns igned char Ipv2 [ 2 5 6 ] ;i n t PVsel ; //0=CURVE1, 1=CURVE2
// I n i t i a l i z e f unc t i on suns igned i n t debounce B ( uns igned i n t bit num ) ;
i n t main ( void )
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ In t e r na l O s c i l l a t o r Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗///Fosc= Fin∗M/(N1∗N2) , Fcy=Fosc /2 , Fin = 7.37 Mhz//Fosc= 7.37∗(43)/(2∗2)=80Mhz f o r Fosc , Fcy = 40MhzPLLFBD=43; // M = PLLFBD + 2CLKDIVbits .PLLPOST=0; // N1 = 2CLKDIVbits .PLLPRE=0; // N2 = 2
builtin write OSCCONH (0 x01 ) ; // New Os c i l l a t o r FRC w/ PLLbuiltin write OSCCONL (0 x01 ) ; // Enable Switch
whi le (OSCCONbits.COSC != 0b001 ) ; // Wait f o r new Os c i l l a t o r to become FRC w/ PLLwhi le (OSCCONbits.LOCK != 1 ) ; // Wait f o r P l l to Lock
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ I /O Port Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/// Set AN0 and AN1, AN2 as analog inputADPCFG = 0xFFF8 ;
//PORT A − s e t analog p ins as inputsTRISA = 0x0000 ;TRISA |= BIT0 + BIT1 + BIT2 ;
//PORTB − s e t push buttons as inputsTRISB = 0x0000 ;TRISB |= PB START + PB SEL + BIT10 ;
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PWM and ADC Clock Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗///PWM and ADC Clock = ( (FRC ∗ 16) / APSTSCLR ) = (7 . 37 ∗ 16) / 1 = ˜ 120MHzACLKCONbits .FRCSEL = 1 ; //FRC prov ides input f o r Aux i l i a ry PLL ( x16 )ACLKCONbits .SELACLK = 1 ; // Auxi l i a ry O s c i l l a t o r prov ides c l ock sour ce f o r PWM & ADCACLKCONbits .APSTSCLR = 7 ; //Divide Aux i l i a ry c l ock by 1ACLKCONbits .ENAPLL = 1 ; //Enable Aux i l i a ry PLLwhi le (ACLKCONbits .APLLCK != 1 ) ; //Wait f o r Aux i l i a ry PLL to LockPWMCON1bits.CAM = 0 ; //Edge−Aligned ModePWMCON1bits.MDCS = 1 ; //Duty cyc l e sour ce = Master Duty Cycle r e g i s t e r
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PWM Module Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/PTCON2bits .PCLKDIV = 0 ; //PWM Pre s ca l e r s e t to 1
PTPER = 9616; //PWM Per iod PTPER = P des i r ed /( p r e s c a l e r ∗1.04 e−9)// P des i r ed = 10us , Fs = 100 kHz
MDC = 0 ; // I n i t i a l Duty Cycle s e t to 0IOCON1bits .PENH = 0 ; //PWM1H i s c on t r o l l e d by PWM moduleIOCON1bits .PENL = 0 ; //PWM1L i s c on t r o l l e d by PWM moduleIOCON1bits .PMOD = 0 ; // S e l e c t Complementary Output PWM mode
DTR1 = 0 ; //No Deadtime
Appendix F. PV Emulator Microcontroller Source Code 105
ALTDTR1 = 0 ; //No ALTDeadtimePHASE1 = 0 ; //No phase s h i f t
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ ADC Module Conf i gurat i on∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/ADCONbits .FORM = 0; // In t eg e r data formatADCONbits . EIE = 0 ; //Early In t e r r up t d i s ab l edADCONbits .ORDER = 0 ; //Convert odd channel f i r s tADCONbits .SEQSAMP = 0 ; // S e l e c t s imultaneous samplingADCONbits .ADCS = 0 ; //ADC clock = FADC/6 = 120MHz / 6 = 20MHz
IFS6b i t s .ADCP0IF = 0 ; //Clear ADC Pair 0 i n t e r r up t f l a gIPC27bits .ADCP0IP = 5 ; // Set ADC Pair 0 i n t e r r up t p r i o r i t yIEC6bits .ADCP0IE = 1 ; //Enable the ADC Pair 0 i n t e r r up t
ADSTATbits .P0RDY = 0 ; //Clear Pai r 0 data ready b i tADCPC0bits . IRQEN0 = 1 ; //Enable ADC Inte r r up t pa i r 0ADCPC0bits .TRGSRC0 = 4 ; //ADC Pair 0 t r i g g e r e d by PWM1 Tr igger
TRGCON1bits .DTM=0; //SINGLE t r i g g e r modeTRIG1bits .TRGCMP=0; //Primary t r i g compare value
TRGCON1bits .TRGDIV = 0x5 ; // Tr i gger generated every 6 th PWM cyc l eTRGCON1bits .TRGSTRT = 63; // enable Tr i gger generated a f t e r 63 PWM cyc l e sTRIG1 = 0 ; // Set ADC to sample at beginning o f sw i tch ing per i odSTRIG1 = 0x0000 ; // secondary t r i g compare value
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PV I−V Curve Look−up−t ab l e (LUT) Generation∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗///PV Model ParametersVoc = 120 ; //Open c i r c u i t vo l tage (V)I s c = 4 . 7 7 ; // Short c i r c u i t cur r ent (A)Vmp = 90; //Maximum power point vo l tage (V)Imp = 4 . 5 ; //Maximum power point cur r ent (A)A = 0.88 e−3; // alpha − curent temperature c o e f f i c i e n t (amps/deg C)B = −0.172; // beta − vo l tage temperature c o e f f i c i e n t ( v o l t s /deg C)Tr = 25 ; // r e f e r e n c e temperature
//CURVE1 i r r a d i a n c e and temperature v a r i a b l e sIns = 0 . 8 ; // cur r ent i r r a d i a n c e input (0 = 0 W/mˆ2 , 1 = 1000 W/mˆ2)Ct = 25 ; // cur r ent temperature input ( deg C)
// Cal cu l ate C2 and C1 c o e f f i c i e n t s f o r CURVE1C2 = (Vmp/Voc − 1)/ l og (1 − Imp/ I s c ) ;C1 = (1 − Imp/ I s c )∗ exp(−Vmp/(C2∗Voc ) ) ;
//Generate PV panel LUT f o r CURVE1 us ing PV c e l l modelf o r (Vpv=0;Vpv<256;Vpv++)
Va = ( f l o a t ) (Vpv∗123/255) ; //8 b i t Vpv sensor value can measure 0 − 123 VVr = Va + B∗(Ct−Tr ) ;I r = I s c ∗(1−C1∗( exp (Vr/(C2∗Voc )) −1)) ;Ia = I r + A∗ Ins ∗(Ct−Tr)+( Ins −1)∗ I s c ;// Limit negat i ve cur r enti f ( ( f l o a t ) Ia <= 0)
Ia = 0 ;//Converter f l o a t r e s u l t to 8−b i t LUT value//8 b i t Ipv r e s o l u t i o n can output max of 6 . 37 AIpv [Vpv ] = ( uns igned char ) ( Ia ∗255/6 . 37 ) ;
//CURVE2 i r r a d i a n c e and temperature v a r i a b l e sIns = 0 . 5 ;Ct = 25 ;
// Cal cu l ate C2 and C1 c o e f f i c i e n t s f o r CURVE2C2 = (Vmp/Voc − 1)/ l og (1 − Imp/ I s c ) ;C1 = (1 − Imp/ I s c )∗ exp(−Vmp/(C2∗Voc ) ) ;
//Generate PV panel LUT f o r CURVE2 us ing PV c e l l modelf o r (Vpv=0;Vpv<256;Vpv++)
Appendix F. PV Emulator Microcontroller Source Code 106
Va = ( f l o a t ) (Vpv∗123/255) ;Vr = Va + B∗(Ct−Tr ) ;I r = I s c ∗(1−C1∗( exp (Vr/(C2∗Voc )) −1)) ;Ia = I r + A∗ Ins ∗(Ct−Tr)+( Ins −1)∗ I s c ;i f ( ( f l o a t ) Ia <= 0)
Ia = 0 ;Ipv2 [Vpv ] = ( uns igned char ) ( Ia ∗255/6 . 37 ) ;
PVsel = 0 ; // S e l e c t CURVE1 i n i t i a l l y
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ Main Program Loop∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/whi le (1)
PORTA &= ˜LO DRV & ˜HI DRV; //Turn o f f gat ingPORTB &= ˜LED ON; //Turn o f f Status l ed
//Wait f o r START button to i n i t i a t e conver terwhi l e ( (PORTB & PB START) != 0)debounce B (PB START) ;
PORTB |= LED ON; //Turn on Status l ed
IOCON1bits .PENH = 1 ; //PWM1H i s c on t r o l l e d by PWM moduleIOCON1bits .PENL = 1 ; //PWM1L i s c on t r o l l e d by PWM modulePTCONbits .PTEN = 1 ; //Enable PWM
ADCONbits .ADON = 1 ; //Enable ADC and Current Cont r o l l e r
//Converter ON, wait f o r user to togg l e conver ter o f fwhi l e ( (PORTB & PB START) != 0)
//Push Button t o g g l e s CURVE1 or CURVE2 c h a r a c t e r i s t i ci f ( (PORTB & PB SEL) == 0)
i f ( PVsel == 0)
PVsel = 1 ;e l s e
PVsel = 0 ;debounce B (PB SEL ) ;
IOCON1bits .PENH = 0 ; //PWM1H i s c on t r o l l e d by PORTAIOCON1bits .PENL = 0 ; //PWM1L i s c on t r o l l e d by PORTAPTCONbits .PTEN = 0 ; // Di sab l e PWM
ADCONbits .ADON = 0 ; // Di sab l e ADC and Current Cont r o l l e r
PORTA &= ˜LO DRV & ˜HI DRV; //Turn o f f FET swi tchesdebounce B (PB START) ;
r e turn 1 ;
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ ADC Inte r r up t Se r v i c e Routine and Current Cont r o l l e r Algorithm∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/void a t t r i b u t e ( ( i n t e r r u p t , no auto psv ) ) ADCP0Interrupt ( )
IFS6b i t s .ADCP0IF=0; //Clear ADC Inte r r up t FlagADC Ipv = ADCBUF0 − 0x0008 ; //Read inductor cur r ent s ensorADC Vpv = ADCBUF1; //Read output vo l tage sensor
Appendix F. PV Emulator Microcontroller Source Code 107
Vpv = ADC Vpv/4 ; //LPF measured PV vol tage w/ b i t s h i f t
//Read LUT of CURVE1 or CURVE2 f o r I r e f at Vpvi f ( PVsel == 0)
IREF = ( i n t ) Ipv [Vpv ] ;e l s e
IREF = ( i n t ) Ipv2 [Vpv ] ;// Propor t i ona l Current Cont r o l l e rDpre = MDC;Ik = ADC Ipv /4 ;e r r = IREF − Ik ;Duty = er r ∗K;Dnew = (Duty+Dpre ) ;//Duty cyc l e l im i t e ri f ( ( i n t )Dnew <= 0)
MDC = 0 ;e l s e i f ( ( i n t )Dnew >= DMAX)
MDC = DMAX;e l s e
MDC = Dnew ;ADSTATbits .P0RDY = 0 ; // Clear the data i s ready in bu f f e r b i t s
/∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ PORTB Push Button Switch Debouncer∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗/uns igned i n t debounce B ( uns igned i n t bit num )
//Switch must be in steady high s ta t e f o r 10ms to be cons ider ed r e l e a s e di n t done = 0 ;uns igned i n t count = 0xFFFF ;whi le ( done == 0)
//Check i f push button pressed , r e s e t counteri f ( (PORTB & bit num)==0)