Reference Design PRD 1168 - Mixed-signal and digital signal processing ICs | Analog ...€¦ · · 2015-03-06Reference Design PRD 1168 FEATURES ... Page 2 of 27 TABLE OF CONTENTS

ADP1043A Evaluation BoardForward Active Clamp

Reference Design PRD 1168

FEATURES Forward Active Clamp with Synchronous rectifier Voltage Feedback Loop Dimensions: 58.4mm×61mm×12mm (Half Brick) Input Voltage Range: -34V to -60V DC Output Voltage/Current: 18V/6A DC 95% Max. Efficiency I2C serial interface Software GUI

PRD 1168 OVERVIEW The PRD 1168 is designed for evaluating ADP1043A application using forward active clamp topology. The ADP1043A is a secondary side power supply controller IC designed to provide all the functions that are typically needed in an AC-DC or isolated DC-DC application. The board output 18V/6A DC from a -34to -60VDC input. The maximum efficiency can reach 95%. It has versatile protection, such as OCP, SCP, OTP etc. And the protection mode also can be programmed through GUI.

Using this board and its accompanying software, the ADP1043A can be interfaced to any PC running Windows 2000, Windows NT, Windows XP or Windows Vista via the computer's USB port.

EVALUATION EQUIPMENT To evaluate this demo board, a PC, oscilloscope, electronic load and a DC power source are required.

Figure 1 Forward Active Clamp Topology.

SR2

Rev. Prelim.A, Oct. 2009 10/30/2009 4:36:00 PM Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2009 Analog Devices, Inc. All rights reserved.


Rev Prelim A Oct.2009 | Page 2 of 27

TABLE OF CONTENTS Features ......................................................................................................................................................................................................... 1

PRD 1168 Overview ..................................................................................................................................................................................... 1

Evaluation Equipment ................................................................................................................................................................................... 1

Evaluation Board Hardware .......................................................................................................................................................................... 4

Specifications ............................................................................................................................................................................................ 4

Topology and operation waveforms .......................................................................................................................................................... 4

Connectors ................................................................................................................................................................................................. 5

Interface Connector ................................................................................................................................................................................... 5

Test Results ................................................................................................................................................................................................... 7

Getting Started............................................................................................................................................................................................... 9

Equipment ................................................................................................................................................................................................. 9

Setup .......................................................................................................................................................................................................... 9

Board Evaluation ......................................................................................................................................................................................... 11

Line and Load Voltage Regulation .......................................................................................................................................................... 11

Output Voltage Setting ............................................................................................................................................................................ 11

Soft Start .................................................................................................................................................................................................. 11

Digital Filter – Transient Analysis ........................................................................................................................................................... 12

PWM – Switching Frequency ................................................................................................................................................................. 13

Light Load Optimization ......................................................................................................................................................................... 13

Primary Side Current Sense and Secondary Side Current Sense ............................................................................................................. 13

Flags and Fault configurations ................................................................................................................................................................ 14

Flag and Fault Response Configuration: ............................................................................................................................................. 14

Appendix ..................................................................................................................................................................................................... 16

Schematic ................................................................................................................................................................................................ 16

Bill of Materials ...................................................................................................................................................................................... 18

PCB Layout ............................................................................................................................................................................................. 20

Board Setting ........................................................................................................................................................................................... 22

Register Setting ....................................................................................................................................................................................... 23

NOTES ........................................................................................................................................................................................................ 27



TABLE OF FIGURES

Figure 1 Forward Active Clamp Topology. ................................................................................................................................................... 1

Figure 2 Driver Signal ................................................................................................................................................................................. 4

Figure 3 Pin Connection Diagram (Bottom view) ....................................................................................................................................... 5

Figure 4 Eval Board Picture(Bottom View) ................................................................................................................................................. 6

Figure 5 Test Configuration for the Evaluation Board ................................................................................................................................. 6

Figure 6 Efficiency. ...................................................................................................................................................................................... 7

Figure 7 Output Voltage Response ................................................................................................................................................................ 7

Figure 8 Output Voltage Ripple at No Load Current. ................................................................................................................................... 7

Figure 9 Output Voltage Ripple at Nominal Load Current. .......................................................................................................................... 7

Figure 10 Turn-on Transient at No Load Current. ........................................................................................................................................ 8

Figure 11 Turn-on Transient at Nominal Load Current................................................................................................................................. 8

Figure 12 Output Over Current. .................................................................................................................................................................... 8

Figure 13 Output Short Circuit. .................................................................................................................................................................... 8

Figure 14 Connection with Computer .......................................................................................................................................................... 9

Figure 15 Getting Started ............................................................................................................................................................................. 9

Figure 16 Load Board Setting .................................................................................................................................................................... 10

Figure 17 Graphical User Interface .............................................................................................................................................................11

Figure 18 General Settings Window .......................................................................................................................................................... 12

Figure 19 Digital Filter Window ................................................................................................................................................................ 12

Figure 20 Timing Window ......................................................................................................................................................................... 13

Figure 21 Light Load Current Threshold ................................................................................................................................................... 13

Figure 22 Flags .......................................................................................................................................................................................... 14

Figure 23 Fault Configurations .................................................................................................................................................................. 15

Figure 24 Main Circuit .............................................................................................................................................................................. 16

Figure 25 ADP1043A Control Circuit ....................................................................................................................................................... 17

Figure 26 Aux. Power Circuit .................................................................................................................................................................... 17

Figure 27 Top View of Board ..................................................................................................................................................................... 20

Figure 28 Bottom View of Board ............................................................................................................................................................... 21



EVALUATION BOARD HARDWARE SPECIFICATIONS

• Nominal input voltage: -48 DC

• Input voltage range: -34~-60V DC

• Nominal output voltage: 18V DC

• Nominal output current: 6A DC

• Switching frequency: 180kHz

• Efficiency: 95% at full load

TOPOLOGY AND OPERATION WAVEFORMS A typical DC/DC switching power supply is the basis for the eval board. It is a forward active clamp with synchronous rectifier topology, shown as Figure 1. The forward active clamp converter is an isolated converter, which operates with variable duty cycle which can be over 50%, so that a wide range input converter can provide high efficiency under the conditions of regulated output.

The primary side consists of the input terminals, main switch, aux switch (PMOS) and main transformer. The gate driver signal for the switches comes from the ADP1043A, through the iCoupler and the drivers. There is also a current transformer (CT), to transmit the primary side current information to the ADP1043A on the secondary side.

Figure 2 Driver Signal

Q1

Q2

SR1

SR2

D t

t

t

t1-D

Ts

The secondary side power stage consists of the synchronous rectifiers, inductor, output capacitor and sensing resistor. This provides 18V @ 6A at the output. The ADP1043A is located on the secondary side. The ADP1043A provides the feedback signal that is used to regulate the voltage, limit the current, allow current sharing and shutdown to be implemented. Low side current sensing is used.

There is a 8pins connector on the board. 4pins of the connector is for I2C. This allows the PC software to communicate with the eval board through the USB port of the PC. The user can readily change register settings on the ADP1043A this way, and also monitor the status registers.

The eval board is designed with a 2mOhm RSENSE resistor. The power supply is designed to support a maximum continuous output of 6 A.

A variable load is required to perform a thorough evaluation. The output voltage is available between P4 and P5. This is also where the load should be connected.

The power supply will be in Continuous Conduction Mode. If the synchronous rectifiers are enabled, the power supply will remain in CCM mode over the full load range.



Figure 3 Pin Connection Diagram (Bottom View)

CONNECTORS The connections to the eval board are shown in Table 1.

Table 1. Power module pin assignment Pin Designation Eval Board Function

P1 Vin- Negative Input

P2 On/Off Remote Control

P3 Vin+ Positive Input

P4 Vo- Negative Output

P5 Vo+ Positive Output

P6 Interface Interface

INTERFACE CONNECTOR The signal pins are P6.1~P6.8 as shown in Table 2. Among them P6.7, P6.5, P6.3 and P6.1 are connected to USB dongle.

Table 2. Signal pins Pin Designation Pin Designation

P6.1 GND P6.5 SCL

P6.2 PGOOD P6.6 Vsen-

P6.3 SDA P6.7 5V

P6.4 Vsen+ P6.8 Address



Figure 3 shows the photo of eval board. Figure 4 provides a typical circuit diagram which details the filtering for normal operation and output ripple test

Figure 4 Eval Board Picture(Bottom View)

Figure 5 Test Configuration for the Evaluation Board



TEST RESULTS

Figure 6 Efficiency at nominal output voltage vs. load current for minimum, nominal, and maximum input voltage at 25°C.

Figure 7 Output voltage response to step-change in load current (25%-75%-25% of Iout(max): dI/dt = 1A/μs). Ch 2: Vout (500mV/div), Ch 4:

Iout (2A/div).

Figure 8 Output voltage ripple at nominal input voltage and no load current . Ch 2: Vout (50mV/div), Bandwidth: 20 MHz.

Figure 9 Output voltage ripple at nominal input voltage and nominal load current. Ch 2: Vout (50mV/div), Bandwidth: 20 MHz.



Figure 10 Turn-on transient at nominal input voltage and no load current. Ch 2: Vout (5V/div), Ch 4: Load Current (5A/div). Figure 11 Turn-on transient at nominal input voltage and nominal load

current. Ch 2: Vout (5V/div), Ch 4: Load Current (5A/div).

Figure 12 Output over current protection function. Increase load current at nominal input voltage to over current limit. Ch 2: Vout

(5V/div), Ch 4: Load Current (5A/div).

Figure 13 Output short circuit protection function. Turn on at nominal input voltage and rated load current then short circuit. Ch 2: Vout

(5V/div), Ch 4: Load Current (5A/div).



GETTING STARTEDEQUIPMENT

• DC Power Supply 0-60V (Sorensen DLM150-20E) • Electronic Load capable of 18V/6A (Chroma 63112) • Oscilloscope (Tektronix TDS5054B) • PC with ADP1043A GUI installed • Precision Digital Multi-meters (Agilent 34401A) • Current Probe for measuring up to 6A DC (Tektronix TCP202)

SETUP NOTE: DO NOT CONNECT THE USB CABLE TO THE EVAL BOARD UNTIL AFTER THE SOFTWARE HAS BEEN INSTALLED.

Figure 14 Connection with Computer

1. Install the ADP1043A software. Refer to the Quick Start Guide that comes on the CD (If already installed, skip to the next step).

2. Connect the evaluation board to the USB port on the computer, using the “USB to I2C interface” dongle. If the dongle driver was not previously installed, run the software from the Start Menu under “Programs/ADI/ADP1043A”.

3. The software should report that the ADP1043A has been located on the board. Click Finish to proceed to the Main Software Interface Window.

Figure 15 Getting Started

4. Click on the icon and “Load Board Setting”: select the “PRD1168.43b file”. This file contains all the board information including values of shunt and voltage dividers



Figure 16 Load Board Setting

5. The ADP1043A is pre-programmed and calibrated, so there is no programming necessary.

6. Connect an electronic load at the output.

7. For the input voltage source, a DC power supply can be used. The input voltage range is -34V to -60 VDC (-48VDC is recommended). This input voltage is the signal which will be regulated to provide a 18V/6A supply at the output. Set the voltage to -48VDC.

8. The eval board should now up and running, and ready to evaluate. The output should be 18 VDC.



BOARD EVALUATION The ADP1043A is optimized for improving the power supply design and evaluation process. The goal of this eval kit is to allow the user to get an insight into the flexibility offered by the extensive programming options offered by the ADP1043A.

The ADP1043A performs many monitoring and housekeeping functions in the power supply. The eval board allows the user to simulate various events that could affect the ADP1043A in a working system. The user can monitor how the ADP1043A handles this event in many ways. One way is to use an oscilloscope and/or multi-meter, and probe the eval board, to see various conditions in the system. The user can also use the software to monitor the conditions of the ADP1043A, and how it has reacted to the event. The following section gives some experiments that the user might typically evaluate.

LINE AND LOAD VOLTAGE REGULATION Vary the input voltage from -34VDC to -60VDC. The output voltage remains18V. Vary the load current from 0 to 6A. The output voltage remains 18V. The line and load regulation are less than ±1%.

Figure 17 Graphical User Interface

OUTPUT VOLTAGE SETTING The output voltage setting is programmable. Using the Voltage Setting window in the software, adjust the output voltage (using the o/p trim menu). Monitor the actual output voltage of the power supply using the software or a multi-meter, or looking at the output voltage reading on the electronic load. It should match the programmed value. This will be used to calibrate the power supply in the production environment. By doing this evaluation, the user can see how the ADP1043A can be trimmed digitally to adjust the output voltage.

SOFT START Once the input voltage is applied it is possible to test the Soft Start of the ADP1043A. The settings are located in the General Settings Window. Please refer to the Software Reference Guide for a detailed explanation of all the controls (EVAL-ADP1043A-GUI-RG).



Figure 18 General Settings Window

Soft Start is enabled and set to 20ms. You can experiment with different times.

DIGITAL FILTER – TRANSIENT ANALYSIS The digital filter can be changed using the software. The effect on transient analysis can be evaluated this way. Connect a switching electronic load to the output of the eval board. The load should be set to switch between 25%-75%, changing every 10msecs. Set up an oscilloscope to capture the transient waveform of the power supply output.

Use a differential probe on the scope, connecting it to the eval board output. Turn on the load, and note the waveform response.

Now, vary the digital filter using the software. Click on “Filter Settings” the window shows the filter settings for Normal mode. Click on the curve to move position of poles, zeroes and gains.

Figure 19 Digital Filter Window

The transient response will change. This evaluation shows the user how the digital filter can easily be programmed to optimize the transient response of the power supply.



PWM – SWITCHING FREQUENCY The converter switching frequency is programmable. In the “PWM & SR Settings” change the switching frequency.

The minimum and maximum modulation limits can also be modified. Figure 20 Timing Window

NOTE: It is recommended to evaluate this feature with the power supply turned off. This prevents the chance of damaging the power supply by introducing shoot-through.

LIGHT LOAD OPTIMIZATION The ADP1043A can be programmed to optimize performance when a output current drops below a certain level.

The threshold for light load mode can be programmed in the digital filter window.

Once the current will drop below this level the sync rectifiers (SR1 and SR2) will be disabled. The “Light Load Mode Settings” will be used. The response time for the ADP1043A to switch from one mode to another is between 10 and 20ms.

The light load mode can be disabled by selecting a Light Load Current Threshold of 0%. Figure 21 Light Load Current Threshold

PRIMARY SIDE CURRENT SENSE AND SECONDARY SIDE CURRENT SENSE Current sensing is available for both the primary side current and the secondary side current. Primary side current sensing is performed using the current transformer, T1. Secondary side current sensing uses a low-side sense resistor.

Open the Monitor window in the software. Click on the Flags and Readings tab. Adjust the load current from 0A to 6A. The input current and output current values will change in the software, matching the changes being made at the load.



FLAGS AND FAULT CONFIGURATIONS Open the Monitor window in the software. Click on the Flags and Readings tab. The window will show all of the fault flags. If a flag is set, then there is a red box next to the flag. If the flag is ok, then there is a green box next to the flag.

Set the load current to 0.3A. The CS2 OCP flag should be green. Figure 22 Flags

Now change the load to 8A. The CS2 OCP flag should now have turned red, because the CS2 OCP threshold has been reached. The board wills ender in hiccup mode and try and restart.

Set the load back to 2A, and the flag turns green again. This shows how the user can easily monitor the health of the power supply by monitoring the status of the various flags.

Flag and Fault Response Configuration: The ADP1043A is programmed to respond to the various fault conditions in the Fault Configuration Tab.



Figure 23 Fault Configurations

You can change the resolve issue to “Remain Disabled”. If the over current is applied again the ADP1043A will shut down and remain off until PSON is cycled.

This evaluation shows how it is quite easy to configure the response to a fault condition. Change the load back to 2A, then toggle the PS_ON switch to restart the power supply.



APPENDIXSCHEMATIC

Figure 24 Main Circuit

D3MURA110

12

Vout+Vout+

Vout-Vout-

C551uF

C541uF

AGN

D

CS+ TR4

C11

10uF

C12

10uF

12V_SEC

3V3_SEC

Vout+

PGNDPGND

R92

5.1k

C5

2.2uF

U9

ADP3634

EN 1

INA 2

GND3

INB 4

OTW8

OUTA7

VS6

OUTB5

PAD

9

C6

2.2uF

C15

2.2uF

JP3

Vin-

1 1

JP1

Vin+

11

R10 10K

C768nF

OUTA

OUTBOUTB

OUTA

R89 2m

Vin+

12V_SEC

Vin+

12V_SEC5V_PRI 5V_PRI

Vin-

CS+

Vin-

CS+

AGNDAGND

Vin+

0

Vout-

C4810nF

R1110K

Vin-

Q3 IPD053N08N3

R62 220 0

R658.2K

U8

ADP3634

EN 1

INA2

GND3

INB 4

OTW8

OUTA7

VS6

OUTB5

PA

D9

5V_PRI

C3810nF

C401uFJP4

ON/OFF1

1

PSON

D12

BAV70WT1

D13ZR431F01

Q9

MM

BT

2907

AW

1

3V3_SEC

R66330K

R68

10K

R69100K

R721K

R99 5.1K

R102

220

PGND

L5 32uH

SR1

C33 0.1uF

Q4

IPD

053N

08N

3

R90 5.1k

T4

BEQ-25

1 3

2 4

SR2

R935.1k

C3910nF

SR1SR2

SR1

SR2

T1 PA1005.100NL

73

81

C181uF

C20

0.1uF

12V_PRI

3V3_SEC

R152

C36

0.1uF

U14

ADP1720ARMZ-3.3

GND1

IN2

OUT3

EN4

GND15GND2 6GND37GND48

C690.1uF

0

12V_SEC

EN_LDO

R106 10K

R610K

M7

Si3

437

5V_PRI

R54.7

U4

ADUM3210

VDD11

VIA2

VIB3

GND14 GND2 5VOB6VOA7VDD2 8

JP5Vout-

11

C19

0.1uF

0

R16 2

Q2

IPD

200N15N

3

R1005.1K

C210.1uF

3V3_SEC3V3_SEC

U3

ADUM3210

VDD11

VIA 2

VIB3

GND14

GND25 VOB6 VOA7 VDD28

C46 10nF

C221uF

PSONPSON

R91 5.1k

12V_PRI12V_PRI

C47

10nF

R1010

5V_PRI

JP11

Vout+

11

C13

4.7uF

OUTAOUTB

R1045.1K

TR4 TR4

C9

10uF

C10

4.7uF

R710K

D7

1N58

19H

W1

2

D5

1N58

19H

W1

2 Q7

MMBT4403

D2

MURA110

1 2



Figure 25 ADP1043A Control Circuit

PGOOD

C240.1uF

C260.1uF

VS3- PGNDPGND

R67 100

R70 1000 0

00

C2833pF

C27

0.1uF12V_SEC12V_SEC

R38 10

C58

1nF

SDA

SCLR17 2

R28

10K

TR4

3V3_SEC

R31

10K

JP10

Connector

1 23 45 67 8

Share

C2933pF

ADD

C3033pF

R43

2.2K

C3133pF

RT1100KOhm

R442.2K

R402.2K

R322KF

R452.2K

PSONPSON

3V3_SEC

R42

49.9K 0.1%

R274.7K

C25

100pFR74 NC

TR4 TR4

C32100pF

VS3+

PGND Vout-

R2934KF

SR1SR1

SR2SR2

R7110K

R33

34KF

OUTAOUTA

3V3_SEC3V3_SEC

D4

1N4148

R352KF

0

3V3_SEC

Vout-

5V

R36

2KFCS

2-

OUTB

CS

2+

OUTB

OUTA

12V_SEC

OUTB

Vsen-

0

SR1

AGND

U6

ADP1043A

SR2

10

SR1

9

CS17

ACSN

S6

SHAREo23

SHAREi 24

SDA

18SC

L17

VS3+ 32

VS3-31

OUTD14OUTC13OUTB12OUTA11

OUTAUX15

PG

OO

D1

22

PG

OO

D2

21

FLA

GIN

20

RT

D28

PS

ON

19

CS2

-4

CS2

+5

PG

ND

8

VS1

3

VS2

1

GA

TE16

VDD 27

AGND 2

VCORE26

DGND 25

RES

30

ADD

29

TPAD 33

AD

D

SR2

0

CS+

Vsen+

0

CS+CS+

PGND

AGNDAGND

JP9SHORTPIN

1 2

0

VS3+

VS1

D6BAV70WT1

Vsen+

R6410K

0

Vout+

PSON

R25 680

0

R4110K

R30

25

Vsen-

Vout+Vout+

Vout-Vout-

Vout+

PGOOD

R2310

R2634KF

Vout-

R34

25

C59

1nF

Figure 26 Aux. Power Circuit

R7620K

C43

10uF/16V

12V_PRI

3V3_SEC

12V_PRI

3V3_SEC

5V_PRI 5V_PRI

R825.1K

C34

0.1uF

C52

1000pF/2000V

C53

220pF

C45390pF

C41470pF/250V

Vin+

D81N41

48

Vin+

C50

1nF

0

12V_PRI

D18

MMBZ5231BLT/5.1V

31 2

Vout-

12V_SEC

AUX. Power

D16MMBD1504A

D15BAV70WT1

T3

BSER9-77

2

4

31

5

876

D17BAV70WT1

C561uF

C350.1uF

C49

10uF/16V

Vout-Vout-

12V_SEC12V_SEC

Vin+

R78499K

R8455K

R8636K

R8310K

R7920K

U12

NCP1031A

GND1

CT 2

VFB 3

COM4

OV5 UV6 VCC7 VD8

9G

ND

1

R80680

R81680

R7720K

AGNDAGND

R85499K

PGNDPGND

Vin-Vin-

5V_PRI



BILL OF MATERIALS

Item Reference Description Part Number Manufacture Qty

1 C5,C6,C15 CAP 2.2uF/100V X7R 1210 C3225X7R2A225K TDK 3 2 C7 CAP 68nF/250V X7R 1206 C3216X7R2E683K TDK 1 3 C9,C11,C12 CAP 10uF/25V X7R 1210 C3225X7R1E106K TDK 3 4 C10,C13 CAP 4.7uF/25V X7R 1206 C3216X7R1E475K TDK 2

5 C18,C22,C40,C54 C55,C56

CAP 1uF/16V X7R 0603 C1608X7R1C105K TDK 6

6 C19,C20,C21,C24,C26,C27,C34,C35,C36,C69

CAP 0.1uF/16V X7R 0402 C1005X7R1C104K TDK 10

7 C25 CAP 100pF/50V C0G 0402 C1005C0G1H101J TDK 1 8 C28,C29,C30,C31 CAP 33pF/50V C0G 0402 C1005C0G1H330J TDK 4 9 C32 CAP 100pF/50V X7R 0402 C1005X7R1H101J TDK 1 10 C33 CAP 0.1uF/50V X7R 0603 C1608X7R1H104K TDK 1 11 C38,C39,C48 CAP 10nF/25V X7R 0402 C1005X7R1E103K TDK 3 12 C41 CAP 470pF/250V COG 0603 C1608C0G2E471J TDK 1 13 C43,C49 CAP 10uF/16V X7R 1206 C3216X7R1C106K TDK 2 14 C45 CAP 390pF/50V C0G 0402 C1005C0G1H391J TDK 1 15 C46,C47 CAP 10nF/250V X7R 0805 C2012X7R2E103K TDK 2 16 C50,C58,C59 CAP 1nF/50V X7R 0402 C1005X7R1H102K TDK 3 17 C52 CAP 1000pF/2000V X7R 1808 C4520X7R3D102K TDK 1 18 C53 CAP 220pF/50V X7R 0402 C1005X7R1H221K TDK 1 19 D2,D3 Diode 1A 100V MURA110 On Semi 2 20 D4,D8 Diode 150mA 75V 1N4148 Fairchild 2 21 D5,D7 Diode 1A 40V 1N5819HW Fairchild 2 22 D6,D12,D15,D17 Diode 200mA 70V BAV70WT1 Fairchild 4 23 D13 Adjustable from Vref=2.5V 1% ZR431F01 Zetex 1 24 D16 Diode 200mA 200V MMBD1504A Fairchild 1 25 D18 Zener 5.1V MMBZ5231BLT On Semi 1

26 JP1,JP3,JP4,JP5 JP9,JP10,JP11

Terminal

Any 1

27 L5 LDC‐25‐7 INDUCTOR Jinchuan 1 28 M7 Aux Switch(PMOS) Si3437 Vishay 1 29 Q2 MOSFET IPD200N15N3 Infineon 1 30 Q3 MOSFET IPD053N08N3 Infineon 1 31 Q4 MOSFET IPD068N10N3 Infineon 1 32 Q7 PNP ‐600mA ‐40V MMBT4403 On Semi 1 33 Q9 PNP ‐800mA ‐40V MMBT2907AWT1 On Semi 1 34 RT1 THERMISTOR 100KOHM 1% 0603 Vishay 1 35 R5 RES 4.7OHM 5% 1/10W 0603 Generic 1

36 R6,R7,R10,R11 R68,R83,R106

RES 10KOHM 5% 1/16W 0402

Generic 7

37 R15,R16 RES 2OHM 5% 1/10W 0603 Generic 2



38 R17 RES 2OHM 5% 1/16W 0402 Generic 1 39 R23,R38 RES 10OHM 5% 1/16W 0402 Generic 2 40 R25 RES 680OHM 5% 1/16W 0402 Generic 1 41 R26,R29,R33 RES 34KOHM 1% 1/16W 0402 Generic 3 42 R27 RES4.7KOHM 5% 1/10W 0603 Generic 1

43 R28,R31,R41,R64,R71 RES 10KOHM 1% 1/16W 0402 Generic 5

44 R30,R34 RES 25OHM 5% 1/10W 0603 Generic 2 45 R32,R35,R36 RES 2KOHM 1% 1/16W 0402 Generic 3 46 R40,R43,R44,R45 RES 2.2KOHM 1% 1/16W 0402 Generic 4 47 R42 RES 49.9KOHM 0.1% 1/16W 0402 Generic 1 48 R62,R102 RES 220OHM 5% 1/16W 0402 Generic 2 49 R65 RES 8.2KOHM 1% 1/16W 0402 Generic 1 50 R66 RES 330KOHM 1% 1/16W 0402 Generic 1 51 R67,R70 RES 100OHM 5% 1/16W 0402 Generic 2 52 R69 RES 100KOHM 5% 1/10W 0603 Generic 1 53 R72 RES 1KOHM 5% 1/16W 0402 Generic 1 54 R74 RES 0OHM 5% 1/16W 0402 Generic 1 55 R76,R77 RES 20KOHM 5% 1/10W 0603 Generic 2 56 R78,R85 RES 499KFOHM 5% 1/10W 0603 Generic 2 57 R79 RES 20KOHM 5% 1/16W 0402 Generic 1 58 R80,R81 RES 680OHM 5% 1/8W 0805 Generic 2 59 R82,R99,R100,R104 RES 5.1KOHM 5% 1/16W 0402 Generic 4 60 R84 RES 55KOHM 5% 1/16W 0402 Generic 1 61 R86 RES 36KOHM 5% 1/16W 0402 Generic 1 62 R89 RES 2m OHM 1% 1/4W 1206 Vishay 1 63 R90,R91,R92,R93 RES 5.1KOHM 1/4W 1206 Generic 4 64 R101 RES 0OHM 5% 1/16W 0402 Generic 1 65 T1 PA1005.100NL 20A 1:100 Pulse 1 66 T3 AUX TRANSFORMER BSER9‐77 Jinchuan 1 67 T4 MAIN TRANSFORMER BEQ‐25 Jinchuan 1 68 U3,U4 iCoupler ADuM3210 ADI 2 69 U6 Secondary PWM Controller ADP1043A ADI 1 70 U8,U9 Dual channel driver IC ADP3634 ADI 2 71 U12 NCP1031A NCP1031A On Semi 1

72 U14 LDO ADP1720ARMZ‐3.3‐R7

ADI 1



PCB Layout

Figure 27 Top view of Board



Figure 28 Bottom View of Board



BOARD SETTING

Input Voltage = 48 V

N1 = 5

N2 = 4

R (CS2) = 2.07 mOhm

I (load) = 6 A

R1 = 34 KOhm

R2 = 2 KOhm

C3 = 0.001 uF

C4 = 0.001 uF

N1 (CS1) = 1

N2 (CS1) = 100

R (CS1) = 10 Ohm

ESR (L1) = 5 mOhm

L1 = 14 uH

C1 = 13.2 uF

ESR (C1) = 1 mOhm

ESR (L2) = 0 mOhm

L2 = 0 uH

C2 = 240 uF

ESR (C2) = 35 mOhm

R (Normal-Mode) (Load) = 3 Ohm

R (Light-Load-Mode) (Load) = 36 Ohm

Cap Across R1 & R2 = 0 "(1 = Yes: 0 = No)"

Topology = 4 (0 = Full Bridge: 1 = Half Bridge: 2 = Two Switch Forward: 3 = Interleaved Two Switch Forward: 4 = Active Clamp Forward: 5 = Resonant Mode: 6 = Custom)

Switches / Diodes = 1 (0 = Switches: 1 = Diodes)

High Side / Low Side Sense (CS2) = 0 (1 = High-Side: 0 = Low-Side Sense)

Second LC Stage = 1 (1 = Yes: 0 = No)

CS1 Input Type = 0 (1 = AC: 0 = DC)

R3 = 0 KOhm

R4 = 0 KOhm

PWM Main = 1 (0 = OUTA: 1 = OUTB: 2 = OUTC: 3 = OUTD: 4 = SR1: 5 = SR2: 6 = OUTAUX)



REGISTER SETTING

Reg(0h) = F8h - Fault Register 1

Reg(1h) = 0h - Fault Register 2



Reg(4h) = F8h - Latched Fault Register 1

Reg(5h) = 0h - Latched Fault Register 2



Reg(8h) = 33h - Fault Configuration Register 1

Reg(9h) = 3Fh - Fault Configuration Register 2

Reg(Ah) = F0h - Fault Configuration Register 3

Reg(Bh) = 0h - Fault Configuration Register 4

Reg(Ch) = 0h - Fault Configuration Register 5

Reg(Dh) = 0h - Fault Configuration Register 6

Reg(Eh) = 81h - Flag Configuration

Reg(Fh) = 66h - Soft-Start Flag Blank

Reg(10h) = 0h - First Flag ID

Reg(11h) = FFh - Reserved

Reg(12h) = 0h - VS1 Value

Reg(13h) = 0h - CS1 Value

Reg(14h) = 0h - CS1 x VS1 Value

Reg(15h) = 0h - VS1 Voltage Value



Reg(18h) = 0h - CS2 Value

Reg(19h) = 0h - CS2 x VS3 Value

Reg(1Ah) = 4DE0h - RTD Temperature Value

Reg(1Bh) = FFh - Reserved

Reg(1Ch) = FFh - Reserved

Reg(1Dh) = 0h - Share Bus Value

Reg(1Eh) = C0h - Modulation Value

Reg(1Fh) = FFh - Line Impedance Value


Reg(21h) = 87h - CS1 Gain Trim

Reg(22h) = 2Ah - CS1 OCP Limit

Reg(23h) = 3Bh - CS2 Gain Trim

Reg(24h) = 10h - CS2 Offset Trim



Reg(25h) = 0h - CS2 Digital Trim

Reg(26h) = 3Ah - CS2 OCP Limit

Reg(27h) = 0h - CS1 and CS2 OCP Setting

Reg(28h) = 0h - VS Balance Gain Setting

Reg(29h) = 0h - Share Bus Bandwidth

Reg(2Ah) = 30h - Share Bus Setting

Reg(2Bh) = 1Bh - Temperature Trim

Reg(2Ch) = 62h - PSON/Soft Start Setting

Reg(2Dh) = 0h - Pin Polarity Setting

Reg(2Eh) = 12h - Modulation Limit

Reg(2Fh) = 0h - OTP Threshold

Reg(30h) = C0h - OrFET

Reg(31h) = A4h - VS3 Voltage Setting

Reg(32h) = 0h - VS1 Overvoltage Limit

Reg(33h) = Ah - VS3 Overvoltage Limit

Reg(34h) = 0h - VS1 Undervoltage Limit

Reg(35h) = 0h - Line Impedance Limit

Reg(36h) = 7h - Load Line Impedance


Reg(38h) = CAh - VS1 Trim

Reg(39h) = 9h - VS2 Trim

Reg(3Ah) = CFh - VS3 Trim

Reg(3Bh) = 0h - Light Load Disable Setting

Reg(3Ch) = 5h - Silicon Revision ID

Reg(3Dh) = 41h - Manufacturer ID

Reg(3Eh) = 43h - Device ID

Reg(3Fh) = 10h - OUTAUX Switching Frequency Setting

Reg(40h) = 1Fh - PWM Switching Frequency Setting

Reg(41h) = 0h - PWM 1 Positive Edge Timing

Reg(42h) = 20h - PWM 1 Positive Edge Setting

Reg(43h) = 24h - PWM 1 Negative Edge Timing

Reg(44h) = 48h - PWM 1 Negative Edge Setting


Reg(46h) = 0h - PWM 2 Positive Edge Setting

Reg(47h) = 22h - PWM 2 Negative Edge Timing



Reg(4Ah) = 28h - PWM 3 Positive Edge Setting

Reg(4Bh) = 42h - PWM 3 Negative Edge Timing



Reg(4Ch) = E0h - PWM 3 Negative Edge Setting

Reg(4Dh) = 0h - PWM 4 Positive Edge Timing

Reg(4Eh) = 0h - PWM 4 Positive Edge Setting

Reg(4Fh) = 11h - PWM 4 Negative Edge Timing


Reg(51h) = 2h - SR 1 Positive Edge Timing

Reg(52h) = 70h - SR 1 Positive Edge Setting

Reg(53h) = 22h - SR 1 Negative Edge Timing

Reg(54h) = 88h - SR 1 Negative Edge Setting

Reg(55h) = 23h - SR 2 Positive Edge Timing

Reg(56h) = A8h - SR 2 Positive Edge Setting

Reg(57h) = 1h - SR 2 Negative Edge Timing

Reg(58h) = 20h - SR 2 Negative Edge Setting

Reg(59h) = 0h - PWM AUX Positive Edge Timing

Reg(5Ah) = 0h - PWM AUX Positive Edge Setting

Reg(5Bh) = 3Ah - PWM AUX Negative Edge Timing

Reg(5Ch) = F0h - PWM AUX Negative Edge Setting

Reg(5Dh) = 98h - PWM and SR Pin Disable Setting

Reg(5Eh) = 0h - Password Lock

Reg(5Fh) = 0h - Soft-Start Digital Filter LF Gain Setting

Reg(60h) = 7h - Normal Mode Digital Filter LF Gain Setting

Reg(61h) = F8h - Normal Mode Digital Filter Zero Setting

Reg(62h) = F7h - Normal Mode Digital Filter Pole Setting

Reg(63h) = 11h - Normal Mode Digital Filter HF Gain Setting

Reg(64h) = Eh - Light Load Digital Filter LF Gain Setting

Reg(65h) = D6h - Light Load Digital Filter Zero Setting

Reg(66h) = D5h - Light Load Digital Filter Pole Setting

Reg(67h) = 12h - Light Load Digital Filter HF Gain Setting

Reg(68h) = 0h - Dead Time Threshold

Reg(69h) = 0h - Dead Time 1

Reg(6Ah) = 0h - Dead Time 2

Reg(6Bh) = 0h - Dead Time 3

Reg(6Ch) = 0h - Dead Time 4

Reg(6Dh) = 0h - Dead Time 5

Reg(6Eh) = 0h - Dead Time 6

Reg(6Fh) = 0h - Dead Time 7

Reg(70h) = 14h -

Reg(71h) = Bh -

Reg(72h) = 53h -



Reg(73h) = 9h -

Reg(74h) = 0h -

Reg(75h) = FFh -

Reg(76h) = FFh -

Reg(77h) = 0h -

Reg(78h) = 0h -

Reg(79h) = 1Bh -

Reg(7Ah) = 2h -

Reg(7Bh) = FFh - Factory Default Settings

Reg(7Ch) = 1h - EEPROM X Address

Reg(7Dh) = 35h - EEPROM Y Address

Reg(7Eh) = 35h - EEPROM Register

Reg(7Fh) = FFh -

Reg(80h) = 35h -

Reg(81h) = 35h -

Reg(82h) = 35h -



NOTES

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