This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
8/10/2019 Reconfigurable Single Precision Floating Point Multiplier Using Reversible Logic
ARATI B. SUDHAKAR1 & VEENA M. B.2 1Department of Telecommunication Engineering, Vemana Institute of Technology, Bangalore, Karnataka, India
2Department of Electronics & Communication, BMSCE, Bangalore, Karnataka, India
ABSTRACT
Now a days Reversible logic has received great attention due to their ability to reduce the power dissipation. It is
the main requirement in low power Very large scale integration (VLSI) design. Using reversible logic circuits Quantum
computers are constructed which has applications in various research areas such as DNA computing, low power CMOS
design, optical computing, nanotechnology bio-informatics, quantum computing, and thermodynamic technology. It is very
difficult to construct quantum circuits without the use of reversible logic gates. Since fan-out and feedback is not allowed
in reversible logic circuits, Synthesis of reversible logic circuits is significantly more complicated than traditional
irreversible logic circuits. There are several reversible logic gates. Some of them are: Taffoli gate, Fredkin gate, Feynmen
gate, Peres gate, etc. These logical gates as well as some derivatives of these gates are explored in this project and will be
used conveniently to design the single precision floating point multiplier to improve its area, speed and power parameters.
KEYWORDS:
Reversible Logic, Multiplier Circuit,
VLSI
INTRODUCTION
INTRODUCTION TO REVERSIBLE CIRCUITS
In order to implement reversible computation, judge its limits and to estimate its cost, it is formally used in terms
of gate-level circuits. For example, the inverter is reversible because it can be undone. The exclusive or gate is irreversible
since its inputs cannot be unambiguously reconstructed from an output value. However, it is possible to define a reversible
version of the XOR gate—the controlled NOT gate (CNOT) — by preserving one of the inputs. The three-input CNOT
gate is called as Toffoli gate, which preserves two of its inputs a, b and replaces the third input c by c. (a . b). With cdot b
= 1 this gives the NOT function, and with c=0, this gives the AND function. Therefore the Toffoli gate is universal and can
be used to implement any reversible Boolean function. Generally, reversible gates have the equal number of inputs andoutputs. The connections of reversible gates without any loops and fanouts are called as a reversible circuit.
Thus, reversible circuits contain same number of input and output wires, each passing through an entire circuit.
In 1960s the reversible logic circuits have been first motivated by considering zero-energy computation as well as
practical improvement of bit-manipulation transforms in cryptography and computer graphics theoretically. Since the
1980s, reversible circuits have attracted interest as components of quantum algorithms, and more recently in photonic and
nano-computing technologies where some switching devices offer no signal gain. Surveys of reversible circuits, their
construction and optimization as well as recent research challenges is available.
Impact Factor (JCC): 4.9467 Index Copernicus Value (ICV): 3.0
Fundamentals of Reversible Logic
R. Landauer's research in the early 1960s demonstrated that irreversible hardware computation, regardless of its
realization technique, results in energy dissipation due to the information loss . It is proved that the loss of each one bit of
information dissipates at least KTln2 joules of energy (heat), where K = 1.38x10 -23m2kg-2K-1 (joules Kelvin-1) is the
Boltzmann’s constant and T is the absolute temperature at which operation is performed . Reversible logic circuits
(or gates) are information lossless. Hence, reversible logic circuits have theoretically zero internal power dissipation. In
1973, Bennett proved that to avoid KTln2 joules of energy dissipation in a circuit, it must be built using reversible logic
gates.
If the input vector can be uniquely determined from the output vector and there is a one-to-one correspondence
between its input and output assignments, then the circuit is said to be reversible i.e. in other words not only the outputs
can be uniquely determined from the inputs but also the inputs can be recovered from the outputs. Therefore, the number of
inputs and outputs in reversible logic circuits, as well in logic gates are equal. Such circuits and gates allow recovering theinputs from the outputs.
Thus we can say that the reversible circuits are circuits (gates) in which:
• The number of input bits is equal to the number of output bits. For example, a circuit with input vector is of length
4 then the output vector length should be 4.
• There should be one-to-one correspondence between input and output vectors. None of the two or more than two
input vectors should give the same output vector.
•
The reversible circuits input vector can always be reconstructed from the output vector.
Toffoli and Fredkin discovered reversible logic in the late 70s and early 80s . Any reversible logic gate can be
characterized by its number of inputs and outputs. A m*n gate has m inputs and n outputs. There are several 2*2 reversible
gates and all of them are linear. A gate is said to be linear when all its outputs are linear functions of input variables.
Implementation of Full-Adder Design Using Reversible Gates
CMOS implementation is the most conventional way to synthesize a logic circuit, hence reversible circuits can
also be constructed using CMOS. We cannot guarantee that the power consumption of reversible logic circuit implemented
using CMOS is less than that of conventional circuit i.e. non-reversible. This is because the power saved by the reversible
circuit is pretty much less compared to the power consumption by any CMOS design. Therefore, in order to make use of
this power saved due to reversibility we need to use the technology that implements logic circuits, so that it would consume
much less power compared to current CMOS technology. For functional testing and for comparing delay and area CMOS
technology can be used.
Three full adders can be constructed using different combination of basic reversible gates i.e. Toffoli, Fredkin and
Feynman gate.
• 2 Toffoli gates and 2 Feynman gates gives two garbage outputs.
• 3 Feynman gates and 1 Fredkin gate gives two garbage outputs.
8/10/2019 Reconfigurable Single Precision Floating Point Multiplier Using Reversible Logic
Fredkin. It is universal, which means that any logical or arithmetic operation can be constructed entirely of Fredkin gates.
The basic Fredkin gate is a controlled swap gate that maps three inputs (C, I1, I2) onto three outputs (C, O1, O2).
The C input is mapped directly to the C output. If C = 0, no swap is performed; I1 maps to O1, and I2 maps to O2.
Otherwise, the two outputs are swapped so that I1 maps to O2, and I2 maps to O1. It is easy to see that this circuit isreversible, i.e, "undoes itself" when run backwards. A generalized n×n Fredkin gate passes its first n-2 inputs unchanged to
the corresponding outputs, and swaps its last two outputs if and only if the first n-2 inputs are all 1.The Fredkin gate is the
reversible three-bit gate that swaps the last two bits if the first bit is 1.