Recent Trends in Memory Technology Reliability · 2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) Max energy dictates the total window + reliability Migration barrier E d
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IEEE EDS – SCV Seminar Based on 2017 Int’l Reliability Physics Symp. Memory Year-In-Review
August 8, 2017
Bob Gleixner
Micron Technology, Inc.
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Industry trends in semiconductor memory technology
� NAND flash production is rapidly shifting from planar to 3-D (vertical string)
� DRAM continues to scale (planar) while looking for a path to higher performance (3-D packaging)
� Emerging memories are slowly emerging
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Publication trends by memory type
� MRAM trending up while PCM/PRAM is down
2013-2014
2015-2016
% Change
DRAM 725 766 +5
NAND 542 551 +2
RRAM 369 399 +8
PCM+PRAM 227 208 -9
MRAM 251 323 +28
Total 2114 2247 +6
Source: IEEE Xplore keyword search
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Agenda
� Focus on the main development directions for each technology
� Review recent device and process technology papers, specifically those that focus on reliability
– Intent is to summarize what is being studied, not provide a “top ten papers” list
� Summarize results for the main technology groups:
– NAND: planar and 3D
– DRAM: silicon and TSV/die stacking
– Emerging memory
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NAND Overview
� Academic and industry/academic partnerships prevalent for planar NAND studies
– Focusing on cell physics
– Practical understanding is very mature, pursuing the “ultimate limit” of understanding
� 3D NAND publications are generally industrial based
– Many are marketing driven
– Some studies of failure modes
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Time Dependent Threshold-Voltage Fluctuations in NAND Flash Memories:From Basic Physics to Impact on Array Operation
�Mechanisms of Vth evolution in planar NAND cells are well characterized
GODA ET AL, MICRON AND POLITECHNICO DI MILANO2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
Usage Time Domains
Cell Distributions
Vth shift mechanisms
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Time Dependent Threshold-Voltage Fluctuations in NAND Flash Memories:From Basic Physics to Impact on Array Operation
�While planar NAND nears its scalability limits, 3D NAND shows a path to tighter distributions
GODA ET AL, MICRON AND POLITECHNICO DI MILANO2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
Tighter Vth distributions for 3D
RTN
De-trap
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First Detection of Single-Electron Charging of theFloating Gate of NAND Flash Memory Cells
�“This letter provides the first direct experimental detection of single-electron charging of the floating gate of a mainstream Flash memory cell”
�Data collected on 16nm planar FG NAND
C. M. COMPAGNONI, ET AL., MICRON AND POLITECHNICO DI MILANOIEEE ELECTRON DEVICE LETTERS, VOL. 36, NO. 2, FEBRUARY 2015
Electrons
Programming pulses
RTN
e-
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Cycling-Induced Charge Trapping/Detrapping inFlash Memories - Part I: Experimental Evidence
�A physical picture for the trapping/detrapping processes in FG NAND is proposed to reproduce threshold-voltage instabilities over array lifetime
D. RESNATI, ET AL., POLITECNICO DI MILANO AND MICRONIEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 12, DECEMBER 2016
Vth shift during bake
Vth shift experiments after pre-bake
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Cycling-Induced Charge Trapping/Detrapping inFlash Memories - Part II: Modeling
D. RESNATI, ET AL., POLITECNICO DI MILANO AND MICRONIEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 12, DECEMBER 2016
�Model assumes 2-step process of structural relaxation + carrier exchange
Model applied to prior data
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Three-Dimensional 128 Gb MLC Vertical NAND Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming
�3D NAND has become the main focus for product development, providing some relief from the planar cell scaling limitations
KI-TAE PARK ET AL., SAMSUNGIEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015 AND 2016
Charge trap cell w/vertical channel
Tighter Vth w/ less cell coupling
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In depth analysis of post-program VT instability after electrical stress in 3D SONOS memories
� Conclude that Vth instability after stressing is due to e- emitted from defects generated in the TuOx by h+ injection during erase pulses
A. SUBIRATS ET AL., IMECIEEE 8TH INTERNATIONAL MEMORY WORKSHOP (IMW), 2016
Insensitivity to temperature implies #3Early Vth loss is a function of P/E cycles
Sensitive toVwait
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Comprehensive evaluation of early retention (fast charge loss within a few seconds)
characteristics in tube-type 3-D NAND Flash Memory
� A fast charge loss within a few seconds, which is referred to as early retention, was observed in word-line stacked 3-D NAND flash memory for the first time
BONGSIK CHOI ET AL., KOOKMIN UNIVERSITY & SK HYNIX2016 SYMPOSIUM ON VLSI TECHNOLOGY