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www.thalesgroup.com Research & Technology D a t e / R é f é r e n c e Heterogeneous Manycore with Self Adaptive Capabilities and the Corresponding Industrial Needs RAW 2012 Fabrice Lemonnier, 22 nd May, 2012
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Page 1: RAW 2012

www.thalesgroup.com

Research & Technology

Da

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éfé

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Heterogeneous Manycore with Self Adaptive Capabilities and the Corresponding Industrial

Needs

RAW 2012Fabrice Lemonnier, 22nd May, 2012

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Manycore: main issue for industry

Programmability: Time to market

Development cost

Reuse of legacy software

Why take so many risks with manycore ?

Most of industrials want to continue like the past few years: compile without thinking (as much as possible) !

No more Free lunch ! In the near futurethe processors will all be made of multi-cores and many-cores.

Nevertheless, can we provide solutions to ease the programmation ?

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Programmability: Homogeneous manycores

Tile-Gx100 from Tilera: 100 cores

Programmability:

• Standard C/C++ languages

• Multicore Development environmentTM (MDE)

• SMP Linux

• Bare Metal Environment

• Standard Debugging Tools (gdb 7)

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Programmability: Homogeneous manycores

Fermi from Nvidia 512 cores organised in 16 Streaming Multiprocessor

Programmability:

CUDA parallel programming model: multi-threading

Programming languages: C/C++, openCL, …

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Programmability: Homogeneous manycores

MPPA from Kalray: 256 cores organised in 16 clusters

Programmability:

•specific data flow language: sigmaC

•Tools to automatically map the application

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Homogeneous manycores

Parallelisation is the only way to raise computing power for a low power consumption.

Homogeneity eases the programming aspects

Maximum of performance is reached only for static application.

Moreover, tools can be used to make automatic optimisation through data parallelism and generate static allocation and scheduling.

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But parallelisation is not enough

Customization is necessary to raise the efficiency for a targeted application domain

• Customisation

Australian Desert Animal: the Thorny Devil

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MPSoC

OMAP: Communication market

Heterogeneity for the best efficiency (computing power – power consumption ratio) but for a dedicated domain

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Heterogeneous manycores

Heterogeneous manycore P2012 from ST

Cluster Cluster Cluster

Cluster Cluster Cluster

Cluster Cluster Cluster

Fabric Controller

core

Fabric

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Heterogeneous manycores

Dedicated to a specific domain of application

Only affordable for large series of products.

Industry with small and medium series of products have no way to develop their own heterogeneous manycore

An alternative is to use a combination between multicore and …

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FPGA + multicore

ZYNQ: Xilinx FPGA with a dual core ARM A9 MPCore

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…or the inverse: GPP + FPGA

Intel® Atom™ Processor E6x5C Series

GPP + dedicated accelerators on FPGA on a Multi-Chip Package (MCP)

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Our proposition

A combination between the heterogeneous manycore solution like P2012 and the FPGA+multicore approach like ZYNQ

Cluster Cluster Cluster

Cluster Cluster Cluster

Cluster Cluster Cluster

Fabric Controller

core

Fabric

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Our proposition

A 3D stacked chip based on:

• A manycore layer

• A FPGA layer

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Most important Advantages

Increase accessibility to heterogeneous manycores technology by allowing a customisation by the user

Reduction of the impact of the NRC

Allow implementation of self adaptive capabilities necessary for the future interactive applications and the constraints of the current and future technologies

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Future applications issues

Embedded Real-Time Applications

low power consumption

low volume

Adapt to environment dynamicity, flexibility & dependability

Smart cameraCognitive radio UAV

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Self adaptive capabilities, why?

• To be able to dynamically adapt the architecture to the current request of the application for the same power consumption

• Evolution of the technology: reduction of the reliability and the yield of current and future sub-micron technologies -> adaptation depending on the faulty cores.

• Increase energy efficiency

• Increase the programming efficiency by taking a part of the mapping complexity at runtime

• Temperature management -> adaptation of the application mapping

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State of the art

Projects:

• Morpheus (FP6 project): heterogeneous chip with 3 FPGA technologies managed by an ARM processor.

• FOSFOR (ANR project): distributed OS for heterogeneous multicore on FPGA

• Main drawbacks:

• the scalability of the solution

• the limitation of the size of the FPGA area

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Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

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Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

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Programming efficiency: common execution model

Master Nodes

Slave Nodes

GPP

eFPGA nodesDSP nodes

GPP Node

acceleratornode

NI

NoC

NI

Accelerator Interface (AI)

accrequests

control / status

DMA

DMArequests

data

Master-slave execution model

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rtp

vers

ion

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DMA Accelerator (slave)

receive_datasend_sync2acc

wait_syncsend_data

wait_syncwork

send_sync2dmu

GPP (master)

data_transfersynchro

requests FIFOssend_sync2gpp

Ensure hardware and software independency with the accelerator specificities

Master-slave execution model

Page 24: RAW 2012

24 /24 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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TH

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r ot

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str

ictly

pro

hibi

ted

with

out T

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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ion

7.0

.8

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Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

Page 25: RAW 2012

25 /25 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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of t

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str

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pro

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ted

with

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ten

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. ©

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S 2

011.

Tem

plat

e t

rtp

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ion

7.0

.8

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Tool flow and MoC

Act

: Actor

: static cluster

Act

Act Act

Act

Act ActAct

Act

: Clusters group managed by one state management

: Cluster group input/output

: Cluster input/output

• Optimisation and parallelisation tools can only be used on static applications.

• Necessity to identify static clusters inside the applications based on SDF/CSDF MoC

SDF, CSDF MoC

actor: consume and produce token of data with predefined and static rules

Page 26: RAW 2012

26 /26 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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any

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of t

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str

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pro

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ted

with

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s pr

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writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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Application (C code)

C to SpearDE representation

Conversion (Cosy)

Data parallelisation Mapping (SpearDE)

Graphic input

(manual)

Streaming optimisation (Cosy)

Compilation (Cosy)

executable code

architecture representation

Master coresSlave cores

Library of IPs

Tool flow and MoC

The Tool flow is based on 2 main tools:• Thales tool: SpearDE• ACE tool: Cosy

Page 27: RAW 2012

27 /27 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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You

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any

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utio

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of t

his

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str

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pro

hibi

ted

with

out T

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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e

Tools : partitionning, parallelisation and mapping

: Actor number x

: static cluster

Ax

A1 A2

A3

cluster1

A5

A4

: partition

: cluster input/output

: partition input/output

A1 A2

A3

cluster1p1

A5

A4

partition1

partition2

partition3

partition

mapping

A1.1 A2.1

A3

A5

A4

A1.2 A2.2

A1.3 A2.3

A1.4 A2.4

• FPGA

• DSP

• GPP

• DSP

• FPGA

• DSP

cluster1p1

Page 28: RAW 2012

28 /28 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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S.

You

are

her

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notif

ied

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any

rev

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, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

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t is

str

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pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

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renc

e

Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

Page 29: RAW 2012

29 /29 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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S.

You

are

her

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that

any

rev

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, di

ssem

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ion,

dis

trib

utio

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opyi

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r ot

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of t

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str

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pro

hibi

ted

with

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

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Modularity and scalability: common interfaces

Homogeneous GPP nodes

Heterogeneous accelerators

nodes

GPP Node

AI

DSPNode

NI

GPP Node

NI

NoC

NI NI NI

AI AI

NI

Config. Ctrl.

DDR Ctrl.

NI

GPP Node

NI

I/O

NI

Generic Interfaces

eFPGA Domain (Reconfigurable HW acc.)

Dedicated Accelerator

Node

Dedicated Accelerator

Node

Page 30: RAW 2012

30 /30 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

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are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

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ion,

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trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

Page 31: RAW 2012

31 /31 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

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pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

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S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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e

Act

: Actor

: static cluster

Act

Act Act

Act

Act ActAct

state 1

state 2

state 3

states management

Act

: Clusters group managed by one state management

: Cluster group input/output

: Cluster input/output

cluster groupevent

Dynamicity: the cluster group

Page 32: RAW 2012

32 /32 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

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ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

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utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

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men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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e

Dynamicity at cluster group level

Act

sensordata : Actor

: static cluster

states managementevent

Act

state 1

nop

state 1

states management

states management

Act Act

Act

state 2

Act

Act

states managementevent

Act Act

Act

state 1

Act

Act

Act

: Clusters group managed by one state management

states management

Act Act

Act

state 1

Act

Actscatter

Act Act

Act

state 1.1

Act

Act

Act Act

Act

state 1.2

Act

Act

gather

: Cluster group input/output

: Cluster input/output

sensordata

cluster group 3

cluster group 4

cluster group 5

cluster group 2

cluster group 1 event

event

event

Page 33: RAW 2012

33 /33 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

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men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

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renc

e

Start a new part of the application

Act

sensordata : Actor

: static cluster

states managementevent

Act

state 1

states management

states management

Act Act

Act

state 2

Act

Act

states managementevent

Act Act

Act

state 1

Act

Act

Act

: Clusters group managed by one state management

states management

Act Act

Act

state 1

Act

Actscatter

Act Act

Act

state 1.1

Act

Act

Act Act

Act

state 1.2

Act

Act

gather

: Cluster group input/output

: Cluster input/output

sensordata

cluster group 3

cluster group 4

cluster group 5

cluster group 2

cluster group 1 event

event

event

Act Act

Act

state 2

Act

Page 34: RAW 2012

34 /34 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

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renc

e

Modification of the behaviour

sensordata : Actor

: static cluster

states managementevent

states management

states management

Act Act

Act

state 2

Act

Act

states managementevent

Act Act

Act

state 1

Act

Act

Act

: Clusters group managed by one state management

states management

Act Act

Act

state 1

Act

Actscatter

Act Act

Act

state 1.1

Act

Act

Act Act

Act

state 1.2

Act

Act

gather

: Cluster group input/output

: Cluster input/output

sensordata

cluster group 3

cluster group 4

cluster group 5

cluster group 2

cluster group 1 event

event

event

Act Act

Act

state 2

ActAct Act

Act

state 2

Page 35: RAW 2012

35 /35 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Modification of the parallelisation level

sensordata : Actor

: static cluster

states managementevent

states management

states management

Act Act

Act

state 2

Act

Act

states managementevent

Act Act

Act

state 1

Act

Act

Act

: Clusters group managed by one state management

states management

Act Act

Act

state 1

Act

Actscatter

gather

: Cluster group input/output

: Cluster input/output

sensordata

cluster group 3

cluster group 4

cluster group 5

cluster group 2

cluster group 1 event

event

event

Act Act

Act

state 2

ActAct Act

Act

state 2

Page 36: RAW 2012

36 /36 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

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pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Dynamicity at cluster level

A1.1 A2.1

A3

A5

A4

A1.2 A2.2

A1.3 A2.3

A1.4 A2.4

• FPGA

• GPP

• FPGA

cluster1p1

A1.1 A2.1

A3

A5

A4

A1.2 A2.2

A1.3 A2.3

A1.4 A2.4

• DSP • G

PP

• DSP

cluster1p1

A1.1 A2.1

A3

A5

A4

A1.2 A2.2

A1.3 A2.3

A1.4 A2.4

• DSP • D

SP

• DSP

cluster1p1

timerelocation relocation relocation

Page 37: RAW 2012

37 /37 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

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renc

e

Dynamic relocation

I/O

NoC

GPP

Acc1

GPP

Acc1

GPP

Acc3

GPP

Acc4I/O

GPP

DDR ctrl

GPP

thread1 thread2 thread3 thread4

API

thread1 thread2

thread1 thread2thread3 thread4

API

thread1

thread2

Application

Tools for parallelisation and mapping

Acc1

Acc1

Acc3

Acc4

Dynamic relocation

Tools for parallelisation and mapping

runtime

compile time

Page 38: RAW 2012

38 /38 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

Page 39: RAW 2012

39 /39 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

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ied

that

any

rev

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ssem

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ion,

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trib

utio

n, c

opyi

ng o

r ot

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ise

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of t

his

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men

t is

str

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pro

hibi

ted

with

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hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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renc

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ApplicationAllocation file

Network services

SchedulerCluster

mngtTask mngt

Memory mngt

Communication management

Monitoring ActuatorsSemaphoreevent mngt

Virtualisation services

Self adaptive services

DIAGNOSISO = F(L)

ACTION

SYSTEM

MONITORING

A Virtualisation Layer for self adaptive capabilities

Virtualisation services provide a high level of abstraction of the heterogeneous resources: communication and accelerators managementSelf adaptive services define actions to be taken depending on events (monitoring): relocation, DVFS,…

VirtualisationLayer

kernel

Page 40: RAW 2012

40 /40 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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TH

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notif

ied

that

any

rev

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, di

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ion,

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trib

utio

n, c

opyi

ng o

r ot

herw

ise

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of t

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ted

with

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ten

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. ©

TH

ALE

S 2

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Tem

plat

e t

rtp

vers

ion

7.0

.8

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Self-adaptation

Heterogeneous Hardware

Controlled byKernel and

Virtualization layerEthernet

IMDCT MatrixMult

Accelerator/Virtual Code

Dynamicallocation / binding

DIAGNOSISO = F(L)

ACTION

SYSTEM

MONITORING

Mapping

GPP Node

AI

DSPNode

NI

GPP Node

NI

NoC

NI NI NI

AI AI

NI

Config. Ctrl.

DDR Ctrl.

NI

GPP Node

NI

I/O

NI

Dedicated Accelerator

Node

Dedicated Accelerator

Node

eFPGA Domain (Reconfigurable HW acc.)

Page 41: RAW 2012

41 /41 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

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any

atta

chm

ents

are

the

pro

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any

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. ©

TH

ALE

S 2

011.

Tem

plat

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rtp

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ion

7.0

.8

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Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

Page 42: RAW 2012

42 /42 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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TH

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ied

that

any

rev

iew

, di

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inat

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str

ictly

pro

hibi

ted

with

out T

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

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renc

e

Tile Tile Tile

Tile Tile Tile

Tile Tile Tile

New dynamic reconfigurable technology

Homogeneous manycore

NoC

FlexTiles: a 3D stack chip

3D stacked reconfigurable layer

Page 43: RAW 2012

43 /43 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

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TH

ALE

S.

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that

any

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iew

, di

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ion,

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of t

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t is

str

ictly

pro

hibi

ted

with

out T

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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renc

e

Tile Tile Tile

Tile Tile Tile

Tile Tile Tile

New dynamic reconfigurable technology

3D stacked reconfigurable layer

Homogeneous manycore

NoC

FlexTiles: a 3D stack chip

Map Accelerated functions

Page 44: RAW 2012

44 /44 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Tile Tile Tile

Tile Tile Tile

Tile Tile Tile

New dynamic reconfigurable technology

3D stacked reconfigurable layer

Homogeneous manycore

NoC

FlexTiles: a 3D stack chip

Duplicate

Page 45: RAW 2012

45 /45 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Tile Tile Tile

Tile Tile Tile

Tile Tile Tile

New dynamic reconfigurable technology

3D stacked reconfigurable layer

Homogeneous manycore

NoC

FlexTiles: a 3D stack chip

Migrate

Page 46: RAW 2012

46 /46 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

3D NETWORK

Page 47: RAW 2012

47 /47 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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ion

7.0

.8

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éfé

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e

NoC QoS

chip

GPP

icache

dcache

dLMEM GPP

NI

iLMEM eFPGA

eFPGA

dLMEM eFPGA

iLMEM DSP

DSP

dLMEM DSP

DDR

NI+

DDR ctrl

on chipshMEM

NI NI

controlNOC

bitstreamNOC

dataNOC

instructionNOC

test/debugNOC

Page 48: RAW 2012

48 /48 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

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ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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.8

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e

ANoC (CEA)

GALS: asynchronous logic in nodes, local synchronous coreshighly scalable

between nodes: no global clock, no even local clockpower efficient and dependable

packet switchingwormhole protocol

low latency

Page 49: RAW 2012

49 /49 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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S.

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are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

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r ot

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of t

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str

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pro

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ted

with

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s pr

ior

writ

ten

appr

oval

. ©

TH

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S 2

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Tem

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ion

7.0

.8

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e

AEtheral NoC (TUe)

Guaranteed levels of services and performancesContention free routing by construction

wormhole routing specified at design time Globally Synchronous with time slots

Page 50: RAW 2012

50 /50 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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S.

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are

her

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notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

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ise

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of t

his

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t is

str

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pro

hibi

ted

with

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s pr

ior

writ

ten

appr

oval

. ©

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ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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e

Conclusion (1)

Parallelisation is the only way to reach HPC for low power consumption.

But Industry doesn’t want to take the plunge

Moreover, parallelisation is not enough, customisation is also necessary

• Only affordable for high volumes and very difficult to programme

Reconfigurable customisation is the solution:

• Increase accessibility to heterogeneous manycore technology

• Allow implementation of self adaptive capabilities

Page 51: RAW 2012

51 /51 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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e

Conclusion (2)

Self adaptive capabilities provide:

• Dynamic customisation of the manycore architecture to the current request of the application

• Reduction of the programming complexity by taking a part of the mapping complexity at runtime

• Fault tolerance: adaptation depending on the faulty cores.

• Energy efficiency

• Temperature management -> adaptation of the application mapping

Page 52: RAW 2012

52 /52 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

eby

notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

te /R

éfé

renc

e

Holistic Approach

Model of programmation

Model of Computation

Model of Execution

Flexible Hardware

Common Interfaces

strategies of relocation

Optimisation tools

Programming efficiency

self adaptive capabilities

3D NETWORK

Page 53: RAW 2012

53 /53 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

ALE

S.

You

are

her

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notif

ied

that

any

rev

iew

, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

herw

ise

use

of t

his

docu

men

t is

str

ictly

pro

hibi

ted

with

out T

hale

s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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ion

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Our proposition: a 3D stacked chip and …

A 3D stacked chip based on:

• A manycore layer

• A FPGA layer

Page 54: RAW 2012

54 /54 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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are

her

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notif

ied

that

any

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, di

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ion,

dis

trib

utio

n, c

opyi

ng o

r ot

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use

of t

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str

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pro

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ted

with

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s pr

ior

writ

ten

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oval

. ©

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ALE

S 2

011.

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rtp

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…a complete platform

Virtualisation layer

relocatable binary code

Parallelisation, partioning

Application

Hardware Nodes

Compilation Synthesis, P&Rrelocatable bitstream

Hardware Abstraction Layer

Hardware Abstraction Layer API

Operating Library API

Kernel Resource Monitoring &

Allocation

DIAGNOSISO = F(L)

ACTION

SYSTEM

toolchain

operating library

heterogenousmanycore

MONITORING

Page 55: RAW 2012

55 /55 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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S.

You

are

her

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notif

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that

any

rev

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, di

ssem

inat

ion,

dis

trib

utio

n, c

opyi

ng o

r ot

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ise

use

of t

his

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men

t is

str

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pro

hibi

ted

with

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s pr

ior

writ

ten

appr

oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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ion

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renc

e

FlexTiles: FP7 project

FlexTileswww.flextiles.eu

Project coordinator: THALES

Funding budget: 3,670,000€

Starting date: 15/10/2011

Duration: 36 months

Page 56: RAW 2012

56 /56 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

pert

y of

TH

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are

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ied

that

any

rev

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, di

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inat

ion,

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trib

utio

n, c

opyi

ng o

r ot

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of t

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t is

str

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pro

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ted

with

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s pr

ior

writ

ten

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oval

. ©

TH

ALE

S 2

011.

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e

Consortium and questions

Partners & Third Party

Country Main scientific and technical contributions

THALES France Infrastructure and applications

KIT Germany Virtualisation layer

TUE Netherlands Kernel ; NoC

CSEM Switzerland DSP

CEA France NoC ; 3D stacking

UR1 France Reconfigurable technology

SUNDANCE United Kingdom

FPGA Demonstrator

ACE Netherlands Parallelisation and compilation Tools

8 partners in 5 countries

Page 57: RAW 2012

57 /57 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

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, di

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ion,

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utio

n, c

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ted

with

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writ

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oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

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ion

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.8

Da

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e

With FlexTiles, Industry will be able to…

Take the plunge to the manycore utilisation

Page 58: RAW 2012

58 /58 /

The

info

rmat

ion

cont

aine

d in

thi

s do

cum

ent

and

any

atta

chm

ents

are

the

pro

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pro

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ted

with

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s pr

ior

writ

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oval

. ©

TH

ALE

S 2

011.

Tem

plat

e t

rtp

vers

ion

7.0

.8

Da

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Thank you for your attention

Questions ?