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Radiation-Induced Pulse Noise in SOI CMOS Logic D. Kobayashi, K. Hirose, H. Ikeda, and H. Saito Institute of Space and Astronautical Science Japan Aerospace Exploration Agency ソフトエラー(などのLSIにおける放射線効果)に 関する第1回勉強会(京都)201197--8Most part of this material is presented in an invited talk at Int’l Symp on Advanced Semiconductor-on-insulator Technology and Related Physics 219th ECS Meeting, Montreal, Canada, May. 4, 2011
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Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Sep 07, 2020

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Page 1: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Radiation-Induced Pulse Noisein SOI CMOS Logic

D. Kobayashi, K. Hirose, H. Ikeda, and H. SaitoInstitute of Space and Astronautical Science

Japan Aerospace Exploration Agency

ソフトエラー(などのLSIにおける放射線効果)に 関する第1回勉強会(京都)2011年9月7--8日Most part of this material is presented in an invited talk at

Int’l Symp on Advanced Semiconductor-on-insulator Technology and Related Physics 219th ECS Meeting, Montreal, Canada, May. 4, 2011

Page 2: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Outline

1. How serious radiation problems are

2. Merits and demerits of SOI

3. Pulse-noise problems in logic gate

4. Summary

2

Radiation-Induced Pulse Noise in SOI CMOS Logic

Page 3: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

An example of basic radiation effects

3

-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0

Cu

rren

t (m

A)

Time (ns)

Smoothed Waveform

Signal Observed

ON current

Drain current behavior of 0.2-μm FD-SOI nMOSFET

Radiation strike (single Kr ion)

Makino (JAEA) et al., RASEDA 2010

Standing by in OFF state@VDS=1.8V

Page 4: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Basic parameters of studied SOI tech.

4

Lg = 0.2 μm LDD DrainLOCOS

tox = 5 nm

tBOX = 100 nm

tSOI = 50 nm

8-inch bond-and-etch-back SOI wafer

Commercial 0.2-μm FD-SOI

Page 5: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Publication number history

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ublic

atio

ns (A

rtic

les

& P

aten

ts)

Year

“soft error”SE & neutronSE & logic

Google scholar result (May 2, 2011): number of publications with keywords in anywhere in the articles and patents including citations

“Logic” and “Neutron”

Page 6: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

It may not lessen Toyota's woes to hear that the problems the company has been having withfaulty gas pedals could be blamed on cosmic rays from space. Sound unbelievable? The concept isactually a lot more plausible than you might think.

Toyota Recall Might Be Caused by Cosmic RaysTechnology

By Denise Chow, LiveScience Staff Writerposted: 26 March 2010 11:32 am ET

Comments (21) | Recommend (13)

Soft error is a serous problem

6

http://www.livescience.com/technology/toyota-recall-cosmic-rays-100326.htmlLiveScience (March 26, 2010)

ECC is already essential in cache memories for enterprise servers...

Intel developed rad-hard Itanium processor already...

Acceptable concept (Real reason is unknown)

Page 7: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Our living space is filled up with neutrons

Supernova

Sun

Earth

Galactic cosmic rays10GeV, 10/cm2·s

Space: H.-Siedle and Adams, “Hand book of radiation effects”, Oxford, 2001Terrestrial: Ziegler (IBM) et al., IBM J. Research and Development 40, 1996 p3

Nuclear reactions

n

π

n

n

Atmosphere

Solar flare1GeV, 1E5/cm2·s

Terrestrial neutrons 10/cm2·h @ sea level

secondary cosmic rays

n

Page 8: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

How strong are they?

Linear Energy Transfer (LET), explains ionizing ability

Si

+−−++

−−++

−−++

−−+

+−

+

1 μm

LET 10 MeV·cm2/mg

100 fC

8

SOI is known as a strong technology to radiation.Now is a time to show our stuff!

Page 9: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Outline

1. How serious radiation problems are

2. Merits and demerits of SOI

3. Pulse-noise problems in logic gate

4. Summary

9

Radiation-Induced Pulse Noise in SOI CMOS Logic

Page 10: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

People say, SOI is strong to radiation

10

In the bulk case, noise charge in the deep substrate region can reach the signal (drain) terminal but not

in the SOI case because of the BOX layer.

Radiation

ElectronHole

Radiation

BOX

Bulk SOI

Large noise Small noise

Page 11: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

That’s not so simple

11

Parasitic bipolar structure can amplify noises

Small parasitic capacitance results in high sensitivity to noise signals

injection

escape

Electron

Holescreated byirradiation

Barrier lowering

Source

Drain

n

n

p

1.noise charge is deposited in body

2.holes are confined3.npn-BJT turns on

Large noise

How large?

Page 12: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Bipolar amplification effect

12

-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0

Cu

rren

t (m

A)

Time (ns)

Smoothed Waveform

Signal Observed

~200 fC

x10 larger than charge deposited (20 fC)Important to suppress this amplification effect

Makino (JAEA) et al., RASEDA 2010

Page 13: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Body tie effect: SRAM sensitivity to n

13

10-16

10-15

10-14

10-13

0.16 0.18 0.2 0.22 0.24 0.26

SE

U c

ross

-sec

tio

n (

cm2 /b

it)

Gate length (μm)

Bulk

Our 0.2-μm FD-SOI

+BT

Baggio (CEA) et al., IEEE Trans. Nucl. Sci. 52, 2005, p2319

FD-SOI SRAM is harder than bulk but not enough.BT is effective to suppress parasitic bipolar amp. effect

~10 errors@year@1Gb@Ground

Page 14: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Rad-hard SRAM for space

14

T. neutrons G. cosmic rays

3.6 9.0 40Threshold LET for bit upset in MeV•cm2/mg

Original

K. Hirose (ISAS) et al., IEEE Trans. Nucl. Sci. 49, 2002 p2965

Original FD SOI SRAM + Body tie + RC filter

RC filter is used for space applicationsCombined use of BT + RC is important

Only RC requires a really large RC value, practically unacceptable

Page 15: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Cell library is available

15

Hirose (ISAS) et al.,日本航空宇宙学会誌 58(683), 2010 p365 (in Japanese)

All memory elements such as SRAM, latchesare protected by optimized RC + BT

Mitsubishi Heavy Industries, Ltd.SoC for space applications- 32-bit CPU (100MIPS) with FPU- Cache memory- SpaceWire Interface

Page 16: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Outline

1. How serious radiation problems are

2. Merits and demerits of SOI

3. Pulse-noise problems in logic gate

4. Summary

16

Radiation-Induced Pulse Noise in SOI CMOS Logic

Page 17: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Pulse-noise problems in logic gate

17

For now this SET effect is negligibleBut many predictions say it becomes serious soon

Radiation

Transient noise pulse = SET

1FF 0

capturepropagation

corruption

Logic gate network

Stored bit infomation

VOVDD

Time

CLK

Page 18: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Original pulse information is essential

18

Radiation

Transient noise pulse = SET

1FF 0

capturepropagation

corruption

Logic gate network

Stored bit infomation

VOVDD

Time

CLK

i. On-chip pulse-width measurementii. Full-waveform observation techniqueiii. Physics-based analytical model

Page 19: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

19

Yanagawa (ISAS) et al., IEEE Trans. Nucl. Sci. 53(6) 2006 p3575

Radiation SET

111100011111

SNAPSHOT A(Time-to-digital converters)

12 NOR gates

input

digitize & record

read &decode

B

Target logic gates

On-chip pulse width measurement

Page 20: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

World-first experimental demonstration

20

0 0.2 0.4 0.6 0.8 1.0 1.2

10203040

0

SET width (ns)

Nu

mb

er o

f o

bse

rvat

ion

s Decodingaccuracy is not guar-anteed.

NORs (w/o BT) under irradiation with LET 40 MeV·cm2/mg

Yanagawa (ISAS) et al., IEEE Trans. Nucl. Sci. 53(6) 2006 p3575

Page 21: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

21

Comparison with bulkMakino (ISAS) et al., IEEE Trans. Nucl. Sci. 56(6), 2009 p3180

0

2

4

6

8

0.0 0.5 1.0 1.5 2.0

Cro

ss s

ecti

on

(10

-9 c

m2 )

SET pulse width (ns)

90-nm bulk (by Narasimham et al.)

2/mg

1. Lower sensitivity than bulk 2. Shorter pulse (←?)

Page 22: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

22

Pulse can be broadened

Ferlet-Cavrois (CEA) et al., IEEE Trans. Nucl. Sci. 54, 2007, p2338

Propagation-induced pulse broadening (PIPB)

Floating body effect: dynamic VT change leads to pulse broadening during propagationWei (MIT) et al., IEEE Electron Device Lett. 17, 1996, p391

Page 23: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

23

Comparison with bulkMakino (ISAS) et al., IEEE Trans. Nucl. Sci. 56(6), 2009 p3180

0

2

4

6

8

0.0 0.5 1.0 1.5 2.0

Cro

ss s

ecti

on

(10

-9 c

m2 )

SET pulse width (ns)

90-nm bulk (by Narasimham et al.)

1000-gates chain (?)

Precise pulse-width comparison requires further study

24-gates chain (≤ 200ps PIPB)

Page 24: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Original pulse information is essential

24

Radiation

Transient noise pulse = SET

1FF 0

capturepropagation

corruption

Logic gate network

Stored bit infomation

VOVDD

Time

CLK

i. On-chip pulse-width measurementii. Full-waveform observation techniqueiii. Physics-based analytical model

Page 25: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Full-waveform observation

25

IDn

IDp

IDp

IDnVO

Radiation

VDD

VSS

Bias Tee

Oscilloscope

p-MT

n-MT

D

S

D

S

VSS

VDD

50 Ω

50 Ω

Target logic gate(inverter)

SET

VO

Time

Time

Time

Kobayashi (ISAS) et al., IEEE Trans. Nucl. Sci. 55, 2008 p2872

Page 26: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Waveform of SET experimentally observed in advanced CMOS tech.

26

Page 27: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Original pulse information is essential

27

Radiation

Transient noise pulse = SET

1FF 0

capturepropagation

corruption

Logic gate network

Stored bit infomation

VOVDD

Time

CLK

i. On-chip pulse-width measurementii. Full-waveform observation techniqueiii. Physics-based analytical model

Page 28: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Saturation tendency

28

Dodd (Sandia National Lab) et al., IEEE Trans. Nucl. Sci. 51, 2004 p3278

Numerical device simulation results

Saturation

What makes this saturation tendency? Mechanics was unknown

Page 29: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Stating point of modeling

29

VO

In

Plateau Ip(ON)

Rad

Device Sim. 130-nm SOI

V. Ferlet-Cavrois, IEEE Trans. Nucl. Sci. 53 (2006) 3242

Duration of plateau at Ip(ON) = Indicator of SET width

Numerical device simulation result

What mechanics is behind this plateau?

Page 30: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Band diagram analysis

30BJT operates in saturation during the plateau bottom

Forward biased

@ Initial

@ Plateaubottom

N P N

Kobayashi (ISAS) et al., IEEE Trans. Nucl. Sci. 56, 2009 p3043

Page 31: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Turn-off behavior of saturated BJT

31

Sze and Ng, Physics of Semiconductor Devices 2007

Radiation effect = delta-function-like current injection

t1

T0Ip(ON)

t

t

QDEP

t

IB

IextForwardBiased(F.B.)

F.B.

IBt

QB

IC

t1

TSIext

t

t++ QB

IC

VCC

Rext

IB1

QB1

Page 32: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

Demonstration

32

t∗ = τ0 ln(

QDEP

Ip(ON)τ0

)+ τ1 +

CL|VTp|Ip(ON)

Bottom (storage time) Recovery

Kobayashi (ISAS) et al., IEEE Trans. Nucl. Sci. 56, 2009 p3043

0.2

0.4

0.6

0.8

100 101 102SE

T w

idth

@ |V

TP| (

ns)

Deposited charge: QDEP (fC)

Analyticalmodel Device

simulation

ln(QDEP)

0.2-μm FD-SOICMOS inverter

Good agreementSaturation = log behavior

Page 33: Radiation-Induced Pulse Noise in SOI CMOS Logic · 0.6-0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 Current (mA) Time (ns) Smoothed Waveform ... (Q DEP) 0.2-μm FD-SOI CMOS inverter Good agreement

1. How serious radiation problems areNeed to protect memory elements. Not only in space but also on the ground.

2. Merits and demerits of SOIBOX suppresses noise charge collection. Need a special care about increase in sensitivity due to small parasitic capacitance, bipolar amplification effect, and propagation-induced broadening

3. Pulse-noise problems in logicLogic gates need to be protected in near future. Characterization techniques such as pulse-width measurement, full-waveform observation technique, and physics-based analytical models are developed.

Summary

33

Radiation-Induced Pulse Noise in SOI CMOS Logic