Programmable timer device 8253/8254 · Architecture and Signal Descriptions •The programmable timer device 8253 contains three independent 16-bit counters, each with a maximum count

Programmable timer device 8253/8254

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Programmable timer device 8253

• Intel’s programmable counter/timer device(8253) facilitates the generation of accurate timedelays.

• When 8253 is used as timing and delaygeneration peripheral, the microprocessorbecomes free from the tasks related to thecounting process and execute the programs inmemory, while the timer device may perform thecounting tasks.

• This minimizes the software overhead on themicroprocessor.

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Architecture and Signal Descriptions

• The programmable timer device 8253 containsthree independent 16-bit counters, each witha maximum count rate of 2.6 MHz.

• It is thus possible to generate three totallyindependent delays or maintain threeindependent counters simultaneously.

• All the three counters may be independentlycontrolled by programming the three internalcommand word registers

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• The 8-bit, bidirectional data buffer interfacesinternal circuit of 8253 to microprocessor systemsbus. Data is transmitted or received by the bufferupon the execution of IN or OUT instruction.

• The read/write logic controls the direction of thedata buffer depending upon whether it is a reador a write operation. It may be noted that INinstruction reads data while OUT instructionwrites data to a peripheral.

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Internal Block Diagram

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• The three counters available in 8253 are independentof each other in operation, but they are identical toeach other in organization. These are all 16-bitpresettable, down counters, able to operate either inBCD or in hexadecimal mode.

• The mode control word register contains theinformation that can be used for writing or reading thecount value into or from the respective count registerusing the OUT and IN instructions.

• The specialty of the 8253 counters is that they can beeasily read on line without disturbing the clock inputto the counter. This facility is called as "on the fly"reading of counters, and is invoked using a modecontrol word.

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• A0, Al pins are the address input pins and arerequired internally for addressing the modecontrol word registers and the three counterregisters.

• A low on CS line enables the 8253. Nooperation will be performed by 8253 till it isenabled.

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• A control word register accepts the 8-bitcontrol word written by the microprocessorand stores it for controlling the completeoperation of the specific counter.

• It may be noted that, the control word registercan only be written and cannot be read as it isobvious from Table

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Different Modes

• The 8253 can operate in anyone of the six differentmodes. A control word must be written in therespective control word register by themicroprocessor to initialize each of the counters of8253 to decide its operating mode.

• Each of the counters works independently dependingupon the control word decided by the programmeras per the needs.

• In other words, all the counters can operate inanyone of the modes or they may be even indifferent modes of operation, at a time. The controlword format is presented, along with the definitionof each bit, in Fig. 1.2Programmable timer device 8253 11

Control Word

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