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Programmable Logic Controller (PLC) I/O Module Front-End Controller with Tiva C Series ARM® Cortex™-M4 MCU
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Design Resources
TIDA-00123 IO Module Controller Folder
TIDA-00118 Analog Input Card Folder
TIDA-00119 Analog Output Card Folder
TIDA-00017 Digital Input Card Folder
TM4C1237E6PZI Product Folder
TPS3897ADRYR Product Folder
TPS55010RTER Product Folder
ISO3082DW Product Folder
TPD4E1B06DCKR Product Folder
LM5069MM-2/NOPB Product Folder
LM5017MR/NOPB Product Folder
LM20242MH/NOPB Product Folder
TPS2482PW Product Folder
CSD18501Q5A Product Folder
Block Diagram
Design Features
Designed around Tiva™ C Series 32-Bit MCU, 80MHz high-performance ARM® Cortex™- M4
Used for SmartIO module performance evaluation
Modular plug-in design: Two identical interface for pluggable PLC SmartIO modules
Field bus interface: EMC compliant isolated RS-485 interface
PC interface: EMC compliant USB 2.0 interface
DC Input Supply: 18V to 32V power supply with In-rush current limit protection
On-board Isolated 24VDC/100mA power supply for field sensors
I2C based precision power monitoring of IO modules & field sensors
Fast signal chain response time: Using high speed SPI & DMA
Seven on-board LEDs for Debugging/ Indication
LabView™ based GUI for IO module performance evaluation
1. SYSTEM DESCRIPTION .......................................................................................................................................... 3
4. THEORY OF OPERATION ....................................................................................................................................... 4
4.1. MCU ............................................................................................................................................................................ 4 4.1.1 Development Interface ..................................................................................................................................... 7 4.1.2 SmartIO Interface (Slot#1 & Slot#2) ............................................................................................................... 7 4.1.3 Field Bus Connectivity ...................................................................................................................................... 9 4.1.4 PC Interface ....................................................................................................................................................... 9 4.1.5 RESET Circuitry .............................................................................................................................................. 10
4.2. POWER SUPPLY ......................................................................................................................................................... 10 4.2.1 Power Supply Front-end ................................................................................................................................ 11 4.2.2 DC Input Isolation ............................................................................................................................................ 13 4.2.3 MCU Supply ..................................................................................................................................................... 15 4.2.4 Field Sensor Power Supply ........................................................................................................................... 16
5. TEST SETUP ........................................................................................................................................................... 17
Tiva™ C Series MCU based IO Controller for Programmable Logic Controllers (PLC) is a reference design to demonstrate Tiva™ C Series MCU’s embedded processing capabilities, easy-to-use highly integrated peripherals and it’s suitability as IO controller for end-equipment like PLC/PAC/DCS & Test and measurement. This reference design showcases Tiva™ C Series MCU that can be used to evaluate different PLC I/O modules for the industrial market and demonstrates other TI parts that can be used in the entire PLC signal chain. Additionally, isolated and non-isolated power solutions and hot swap & in-rush current limit controller are the key takeaways from this reference design. The easy-to-use GUI accelerates the I/O modules performance evaluation process and decrease time-to-market. The design files include Schematics, BOM, Layer plots, Altium files, Gerber and executable for easy-to-use Graphical User Interface (GUI).
2. Design Specifications
Following are the design specifications of the IO Controller:
32-Bit, 80MHz high-performance ARM® Cortex™- M4
Modular plug-in design: Two identical interface for pluggable PLC SmartIO modules
EMC compliant isolated RS485 interface for field bus connectivity
EMC compliant USB 2.0 interface for PC connectivity
DC input supply: 18V to 32V
DC Power galvanic isolation using flybuck topology
Power supply protections against:
Reverse polarity
Transient/Surge
In-rush current limit
On-board Isolated 24VDC/100mA for field sensor power supply
Power monitoring of SmartIO modules & field sensors
Tiva™ C Series MCU based IO Controller for PLC provides a convenient platform to test and evaluate SmartIO modules targeted for PLC system. IO Controller allows functional and parametric signal chain performance evaluation. IO Controller consists of the MCU, a power supply unit and SmartIO module interface. The IO Controller performs the main functions like scanning data, running control sequences and communication activities. IO Controller has on-board power supply unit that converts the DC input power supply to the required multiple output voltages. The power supply unit generates 3.3V required by MCU, isolated 24VDC required by SmartIO modules and isolated 24VDC/100mA to power-up field sensors. IO Controller has two identical 50-pin interfaces where various SmartIO modules can be plugged. Each interface has dedicated SPI and I2C to communicate with devices on the SmartIO modules. These pluggable I/O modules are used to measure data from field sensors and to control actuators. The SmartIO modules along with the IO Controller form a control loop. In addition, IO Controller has been equipped with increasing levels of processing power at reduced power consumption and connectivity like USB and RS-485.
The heart of this evaluation platform is Tiva™ C Series TM4C1237E6PZI MCU. Tiva™ C Series TM4C1237E6PZI MCU provides designers a high-performance ARM® Cortex™- M4F based architecture. TM4C1237E6PZI MCU also offers the advantages of ARM's widely available development tools and comprehensive software library supports. Targeting performance and flexibility, the Tiva™ C Series architecture offers 80 MHz Cortex-M with FPU, a variety of integrated memories, peripherals and multiple programmable GPIO, which minimize board costs and design-cycle time. Finally, the TM4C1237E6PZI microcontroller is code-compatible to all members of the
extensive Tiva™ C Series that enables easy migration.
PG6 – PG7 (I2C module 5) Power monitor for I/O modules & field sensors
PK0 – PK3 (SSI module 3) SPI bus interfaced with CPLD (Currently not in use)
PF0 – PF6 (GPIOs) Seven LEDs for debug/indication
PD4 – PD7, PE7 (UART module 6, GPIO) RS-485 interface for field bus connectivity
PD0 – PD3 (SSI module 1) Slot #2 SPI bus for SmartIO module interface
Refer to Tiva™ TM4C1237E6PZ MCU datasheet & System Design Guidelines for Tiva™ C Series MCU to follow the recommendations for creating a schematic and designing a circuit board.
The development interface available on the Tiva™ C Series MCU is 10-pin JTAG, which is used for debugging and programming purpose during the board bring-up and software development. Tiva™ C Series MCU have default internal pull-up resistors on TCK, TMS, TDI, and TDO signals. External pull-up resistors may not be required if these connections are kept short. If the JTAG signals are greater than 2 inches or routed near an area where they could pick up noise, TCK should be externally pulled-up with a 10K or stronger resistor to prevent any transitions that could unexpectedly execute a JTAG instruction.
4.1.2 SmartIO Interface (Slot#1 & Slot#2)
Figure 4: SmatIO Interface with TivaTM
C Series MCU Peripherals
TI also provides the reference design for SmartIO modules pluggable to Slot#1 and Slot#2. TIDU192: 12-Bit Analog Input Module for Programmable Logic Controllers TIDU189: 16-Bit Analog Output Module for Programmable Logic Controllers Note: Other pluggable SmartIO modules reference designs are in pipeline. The TM4C1237E6PZ MCU includes four Synchronous Serial Interface (SSI) modules. Each module can be configured either as mater or slave interface. SSI module supports operation for Freescale SPI, MICROWIRE, or Texas Instruments SSI. SSI module has separate transmit and receive FIFOs, each 16 bits wide and 8 locations deep. It also has separate transmit and receive µDMA channels for fast and efficient data transfer. SSI module 0 and SSI module 1 have been used for two SmartIO interfaces (Slot#1 & Slot#2) to exchange data. Galvanic isolation for two SmartIO communication signals has not been provided on the IO Controller. The SSI includes a programmable bit rate clock divider and prescaler to generate the serial output clock. For master mode, the system clock must be at least two times faster than the SSI clock, with the restriction that SSI clock cannot be faster than 25 MHz. The system clock of 80 MHz is being used as the source for the SSI clock. In SPI protocol, Master and Slave put the data on the bus on one clock edge and read the data on the next/opposite clock edge. In this way, SPI communication works fine without bit shift as long as the total round trip propagation delay is less than half of the clock period, because the data must come back to the master before the next clock edge. Implementing the digital isolation, adds substantial amount of propagation delay to the SPI
timings. The minimum time required for the data from slave device to reach at the master is twice the maximum propagation delay. So, maximum SPI half clock period would be greater than twice of propagation delay. Isolator’s propagation delay reduces the data throughput by imposing a limit on SPI clock speed. Isolated SPI would work fine as long as:
In isolated SPI, SPI clock and MOSI data are always synchronous irrespective of SPI clock speed because both are travelling in same direction. But at higher SPI clock rates, MISO data and clock are no more synchronous, which means master will latch the data from slave at wrong instances and receive erroneous data.
Figure 5: Isolated SPI using Digital Isolators
To achieve higher SPI speed with isolators, CPLD has been introduced between MCU’s SSI signals and SmartIO interface.
Figure 6: High Speed Isolated SPI with CPLD
The TM4C1237E6PZ MCU includes six Inter-Integrated Circuit (I2C) modules to communicate with other I2C based devices. Four out of six I2C modules are being used on the IO Controller and configured as I2C masters. It supports four transmission speeds: Standard (100 Kbps), Fast-mode (400 Kbps), Fast-mode plus (1 Mbps) and High-speed mode (3.33 Mbps). I2C module 3 and I2C module 4 buses are available on SmartIO interfaces Slot#1 and Slot#2, respectively. I2C module 3 and I2C module 4 buses communicate with slave EEPROMs installed on SmartIO modules to read the configuration (Type of I/O module plugged-in, number of input or output available, manufacturer’s ID and etc.) and calibration data. IO Controller has a provision in hardware where I2C based EEPROM (slave address hardwired to 000) can be populated, which is interfaced with I2C module 1 of TM4C1237E6PZ MCU, but the current software doesn’t support this. I2C module 5 has been interfaced with TPS2482PW device for current/power monitoring for SmartIO modules and field sensors.
Both SDA and SCL signals must be connected to a positive supply voltage (3.3V) using a pull-up resistor. Size of the pull-ups need to be determined carefully for proper operation, which depends upon supply voltage (VDD), total bus capacitance (CBUS) and total high-level input current (IIH). The value of pull-ups used in the design is 1.5KΩ.
Figure 7: I2C Bus Interface & External Pull-ups
4.1.3 Field Bus Connectivity
IO Controller provides an EMC compliant isolated 1-Mbps, 3.3V to 5V RS-485 interface for field bus connectivity using ISO1176 transceiver and the TPS55010. This board achieves signal and power isolation with reduced board space and power consumption. TPS55010 has higher efficiency and better regulation accuracy since the Flybuck
TM topology uses primary side feedback that provides excellent regulation over line and load compared to
an open loop push pull converter without an opto-coupler. TPS55010 provides 3.3V to 5V and isolation levels using off-the-shelf flyback transformers. The transformer chosen here for the design has 475µH primary inductance and dielectric strength of 2500VAC for one minute between primary and secondary. The ISO1176 transceiver is an ideal device for long transmission lines since the ground loop is broken to provide for operation with a much larger common mode voltage range. The symmetrical isolation barrier provides 2500 VRMS of isolation between the line transceiver and the logic level interface. RS-485 bus is available on J1 and J20 screw type terminals/connectors. An external fail safe biasing is provided on RS-485 bus that uses external resistor biasing to ensure failsafe operation during an idle bus. If none of the drivers connected to the bus are active, the differential voltage (VAB) approaches zero or in between ±250mV, thus allowing the receivers to assume random output states. To force the receiver outputs into a defined state, failsafe biasing resistors, R53 = R62 = RFS, are introduced with the terminating resistors, R53 = 120Ω, such that it must provide sufficient differential voltage to exceed the input-voltage threshold of the receiver. The RS-485 bus is also protected against EFT, ESD and surges with the help of transient voltage suppressor diodes (SMCJ15CA, 1500W series). Note; The Fly-Buck Design Calculator Tool assists designers with routine calculations for the 2W TPS55010 isolated DC/DC Converter. Available at http://www.ti.com/tool/flybuck-designer
4.1.4 PC Interface
IO Controller also provides an EMC compliant USB2.0 interface to communicate with GUI based application running in PC. USB2.0 interface is available on USB2.0 OTG mini AB, receptacle J5. The TM4C1237E6PZ USB controller supports as a full-speed (12 Mbps) or low-speed (1.5 Mbps) operation with integrated PHY. Some USB controller signals are alternate functions for some GPIO signals and default to be GPIO signals at reset. EMI filtering has been provided by stuffing a common mode choke for the elimination of common mode noise in high speed USB data lines (USBDP & USBDM). The TPD4E1B06 device has quad channel ultra-low cap used for ESD protection. Its 1.0pF line capacitance makes it suitable for a USB2.0 interface. This device is placed on the
USB lines between the common mode choke and the USB connector pins. This provides the shortest current path to ground, minimizing the possibility of damage elsewhere on the PCB.
Figure 8: ESD Device Placement
4.1.5 RESET Circuitry
The external reset pin (/RST) input requires a minimum pulse width in order for the reset pulse to be recognized. The /RST pin resets the MCU including the core and all the on-chip peripherals. The external reset sequence is as follows:
The external reset pin (RST) is asserted for the duration specified by TMIN = 250 nsec and then de-asserted.
The internal reset is released and the core loads from memory the initial stack pointer, the initial program counter, and the first instruction designated by the program counter, and then begins execution.
To program a user-defined, adjustable delay time, an external capacitor must be connected between the CT pin and GND. If the CT pin is left open, there will be a delay of 40 µsec. The adjustable delay time can be calculated as given below: ( ) [ ( ) ] = [ ] = 40.4 µsec, which is greater than TMIN and ensure
Figure 9: Power Supply Tree Diagram of IO Controller
Input +24VDC gets converted to isolated +24VDC, which is then down converted to regulated +3.3VDC required by MCU for its operation. The isolated +24VDC goes to the two 50-pin interface connector required to power-up SmartIO modules. The isolated +24VDC has also been used to generate another isolated +24VDC @ 100mA power supply for the field sensors.
4.2.1 Power Supply Front-end
The DC input is protected for EMI/EMC, transient/surge, reverse polarity, hot-swap / in-rush current limit and isolated to comply with harsh industrial environment. The reverse polarity protection has been provided using schottky diode D15 having rating of 200V and 4A. Whereas, MOV D16 and TVS diode D17 (SMBJ45CA, 600Watts series bi-directional TVS) serves for protection against transients and surges. R125 is a 2 ohm automotive AEC-Q200 Qualified, Pulse Withstanding / anti-surge resistor and used to limit the current in the event of transient/surge strikes. The LM5069 positive hot swap controller provides intelligent control of the power supply connections during insertion and removal of circuit cards from a live system backplane or other "hot" power sources. The LM5069 provides in-rush current control to limit system voltage droop and transients. The current limit and power dissipation in the external series pass N Channel MOSFET are programmable, ensuring operation within the Safe Operating Area (SOA). The POWER GOOD output indicates when the output voltage is within 1.25V of the input voltage. The input under-voltage and over-voltage lockout levels and hysteresis are programmable, as well as the initial insertion delay time and fault detection time. The POWER GOOD output signal may be connected to ENABLE / UVLO pin of the next stage regulator i.e. LM20242MH through R271 for power supply sequencing. Current Limit:
For proper operation of device, R94 must be smaller than 100mΩ. Note: Current sense resistor (R94) must be placed near to LM5069 and connected using kelvin connection. Power Limit:
Maximum Power Dissipation in M1 during Turn-on (PLIMIT) =
=
= 30 Watts
Each time M1 is subjected to the maximum power limit conditions it is internally stressed for a few milliseconds. For this reason, the power limit threshold must be set lower than the limit indicated by the FET’s SOA chart. Insertion Time: The insertion time starts when the input voltage at VIN reaches 7.6V, and its duration is equal to tINSERTION = C68 x 7.24 x 10
5 = 340ms
During the insertion time, M1 is held off regardless of the voltage at VIN. This delay allows ringing and transients at VIN subside before the input voltage is applied to the load via M1. Fault Timeout Period & Restart: The fault timeout period and the restart timing are determined by the TIMER capacitor according to the following equations: tFAULT = C8 x 4.7 x 10
4 = 22ms
Note: The fault timeout period must be longer than the circuit’s turn-on time; otherwise device may not come out of repeated restart sequence. Circuit’s turn-on time should also be verified experimentally. tRESTART = C8 x 9.4 x 10
Therefore, VUVH = 16.1V & VUVL = 14.66V with hysteresis of 1.5V that keeps the device from responding to power-on glitches during start up. Choose the upper and lower OVLO thresholds:
R2 =
=
= 95.3K
R3 =
=
= 7.5K
Therefore, VOVH = 34.27V & VOVL = 31.77V with hysteresis of 2V.
Figure 11: UVLO & OVLO Hysteresis
Refer to LM5069 datasheet and LM5069EVAL evaluation board for device operation, design procedure and recommended PCB layout guidelines.
4.2.2 DC Input Isolation
An isolated 24V to 24V DC-DC converter has been designed using LM20242 in flybuck topology. LM20242 is a synchronous buck regulator capable of delivering up to 2A of load current based on Current Mode Control. The circuit has been optimized to give an isolated 24V output with 500mA current. The input voltage ranges from 14.66V to 34.27V. LM20242 is operating at switching frequency of 800 KHz. The required power line isolation is provides small off-the-shelf flyback transformer. The transformer chosen here for the design has 66µH primary inductance and dielectric strength of 1500VAC for one minute between primary and secondary. Primary (1-8) to secondary (3-6) turns ratio is 1:2. The first equation to calculate for any buck converter is duty-cycle. Ignoring conduction losses associated with the MOSFET’s and parasitic, it can be approximated by:
The operating frequency of the LM20242 can be adjusted by connecting a resistor from the RRT pin to ground. Use the equation given below to calculate the value of RRT for a given operating frequency. Where, fSW is the
switching frequency in kHz, and RRT is the frequency adjust resistor in kΩ.
RRT = (
)
Figure 12: Switching Frequency Vs RRT
Note: If the RRT resistor is omitted the device will not operate. Enable:
Figure 13: Enable Voltage using External Resistor Divider
The value for resistor RB can be selected by the user to control the current through the divider. Typically, this resistor will be selected to be between 10kΩ and 1MΩ. Once the value for RB is chosen the resistor RA can be solved using equation given below to set the desired turn-on voltage.
RA = (
)
If RB is 10KΩ & VTO is 15.625V, then RA will be 115KΩ. SETTING THE OUTPUT VOLTAGE (RFB1, RFB2): The resistors RFB1 and RFB2 are selected to set the primary side non-isolated regulated output voltage for the device. Later, primary side voltage is doubled (24VDC_ISO) and rectified using a diode (D1) and a capacitor (COUT2).on the secondary of the flyback transformer and provides the galvanic isolation between primary and
secondary winding. Flyback transformer must comply with the isolation requirement for the design. RFB2 should be
selected to be between 4.99KΩ to 49.9KΩ and RFB1 can be calculated using equation given below:
RFB1 = (
)
Where, VOUT = 12V & RFB2 = 11KΩ, then RFB1 comes out to be 154 KΩ. The secondary output voltage can be given as:
VSEC =
Where, VF is the forward voltage drop of the secondary rectifier diode, and NP, NS are the number of turns in the primary and secondary windings, respectively. The secondary output (VSEC) closely tracks the primary output voltage (VPRI) without the need for additional transformer winding or an opto-coupler for feedback across the isolation boundary. Refer to LM20242 datasheet and AN–1694 LM20242 evaluation board for device operation, design procedure and recommended PCB layout guidelines.
4.2.3 MCU Supply
LM5017 device has been used to generate 3.3V Volts from 24VDC_ISO required for Tiva™ C Series TM4C1237E6PZI MCU, CPLD, EEPROM and primary side power supply for RS485. When the circuit is in regulation, the buck switch is turned on each cycle for a time determined by R97 and V IN
according to equation given below.
TON = (
) = (
) = 223.33nsec
The on-time varies inversely with input voltage. At the end of each on-time, the buck switch is off for at least 144ns. In normal operation, the off-time is much longer. During the off-time, the load current is supplied by the output capacitor (C290). When the output voltage falls sufficiently that the voltage at FB is below 1.225 V, the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, a minimum of 25 mV of ripple is required at FB to switch the regulation comparator. Note: RON should be selected for a minimum on-time (at maximum VIN) greater than 100ns, for proper operation. This requirement limits the maximum switching frequency for high VIN. The operating frequency can be calculated as follows:
FSW =
=
= 615.67 KHz
The output voltage (VOUT) is set by two external resistors (R101, R106). The regulated output voltage is calculated as follows:
VOUT = 1.225 X (
) = 1.225 X (
) = 3.234V
UVLO: The UVLO resistors R100 and R105 set the UVLO threshold and hysteresis according to the following relationship:
The board has been supplied with minimum ripple configuration (Type 3). Type 3 ripple method uses Rr and Cr
and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is ac coupled using Cac to the feedback node (FB). Since this circuit does not use the output voltage ripple, it is ideally suited for this applications as low output voltage ripple is required.
Figure 14: Type 3 Minimum Ripple Configuration
Refer to LM5017 datasheet, AN-2200 LM5017 evaluation board for device operation, design procedure and recommended PCB layout guidelines.
4.2.4 Field Sensor Power Supply
To protect against transients and ground loops, the field side which interfaces to sensors is electrically isolated from the control side. LM5017 device has been used to generate an isolated +24V_ISO_FIELD from 24VDC_ISO required to power up the field sensors. An isolated buck converter (flybuck) uses a synchronous buck converter with coupled inductor windings to create isolated outputs. Isolated converters utilizing flybuck topology use a smaller transformer for an equivalent power transfer as the transformer primary and secondary turns ratios are better matched. There is no need for an opto-coupler or auxiliary winding as the secondary output closely tracks the primary output voltage, resulting in smaller solution size and cost. When the circuit is in regulation, the buck switch is turned on each cycle for a time determined by R117 and VIN
according to equation given below.
TON = (
) = (
) = 1.0375µsec
The operating frequency can be calculated as follows:
The output voltage (VOUT1) is set by two external resistors (R122, R124). The regulated output voltage is calculated as follows:
VOUT1= 1.225 X (
) = 1.225 X (
) = 12.1V
Selection of rectifier diode D13: The reverse bias voltage across D13 when the high side buck switch is on:
VD13 =
= 2 X 24 = 48V
So, the PIV for the selected diode must be greater than the 48V. D14 is an optional diode connected between VOUT1 and VCC regulator output. When VOUT1 is > VCC the VCC supplied from VOUT1. This results in reduced losses in VCC regulator inside the IC. Refer to LM5017 datasheet, AN-2292 Designing an Isolated Buck (Flybuck) Converter for device operation, design procedure and recommended PCB layout guidelines.
5. Test Setup
Figure 15: Setup Diagram for Test & Evaluation
6. Software Description
Tiva™ TM4C1237E6PZ MCU has got internal memories like ROM and RAM to store and run the main application program. During each operating cycle the controller examines the status of all input devices and communication interfaces, executes the logic and changes the appropriate output accordingly. The completion of one cycle in this
sequence is called one scan. The total program execution time (or cycle time) depends on the length of the control program. On power-up, program running inside Tiva™ C Series MCU will automatically detect the type of the I/O module plugged into slots by reading the configuration data stored in I/O module’s EEPROM through I2C interface and configure itself accordingly. IO Controller can be connected to the GUI based application running on a desktop PC through USB interface and used evaluate the performance of the I/O modules by selecting the options in the GUI. For evaluating the performance, Smart analog input module in one of the slot and Smart analog output module in another slot. Connect the any one channel of analog output module to voltage input analog input module using a small loopback cable. Now, with the help of GUI, user may generate voltage ramp and sinusoidal waveforms. Analog input module acquires the generated waveform. The acquired data is sent back to the GUI through USB, where it is analyzed and waveforms are plotted in the GUI from the acquired data and performance related parameters like linearity error, SNR, ENOB, Signal Power are calculated. Here, all the control and communication activities like receiving commands from GUI through USB, detecting type of SmartIO modules plugged-in, controlling analog input and output modules, sending the acquired data packets on USB, error reporting and all decision making totally supervised by Tiva™ TM4C1237E6PZ MCU.
SW2 Master manual RESET button; Top Actuated SPST-NO
8. PC Based GUI Software & Testing
Follow the following steps to install the Smart IO GUI based utility in your PC, which is used to evaluate the performance of the SmartIO modules. Note: IF PC doesn’t have LabVIEW already installed in it, Step 1 and Step 2 are mandatory.
Step 1: Please click on the link given below to download and install the LabVIEW Run-Time Engine. http://www.ni.com/download/labview-run-time-engine-2010-sp1/2292/en/ Step 2: Please click on the link given below to download and install the NI-VISA Run-Time Engine. http://www.ni.com/download/labview-run-time-engine-2010-sp1/2292/en/ Step 3: GUI Installation: Run Setup.exe from the installer folder.
Step 4: Select the installation directory and press “Next” button.
Step 10: Measurements Page: “Measurements“, page gives you a series of measurements that you can perform on the connected reference design. Configure the input parameters accordingly and press “Analyze” to perform measurements. Example: ADC design has Linearity and SNR Measurements.
Step 11: Once the measurement is done results of the measurements will be displayed in the highlighted area.
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With such components, TI’s goal is tohelp enable customers to design and create their own end-product solutions that meet applicable functional safety standards andrequirements. Nonetheless, such components are subject to these terms.No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the partieshave executed an agreement specifically governing such use.Only those TI components that TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use inmilitary/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components thathave not been so designated is solely at Buyer's risk, and Buyer is solely responsible for compliance with all legal and regulatoryrequirements in connection with such use.TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use ofnon-designated products, TI will not be responsible for any failure to meet ISO/TS16949.