Production Code Generation (PCG) Time Machine€¦ · Production Code Generation (PCG) Time Machine ... Verilog and VHDL Code Generation C/C++ code ... TLC C, makefiles Stateflow

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08 T

he M

athW

orks

, Inc

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Production Code Generation (PCG)Time Machine Tom Erkkinen

Embedded Applications Manager

The MathWorks, Inc.

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Wayback Machine (www.archive.org)NACA “Production Coders” - 1949

First Production Coders

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Y2K

500 staff

MathWorks – Oct 12 1999 (Release 11)

New

Wayback Machine

First MathWorks Production Coder

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Simulink Code Generation - 2005Simulink Code Generation - 1999

“Now supports two forms of code generation: rapid prototyping and production”

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Agenda

PCG Historical Review1990s (Circa Release 11)2000s (Circa Release 14)Today (R2008a)

New Features and TrendsExecutable SpecificationDetailed DesignCode Generation and IntegrationStandards and Certification

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Code Generation – 1990s

Real-Time Workshop® and Stateflow® CoderGenerate code from Simulink and Stateflow that is easy to interact, tune, and experiment with

Simulation AccelerationRapid PrototypingHardware in Loop (HIL)

Embedded deployment (some examples)

You can deploy code on any microprocessor using Real-Time Workshop because it generates ANSI-C.

Real-Time System

C code

Generate

Generate

Simulink and Stateflow

Algorithm and System Design

TuneTune

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ECU Development – 1990s

Paper Specs

Coding

Modeling

Field Tests & CAL

Automatic Code Generation usage

Rapid Prototyping

HIL Test

ManualIntegration

Simulation Acceleration

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Simulink Code Generation (R14)Code Generation (R11)

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Agenda


New features and trendsExecutable SpecificationDetailed DesignCode Generation and IntegrationStandards and Certification

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Component Design

Software Design

Coding• Source• Object

SoftwareIntegration


Rapid Prototyping

On Target Rapid Prototyping Software-in-loop (SIL) Test

Processor-in-loop (PIL) Test

HIL Test

Production Code Generation

Using Model-Based Design with Automatic Code GenerationECU Development – 2000s

System Specification

Coding• Source

ComponentIntegration

SystemIntegration

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Code Generation – Early 2000s

Real-Time Workshop® Embedded Coder Supports all Real-Time Workshop optionsPlus generates production code

Floating- and fixed-point efficiencyCode readabilityComponent integrationGolden model

C code

Generate

Generate



VerifyVerify

MCU DSP

TuneTune

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MAC 2005 - GMPT

More EfficientThan Hand

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MAC 2005 - Visteon

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MAC 2005 – Golden Model

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Demo

Executable specificationMultidomainRapid SimulationInteraction options

Detailed DesignData Dictionary

Code generationRP/HILPCGAUTOSAR

Verification and ValidationBidirectional traceModel Advisor

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Code Generation – Early 2000s

Real-Time Workshop® Embedded Coder Generates efficient code that can be customized to look like hand code for


Embedded TargetsProvide target specific blocks/features for

On-Target Rapid PrototypingC code

Generate

Generate



VerifyVerify

MCU DSP

TuneTune

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Simulink

Harness

Cod

eG

ener

ati o

n

Plant ModelController Model

On-Target Rapid Prototyping

Embedded Target (MPC5xx)

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Rapid Prototyping Comparison

MoreFewProduction Constraints(efficiency)

From Existing ECUsTo eval board HW

From off-the-shelf PCs To custom bypass HW

Hardware (Cost)

Refine designs, production focusedNew ideas, green field researchPurpose

On-TargetTraditional Bypass

Fidelity

Flexibility

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Code Generation – Early to Mid 2000s

Real-Time Workshop® Embedded Coder Generates efficient code that can be customized to look like hand code for


Links and TargetsProvide target specific blocks/features for

On-Target Rapid PrototypingSIL and PIL support

C code

Generate

Generate



VerifyVerify

MCU DSP

TuneTune

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MAC 2004 – DC Trucks

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SIL

Simulink

Plant Model

Host-compiled C,With S-Function Wrapper (DLL)

Controller Model

Cod

eG

ener

ati o

n

Options1. Emulate target word sizes

(w/code change) 2. Use target word sizes

(w/o code change)

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PIL

Simulink

Plant Model

Cross-Compiled C(IDE, ISS)

Controller Model

Cod

e G

ener

atio

n

PIL Options1. Using ISS2. To HW (via IDE)3. Direct to HW

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In-the-Loop Comparison

Software-in-the-Loop

HILPIL (HW)PIL (ISS)Description

Executes in test bench or lab; $$ for processor, ECU,

I/O, cables

Executes on desk or test bench; $ for processor

board and cables

Desktop convenient; executes just on host

computer w/Simulink and ISS; no HW cost

Desktop convenient; executes just in Simulink;

no HW costConvenience

Software or Test Engineers

Non real-time (between samples)

Host, Host (ISS)

Same object code; bit accurate (fix-pt); not cycle accurate since uses ISS

Verify Object Code Component

Processor-in-the-Loop

Verify Complete System Functionality

Verify Object Code Component

Verify Source Code ComponentPurpose

Systems or Test EngineersSoftware or Test Engineers

Systems or Software EngineersEngineers

Hard real-timeNon real-time (between samples)Non real-timeReal-Time

Real-Time System, Target Host, TargetHost, HostPlatform (Plant, ECU)

Same executable code; bit accurate (fix-pt); cycle accurate; emulated I/O

Same object code; bit accurate (fix-pt); cycle

accurate since runs on HW

Emulated: same source code, not bit accurate

Actual: Different source code, bit accurate (fix-pt)

Fidelity

Hardware-in-the-Loop

SIL

Fidelity

Convenience

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Link and Target Products – R2007aLinks

PIL via IDEsAltium TASKING®Analog Devices VisualDSP++®TI’s Code Composer Studio™Mentor Graphics ModelSim®Cadence® Incisive®

Project creation Optimizations

TargetsAdd-ons to LinksDevice driver blocks Optimizations

TASKING

Simulink®

Target 2

Tricore

Link

ST10

Target 1

Many third party offerings

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Embedded IDE Link™ MU - R2007b+(for Green Hills® MULTI®)

Automates build and test of embedded code using MATLAB®, Simulink® and MULTI®(from Green Hills®)

For systems and software engineers who want to deploy and verify automatically generated code quickly

Supports key processors including:Freescale™ MPC5554 and MPC7447NEC V850 Analog Devices® Blackfin®

Simulink

MULTI

Processor

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Code Generation – Mid 2000s

Real-Time Workshop Embedded Coder C and C++ Production Code Generation

Simulink® HDL CoderVerilog and VHDL Code Generation

C/C++ code

Generate

Generate

Simulink, Stateflow, and Embedded MATLAB

FunctionsAlgorithm and System Design

MCU DSP FPGA ASIC

Verilog/VHDL

Generate

Generate

You can deploy code on any microprocessor or hardware device.

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Code Generation – Mid 2000s

Real-Time Workshop Embedded Coder C and C++ Production Code Generation

Simulink® HDL CoderVerilog and VHDL Code Generation

Links and TargetsOn-Target PrototypingSIL and PIL

C/C++ code

Generate

Generate



MCU DSP FPGA ASIC

Verilog/VHDL

Generate

Generate

You can deploy code on any microprocessor or hardware device.

VerifyVerify

Code Verification – Mid 2000s

VerifyVerify

You can verify code on any microprocessor or hardware device.

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Demo

PIL Testing

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Simulation is not the only way to do Verification and Validation

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C/C++ code

Generate

Generate



VerifyVerify

MCU DSP FPGA ASIC

Verilog/VHDL

Generate

Generate

VerifyVerify

Simulink Design VerifierGenerate tests and prove model properties using formal methods

Introduced in 2007…

Hand-Generate

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Component Design

Software Design


SoftwareIntegration

SystemIntegration


Rapid Prototyping

On Target Rapid Prototyping Software-in-loop (SIL) Test

Processor-in-loop (PIL) Test

HIL Test


Using Model-Based Design with Automatic Code GenerationECU Development – 2005

System Specification


ComponentIntegration

ECU Development – Today (R2008a)

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Agenda

PCG Historical Review1990s (Circa Release 11)2000s (Circa Release 14)Today (R2007a to 2008a)

New features and trendsExecutable SpecificationDetailed DesignCode Generation and IntegrationStandards and Certification

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Embedded MATLAB Functions – R14

>>eml_frames, eml_nd

- 2007aNumber of Supported Functions

0

50

100

150

200

250

300

R14 R14sp1 R14sp2 R14sp3 R2006a R2006b R2007a

Fi Non-Fi

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Embedded MATLAB™ Improvements – R2007b

Generate C using emlc in MATLAB®

Requires Real-Time Workshop®

m-files on path supported for Embedded MATLAB in Simulink® and Stateflow®

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Agenda


New featuresExecutable SpecificationDetailed DesignCode Generation and IntegrationStandards and Certification

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Fixed Point Tool – 2006bIncludes:

Data type overrideAutomated scalingOver/under flow detectionFixed vs. float plots

>>fxpdemo_feedback

2007a

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Fixed-Point Tool - R2008a

ProblemFixed-Point Tool scaling based on design min and max data ranges was not supported

SolutionFixed-Point Tool now leverages design minimum and maximum from blocks and Stateflow data

BenefitBetter fits user workflowProvides autoscaling that does not require simulation

Design Min/Max

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Fixed-Point Advisor – R2008a

ProblemObtain an initial float- to fixed-point conversion with least effort

SolutionFixed-Point Advisor helps

Set model parameters

Set block parameters

Perform fixed-point conversion

Validate conversion using floating point results

Prepare for code generation

Complement Fixed-Point Tools, which optimizes fixed-point scaling

Float- to fixed-point conversion

>>fxpdemo_fpa

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Demo

Fixed Point Advisor

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Agenda



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Wide Signals (for-loops)for

for

for

real_T rtb_Switch[10]

for

real_T rtb_Switch[10]

real_T tmpfor

Code Efficiency – R13- R14SP2- R2007a

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void s_step(void) {bus_2 rtb_BusCreator; int32_T rtb_size; int32_T rtb_signal1;uint8_T rtb_p_data[8]; rtb_size = s_U.in.size; (void) memcpy(&(rtb_p_data[0]),&s_U.in.p_data, 8*sizeof(uint8_T)); s_Y.Out1 = s_U.in.start - s_U.in.end; rtb_signal1 = rtb_size << 1U; rtb_BusCreator.size = rtb_signal1; (void) memcpy(&(rtb_BusCreator.p_data),rtb_p_data, 8*sizeof(uint8_T)); (void) memcpy(&(rtb_p_data[0]),&rtb_BusCreator.p_data, 8*sizeof(uint8_T)); s_Y.Out4 = rtb_p_data[2];

}

Improved Bus Code – R2008a

R2007b

void s_step(void) {s_Y.Out1 = s_U.in.start - s_U.in.end;s_Y.Out4 = s_U.in.p_data[2];

}

R2008a

Improving bus code efficiency was a top request for this release

2Out4

1Out1

U U(E)

Selector

2

Gain2

1in

in

<start>

<end>

8<p_data>

<size><signal1>

8<p_data>

Unnecessary copies

Dead code

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Coder Infrastructure Circa 1999

TLC

C, makefiles

Stateflow IR

Stateflow

Simulink

Simulink IR

IR – Intermediate RepresentationTLC – Template Language Compiler

MATLAB

TLC-based Interfaces(S-Functions, System

Targets (e.g. GRT, ERT))

Deployment Support Only

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Coder Infrastructure 2008 - Unified for all domains, highly efficient, extensible

TLC

StateflowEmbedded MATLAB

C, C++VHDL, VerilogMakfiles, Projects

Unified IR

SimscapeLegacy Code Tool

Simulink

S-functions

Analysis/Transform

Analysis/Transform

TLC-based Interfaces(e.g., System Targets, Code Templates, …)

IR-based Interfaces(e.g., BuildInfo, TargetFunction Library, …)

Multiple IR analyses and optimizations

Cross product optimizations

Simulink Design Verifier

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Cross Product Optimizations – R2008a

Optimizations are now enabled across code segments generated forSimulink and Stateflow

real_T rtb_Gain[10]; …for (i = 0; i < 10; i++) {

rtb_Gain[i] = 2.0 * in[i]; }if (cu_DWork.is_active_c1_cu == 0) {

…} else {

for (sf_i1 = 0; sf_i1 < 10; sf_i1++) {out[sf_i1] = rtb_Gain[sf_i1];

}}

R2007b

if (cu_DWork.is_active_c1_cu == 0) {…

} else {for (i = 0; i < 10; i++) {out[i] = 2.0 * in[i];

}}

R2008a

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Target Specific Optimizations – R2007b

int32_T TI_C6000_s32_add_s32_s32_sat(int32_T a, int32_T b){

return _sadd(a, b);}

int32_T tricore_add_s32_s32_s32_sat(int32_T a, int32_T b){

return (__sat int)a + b;}

Target Specific Generated Code*

17.1XFixed-pt Math(int32, int32, saturated)

Tricore®

By Infineon®

C6416™DSPBy TI

Processor

6.2XFIR128-sample(int32, 50-taps, saturated)

Speedup (over

ANSI-C)

Algorithm Function

*Implemented using Target Function Libraries

Example Results

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Agenda



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Code Architecture - Integration

A B C

M

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INPUTBLUE GREEN RED

POWER

RGBSplit-4BLACK BOX®®

V RCS

Generated Algorithm

Code

InputDrivers

OutputDrivers

SpecialDeviceDrivers

CommDrivers

Scheduler/Operating Systemand Support Utilities

CommunicationInterfaces

Sensors

Actuators

SpecialInterfaces

Tuning

Legacy Code

Target Code

Controller Model

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Subsystem Integration w/Export Functions – R2006a

Supports a popular scheduling technique in productionStreamlines code generated

No scheduler, no model step function

>> rtwdemo_export_functions

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dependent models rebuilt

model changed and rebuilt

Model Reference – Introduced in Release 14

Incremental code generation is supported via Model ReferenceWhen a model is changed, only the dependent model regenerate their codeNormal mode model reference in R2007b

Only rebuilt if interface is changed (R2008a)

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Model Integration w/Prototype Control – R2008aProblem

Previously, non-reentrant code only supported void/void function interfaces

SolutionProvide function control for top model

Pass inports/outports as argumentsPass arguments by value or pointerControl argument names and orderNo wrapperModel Reference (R2008a)

BenefitSimplifies code integration and testingReduces global RAM usage

extern int32_T application(int32_T In);

Generated step function definition

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Pack-and-Go – Introduced in R2006b

Packages generated code and all dependencies (via zip)Includes Referenced Models – R2008a

Code, PackGo

Unpack, Build

(Computer A)

(Computer B)

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Legacy Code Tool – Introduced in R2006bIntegrates external code for simulation and code generation (e.g., legacy lookup tables)Earlier version of LCT on MATLAB Central

Registration File

Simulation ModelGenerated Code

>> sldemo_lct_lut

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Legacy Code Tool – R2007b

YYYND array

R2007bNNVoid* & Void **

YYYScalar, 1D array, and 2D arrayYYYComplex number 4

N/AYN/AFi objectYYYFixed-point data types 3YYYSimulink.NumericType 2

YYYSimulink.AliasType 1

YN/AYSimulink.Bus 1 (scalar only)YYYBuilt-in data types

S-FunctionDWork

S-FunctionParameter

S-Function IO

Enhanced for non-computational data integration (device driver, file descriptor,…)

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Agenda


New featuresExecutable SpecificationDetailed DesignCode Generation and IntegrationCertification and Standards

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Standards and Certification

AUTOSAR (previously discussed)IEC 61508 Safety Guidelines (discussed tomorrow)MAAB Model Guidelines (v2)MISRA C® Code Guidelines (2004)

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Model Standards Checks in Simulink Verification and Validation™

MAAB v2 checks in R2007b

IEC 61508 checks in R2008a

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MISRA-C Compliance History of Generated Code

• Our MISRA-C test suite consists of several example models

• Results shown for most frequentlyviolated rules

Improving MISRA-C compliance with each release, such as:Compliant code generated from enabled subsystems (R2007b)Eliminate Stateflow® goto statements (R2007a)Compliant parentheses option available (R2006b) Generate default case for switch-case statements (R2006b)

MathWorks MISRA-C Compliance Package available upon request www.mathworks.com/support/solutions/data/1-1IFP0W.html

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Stateflow and Embedded MATLAB Traceability – R2008a

ProblemNo automated way to trace Stateflow chart and Embedded MATLAB code to generated code

SolutionGenerate comments that automatically link Stateflowobjects and Embedded MATLAB functions to the generated codeAllow model-to-code and code-to-model bidirectional navigation

BenefitBidirectional traceability helps code reviews, code verification, and software certification

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Agenda


New FeaturesExecutable SpecificationDetailed DesignCode Generation and IntegrationCertification and Standards

The Future?

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www.mathworks.com/mason/tag/proxy.html?dataid=9939&fileid=44540

John Deere Production Code Generation - SAE CV 07 Way Forward Machine

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Way Forward Machine

Christopher Davey, Ford Motor Co, et al.

20 MLOCin 2013

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More Info – Product web page

Supported Hardware- All links and targets- Incl. Third Parties

Demos and Webinars- Short web clips (2-5 minutes)

Technical Literature- Conference papers

PCG Eval Kit for Eclipse (Europa)- Step by step tuturial (3-4 hours)- Earlier version in >>rtwdemos www.mathworks.com/rtwembedded

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More Info – MATLAB Central

Demos- Lego NXT Robots- Task Profiling (5554)- Dual Core (Blackfin)

Tools and Blocksets- Code Coverage Tool- Model Assistant Tool- Target Blocksets

www.mathworks.com/matlabcentral/fileexchange

(Production Code category)

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More Info – Support Examples

Categories- Design Patterns- Integration with Targets- Scheduling and Multirate- Standards and Guidelines

www.mathworks.com/support/product/examples.html?product=SL&category=all

(Production Code category)

New for 2008a

Stateflow Pattern Wizard

Fixed Point Tips for R2008a

Model Patterns for C constructs

Best Practices for Date Stores

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We are very interested in learning about your production code needs.

Thank you!

[email protected]

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One More Thing …

Are you working on or planning foran IEC 61508 project?

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Validated by TÜV

Production Code Generation (PCG) Time Machine€¦ · Production Code Generation (PCG) Time Machine ... Verilog and VHDL Code Generation C/C++ code ... TLC C, makefiles Stateflow

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