_____________________________________________________________________________ Maxim Integrated Products RR-1H Product Reliability Report This report presents the product reliability data for Maxim’s analog products. This data is a result of extensive reliability stress testing that we performed from January 1990 to January 1994. It is separated into six fabrication processes: (1) Standard Metal-Gate CMOS (SMG); (2) Medium-Voltage Metal-Gate CMOS (MVI); (3) Medium-Voltage Silicon-Gate CMOS (MV2); (4) 3μm Silicon-Gate CMOS (SG3); (5) 5μm Silicon-Gate CMOS (SG5); and (6) Bipolar (BIP) processes. Over 17,859,000 device hours have been accumulated for products stressed at an elevated temperature (135°C) during this period. The data inside this report is considered typical of Maxim’s production. As you will see, Maxim’s products demonstrate consistently high reliability. December 1, 1994
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Product Reliability Report - Maxim Integrated...RR-1H _____ 3 Product Reliability Report _____ Introduction This report summarizes the qualification data for Maxim’s SMG, MV1, MV2,
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This report presents the product reliability data forMaxim’s analog products. This data is a result of extensive reliability stress testing that we performed fromJanuary 1990 to January 1994. It is separated into sixfabrication processes: (1) Standard Metal-Gate CMOS(SMG); (2) Medium-Voltage Metal-Gate CMOS (MVI); (3)Medium-Voltage Silicon-Gate CMOS (MV2); (4) 3µmSilicon-Gate CMOS (SG3); (5) 5µm Silicon-Gate CMOS(SG5); and (6) Bipolar (BIP) processes.
Over 17,859,000 device hours have been accumulatedfor products stressed at an elevated temperature (135°C)during this period. The data inside this report isconsidered typical of Maxim’s production. As you willsee, Maxim’s products demonstrate consistently highreliability.
Reliability Program ...................................................................................................................................3
Step 1: Reliability Qualification Program .............................................................................................4Step 2: Ongoing Reliability Monitor Program ......................................................................................4Step 3: In-Depth Failure Analysis and Corrective Action ...................................................................4Design-In High Reliability .......................................................................................................................4Wafer Inspection......................................................................................................................................4Failure-Rate History ................................................................................................................................5Infant Mortality Evaluation and Product Burn-In ..................................................................................6
Reliability Data ...........................................................................................................................................6
Merits of Burn-In......................................................................................................................................6Life Test at 135°C.....................................................................................................................................6Humidity Test ...........................................................................................................................................685/85 Test .................................................................................................................................................7Pressure Pot Test ....................................................................................................................................7HAST Test ................................................................................................................................................7Temperature Cycle Test ..........................................................................................................................7High-Temperature Storage Life Test ......................................................................................................7
Hybrid Products Reliability Data ..........................................................................................................7
Process Variability Control.....................................................................................................................7
6 Process Technologies ..........................................................................................................................8
Reliability Test Results ............................................................................................................................9
Appendices 1 and 2 ................................................................................................................................21
SMG is a 6-micron, 24V, metal-gate, CMOSprocess. It is extremely conservative, but appropri-ate for many SSI and MSI circuit designs. This verypopular fabrication process is used to producemost of Maxim’s products.MV1 is a 12-micron, 44V, metal-gate, CMOSprocess that is used exclusively to produce ouranalog switch product line.MV2 is a 5-micron, 44V, sil icon-gate, CMOSprocess that is also used in our analog switch pro-duction line.SG3 is a 3-micron, 12V, silicon-gate, CMOS process.SG5 is a 5-micron, 20V, silicon-gate, CMOS processthat is used to produce Maxim’s next generation ofMSI and LSI products. Both SG3 and SG5 process-es have become our future process standard.Bipolar is an 18-micron, 44V or 12-micron, 24VBipolar process that is used chiefly for precision ref-erences, op amps, and A/D converters.
______________Reliability Methodology
Maxim’s quality approach to reliability testing has beenconservative. Each of the six processes has beenqualified using industry standard tests and methods.These are Life Test, 85/85, Pressure Pot, HAST, andHigh-Temperature Storage and Temperature Cycling.Each process has been qualified and proven to pro-duce inherently high-quality product.
Maxim’s early conservative approach had been tomake burn-in a standard addition to our productionflow. Burn-in allowed Maxim to ensure our cus-tomers were receiving a quality product. Now, withthe addition of our own sophisticated fabricationfacility, we have been able to improve the innateproduct quality to the point where burn-in (BI) addslittle reliability value.Before removing BI from our standard products, weare undertaking an Infant Mortality analysis for eachprocess. A process must demonstrate an inherentInfant Mortality Failure rate of less than 300ppm. Table4 shows the Infant Mortality evaluations undertaken.Each of the categories for failure are prioritized basedon their relative frequency (see Figure 3) to identifywhat area should be improved next. The data shownhere demonstrates the positive direction of Maxim'squality standards. It supports our continued philoso-phy of providing our customers with the lowest overallcost solution through superior quality products.The Maxim SMG, MV1, MV2, SG3, SG5, andBipolar processes clearly meet or exceed the per-formance and reliability expectations of the semi-conductor industry. These processes are qualifiedfor production.
__________________Reliability Program
Maxim has implemented a series of Quality andReliability programs aimed to build the highest qual-ity, most reliable analog products in the industry.All products, processes, packages, and changes inmanufacturing steps must be subjected to Maxim’sreliability testing before release to manufacturing formass production. Our reliability program includes:
Step 1: Initial Reliability Qualification Program Step 2: Ongoing Reliability Monitor Program Step 3: In-Depth Failure Analysis and
Corrective ActionTables 5 through 10 show the results of long-termlife test by process and device type. Tables 11through 15 show the results of 85/85, Pressure Pot,HAST, Temperature Cycling, and High-TemperatureStorage Life tests by device type. Tables 16 and 17show hybrid product reliability.
Maxim product reliability test program meets EIA-JEDEC standards and most standard OEM reliabili-ty test requirements.Table 1 summarizes the qualification tests that arepart of Maxim's Reliability program. We require thatthree consecutive manufacturing lots from a newprocess technology successfully meet the reliabilitytest requirements before releasing products.
TABLE 1. MAXIM RELIABILITY TEST PROGRAM
Step 2: Ongoing Reliability Monitor Program
Maxim identifies three wafer lots per process per fabeach week to perform weekly reliability monitor test-ing. Each lot is tested to 192 hours of HighTemperature Life (at 135°C) and pressure pot test.On a quarterly basis, one wafer lot per process, perfab, is identified and subjected to the same long-termreliability tests as defined in Table 1. Test results arefed back into production.
Step 3: In-Depth Failure Analysis and Corrective Action
With our technical failure analysis staff, we are capa-ble of handling in-depth analysis of every reliabilitytest failure to the device level. If an alarming reliabilityfailure mechanism or trend is identified, the correctiveaction will be initiated automatically. This proactiveresponse and feedback ensures that discrepanciesin any device failure mechanism are corrected beforebecoming major problems.
Design-In High Reliability
A disciplined design methodology is an essentialingredient of manufacturing a reliable part. Noamount of finished product testing can create relia-bility in a marginal design.
To design-in reliability, Maxim began by formulating aset of physical layout rules that yield reliable productseven under worst-case manufacturing tolerances.These rules are rigorously enforced, and every circuitis subjected to computerized Design Rule Checks(DRCs) to ensure compliance.Special attention is paid to Electrostatic Discharge(ESD) protection. It is Maxim’s design goal to haveevery pin of every product withstand ESD voltagesin excess of 2000V through a unique protectionstructure. Engineers routinely sample wafer lots toevaluate whether this goal is being met. In manycases, products withstand ESD levels beyond3500V. Attention is also paid to minimizing the fourlayer (SCR) action inherent in CMOS devices.Circuit, layout, and processing have been optimizedso that latch-up does not occur in any normal oper-ating mode. Maxim tests each new product to guar-antee that the design will meet a 50mA minimumlimit for latch-up tolerance.Designs are extensively simulated, using both circuitand logic simulation software, to evaluate perfor-mance under worst-case conditions. Finally, everydesign is checked and rechecked by independentteams before being released to mask making.
Wafer Inspection
All wafers are fabricated using stable, well-provenprocesses with extremely tight control. Each wafermust pass numerous in-process check-points suchas oxide thickness, alignment, critical dimensions,and defect densities, and must comply withMaxim’s demanding electrical and physical specifi-cations.Finished wafers are inspected optically to detect anyphysical defects. They are then parametrically test-ed to ensure full conformity to Maxim’s specifica-tions. Our parametric measurement system hasbeen designed by Maxim to make the precisionmeasurements that are mandatory to insure reliabilityand reproducibility in analog circuits. We believe this quality control technology is the bestin the industry, capable of resolving below 1pA cur-rent levels, and less than 1pF capacitance. Maxim’sproprietary software allows automatic measurementof subthreshold characteristics, fast surface statedensity, noise, and other parameters that are crucialto predicting long-term stability and reliability. EveryMaxim wafer is subject to this rigorous screening atno premium to our customers.
TEST NAME CONDITIONS SAMPLING PLANACC/SS
Life Test 135°C/1000 hrs. 1/77
85/85 85°C, 85% R.H 1/771000 hrs. w/Bias
Pressure Pot 121°C, 100% R.H. 0/772 ATM, 168 hrs.
Temperature -65°C to +150°C 1/77Cycling Air to Air/1000
SUM TOTAL OF ALL 524 179 38544 360 365 394 2.51 2.71PRODUCT LOTS
Note 1: A/D Converters, D/A Converters.Note 2: Voltage References, Operational Amplifiers, Power-Supply Circuits, Interface, Filters, Analog Switches, and Multiplexers.
TABLE 2. LIFE TEST DATA
* On this date the overall FIT calculation was changed from a combined yearly historical average to a single yearly total. This was done to better reflect year byyear improvements instead of averaging their contribution over the past years. Both calculations are shown.
Old Method: # Total Fails (1985 + 1986 + ...) New Method: # Total Fails (Current Year)Total Tested (1985 + 1986 + ...) Total Tested (Current Year)
Failure-Rate History
The graph shown below i l lustrates Maxim’s failures in time (FIT) performance. It also high-lights the continued improvements made in this
FIT rate. A well established continuous improve-ment methodology is expected to continue thistrend.
FIGURE 1. MAXIM FIT RATES OVER TIME (Using Old and New Methods)
Maxim evaluates each process and product family’sinfant mortality immediately after achieving qualifiedstatus. Through infant mortality analysis, we canidentify the common defects for each process orproduct family. Our goal is to quantify the need forproduction burn-in. If a 300ppm level can beachieved, the product or process can be manufac-tured without production burn-in and still assure anacceptable infant mortality rate. To illustrateMaxim’s products’ low infant mortality rate, refer toTable 4 for product data.
______________________Reliability Data
Merits of Burn-In
Figure 2 shows a plot of the failure rate versus time forthe metal-gate CMOS process. The plot is based onTable 3's life test data and Table 4’s infant mortality eval-uation data, both applied to a General Reliability model.From this data, the benefit of production burn-in canbe derived. Table 3’s data summarizes the reliabilityeffect of production burn-in. Essentially, only 25 unitsout of 17,859 were found to be outside the specifica-tion after 1000 hours of operation at 135°C. This isequal to a FIT rate (FIT) of 0.34 at 25°C. In comparison, the infant mortality rate is equal to 75units out of 361,867 after 12 hours at 135°C, which hasan equivalent FIT rate of approximately 0.879. In prac-tical terms, 0.020%/6 years (or 0.003%/year) of thetotal population would be found as defective throughthe first 6 years of operation, with an additional0.0279%/year failing over the remaining life of theproduct.
TABLE 3. LIFE TEST RESULT OF MAXIM PRODUCTS FOR EACH PROCESS
(COMBINED TEST CONDITIONS: 135°C AND 1000 HRS.)
Life Test at 135 °C
Life Test is performed using biased conditions thatsimulate a real-world application. This test esti-mates the product’s field performance. It establish-es the constant failure-rate level and identifies anyearly wearout mechanisms. The test product isunder a controlled, elevated temperature environ-ment, typically at 135°C. This test can detectdesign, manufacturing, silicon, contamination,metal integrity, and assembly-related defects.
FIGURE 2. FAILURE RATE AT THE FIELDCONDITION 55°C FOR METAL GATE CMOS PROCESS
Test Used: High-Temperature Life and Dynamic Life Test (DLT)
Test Conditions: 135°C, 1000 hrs., inputs fed byclock drivers at 50% duty cycle
Failure Criteria: Must meet data sheet specifications
Results: See Tables 5-10
Humidity Test
The most popular integrated circuit (IC) packagingmaterial is plastic. Plastic packages are not her-metic packages. Therefore, moisture and othercontaminants can enter the package. Humiditytesting measures the contaminants present and theresistance the product has to ambient conditions.Contaminants can be introduced during both waferfabrication and assembly, and they can negativelyaffect product performance. Pressure Pot, 85/85,and HAST tests are used for this evaluation.
Maxim tests plastic encapsulated products with an85/85 test to determine the moisture resistancecapability of our products under bias conditions.This test can detect the failure mechanisms foundin Life Test. In addition, electrolytic and chemicalcorrosion can be detected.
Test Used: 85/85Test Conditions: 85°C, 85% Relative Humidity,
biased,1000 hrs.Failure Criteria: Must meet all data sheet
parametersResults: See Table 11.
Pressure Pot Test
This test simulates a product’s exposure to atmos-pheric humidity, which can be present during bothwafer fabrication and assembly. Although an IC iscovered with a nearly hermetic passivation (uppersurface coat) layer, the bond pads must beexposed during bonding. Pressure Pot testingquickly determines if a potentially corrosive contaminant is present.
Test Used: Pressure-Cooker Test (PCT)Test Conditions: 121°C, 100% RH, no bias,
168 hrs.Failure Criteria: Any opened bond or visual
evidence of corrosionResults: See Table 12.
HAST Test
Highly Accelerated Steam And Temperature(HAST) testing is quickly replacing 85/85 testing. Itserves the same basic function as 85/85 in typically10% of the time, making HAST tests useful forimmediate feedback and corrective action.
Test Used: HASTTest Conditions: 120°C, 85% RH, biased,100 hrs.Failure Criteria: Must meet all data sheet
specificationsResults: See Table 13.
Temperature Cycle Test
This test measures a component’s response to tem-perature changes and its construction quality. The testcycles parts through a predetermined temperaturerange (usually -65°C to +150°C). Both fabrication and
assembly problems can be discovered using this test,but it typically identifies assembly quality.
Test Used: Temperature CycleTest Conditions: -65°C to +150°C, 1000 cyclesFailure Criteria: Must meet all data sheet
specificationsResults: See Table 14.
High-Temperature Storage Life Test
This test evaluates changes in a product’s perfor-mance after being stored for a set duration (1000hrs.) at a high temperature (150°C). It is only usefulfor failure mechanisms accelerated by heat.
Test Used: High-Temperature Storage Test Conditions: 150°C, 1000 hrs. unbiased Failure Criteria: Must meet all data sheet
specifications Results: See Table 15.
_______Hybrid Products Reliability Data
Maxim’s hybrid product reliability data is presented inTables 16 and 17. Table 16 is the Life Test data forproducts tested from 1990 to 1993. Table 17 is theTemperature Cycling Test data for hybrid products.
____________Process Variability Control
Reliability testing offers little value if the manufactur-ing process varies widely. A standard assumption,which is often false, is that test samples pulled fromproduction are representative of the total population.Sample variability can be lessened by increasing thenumber of samples pulled. However, unless aprocess is kept “in control,” major variations caninvalidate reliability test results, leading to incorrectconclusions and diminishing the integrity of failure-rate estimates. Uncontrolled processes also make itdifficult to prove failure rates of less than 10 FIT.Maxim monitors the stability of critical process para-meters through the use of computerized StatisticalProcess Control (SPC). Over 125 charts are monitoredin-line during wafer production. Additionally, over 100process parameters are monitored at WaferAcceptance. Maxim has a target Capability Coefficient(Cpk) goal of 1.5, which is equivalent to 7ppm. In addi-tion to SPC, Maxim uses Design of Experiments (DOE)to improve process capability, to optimize process tar-geting, and to increase robustness.
(3) MV2 (Refer to Figure 6.)Layer Description Dimension1 Buried Layer 24.0µ2 P-Well 10.0µ3 P + Diffusion 1.5µ4 N + Diffusion 1.5µ5 Gate-Oxide Growth 1000 Å6 Pch Threshold Adjust7 Polysilicon 4500 Å8 NLDD9 PLDD10 N + Ohmic11 Contact12 Metal 1.0µm13 Passivation 0.8µm
(4) SG3 (Refer to Figure 7.)Layer Description Dimension1 P-Well 6.0µ2 PNP Base
3 Zener Implant4 Active Area 1.5µ5 P Guard6 N Guard7 Pch Threshold Adjust8 Poly 2 7000 Å9 Poly 1 4000 Å10 N + Block11 P + Select12 Thin Film13 CrSi Contact14 Contact15 Metal 1.0µ16 Passivation 0.8µ (Si3N4 over Si02)
(5) SG5 (Refer to Figure 8.)Layer Description Dimension1 P- Well Diffusion 8µ2 PNP Base Drive 3 Zener Implant 4 Active Area/Field Ox 1µ5 N Guard 6 P Guard 7 Threshold Adjust 8 Gate-Oxide Growth 750 Å9 Polysilicon 1 4400 Å10 Cap Oxide 1000 Å11 Polysilicon 2 4400 Å 12 N+ Implant (Source/Drain) 13 P+ Implant (Source/Drain) 14 Chrome/Si Thin Film Deposit15 Contact 16 Metallization 1µ17 Passivation 0.8µ (Si3N4 over SiO2)
(6) BIP (Refer to Figure 9.)Layer Description Dimension1 N+ Buried Layer 4.5µ2 P+ Isolation 20µ3 P Base 3µ4 N+ Emitter 2.5µ5 Capacitor 1500 Å6 Contact Etch7 Aluminum 11KÅ (Al, Si-1%)8 Passivation 8KÅ (Si3N4 over SiO2)
An acceleration factor is a constant used in reliabil-i ty prediction formulas that expresses theenhanced effect of temperature on a device’s fail-ure rate. It is usually used to show the difference(or acceleration effect) between the failure rate attwo temperatures. In simple terms, a statementsuch as, “The failure rate of these devices operat-ing at 150°C is 5 times greater than the failure rateat 25°C,” implies an acceleration factor of 5.The acceleration factor used in the semiconductorindustry is a result of the Arrhenius equation statedbelow:
Acceleration Factor = Ke
Where:K = an experimentally determined constantEa = the activation energyk = Boltzmann's constantT1 = actual use temp. in degrees KelvinT2 = test temp. in degrees Kelvin
How to Use This Equation
The first step is to determine an activation energy,which may be done in one of two ways. The firstmethod involves using failure analysis techniquesto determine the actual failure mechanism. Manyfailure mechanisms have had their activation ener-gies already determined, and these are tabulatedin published literature. Although all processes arenot exactly the same, the activation energy of aparticular failure mechanism is mainly determinedby physical principles. Using published activationenergies will not give the exact activation energythat is associated with a particular process, but itwill give a very close approximation.The dominant failure mechanisms in Maxim’s LifeTests have activation energies in the range of 0.8eVto 1.2eV. We have conservatively chosen 0.8eV forthe purposes of computing the acceleration factorsused in this report. Actual acceleration factors are
probably greater than those quoted.The second method to determine an activation energy(Ea) is empirical. Two groups of devices are tested atdifferent temperatures, and the difference between theirfailure rates is measured. An example is shown below:
Group 1 = 9822 failures after 100 hrs. of operation at 150°C.
Group 2 = 1 failure after 100 hrs. of operation at 25°C.
The acceleration factor is, therefore, 9822 for thisparticular failure mechanism between these twotemperatures.
9822 = e
Where:Ea = the unknown activation energyk = 8.63 x 10-5eV/°KT1 = 25°C + 273°C or 298°KT2 = 150°C + 273°C or 423°K
Substituting:
9822 = e
9822 = e
Taking the natural log of both sides:Loge9822 = Ea x 11.49Loge9822 = Ea
11.49
Therefore, Ea = 0.8eVAssuming that this activation energy represents thedominant failure mechanism of the device underconsideration, it may then be used to determine theacceleration factor between any two temperaturesas follows:
The Mean Time Between Failures (MTBF) is theaverage time it takes for a failure to occur. Forexample, assume a company tests 100 units for1000 hrs. The total device-hours accrued wouldbe 100 x 1000 or 100,000 device-hours. Nowassume 2 units were found to be failures. Roughly,it could be said that the Mean Time BetweenFailure (MTBF) would equal:
MTBF = Total Device Hrs. = 100,000 = 50,000 hrs.Total # of Failures 2
The Failure Rate (FR) is equal to the reciprocal ofthe MTBF or:
FR = 1 = 1 = 0.00002MTBF 50,000
If this number is multiplied by 1 x 105, the failurerate in terms of percent per 1000 hrs. is obtained,i.e., 2%.A common reliability term also used to express thefailure rate is Failures in Time, or FIT. This is thenumber of failures per billion device-hours, and isobtained by dividing the Failure Rate by 10-9:
FR = FIT.10-9
Using the above example:FIT = 0.00002/10-9
= 20,000 The FIT rate is, therefore, shorthand for the numberof units predicted to fail in a billion (10-9) device-hours at the specified temperature.
Calculating Failure Rates and FITs
The failure rate can be expressed in terms of thefollowing four variables:A = The number of failures observed after testB = The number of hours the test was runC = The number of devices used in the testD = The temperature acceleration factor
(See Appendix 1)
Using data in Table 2, a failure rate at 25°C cannow be calculated:A = 179B = 192C = 38,544D = 9822 (Assuming Ea = 0.8eV, and a test
temperature of 150°C)
Substituting:
FR = 179 = 2.46 X10-9192 x 38544 x 9822
Expressing this in terms of the FIT rate:FIT = 2.46
To determine the FIT rate at a new temperature, theacceleration factor (D) must be recalculated fromthe Arrhenius equation given in Appendix 1.
Including Statistical Effects in the FIT Calculation
Because a small random sample is being chosenfrom each lot, the statistical effects are significantenough to mention. With most published failurerate figures, there is an associated confidence levelnumber. This number expresses the confidencelevel that the actual failure rate of the lot will beequal to or lower than the predicted failure rate.
The failure rate calculation, including a confidencelevel, is determined as follows:
FR = x2
2DH
Where:X2 = the Chi square value
2DH = 2 times the total device hours= 2 x (BxCxD)
The Chi square value is based on a particular typeof statistical distribution. However, all that isrequired to arrive at this value is knowing the number of failures. In this example, there were 179 failures. The Chi square value is found using astandard X2 distribution table. The tabular valuesare found using the factors (1 - CL), where CL isthe desired confidence level, and 2(N + 1) is thedegree of freedom.
The value of (1 - CL) for a 60% confidence level is:(1 - 0.60) = 0.40.The number of degrees of freedom equals:2(179 x 1) = 360.The Chi square value found under the values of0.40 and 360 degrees of freedom is: 365.
Therefore, the failure rate found using a 60% confi-dence level is:
FR = 365 = 2.51 X 10-91.45 x 1011
Expressed as Failure-in-Time rate:FIT = 2.51
Referring to Table 2, one can see that for Maxim’sproduct, there is a 60% confidence level that nomore than 2.51 units will fail per billion (109)device-hours of operation at 25°C.