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Bottom Termination Components, pg. 44

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POSTMASTER: Send address changes to PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY, P.O. Box 35621, Tulsa, OK 74153-0621

FeatUres

23 DocumentationautomatingtheDocumentationProcess“Documentation is much bigger than just design, fab and assembly,” experts say. a look at best-in-class processes that reduce the amount of time spent on drawings and notes by creating a “living” document. bymikeBuetow

26 DfmBestPracticesforDouble-Sidedmixed-technologyBoardsplated through-hole assembly remains in use for some heavy power connectors, transformers and other devices where strong mechanical bonds are required. reason: Heavy parts are prone to falling off during soldering. byGeorGeHenninG

28 coVerStorYacritiqueofiPc-a-610ethe industry standard for visual acceptance criteria for post-assembly soldering and mechanical assembly requirements has been revised. a master trainer assess-es the revised guidelines, looking at the many changes to package-on-package and leadless device packages, flex circuits, board-in-board connections and newer style smt terminations. byBoBwettermann

32 SolDermaterialSPresentandFutureSoldertechnologiesnext-gen product relies on advanced powder technologies, better flux formula-tions, and dual-function materials such as epoxy fluxes. How powders, activator chemistries and fluxes are evolving for production use. byneilPoole,PH.D.,anDBriantoleno,PH.D.

38 SmtcleaninGPost-reflowresidueresultsFollowingpH-neutralcleanerapplicationa study of 40 leaded and pb-free solders compares alkaline to pH-neutral cleaning agents.byHaralDwack,PH.D.,JoacHimBecHt,PH.D.,micHaelmccutcHenanDumuttoSun

SEPTEMBER2010•VOL.29•NO.9FIrst persOn

6 CaVEaTLECTOROverreach?MikeBuetow

21 DaTaBaSELit up.PeteWaddell

mOney matters

14 ShERMaN’SMaRkETFoxconn’s suicide cluster, in context. RandallSherman

16 GLOBaLSOuRCiNGLow cost: the death of innovation. RichardPlatt

18 ROistandard mistakes.PeterBigelow

tecH taLk

20 ONThEFOREFRONTLeDs’ bright future. E.JanVardaman

22 DESiGNER’SNOTEBOOkOptimizing FpGa-to-board connectivity.FrankSmetana

44 BETTERMaNuFaCTuRiNGWhat lurks below.RayPrasad

45 SELECTiVESOLDERiNGa primer on nozzle types. alanCable

46 TEChTiPSBall attachment with preforms. aCiTechnologiesinc.

50 TESTaNDiNSPECTiONeight steps to great Ict coverage.JunBalangue

52 SMTTROuBLEShOOTiNGreflow-related bridging.PaulLotosky

52 DEFECTSDaTaBaSEFiner powders, more solder balling?Dr.DavideDiMaio

54 PROCESSDOCTORcleaning’s building blocks.Dr.haraldWack

55 SOLaRTEChNOLOGiESthe solar show circuit. andyure

56 MaTERiaLSWORLDsoured by graping? JieBai

Bottom Termination Components, pg. 44

/SEPTEMBER 2010

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ONThECOVER:a master instructor reviews the revised Ipc-a-610e.

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EditorialEditor in chiEf: Mike Buetow, 617-327-4702, [email protected]

SEnior Editor: Chelsey Drysdale, 678-993-4806, [email protected]

fabrication tEchnical Editor: Kathy Nargi-Toth

dESign tEchnical Editor: Pete Waddell

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CAVEAT LECTOR

The world over, countries are adopting the core elements of REACH, Europe’s three-year-old regulation on chemical use.

As the EC’s Environment Commission states, REACH aims to improve the protection of human health and the environment through the better and ear-lier identification of the intrinsic properties of chemical substances (http://ec.europa.eu/environment/chemicals/reach/reach_intro.htm). But what it says next is equally important: “At the same time, innovative capabil-ity and competitiveness of the EU chemicals industry should be enhanced” [italics mine].

Indeed, what REACH and its relatives around the world will necessarily create is such a bewildering maze of paperwork and fine print that they will act as de facto trade barriers. As Greg Dripps, Dow Electronic Materials’ global manager, Product Safety & Steward-ship, noted recently, “Entry to markets will be slower.”

Speaking at the IPC Symposium on Electronics and the Environment in mid July, Dripps pegged the shift-ing worldview on chemical safety to the 2002 World Summit on Sustainable Development in Johannesburg, at which the concept of the precautionary principle was introduced. There, it was agreed to aim, by 2020, to use and produce chemicals in ways that minimize significant adverse effects on human health and the environment.

Certainly we’ve had fair warning of what was ahead. Fast forward to today, and the rising tide of substance regulation threatens to engulf us all. To wit:

■ South Korea is amending its Toxic Chemical Control Law, and moving toward a list of substances of very high concern (SVHC).

■ China is expanding the scope of its REACH-like list, going so far as to apply tests to chemicals under R&D – in other words, products for which there may not even be a market. Its scope will include all electronics equipment. However, self-declaration is permitted, and mandatory testing is no longer in effect. Stricter limits are ahead for wastewater and air emissions, although China has traditionally done a poor job of ensuring compliance.

■ Taiwan’s new chemical management program goes into effect next year, although some analysts, Dripps included, believe that deadline will slip.

■ Malaysia’s proposed laws closely resemble REACH, but implementation is being delayed.

■ Japan’s CSCL is migrating toward REACH, with phase-ins coming this year and next. Japan will ban some plating bath additives such as chromate and permanganate.

■ Canada’s “short list” has 4,300 substances on it, of which 500 are deemed “high priority.” Celestica supply chain management engineering consultant Kevin Weston says to plan on a 10-month lag for the government to respond to the submittal of

chemical information. ■ In the US, laws vary by state. Nationally, the tooth-less 1976 Toxic Substances Control Act gives the Environmental Protection Agency authority to regu-late and test chemicals that pose a health risk – but only for certain industries, and only when there is evidence of harm. In practice, just five chemicals have been restricted. It’s so weak, even the American Chemistry Council is lobbying to strengthen it. The new version requires safety determinations of several “expedited action chemicals,” including lead and Tetrabromobisphenol A (TBBPA), the flame retar-dant used in most laminate. This, of course, means millions of chemicals and

mixtures. My own SVHC (shortlist of very high con-cerns) is just how, exactly, we are going to collect and register all these data. Just knowing which companies are obligated to report information is a nightmare. (Hint: It’s not just the original chemical manufactur-ers. In fact, in some cases, distributors could be on the hook.) According to Kathleen Roberts, executive direc-tor of the North American Metals Council, under the Inventory Update Rule, there’s a reporting deadline of Sept. 30, 2011, for any chemical used this year. (Forms may be downloaded from the EPA website.)

The fundamental shift is not just the extent of sub-stances to track. Rather, it’s the philosophical change that chemicals are guilty until proven innocent. Given the enormous difficulty chemical engineers have in separating the effects of one substance from others in its working environment, I can’t imagine how this will be accomplished.

Individual companies already are feeling pressure from down the supply chain. In researching solutions, I came across Actio (actio.net), a New Hampshire-based company that has developed sophisticated software for organizing and managing material safety data sheets, and cross-checking them against the latest global regu-lations. Jabil, for one, is now rolling out some of the Actio modules across its entire enterprise.

It couldn’t come at a better time. One major materi-als supplier to bare board fabricators told me he receives at least one request a day, often from customers in China, to cross-check their products against a regulated substances list. The checklists can contain up to 2,500 chemicals. Oh, and by the way, the company does not maintain an electronics database; it keeps a binder. (This is probably what Dripps had in mind when he noted the market barrier.) It’s enough to send employees jumping off every workplace roof, not just Foxconn’s.

There’s a silver lining. If they try, it will solve the US unemployment issue.

The REACH Pandemic

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IPC�Updates�Surface�Mount�Land�Pattern�Standard�BANNOCKBURN, IL – IPC (ipc.org) has released the B revision of IPC-7351, Generic Requirements for Surface Mount Design and Land Pattern Standard. The revision provides industry consensus guidance on land pattern geometries, as well as surface mount design recommendations for achieving the best solder joints.

A major addition to IPC-7351B, the new padstack naming convention, consists of combinations of letters and numbers that represent the shape or dimensions of lands on different layers of printed boards or documentation. The padstack naming conven-tion enables a designer to convey all variations and dimensions of a padstack, employ-ing it in combination with intelligent land pattern conventions also defined within the standard, according to design rules established in the IPC-2220 design series.

The standard directs users on an appropriate land pattern based on desired com-ponent density through the provision of three separate land pattern geometries for each component. The revision introduces land pattern design guidance and rules for new surface mount component families such as electrolytic aluminum capacitors; small outline diode, flat lead; small outline transistor, flat lead, and dual flat no-lead devices.

Several device families, including DPAK, QFP and QFN, often feature thermal pads on the bottom of the packages that expose the die to the printed board surface. IPC-7351B now provides a default paste mask for those pads to permit the package body to settle.

The revision also expands its Pb-free coverage with the addition of new solder alloys, and presents discussion on etch-factor compensations at the design and printed board fabrication levels.

“IPC-7351B introduces several new component families and lead forms that include micro-miniature flat-lead and no-lead components, and a new padstack standard naming convention,” says committee member Tom Hausherr, EDA library product manager, Mentor Graphics. “Overall, the IPC-7351B standard is a key publication in the electronics industry for accurate CAD library generation.”

IPC-7351B includes both the standard and an IPC-7351B Land Pattern Cal-culator on CD-ROM for accessing component and land pattern dimensional data. The calculator includes the document’s mathematical algorithms. The tool also per-mits modification of dimensional attributes of IPC-approved land patterns. – CD

Mentor, NI Provide Test Feedback for DesignersWILSONVILLE, OR – A new collaboration between Mentor Graphics (mentor.com) and National Instruments (ni.com) provides test-oriented feedback in each step of the design process.

The SystemVision SVX Client environment for NI LabVIEW software permits designers to develop their test bench against a virtual prototype based on their specifications, and then use the identical test bench in the NI LabVIEW software on physical prototypes.

Test program development can proceed without waiting for physical prototypes, the companies said. Test program developers can provide test-oriented feedback to design teams. The SystemVision SVX environment provides a virtual prototyping of the entire system, while the LabVIEW software implements test program develop-ment and execution. – CD

Meiko to Expand in China, VietnamAYASE CITY, JAPAN – Meiko Electronics (meiko-america.com) reportedly will invest 38 billion yen (about $437 million) over the next three years to expand production in China and Vietnam.

Meiko Vietnam Electronics built its 2.21 million sq. ft. bare board fabrication and EMS plant near Hanoi in 2008. The company also operates PWB plants in

PCD&F PeopleCookson� promoted� David Crimp,� currently� executive�vice� president� of�Alpha� Metals�Europe,�to�president�of�Enthone�Europe.

Lazer-Tech� Canada� named� Steven R. Calvert� front-end� manager.� He� was� front-end�engineering�manager�for�Coretec.

Leader� Tech� named� Alex Cox� regionalsales�engineer.

Winchester� Electronics� named� KevinPerhamus�president.�He�was�formerly�gen-eral�manager�at�Amphenol.

PWB� fabricator� Prototron� Circuits� named�Karl Doebbert� to� manage� sales� effortsin�Texas.

PCD&F BrieFs

Ibiden� (ibiden.com)� will� hire� 900� workers�for� its� soon-to-open� campus� in� Penang,�Malaysia.

Magneti Marelli� (magnetimarelli.com)�has�signed�an�exclusive,�worldwide�agreement�with�Mentor Graphics�(mentor.com)�for�the�Valor�vManage�traceability�suite.�

Milplex Circuit� (Canada)� appointed� Ste-phen Bess and Associates its� � representa-tive�in�the�Southwest�US.�

Uyemura� (uyemura.com)� named� Para-mount USA� (paramount-usa.com)� its�representative�in�Southern�California.��

Mentor Graphics� (mentor.com)� seeks�entries� for� its� annual�Technology� Leader-ship� Awards� competition� for� PCB� design.�Winners�will�be�named�in�each�of�six�cat-egories,�as�well�as�for�Best�Overall�Design.�Entries�will�be�accepted�through�Sept.�24�at�mentor.com/go/tla.�

Camstar Systems� (camstar.com)� acquired�software� firm� SigmaQuest� (sigmaquest.com)�for�an�undisclosed�amount.�Camstar�expects�the�acquisition�to�increase�revenue�30%�in�2011.

ITT� (itt.com)� cited� Endicott Interconnect Technologies�(eitny.com)�for�support�of�the�Thin�Tile�Array�PC�board.

Seica� (seica.it)�named�Christopher Associ-ates�(christopherweb.com)�to�distribute�its�bare� PWB� electrical� testers� in� Southern�California.�

Epec Engineered Technologies� (epectec.com)� has� taken� an� equity� stake� in� Excel Electrocircuit� (excelelectro.com),� a� quick-turn�PWB�manufacturer�in�Orion,�MI.

MIT� (mit.edu)� researchers� are� working� to�

9september 2010� PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

edited by mike buetow ArouNd tHe WORLD

develop� fibers� that� can� hear� and� produce�sound,� and� someday� those� could� take� the�form� of� wearable� electronics.� (wired.com/gadgetlab/2010/07/fibers-electronic-textiles/)

Follow� us� on� Twitter:� twitter.com/mike-buetow

Flex�circuits�manufacturer�All Flex� (allflex-inc.com)� has� completed� a� “significant”�expansion,� including� capital� equipment�improvements�and�facility�upgrades.

CirCuits Assembly BriefsEMS� provider� EE Technologies Inc.� (eete-chinc.com)�will�expand�its�Empalme,�Sono-ra,�Mexico�production�facility�from�17,227�sq.�ft.� to�38,628�sq.�ft.� It�anticipates�the�growth�will�generate�an�additional�50�to�100�jobs.��

Note Ab� (note.eu)� continues� to� transfer�production� from�Skänninge,�Sweden,�and�Tauragé,� Lithuania,� and� is� shuttering� its�Gdansk,� Poland,� operation,� which� should�be�closed�by�year-end.�Note�also�organized�its�CAD�and�parts�operations� into�a� sepa-rate�company,�a�joint�venture�with�Anders Johansen.

IPC�(ipc.org)�and�ESDA�(esda.org)�released�DVD-74C,� ESD� Control� for� Electronics�Assembly,� a� training� video� on� ESD� phys-ics,�control,�handling�and�transportation.�

EMS�provider�Enics�(enics.com)�will�invest�several� million� euros� to� increase� SMT�capacity�of� its�Beijing�plant�by�100%,�and�might�double�the�workforce�to�900.�

Aegis�(aiscorp.com)�has�expanded�its�busi-ness�relationship�with�Rich Sales�(richsales.com)�to�include�Texas,�Louisiana,�Arkansas,�Oklahoma�and�Mexico.

Elcoteq� (elcoteq.se)� purchased� its� sec-ond� BPM Microsystems� (bpmmicro.com)�3000FS� automated� production� program-mer�for�its�Pécs,�Hungary�facility.�

Koh Young�(kohyoung.com)�claims�several�key� KY8030-3� SPI� “wins”� in� the� past� 90�days�with�small,�mid-sized�and�large�manu-facturers�in�several�market�sectors,�includ-ing�one�of� the�world’s� largest� automotive�electronics�manufacturers.

iNEMI (inemi.org)� will� sponsor� a� work-shop�Sept.�16-17�in�Berlin�on�the�technical�and� regulatory� challenges� anticipated� in�the�implantable�and�portable�segments�of�medical�electronics.��

MiTAC International� (mitac.com)� will�acquire�the�contract�assembly�business�of�Synnex�(synnex.com).�

Juki Automation Systems� (jas-smt.com)�has� integrated� Microscan’s� (microscan.com)�Visionscape�machine�vision� solution�

Guangzhou and in Wuhan, Hubei Province, China. The Japan-based circuit board maker has four PWB plants and two tech centers in Japan.

Separately, Meiko also recently signed an agreement with Schweizer Electronic (schweizerelectronic.ag), the longtime German PWB fabricator, covering customer support, production, and eventually technology joint ventures. Under the strategic partnership, Schweizer will be exclusively responsible for European customers and Meiko exclusively for Asian customers. – MB

Schweizer Seeks Embedded Component PatentSCHRAMBERG, GERMANY – Schweizer Electronic (schweizerelectronic.ag) has filed for a patent for producing an embedded component multilayer circuit board.

According to the application, the printed circuit board fabricator seeks a patent on a process describing a “multilayer PCB comprising a stack of a plurality of electrically insulating and/or electro-conductive layers and at least one passive or active electrical component arranged inside the stack of layers. The invention also relates to a passive or active electrical component mounted on said stack, to an associated wiring and to a corresponding production method. According to the invention, the insert is embedded between two electrically insulating liquid resin layers or prepreg layers extending over the entire surface and covering the insert on both sides, said insert being surrounded by a resin materials that is liquefied by compression or lamination of the structure.”

The application was filed in Germany in December 2007, and has an interna-tional classification number H05K 1/18. – MB

ASM�to�Buy�Siemens'�Placement�BusinessMUNICH – Semiconductor equipment OEM ASM Pacific Technology (asmpacific.com) has reached an agreement to buy Siemens’ electronics assembly placement equipment business (siplace.com). ASM will pay €1 for the unit, and Siemens will provide €29 million as a nonrefundable cash payment. An early 2011 closing is expected, pending ASM shareholder approval.

In a statement, Siemens CEO Günter Lauber said, “There are no plans for mak-ing any major changes in terms of people, locations and structures,” and Munich will remain the unit’s headquarters. The Siplace business unit will be operated as a separate division within ASMPT, Lauber said. ASM’s Asia network will help the Siplace business, he added.

ASM chief executive Lee Wai Kwong said the proposed deal “represents an excel-lent combination of advanced technologies with vast experience and knowledge.”

ASM, a manufacturer of semiconductor and LED machines and systems, is com-ing off its best-ever first-half, with sales of $537 million, up 196% year-over-year and 25.4% sequentially. The company had second-quarter sales of $307 million.

The 1,200-employee Siemens unit has been in play since last fall, when the com-pany announced plans to divest or close the Siplace placement business. The company said plans to debut the Siplace SX4 placement machine this fall remain on track.

The Siemens Electronics Assembly Systems unit lost €151.7 million on €190.7 million in sales for the fiscal year ended Sept. 30. The business had losses of €14 mil-lion on €62 million in revenues for the period ended Dec. 31. – MB

AsteelFlash to Build 3d Tunisia PlantPARIS – AsteelFlash (asteelflash.com), the world’s 15th largest EMS company, has signed an agreement to expand its production in Tunisia, the company’s chief execu-tive said. The new factory will come online within a year and will double the contract electronics manufacturer’s capacity there, founder and CEO Gilles Benhamou told CIRCUITS ASSEMBLY.

Forecasts call for AsteelFlash to double its revenue this year and next in Tunisia, as customers move programs west from China. The company also plans to add 1,500


ArOUND tHe WORLD eDiteD by mike bUetOw

workers, for a total of 2,500 by 2014. – MB

Smart Group to Release Updated Pb-Free Defect GuideBUCKS, UK – The UK-based Smart Group (smartgroup.org) will soon launch its third Pb-free guide, featuring more than 25 pages of examples and causes of defects. The new color booklet covers wave, selective, reflow and manual soldering. It also fea-tures defects associated with conformal coating, PoP technology, cleaning, and land grid array components.

To download the current defect guide for free and receive the updated version, visit smartgroup.org/leadfreedefectsguide/. – CD

Foxconn: 50% EMS Share in 2011?EL SEGUNDO – Foxconn’s (foxconn.com) share of the global contract electronics manufacturing market could reach 50% next year as demand for Apple (apple.com) products skyrockets.

Foxconn had a 44.2% share last year, research firm iSuppli (isuppli.com) said. But its revenues were up 54.1% year-over-year through the first quarter.

“Foxconn’s customers are some of the hottest companies in the electronics busi-ness today, most notably Apple,” said iSuppli’s Thomas Dinges in a press release. “As Apple and others have gained share, so has Foxconn.”

A supplier to Hewlett-Packard, Dell, Sony and Nokia, Foxconn could benefit most from Apple’s higher forecasts for the iPad, now pegged at 12.9 million this year and 36.5 million next year. Meanwhile, iPhone shipments are forecast to reach 53.5 million next year, more than double the 25.1 million shipped in 2009, iSuppli said.

Foxconn’s gross margins may be squeezed in the process, however. Margins dropped 80 basis points from a year ago to 8.7%. “Margins are a key area for Hon Hai, as the company is working to implement higher wage rates in its large facili-ties in China, while shifting production over the next several quarters to lower-cost regions in that country,” Dinges said. – MB

US�Enacts�‘Conflict�Metal’�Law�WASHINGTON – Included in the financial sector reform law President Obama signed on July 21 was legislation designed to prevent trade in so-called conflict minerals from the Democratic Republic of the Congo. A wide range of electronics will now be subject to new sourcing and supply chain requirements for at least five years.

The law essentially bans the import of gold, columbite-tantalite, cassiterite, wol-framite, and their derivatives from the DRC by US-based publicly held companies, enacts strict reporting standards, and implements a new labeling procedure.

Under the new law, any publicly traded company that makes products that use conflict minerals and buys those minerals either in the DRC or an adjoining country must exercise due diligence on the source and supply chain.

Affected companies must provide annual reports on their measures taken to the Securities and Exchange Commission and on their websites. Steps include third-party audits of the report; any products manufactured by that company that contain con-flict metals that directly or indirectly finance or benefit armed groups in the DRC or an adjoining country; the facilities used to process the conflict metals; the country of origin, and efforts taken to determine the mine or location of origin of the conflict metals with the greatest possible specificity.

Under the new law, products may be labeled “DRC conflict free.” The current list of metals is not set in stone; the US State Department may add

to the list in the future. – CD

into�its�JX-100�placement�systems.��

A� coalition� of� over� 40� European,� Aus-tralian� and� US� investors� publicly� con-demned�workplace�conditions�in�the�global�electronics� supply� chain,� specifically� at�Foxconn�(foxconn.com).

Stencil� and� fixtures� provider� Manufactur-ing Resource Corp.� (m-r-c.com)�has�opened�operations�at�BEST Inc.�(solder.net)�in�Illinois.�

Acculogic’s�(acculogic.com)�Manufacturing�Test�Systems�Division�(acculogic.com)�will�open� an� engineering� office� in� Huntsville,�AL,� and� named� Vaughan Carlson� South-east�engineering�manager.�

Electrolube�(electrolube.com)�named�Adtool�(adtool.com)�its�distributor�in�Canada.�

A�recent�study�by�noted�expert�Chrys�Shea�and� sponsored� by� Christopher Associates identifies� root� causes� of� stencil� printing�process� defects.� (circuitsassembly.com/cms/news/10061-stencil-printing-defect-report-available)

EMS� firm� Computrol� (computrol.com)�acquired� a� Fischer Technology� (helmut-fischer.com)�XDAL�237�XRF�system.

Datest� (datest.com)� bought� a� Spea�(speaamerica.com)�4060�flying�probe.

CirCuits Assembly PeopleNote� Ab� named� Peter Laveson� CEO� and�president,� replacing� Göran Jansson,� who�had� been� acting� CEO� and� president� since�January.

Photo�Stencil�named�Neil Mac-Raild� CEO� and� president.� He�previously� was� general� man-ager,�DEK�Americas,�and�presi-dent�of�Ovation�Products.

Enics� Switzerland� promoted� Sabi-na Romagnolo� to� general� manager,�replacing� Martin Tanner,� who� left� thecompany.�

Computrol�named�Natalie Bulkley�program�manager/A&E.�

Libra� Industries� promoted�Jennifer Howell� (pictured)� to�marketing� and� communica-tions� manager,� and� named�Annette Pillar� programmanager.

Zestron� named� Jerry Ji� and� Martin Wen�technical� support� engineers� at� its� China-based�support�centers.

DEK� appointed� Liang Zong� business�improvement�engineer.

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MARKET WATCH


EDITED BY CHELSEY DRYSDALE

Trends in the U.S. electronics equipment market (shipments only).

% Change april mayr jUne* yTD%

Computersandelectronicsproducts 9.1 -2.9 -3.9 12.4

Computers -4.0 0.1 5.3 12.4

Storagedevices 29.6 -12.0 -4.3 25.2

Otherperipheralequipment 5.5 1.3 0.4 1.7

Nondefense -0.1 -3.6 -6.4 1.7communicationsequipment

Defensecommunicationsequipment 23.9 -11.7 -5.0 -3.9

A/Vequipment -4.9 4.4 -1.0 3.5

Components1 4.8 -2.7 -3.4 14..2

Nondefensesearchand-9.70.96.01.3navigationequipment

Defensesearchand-3.71.3-3.52.1navigationequipment

Medical,measurementandcontrol7.82.1-3.519.3rRevised.*Preliminary.1Includessemiconductors.Seasonallyadjusted.Source:U.S.DepartmentofCommerceCensusBureau,Aug.3,2010

CoMpuTIng CoMEBACK

InDuSTRY MARKET SnApSHoT

Book-to-bills of various components/equipment.

feB. mar. apr. may jUne

Semiconductorequipment1 1.23 1.21 1.13 1.13r 1.19P

Semiconductors2 56.2% 58.4% 50.4% 48.5%r 43%P

RigidPCBs3(NorthAmerica) 1.09 1.10 1.11 1.13 1.12

FlexiblePCBs3(NorthAmerica) 0.92 0.98 0.98 1.18 1.15

Computers/electronicproducts4 4.99 4.97 4.87 4.90r 5.01P

Sources:1SEMI,2SIA(3-monthmovingaveragegrowth),3IPC,4CensusBureau,pPreliminary,rRevised

mar. apr. may jUne jUly

PMI 59.6 60.4 59.7 56.2 55.5

Neworders 61.5 65.7 65.7 58.5 53.5

Production 61.1 66.9 66.6 61.4 57.0

Inventories 55.3 49.4 45.6 45.8 50.2

Customerinventories 39.0 33.0 32.0 38.0 39.0

Backlogs 58.0 57.5 59.5 57.0 54.5

Sources:InstituteforSupplyManagement,Aug.2,2010

Manufacturing Up for 12th Straight MonthTEMpE, AZ – Economic activity in the manufacturing sector expanded in July for the 12th consecutive month, says the Institute for Supply Management (ism.ws).

The PMI measure of manufacturing activity was 55.5%, down 70 basis points. A reading above 50% indicates the manufacturing economy is generally expanding.

For the month, new orders fell 5 percentage points to 53.5%. Production decreased 4.4 points to 57%. Inventories grew 4.4 points to 50.2%, and customer inventories were up 1 point to 39%. Backlogs dropped to 54.5%, down 2.5 points.

“Manufacturing continued to grow during July, but at a slightly slower rate than in June,” said ISM spokesperson Norbert J. Ore. “Employment, supplier deliveries and invento-ries improved during the month and reduced the impact of a month-over-month deceleration in new orders and production. July marks 12 consecutive months of growth in manufactur-ing, and indications are that demand is still quite strong in 10 of 18 industries. Prices that manufacturers paid for their inputs were slightly higher but stable, with only a few items on the short supply list.”

The overall economy grew for the 15th consecutive month, according to the firm.

METALS InDEx

DaTe 8/3/09 5/3/10 5/31/10 7/5/10 8/2/10

LMECashSellerand $6.99 $8.35 $8.03 $7.82 $8.87SettlementforTin

LMECashSellerand $0.88 $1.01 $0.81 $0.79 $0.91SettlementforLead

HandyandHarman $207.89 $272.70 $268.75 $260.41 $262.90Silver(COMEXSilver)

LMECashSellerand $2.71 $3.35 $3.03 $2.92 $3.27SettlementforCopper

Q2 Semi Sales Up 7%SAn JoSE – Global semiconductor sales rose 7.1% sequen-tially in the second quarter to $74.8 billion. June sales were up 0.5% over May to $24.9 billion, the Semiconductor Industry Association (sia-online.org) reported. First-half worldwide sales were up 50% to $144.6 billion.

“Sales in the first half were exceptionally robust, driv-en by strong demand from a broad range of end-markets,” said SIA President Brian Toohey. “We expect that sequen-tial growth rates will moderate in the coming months, with the result that year-on-year growth for the industry will be in line with our mid-year forecast of 28.4%

Study: Selective Soldering Market to Hit $44M by 2015SAn JoSE – The world market for selective soldering equipment is projected to exceed $43.8 million by 2015, according to a new study by Global Industry Analysts (strategyr.com).

The research firm says implementation of highly complex board designs, constraints in wave and hand sol-dering, increasing cost, and low reliability rate, as well as increasing high-mix production are behind the demand.

Solar Expansion to ContinueEL SEgunDo, CA – The global PV market will continue to expand next year, as falling prices make solar energy more attractive , says iSuppli Corp. (isuppli.com).

Global PV system installations in 2011 will amount to 20.2 GW, up 42.7% from 2010. While this represents a sig-nificant slowdown from 97.9% growth in 2009, it remains an impressive performance in light of expected rollbacks in subsidy programs from various governments, the firm says.

SHERMAN’S MARKET


The�Dysfunction�of�EMS�and�Tragedy�of�Foxconn

Foxconn� TEchnology� group opened its first electronics assembly manufacturing plant in Shen-zhen, China, in 1988. Today, that is the company’s largest plant, with 460,000 employees, about 16% of whom live on campus.

Founded in 1974 as a manufacturer of plastic products (notably connectors) by Terry Gou, who remains its CEO and largest shareholder, Foxconn has become the largest contract manufacturing company. But recently, the company has come under public scrutiny due to allegations of employee mistreatment. To date, 12 employees have jumped from company buildings in suicide attempts during 2010; only two survived (in critical condition). Likewise, the com-pany’s critics have leaped to the conclusion that Fox-conn mistreats its workers, but the situation demands greater nuance and understanding. This cluster should be investigated, and indeed the government and Fox-conn’s customers are doing so. Managers have pro-vided trained counselors in a care center since April and a suicide hotline since last year, which has been expanded significantly amid these tragic events.

The issue has been exacerbated by Gou’s lack of understanding as to why the suicides are happening. Guo recently commented that it is not possible to determine any one cause for these tragic suicides and seems mystified as to why an employee would take their life. The company responds that Gou has been based in Shenzhen since May, leading a team address-ing these very complex issues.

The deaths are thought to be related to work-ing conditions at the plant: long hours for poor pay and constant pressure to perform. Indeed, the com-pany’s operations and demanding working conditions (although not nearly as bad as the conditions in China’s coal mines) appear cause for despair. Workers complain about military-style drills, verbal abuse by superiors and “self-criticisms.” They reportedly are forced to read aloud, fined for unwritten abuses (talking to coworkers, tardiness, etc.), as well as allegedly pressured to work as many 13 consecutive days to complete a big customer order - even when it means sleeping on the factory floor.

Foxconn denies these allegations, and claims to follow EICC overtime guidelines of a maximum of 60 hours per month. (The company also says it will abide by China’s pending overtime guidelines of no more than 36 hours per month.) Moreover, the company’s recent wage hikes purportedly ensure that workers will not have reduced wages with reduced overtime hours.

It’s true that Foxconn has done itself no favors. A young manager killed himself last July after an Apple iPhone prototype went missing, and his final mes-sages to friends suggest he had been interrogated and beaten. In a separate incident the following month, the

company confirmed its guards beat employees after a video surfaced of the episode. In 2006, after a Chinese newspaper reported that employees were being abused, a charge later shown to be false, Foxconn sued the two reporters personally and sought to have their assets fro-zen, provoking a public backlash against the company.

Gou’s own lack of awareness has not helped the situation either, although he has made repeated efforts to apologize to the families of the deceased. However, in a recent shareholder meeting Gou announced, “If a worker in Taiwan commits suicide because of emotional problems, his employer won’t be held responsible.…” Such statements seem aimed at keeping the company financially strong rather than honestly facing the core problem.

Suicide results from depression and the belief that there are no other options. Indeed, when a worker comes from the country to work and send back money to their family, and this does not happen, it can be basis for despair. One inside reporter confirmed this by saying that young people frequently come to Foxconn hoping to eventually start their own business or go to college, but most never realize that dream. Accord-ing to the New York Times, recent interviews with employees said the typical Foxconn hire lasts just a few months before leaving, demoralized.

Sociologists and other academics see the deaths as extreme signals of a more pervasive trend: a gen-eration of workers rejecting the regimented hardships their predecessors endured as the cheap labor army behind China’s economic miracle. While the EMS industry drives productivity to the extreme, and at times can be extremely demanding and punitive, it is not necessarily the cause of despair and hopeless-ness that sometimes causes people to commit suicide, although it can be a contributing factor.

Regardless, the company could do more to alleviate

the company’s handling of a suicide cluster overshadows the context.

RANDALL ShERMAN is

president and CEO

of New Venture

Research Corp.

(newventureresearch.

com); rsherman@

newventureresearch.

com. His column

runs bimonthly.

FIGURE 1.�Foxconn’s�annual�revenue,�2004-09�(in�uS$millions).�Source:�new�Venture�research

(continued on p. 17)

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GLOBAL SOURCING


The�Economic�Innovation�Dilemma

In�ThE�wakE of the economic recession, global inno-vation efforts have stalled; the profitable ventures are those that offer the lowest cost or price, like Wal-Mart and The Dollar Store. It poses a different economic set of conditions for manufacturers to face.

We are seeing the beginning stages of a turnaround. But insofar as electronics innovation is concerned, the best we’ve seen in 2010 is Apple’s rehashed tablet con-cept, an idea that dates at least to the late ’90s.

Kudos to Apple for convincing the masses that the company has cornered the market on designing an inte-grated, functional, appealing platform. To some, what-ever falls from Apple is über-good; while that might be the majority’s perception, “that don’t necessarily make it so.” A little research reveals such nuggets as the “Top 10 Apple Flops,” which doesn’t include the decision to not design in a fan on the Apple III PC, or the recent “antenna-gate” issue on the iPhone. As it turns out, Steve Jobs is no different from any other CEO; he makes mistakes. (Square Trade research recently showed a 26% failure rate of iPhones in the first two years of use.)

And not just in design. Another issue that recently surfaced calls into question the decision-making skills of not only Mr. Jobs, but a number of major high-tech industry players, all driven by the lowest-cost business model. To appreciate the context, let’s review the economic conditions we all face.

It’s not just The Dollar Store and its retail cousins that get the volume; this happens in the B2B world as well. Take Foxconn Technology Group. The world’s largest EMS company runs what some media have likened to an indentured labor camp. Its workers, per-haps caving to the pressure, are committing suicide at rates never seen at electronics manufacturer campuses.

Who among us believes Apple, Microsoft, H-P, Dell, Amazon and others that source from Foxconn did not know the local wage rates? Having been one of those who in my past helped manage such relation-ships, I can assure readers that they did. Not to know would be nothing short of corporate malfeasance. To chalk it up, as many do, to the saying, “This is China,” doesn’t begin to wipe their hands of complicity.

Indeed, this is the same issue that snared Nike when the hugely profitable apparel maker was caught employ-ing kids to sew soccer balls and sneakers. This is a clear failure of senior management for not ensuring internal corporate sustainability rules were being addressed.

There is no middle ground on ethics and human decency. American companies need to do a better job. Jobs’ attempt to marginalize the issue by stat-ing that the suicide rate in the Foxconn factory was lower than in the rest of China shows an utter lack of awareness, let alone compassion, for what corporate responsibility really means.

Therefore, I am questioning the integrity of every single company doing business with Foxconn. Is the best you can come up with to go with the low-cost leader? And is this what passes for your ability to innovate (not to mention integrity)?

I could also point out that Chinese EMS compa-nies like Foxconn are not managed for sustainable quality, let alone innovation. Why? In a commod-itized business, the time comes for game-changing moves (aka jumping the S-Curve). (The S-Curve, as it pertains to innovation management, illustrates the introduction, growth and maturation of innovations, as well as the technological cycles that most industries experience.) Sadly, examples of this among US OEMs are few. And US EMS companies are just as guilty as their customers for not challenging the migration east, knowing full well that some Chinese business practices involve bribery, knockoffs and other shady dealings.

When I consider all this, it jumps out that Presi-dent Obama’s call for American industry to innovate has clearly fallen on ears part deaf and part incom-petent. In my experience, denial often is used as a form of protecting the status quo – here, sourcing to a low-cost producer whose approaches are nefarious in their impact – and it makes us part of the problem, not the solution. Systematic innovation methods show that there are better ways of doing things.

Let’s look at how this could be done innovatively without sacrificing technology, entire industries and jobs in the US. Consider major industrial failures in recent US history: steel, autos, textiles and TV manufacturing. What, if anything, did they do to reinvent themselves? In the case of steel, it was only after the majority of steel mills closed, and thousands of lost jobs, foreclosures and bankruptcies later, did steel companies come back. New factories are almost fully automated, and in some cases, building advanced technology products (specialty hybrids), and these successors are not nearly the size of their former forges, but their workers are more techno-logically savvy. In the case of TV manufacturing, the technology has changed to LCD, LED and plasma from cathode ray tubes, but what each advanced technology has in common is they are being built by foreign MNCs, meaning the revenues go elsewhere. New technologies inevitably replaced old ones, yet a lack of investment in developing these technologies meant US OEMs were elbowed out. Textiles manufacturing experienced a dif-ferent transition: It made sense to move processing clos-er to the fields of Asia, yet US textile manufacturing did not die; it morphed into specialty materials, like carbon fiber, Gore-Tex, and the like (at least until it becomes automated and someone figures out that it is cheaper to ship the process to another nation to produce the technology). The auto industry denied its rivalry with

Why buying from the lowest-cost provider is a downward spiral for Oems.

RIChARD PLATT is principal

and owner of

The Strategy +

Innovation Group

(sig-hq.com) and

was Intel’s global

innovation program

manager and its

senior instructor

for systematic

innovation methods;

richard.platt@sig-

hq.com.

Sierra Insert 3-2010 7/16/10 6:24 PM Page 2

Visit us at PCB West Booths 206-208 • September 29, 2011

Visit us at PCB West Booths 206-208 • September 29, 2010


Japan and Germany for decades and is only now beginning to produce higher technology products that compare with their foreign rivals. Likewise, unions had to face facts that they have drained the company coffers without helping to advance the technology, efficiency and effectiveness of manufacturing. They hopefully have at long last realized that if they don’t participate appropriately, they too will be out of jobs.

Reviewing the public debacle that was the iPhone rollout, it could have been avoided had there been sufficient rapid prototyping of the design local to the design organization, followed by rigorous testing of product performance to ensure reliability and performance standards were met before going public. A US-based design team using over-seas manufacturing as a new product development facility is part of the root cause. The level of communication and understanding between a US design team and its overseas manufacturing team typically is very poor to mediocre

at best; language and cultural barriers exist, and as a result, effective com-munication breaks down, particularly in technical matters. I have witnessed on multiple occasions the US team, out of frustration, telling the manufacturing site to “just do what we tell you to do.”

In systematic innovation terms, there are solutions to this tradeoff between productivity and communication break-downs between engineering teams. One principle is to use an intermediary. In my days at Intel, I was the manufacturing engineer for server products and acted as the bridge between the NPI and high-volume manufacturing facilities, as well as the design team. Depending on whom I was talking to, I was an advocate to the design team for manufacturing’s needs for more robust design solutions that did not cause the need for additional headcount or rework, yet when dealing with the NPI factory, I would use data from my DfM tools in the virtual design space to break DfM rules and test the validity of the manufacturing envelope. In the process,

we rewrote the edge of the manufactur-ing envelope – essentially redefining the edge of manufacturing envelope – but it was with knowledge of what DfM rules we were going to break, and the result was to create new design considerations and options for both manufacturing and design. This occurred with tight collabo-ration between myself, the design team, and the NPI facility so that I could get the critical feedback and inputs from front-line workers showing me how something worked (or didn’t). This is, in fact, called rapid prototyping, where we evaluate the risks before we transfer to the high-vol-ume production facilities, where the risks are managed real time and hypotheses are tested inside the envelope we are going to build in. In the relationship with the high-volume team, I used new product transfer checklists that had to be checked off by the receiving production team to make sure no surprises occurred for them and they could ramp production quickly and efficiently.

GLOBAL SOURCING

Sherman's Market, continued from p. 14

the conditions for despair and demoral-ization. For example, on May 27, 2010, the Shenzhen Post related the case of a typical Chinese female worker named Happy, a 19-year-old assembly line worker. She sends back home as much of her 1000 RMB ($150) monthly salary as possible, but with Foxconn’s severe penalties for unwanted kinds of behavior, this dream seems remote. For example, Happy likes washing her own clothes by hand; she claims it calms her in times of stress. Her factory mandates uniforms be dry cleaned, however; if she washes it, she is penalized 500 RMB. If she is late, she is charged 100 RMB per minute. If she refuses or can’t work overtime when needed, she is removed from work lineup for over a month, or until she can come up with the fee for reinstatement. Talking during working hours brings a 100 RMB fine. She even had to borrow money once to pay the negative balance from her sal-ary. Such conditions would leave anyone feeling hopeless.

Subsequently, the rash of suicides has intensified scrutiny of the working and liv-ing conditions at Foxconn. Responding to the clamor, Foxconn has offered to double salaries in three months’ time, setting a

new standard for many other local com-panies such as Honda. Moreover, the com-pany is building an enormous safety net in a pathetic effort to stop people jumping to their deaths, but a recent attempted suicide by a young man who slashed his wrists shows that such efforts will not deter those determined to take their own lives.

The gap in recognition of the problem underlying why a person commits suicide was further reflected in Gou’s proposed solution to get all employees to sign a non-suicide pact. Employees have already complained that the letter makes it seem like they could be carted off to a mental hospital if they argue with a supervisor, and that they don’t know what the consequenc-es are if they don’t sign. The company has since been forced to withdraw the letter. In a seemingly final act of desperation, in May 2010, DigiTimes reported that Guo sought the aid of an exorcist to try to put an end to the tragedies. (Foxconn representatives noted this is a common cultural practice in China when a death has occurred.)

Overall, indications are that condi-tions in Foxconn’s factories are good and job applicants are eager to work there. By in large, most workers are happy to submit to the culture and receive overtime oppor-tunities. Yet, the labor intensity is high and Chinese workers have commented that

many Westerners would find it difficult to work at Foxconn. As BBC News recently quoted one employee, “I always smile when I see pictures of Chinese workers asleep at production lines; this is their cul-ture. Chinese are taught from school that lunch time is nap time. The 1.5-hour lunch break is common practice, almost sacred. How often do we have that in the West?”

The problem of ongoing suicides at Foxconn needs to be put in perspective. Twelve people (at last count) seems a lot, but the firm has an estimated 800,000 workers, more than 460,000 of them at a single campus in Shenzhen. According to the World Health Organization, China’s suicide rate is 13 males and 14.8 females per 100,000 people (by comparison, the US has 11 per 100,000). In other words, Foxconn’s suicide epidemic is actually lower than the national average in China and many other countries. Unfortunately, this says nothing about the fact Foxconn is the only EMS company in Asia that seems to be experiencing this problem.

Suicide is too complex an issue to rush to conclusions, and the working conditions in China are improving. For the time being Foxconn seems to be taking its responsibility to its workers’ health seriously and deserves the benefit of the doubt. CA



Copy�Cats

When�does�an individual design become, in effect, a standard?

I am continually amazed by the creativity and ability of designers. For those of us who understand an object only by seeing or touching it, the ability to mentally imagine a function, and then design a circuit – or series of circuits – that enable that conception to come to life, seems nothing short of amazing!

For printed circuit board fabricators, it is easy to believe we are the only ones with “real” problems – technical as well as logistic – providing product, on time, to customers. But those who design that product have the real challenge. Under the same time-to-market pressure, a designer must understand the desired end-goal, conceptualize what it will take to get there, create the individual design(s), sweat the details of materials, components and physical space criteria, and then make it happen through their suppliers of choice. If all goes well when they power up, all will work as intended. If not, then they have to reverse-engineer to where the design failed and rethink (if not restart) the entire process – and do it quickly; designers fight the time restrictions their company, department or “boss” imposes. Unlike most of us, creativity is not a flat process, but instead is a multifaceted mosaic of thought, understanding, conviction, skill and just a little bit of luck!

Designers can be tripped up by the same cat-egories that befall anyone: communication, fatigue, a lack of focus on details – the small stuff that can become really big if not attended to diligently and managed consistently. Those details are not as rote for a designer as for a manufacturer. Our details revolve around stationary plating lines or drilling machines. Communication takes place through process sheets or pre-set controls on some of those stationary lines. For a designer, “details” mean remembering a minute fact that could make all the difference, or making sure the design was saved after all edits were made. The small stuff is more personal and less repetitive.

Which brings me back to my question: If so much effort – and pride – is invested in a design, when does that design transition from being just a design to being the template for all designs or, for all intents and purposes, become a standard?

This morphing happens all the time. I think all companies regardless of size or location have had a brilliant designer who “cuts and pastes” from one design to another. But besides copying the desired detail, usually also replicated are a bunch of notes with little or no applicability to the end design. What they usually do add, however, are a lot of questions from would-be suppliers confused by potential con-flicts. Worse, often no one notices – until too late.

My experience has been that while organizations of all sizes are prone to excessive cut-and-paste, the larger the organization, the worse it becomes. This usually is not due to lack of skill or dedication of designers, but because of the frantic time pressures applied by larger companies on design staffs – and the limited resources, both in people and hours, available to achieve that pace.

Individual designers and those working in smaller organizations usually have a higher probability of catching such errors. When they respond quickly to suppliers with the corrected print, the mistakes are fixable, and life goes on. But when simple cut-and-paste type errors are not caught or when larger organizations cannot bureaucratically understand or handle such a simple problem, what happens? Does that mistake become a part of the company DNA and all its future designs? Has the company created a de facto standard that all future designs need to adhere to or incorporate? My fear is that denial sets in, and someone says, “It’s the design software’s fault!” and heads out to buy a more complicated and expensive platform that will do a more thorough design-rule check in the hopes of ending the discussion, versus solving the problem.

Dumb process errors are always human errors: they happen, are fixable, and life goes on. For designers those dumb errors often are far more difficult to identify until the design has long since left the design stage. Worse, the creativity of good designers sometimes camouflages dumb errors. Add tight time-to-market to the normal idiosyncrasies of human egos and sometimes – just sometimes – a good design inexplicably morphs into what appears to be a terrible standard!

Fabricators easily could see an error, work around it, and let it slide, especially with customers that pro-vide significant sales volume. However, if you want to help that customer – especially when working directly with the designer – acknowledging a mistake may be the most valuable service you could provide.

Purchasing and inspection staffs also need to understand their role. Sometimes the route-cause to product discrepancies is, in fact, caused by their own company at the design stage. A note cut-and-pasted on a print of a very different part can create serious documentation issues for all.

The legacy of a brilliant designer should be the sum of the work they designed – not the de facto design standard they inadvertently create. Everyone in the supply chain can help by making sure that when they see the symptoms of possible cut-and-paste type errors, they raise the point and ask if they are part of the design, or the beginning of a new standard. PCD&F

Don’t let dumb errors morph into de facto standards.

PETER BIGELow

is president and CEO

of IMI (imipcb.com);

pbigelow@imipcb.

com. His column

appears monthly.

CST of America®, Inc. | To request literature (508) 665 4400 | www.cst.com

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Will�LEDs�Light�Up�The�World?

ConfErEnCEs� aroUnD� ThE world are buzzing over the growth projections for high brightness light-emitting diodes (HB LED). In Korea, almost 200 people attended the International LED and Green Lighting Seminar in June, while more than 20,000 people visited the colocated LED and OLED Expo. More than 200 people attended special sessions on LEDs during SemiCon West in San Francisco this past July. Companies are looking at the explosive industry growth, and all hope for a piece of the pie. Strategies Unlimited, Credit Suisse, and McKinsey predict that the LED market – driven by three major applications (general lighting, backlighting, and automotive) – will grow at a 40% CAGR through 2015.

According to the Optoelectronics Industry Devel-opment Association, three segments – automotive, lighting, and mobile applications – are expected to grow to 89% of all applications in 2021. What is driving the growth? In the case of lighting, much of the growth comes from pending bans on incandescent bulbs and government mandates that lighting be con-verted to LEDs for energy savings.

The technology to produce LED die is based on semiconductor diode technology. The emitted wave-length of light depends on the specific semiconductor material used. The key to producing high-quality LED die is the growth of the epitaxial layers and an active p-n junction on an optimum substrate. The p-n junction is critical in determining the device’s internal quantum efficiency (IQE), and the substrate is impor-tant because it should match the lattice constant of the semiconductor. The matching lattice constant helps reduce dislocation defects. Dislocation defects can adversely affect the performance of the LED.

Key tools for the growth of the epitaxial layers include MOCVD equipment. Wafers are typically two to four inches with a constant pressure to con-tinue moving to larger wafer sizes.

The packaging and assembly process is also criti-cal to the performance, reliability, and lifetime of the LED product. LED packaging tends to be nonstan-dard, with every package unique to the supplier.

LED packaging options include use of one large LED die in a package versus multiple die. Advantages and disadvantages are still being debated. It is not clear if one method will dominate or if both solutions will be used. In some cases, multiple die are mounted directly on a metal core substrate or on leadframes.

Thermal�issues. Thermal issues have been reported to account for as much as 50% of the failures in light-ing. Effectively removing this heat is critical to con-trol junction temperatures of the LED chips, to ensure long device lifetimes, and to maintain the spectral and

efficiency characteristics of the light source. Control-ling the LED junction temperature (Tj) from 50° to 100°C is critical to LED performance. As the junction temperature (Tj) of the LED changes, the wavelength of emitted light shifts, making color control difficult. If Tj is excessively high, the active region of the LED and the electrodes of the device can degrade, lead-ing to a decrease in the device light output. High Tj can also reduce LED life. Failure to effectively remove heat from the LED source can also degrade the phosphors in the LED package. as well as other packaging materials. Some examples of the latter are yellowing of the encapsulation material and higher absorption losses at reflective surfaces. Depending on the temperature changes, the coefficient of thermal expansion and glass transition temperature of these materials can lead to mechanical stresses that cause failure of the package or the LED die. If catastrophic failure does not occur, these effects often just reduce the lumens output of the package and thus the overall efficiency (lumens per watt) of the source. Excess heat can also lead to premature failure of the LED package from delamination and die fracture.

Packaging materials will also significantly impact the optical efficiency of an LED package. Reflectivity, transmissivity and index of refraction are all materi-als’ properties that could affect the number of lumens out of the package, and also, the stability of packag-ing materials (encapsulants and lenses) with exposure to elevated temperatures, UV and other wavelength radiation. As mentioned, elevated temperatures can cause materials to turn yellow, thus reducing the number of photons getting through or changing the color of the light.

The adoption of new technologies is often hyped to the point that unrealistic expectations are created. The story with HB LEDs will be different. The dif-ference with LEDs is that there is a technology pull (the desire for energy efficiency) and government mandates. If companies can produce new, less expen-sive lighting, the future is bright. The packaging and assembly process plays a critical role in making this possible. CA

Assembly packaging could mean a bright future.

ON THE FOREFRONT

E. JAN VARDAMAN

is president

of TechSearch

International

(techsearchinc.com);

jan@techsearchinc.

com. Her column

appears bimonthly.


DATABASE

Seeing�the�Light

EvEry� month� bEtwEEn publication cycles, I try to reach out to designers to find out how things are going, what they working on, and of course, to find out if anybody has acquired any cool new guitars. Last week I talked to a friend (my twin brother of a different mother) many readers may know: Kelly Dack. Kelly works for IGT in Reno, NV. Not only does Kelly get to enjoy working and living in one of the most fantastic areas of the US, he and his colleagues at ITG get to work on some interesting boards. Those colorful and musical machines you see at any casino? ITG designs and builds them. If you’ve been to a casino lately, you may have noticed the flashing and pulsing lights that accompany the siren songs are changing. They are migrating to LED technology. According to Kelly, even the enticing sign that welcomes people to Reno is now lit by LEDs.

To people like me who have retired from daily board designing, LEDs were always a small part of our designs. They were employed to alert you wheth-er the computer was on, or the car engine needed an oil change or something like that. Today, LEDs are at the heart of a dramatic change in energy conservation. They are no lon-ger the little “ON” lights: They are the illumination for everything. Kelly and oth-ers have told me about boards chock full of LEDs. But there are issues with these boards with which more designers are going to have to contend and find answers.

From what I hear, a big issue right now is thermal management. When you put a bunch of LEDs on a single board, the heat buildup can be so significant as to cause failures. Some people are using heat sinks, bus bars and fans, of course. But going forward there will have to be better solutions. Metal core boards may be one answer, but other creative solutions are going to be required. I’ve heard that people are experimenting with cutouts in the substrate to get more direct contact with a metal core.

Another problem is one of capability and capac-ity on the manufacturing side. As reported by Mike Buetow, our manufacturing and business guru, only 15% to 20% of the EMS companies have produc-tion experience with metal core boards. As we all know, it does no good to design “it” if “it” can’t be manufactured at a reasonable cost and delivery. And then there is the issue of component traceability. Dif-ferent LEDs have different light-emitting properties that are denoted by a “bin” code. Bin codes might be mixed on a board to get the right amount of light out. As such, assemblers have to track (scan) by serial number the LEDs on each board to ensure the end-product is to specification. They can’t simply swap

one part for another, making tracking more compli-cated than with traditional passives.

It’s always interesting to see a new technology, or technology used in a new way. It’s one of the things that keep our jobs challenging. Expect to see more about the design and manufacture of LED boards in upcoming issues of this magazine and on our web-sites. In fact, for the first time, we have a class on LED board technology at PCB West (pcbwest.com) this year.

Speaking of PCB West (a somewhat transparent segue to set up a blatant plug), things are starting to heat up. As I write this, in early August, we are about seven weeks away from the annual trade show. Our VP of sales and marketing, Frances Stewart (known to some as She Who Must Be Obeyed), tells me that the show floor is just about sold out, and she is determined it will be full by the time we see you at the show. Registration is tracking ahead of this time last year, and we are looking forward to talking with a lot of people we haven’t seen in a while.

Space doesn’t allow me to list all the classes, but I do want to call your attention to a session on Wednesday called Designers’ Roundtable. This will be a somewhat free-form networking session to find out what designers are struggling with and share some ideas. We tried the Designers’ Roundtable at PCB Atlanta last year and the response was fantastic. According to designers and fabricators here in the Atlanta area, there is still a desire to have a better net-working solution for designers. For whatever reason, most local Designers Council chapters haven’t met in some time. (I hear the same comments from a lot of local chapters.) I’d like to hear your comments about this at the roundtable and will be glad to share some of our thoughts as well.

In the meantime, stay in touch. PCD&F

LeDs are no longer just for the “ON” switch.

PETE WADDELL

is design technical

editor of PCD&F;

pwaddell@

upmediagroup.com.

LEDs are at thE hEart of Dramatic changEin energy conservation.

Frank Smetana

is market

development manager

at Mentor Graphics

(mentor.com);

frank_smetana@

mentor.com.

Repeatable FPGA-on-Board Optimization

AssiGninG i/O Pins has transgressed well beyond a sketch or spreadsheet, and routing these large devic-es requires collaboration between FPGA and PCB designers. With modern I/O routing tools, savings can be realized in layer count, trace length (and con-sequential signal integrity improvement), and via use.

A good starting point is automation of symbol creation and PCB schematic connectivity to stream-line the FPGA pin assignment process. Designers need to proceed with caution and investigate how such automation tools affect the complete prod-uct design flow. For example, an approximate recreation of the PCB information for use by an FPGA I/O assignment tool simply adds another step and another representation of the data – without fostering design convergence. Tools that create a unique set of product-specific symbol fractures for each FPGA design should be weighed against the company’s reuse and library management goals. Recreation of an entire local symbol and schematic set with each iterated pin change can make design a data management nightmare.

Instead, an FPGA/PCB optimization process that is the same from project-to-project focuses on a centralized library structure that promotes common practices among designs, as well as design reuse. Set-ting up this corporate “generic” environment that creates a true FPGA/PCB symbol theme has many downstream benefits, and also allows pin reassign-ments to be instantly communicated in a “push-button” fashion to all members of the design team.

At the librarian level, initially all symbol fractures for an FPGA are automatically generated, tied to the physical cell and part number, installed into a cen-tralized library, approved, and made available for all users of the FPGA. FPGA power, ground, and config pins essential to the FPGA are optimally defined by the librarian, allowing functional designers to focus efforts on optimizing the I/O pins specific to the design. This approach not only fosters reuse, but avoids further design-specific regeneration of the symbol set for each iteration.

The upfront library configura-tion pays off not only in reusabili-ty, but also the ease through which pin iteration steps are completed. When a pin assignment change is made to the FPGA in the board context through the FPGA optimi-zation tool, schematics containing the symbol set for the FPGA are updated with new connectivity information, and the centralized

symbols themselves remain unchanged. This ease of iteration lessens the impact of design changes late in the design cycle.

To close the design loop, optimized pinouts are written and conveyed back in the FPGA vendor’s constraints file format – where the flow was initi-ated – as the signal names for the functional sche-matic, and initial pin assignments were obtained from the HDL and constraints file. Vendor I/O rules are followed throughout the process in the I/O optimization tool to adhere to DRCs for drive strength limits, VREF, I/O banking restrictions, LVDS proximity restrictions, differential pair recognition, and allowable I/O standard settings per pin. Vendor rules must be accurate and up-to-date and require close cooperation with suppliers to gain access to new architectures and package types.

From a physical implementation standpoint, comprehensive FPGA-to-PCB optimization requires further insight into the physical BGA implementa-tion to be truly effective. Algorithms that unravel the pin connections on the FPGA to other compo-nents in the PCB context need to consider if BGA breakout and escape pre-routes have been utilized, as these effectively change the pin ordering. In the I/O optimization tool, unraveling the rats-nest connection to the escape trace endpoints provides shorter trace lengths, fewer PCB vias, and a more routable PCB than unraveling only to the pins.

Analyzing the entire design process may show that some solutions end up adding time and effort to the current project, or because the designs cannot be readily reused, future designs do not benefit as much. Optimization of connectivity meeting both FPGA and PCB design constraints requires tools that are PCB- and FPGA-aware (as well as BGA-aware), promote FPGA–PCB design concurrency while insti-tuting repeatable processes, and have centralized reusable device representations. PCD&F

Simply recreating the PCB information adds steps, but little else.

Figure 1. Pin optimization affecting trace length reduction with pin optimization applied to the pin subset.

PrInteD CIrCUIt DeSIGn & FaB / CIrCUItS aSSemBLY SePtemBer 201022

23SEPTEMBER 2010� PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DOCUMENTATION

Automating theDocumentAtion Process

Dedicated tools help reduce the once-manual job by 20% of the typical design cycle time. by Mike Buetow

The question posted to the DesignerCouncil email forum was simple and straightforward: “Why on earth can’t these companies make a product out of the box that does engineer-ing documentation well? I find it hard to believe there can’t be a boilerplate level delivered that could handle 80 to 90% of most companies’ documentation needs out of the box. … Even the BoM reports delivered out of the box from Oracle are absolutely useless. You need an integration company or an internal team of Oracle experts to spend a fair amount of effort just to get a usable BoM report.”

What’s fascinating, if not somewhat predictable, is how many firms take software that is intended (and good) at one function and repurpose it for something else. Take, for example, two of the best-known product life management tools: Oracle’s PLM and PTC’s Windchill. Good programs, both, but they were never intended to handle circuit board documentation. It’s one reason why it takes, on average, two man-days of the typical 10-day design cycle to complete the documentation (Figure 1).

Best-in-class processes reduce the amount of time spent creating the documentation; are automated so as to create a “living” document, or one that’s not fixed in time, unlike a

paper printout of a pdf where, in the event of an engineer-ing change order, the documentation needs to be regener-ated; and facilitates product flow to the extent that the end-product quality is enhanced. As Downstream Technologies cofounder Joe Clark says, “Documentation is much bigger than just design, fab and assembly.”

Designers are pros at stretching the limits of CAD tools and other software, but at some point the deficiencies become too glaring to tolerate.

It’s why I’m surprised more haven’t turned to BluePrint, which purports to solve the headaches by providing access to all the electrical intelligence contained in the PCB CAD data-base to create detailed documentation in reportedly a far short-er timeframe than using traditional ECAD or MCAD tools.

The brainchild of DownStream, BluePrint was developed by former board designers who understand from firsthand experience the pains of their ex-colleagues. It uses a drawing- and sheet-based approach to create actual PCB documents (drill drawing, assembly drawing, parts list, and so on), and stores them in a digital release file. BluePrint uses the CAD data to automatically create unlimited views, details, and charts of the PCB, and can revise the documentation to

reflect new PCB changes, reportedly in seconds. It’s not just a tool change; it’s a change in methodology.

Like MCAD, BluePrint can docu-ment drafting and dimensional spec-ifications. Where BluePrint separates itself from the traditional MCAD tools, however, is in the number of required translations. Mechanical tools aren’t designed for the specific nature of a printed circuit board. To wit: MCAD cannot distinguish between a layer on a circuit board and a floor of a build-ing. Meanwhile, BluePrint is a full 2-D drafting tool designed specifically to cre-ate PCB documentation and capable of creating anything that the CAD, fabrica-tion and assembly departments might Figure 1.�Studies�show�documentation�takes�20%�of�the�typical�design�cycle.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY� SEPTEMBER 201024

DOCUMENTATION

need. It eliminates constraints imposed by the PCB design tool for documentation, but retains the intelligence lost when using an MCAD tool for documentation.

The best example of this is BluePrint’s support of unlim-ited PCB design views on any drawing sheet. Each instance of the design can be set with different display settings, scaling and formatting. However, each is also linked to the source CAD to automate ECOs, requiring one file translation from the source PCB CAD data to BluePrint (Figure 2).

As our emailer suggested, most users try to generate documentation from their ECAD tool. But ECAD was never intended for that purpose: Dimensioning is the domain of mechanical design. In practice, it’s another story. Asserts Clark, “Users do [documentation] in ECAD because they need to get it onto the piece of paper. There are lots of things done in the electrical design process that have nothing to do with electrical design; it’s all aimed at the documentation.” For instance, the use of assembly variants or mechanical components, which are never simulated but are pushed into a design capture or PCB layout tool to ensure they are repre-sented in the final bill of materials.

BluePrint was developed to work with existing EDA tools. The MS Office environment requires a single load of the entire PCB CAD database to start the documentation process, and uses all the CAD intelligence to help create the documenta-tion. ECOs are added by “refreshing” the source CAD data.

BluePrint refreshes the documentation package, adding the new data in every instance of a board view, detail and chart.

“BluePrint brings ECAD design into the documentation tool,” says Clark. There, in the gallery (also known as the library, the term “gallery” is used so as not to be confused with the data for the PCB packages and land patterns), users create a drawing sheet, dragging and dropping the elements onto it. Any element – the number of zones, the font, colors, format, and so on – that is dragged and dropped on a sheet is “intelligent”; links remain active from the underlying design database, so if the links change, everything within the drawing is updated.

Inside the file are contained via stackup and drill layer pairs; drill symbols, patterns and charts; notes and callouts; mechanical component support; parts lists and assembly drawings; tooling, and so on. Schematic, Gerber, DFX, PDFs, plus any graphic or audio files are all stored. Or, in the words of Rick Almeida, DownStream’s cofounder, president and a former designer, “Any data used to create documentation and drive manufacturing.”

Automation of documentation is created by first creat-ing the graphical “pictorial” of how the user wants to see a specific documentation element, for example, a “Via Stack-Up.” The graphical instruction defines how the via stackup should look. The via stackup could be amended, and the template modified to company-specific versions and saved for reuse. The template graphics are linked to data fields that pull the correct information from the PCB CAD data to intel-ligently create a via stackup that reflects the design intent and remains linked to the CAD data, so when the CAD data are updated (e.g., new layers or via ranges added or deleted) the detail is also automatically updated. “Essentially we use the same approach that is found in MS Excel chart build, where empirical data are married to user-specific graphics,” says Almeida. This same process goes for drill charts, parts lists, finger chamfers, coordinate lists, exploded views, etc.

BluePrint supports automation of the assembly drawing as well. This includes parts lists, which, even if not shown in the documentation set, are in the underlying design database

Figure 2.�Each�design�view�is�linked�to�the�source�CAD,�simplifying�ECOs�and�reducing�translations.

and can be referenced as needed. The search function can find specific parts and component outlines. What it is not is a bill of materials management tool. “The parts list is a key part of the documentation,” explains Clark. “Documentation affects the parts lists, because as designers do the layout, they add mechanical parts, such as face plates, screws, washers. They need to be able to add to the parts lists and export them to the right department so they can add to the BoM and bring in all the attributes of the parts.” With BluePrint, users can import an external parts list from PLM or other enterprise systems, and sync the parts list with the assembly document, then export the parts list back to the enterprise system for ongoing management.

BluePrint follows the orientation of the board to place component reference designators. (The latter can be hyper-linked, too.) Assembly variants can be created at both the parts list level and also with a graphical assembly picto-rial, with special legends to show what’s been installed, uninstalled or substi-tuted. Documents such as relevant stan-dards can be inserted as hyperlinks into the database. It also can generate rework sheets, showing cuts and jump-ers, and include installation procedures.

One complaint about reference des-ignators in Oracle and SAP is that they do not display all instances of a particular part number with the part number and description in a single screen or menu. That’s not an issue for BluePrint. The documentation set in

the GUI looks just as it will print on paper (Figure 3). The documentation package also can be exported as a pdf and posted to the Web, or as html on a company Intranet.

“It treats the end-product like a PCB, not a generic widget,” Clark says. “We don’t know how good our documentation is until we print it. Then, if something is wrong, we need to go back upstream and fix the ECAD database, then print again. What we do is allow the user to work with the documentation as it will be delivered upon release. This is a full 2-D draft-ing tool; it’s not intended to replace the mechanical group, but you need to be able to move and place things when doing the documentation. The hand-cuffs need to be removed.”

As we reported several months ago, Qualcomm has become one of the largest companies yet to standard-ize on BluePrint. Come this time next year, I would expect many more such announcements – and far fewer plain-tive missives like the one at the begin-ning of this story. PCD&F

Mike Buetow is editor in chief of PCD&F/CIRCUITS ASSEMBLY; [email protected].

25september 2010 PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

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Figure 3. Unlike other GUIs, the documentation set looks the same on paper as on the screen.

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dfm

Best Practices for Double-Sided MixeD-Technology BoarDS

Be aware that heavy parts are prone to falling off during soldering. by GeorGe HenninG

As automation becomes more prevalent and sophisticated in electronics manufacturing, plated through-hole designs are being phased out. PTH requires manual assembly labor that is less cost-effective than automated SMT methods, and is not feasible when dealing with ultra fine-pitch devices. That said, many designs still mix PTH and SMT. PTH also remains in use for some heavy power connectors, transformers, and other devices where strong mechanical bonds are required.

Here we outline key best practices for double-sided, mixed-technology design.

K.I.S.S. Keep it SMT simple! On double-sided mixed boards, the solder side should be kept simple, meaning:

■ Discrete components wherever possible. ■ No fine-pitch devices or ball grid arrays. ■ Component height not more than 6 mm.

Manufacturing problems arise when components on the solder side of a mixed board are too heavy. If the board is assembled using a solder reflow pass for each side, heavy SMT parts attached to the solder side during the first pass may fall off during the second pass.

The general rule of thumb is, if the com-ponent is more massive than a PLCC-44, it will not hang on by surface ten-sion. Said more technically, the mass to solder pad surface area ratio for such devices should be lower than 4.5 gm/cm2.

The solder side of a dou-ble-sided mixed-

tech board may also be soldered by wave solder if the design permits. Using only discrete devices on the solder side and avoiding BGAs and fine pitch components keeps this option open. Solder joint formation using wave solder techniques is much more likely with these types of devices.

“Submarining” is a term used to describe the difficulties encountered when the leading edge of a board passes under the top of the wave on the wave machine. Solder will run down the top side of the card and essentially render it scrap. Very large panels with improper support are prone to sag in the wave solder preheat and any previous reflow cycles. This can increase the chances of a submarine.

Keeping a clear space around the edges of the board permits use of snap-on titanium stiffeners. These increase the rigidity of the panel and help prevent such occurrences.

Snap�it. Another manufacturing design technique to observe is use of snap-off materials on the edges of the board. As mentioned, titanium stiffeners can then be used to help make the board more rigid. It also permits the panel to be handled smoothly in conveying and clamping systems. A 0.200"

FiGure 1.�Solder�pads�on�a�PCB. FiGure 2.�PCB�with�outside�border�for�clearance.

clearance is adequate, but nothing (not even fiducial keepout areas) should be placed in this zone.

Pad it. Pad dimensions should be care-fully considered on the bottom-side SMT of a double-sided mixed board. This includes extra thieving pads for wave-soldered ICs and extended toe pads to facilitate solder wicking. Both can significantly improve the yield at wave soldering (FIGURE 1).

In addition, components on the board should be oriented so that the solder joints are not shadowed as the board moves through the wave solder.

Clear it. If a double-sided mixed board is so dense that the above guidelines cannot be observed, a special fixture called a selective wave fixture (also known as a pallet) into which the board is snapped can be used. This masks the bottom-side surface mount from expo-sure to the wave. To do this, there must be sufficient clearance (0.1") between the PTH and SMT lands on the solder side so that the SMT can be masked by the fixture (FIGURE 2).

Keep in mind that fixtures add cost to the product; several fixtures are required, at several hundreds of dollars per fixture, and they have to be cleaned, loaded, unloaded and occa-sionally replaced.

Think single-sided. Overall, when designing a mixed board (using SMT and PTH), it pays to think single-sided! If possible, PTH parts should be placed on the same side of the board as the primary SMT devices. Double-sided PTH or PTH on the wrong side is almost certain to require manual soldering. There is just no other way to process them cost-effectively with existing automation. PCD&F

GEoRGE HEnnInG is vice president of manufacturing at OCM Manufacturing (ocmmanufacturing.com); [email protected].

27september 2010 PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

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RMK-30 Immersion Tindeposits only on copper, via displacement, and mitigates tinwhiskers. Tin deposit maintainsexcellent solderability, even withhigher temperatures, and follow-ing long storage. Fluoride-freebath has low running cost, delivers consistent performancethroughout its long service life.Meets the requirements of pressfit connections.

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A Critique of IPC-A-610E

A master trainer assesses the revised industry guidelines for PCB acceptability by BoB Wettermann

The visual acceptance criteria for post-assembly soldering and mechanical assembly requirements, IPC-A-610, Accept-ability of Electronic Assemblies, was recently “up-reved” as it tries to keep pace with the numerous new component packaging types and other changes to electronics assemblies. The “D” revision, published in 2000, ushered in Pb-free acceptance criteria at the time RoHS standards were put in place. The new “E” revision addresses some more recent technologies since the last revision was published.

The standards task groups made several changes to the Revision “E” document, including but not limited to package-on-package (POP) and leadless device packages, flexible circuits, board-in-board connections and newer style SMT terminations.

One area where there was a noticeable change is damaged components (found in Section 9 in the new document). Where the previous version held all the information associated with a damaged component termination style under the section on those part types, now all damaged components are in the same section. This will save users time flipping between the

various sections. Specifically, sections on damaged transform-er, connector and relays are the most significant upgrades.

There have been upgrades to Section 8, the area array section of the standard. This section now deals with differ-ences in both wetting and collapse characteristics of Pb-free solder balls. Since very few area array devices are available with tin solder balls, this is a welcome upgrade. While this is a welcome change, users still complain about the lack of detail in this section.

Another device type that has exploded in terms of its usage since the printing of the last version is the leadless device package. These are addressed in the new revision, also in Section 8. While the revision offers expanded inspection criteria, it does not go far enough in defining the criteria for the myriad different package types available today.

One of the other changes made to this version is the organization of terminals as found in Section 6. For each ter-minal type, an easy-to-use table guides the user through the plethora of different combinations of different terminal types and their acceptance criteria.

Figure 2. Example of staking of component in the new IPC-A-610E.

Figure 1. Nicked transformer core defect photo.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY september 201028

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Lead cutting into solder is fully explained with clear pho-tos for through-hole devices in this new revision – a welcome change, as this is an area of confusion among users that should be put to rest. The new photos leave no ambiguity as to where a lead can or cannot be cut vis-a-vis the solder fillet.

In Section 8, photographs and further explanations help clarify how staking adhesives can be used when mechanically securing components to the board. Section 8 also deals with leadless device terminations, flattened post terminations, as well as other specialized SMT connections.

Flex circuitry criteria for damage, flex stiffeners, solder-ing flex to flex and flex to PCBs are a welcome upgrade.

Some training organizations have commented that the new standard more closely parallels existing IPC training materials. As my colleague Norman Mier observes, “The new IPC-A-610 format allows for enhanced references that I am sure will improve the training and, more importantly, the comprehension and usage of this important tool for the factory floor.” Training materials for IPC-A-610E are slated to be released in late summer or early fall. In the meantime, students can be certified to the “D” revision and can recertify to “E” in the future.

A free fact sheet and a redlined version highlighting the changes to the document are available from the IPC website.

BoB Wettermann is president of BEST Inc. (solder.net); [email protected].

Global Sourcing, continued from p. 17

The answers to the woes of the US economy and the electron-ics industry are there: greater manufacturing automation; devel-opment of advanced materials and manufacturing processes; development of a more technically advanced workforce trained to break contradictions, compromises and sacrifices with inno-vation principles and systematic innovation methods, and that communicates effectively with one another when facing day-to-day problems; use of rapid prototyping in virtual environments followed by real-time vetting by design and manufacturing.

The true economic engine of any enterprise, and by exten-sion a nation’s health and wealth, is its people. Application and use of systematic innovation methods is best at the lowest level of a company, where contradiction, compromise, sacrifice and tradeoff in design and processes occur can be crushed. One can have the best capital equipment, buildings and advanced man-ufacturing processes, but it is the frontline workers, including their engineering collaborators, who are the producers, and the means and methods they employ are what make a product or service that actually produces wealth and profitability.

To fail to see this current economic period as a matter of American jobs on the line (or to do so, yet fail to confront it) is a moral and ethical failure – and economic denial. Have we lost our strength of character to do something different when the situation dictates a more effective approach? CA

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Over 400,000,000 hand-heldsmade with alpha® solder pastein 2009 would reach aroundthe world.

It’s true. If placed end to end, the over 400,000,000hand-helds made with ALPHA® solder paste in 2009would reach around the world at the equator – 24,900miles. We went the distance with hand-held assemblers tomeet their critical demands for device performance andreliability, especially drop shock resistance. They asked us for:

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solder materials

Present and Future solder technologies

How new powders, activator chemistries and epoxy fluxes are evolving for production use. by Neil Poole, Ph.D., aND BriaN ToleNo, Ph.D.

History shows that the electronics assembly industry is always up for a good challenge. This was proved with the successful move from through-hole to SMT assembly, the elimination of CFCs from the cleaning process and imple-mentation of Pb-free, to name just a few. Now, the industry is arguably at one of its biggest – er, smallest – challenges to date: extreme miniaturization. Although device footprint reduction has been an ongoing process over the past two decades, recent developments are some of the most exigent to date. Although designing much smaller packages presents its own unique set of hurdles (a topic for another article), the ability to incorporate these microscopic components into a high-volume, high-reliability production environment is at issue for assembly specialists.

Placing 0201s and 0.4 mm CSPs in a lab environment is one thing; achieving this feat reliably in high-volume manu-facturing is quite another. A plethora of process variables are impacted by this reality, none likely as complex as the soldering process. Not only must solder materials accommo-date much tighter pitches and smaller geometries, they also must maintain all the previously established requirements for modern manufacturing, including Pb-free capability, compat-ibility with higher reflow temperatures, humidity resistance, wide process windows and much more.

These new conditions pressure tried-and-true rules for solder materials such as stencil aspect ratios and surface-area-to-volume requirements. Here, we describe several develop-

ments on the solder materials front – from new powders to activator chemistries to epoxy flux technologies – to meet miniaturization trends.

As use of ultra fine-pitch devices grows and industry moves from 0201s to 01005s and from 0.4 mm CSPs to 0.3 mm CSPs, prevailing Type 3 solder pastes will no longer be sufficient to address smaller deposit volume requirements. Simply moving from Type 3 to Type 4, however, will not necessarily deliver the desired result either. Type 4 materials must be optimized for miniaturization demands.

In this instance, optimizing means tightly controlling not only the particle size, but the distribution of those particles within the material. While current industry standards tend to be a bit unclear as to allowable particle size in the upper end of the range, J-STD-006A (table 1) is fairly liberal with the distribution range of particle sizes. But, recent testing has suggested a tighter distribution range and a smaller upper limit particle size may prevent some problems down the line.

Current work has focused on not only condensing the distribution and size range of the Type 4 particles, but also on producing the powder in such a way that the integrity of the surface finish is maintained, as this is also essential to lower-ing oxidation risk. The smaller particles of Type 4 materials make for a higher surface-area-to-volume ratio, which, in turn, introduces more opportunity for oxidation. Left uncon-trolled, oxidation can lead to a variety of performance issues, including non-coalescence, poor wetting, or graping (more

Powder TyPe <0.005 wT% GreaTer Than <1wT% GreaTer Than 80 wT% BeTween 90% BeTween <10% Smaller Than

1 180 µm 150 µm 150-75 µm 20 µm

2 90 µm 75 µm 75-53 µm 20 µm

3 53 µm 45 µm 45-25 µm 20 µm

4 45 µm 38 µm 38-20 µm 20 µm

5 32 µm 25 µm 25-15 µm 15 µm

6 25 µm 15 µm 15-5 µm 5 µm

table 1.�Particle�Size�Distribution�Specifications�per�J-STD-006A

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solder materials

on that later), to name just a few. New powder production technology has delivered consistent, smooth surfaces, even on powder spheres less than 35 µm in diameter.

What’s more, by tightening the particle size distribution, the paste release from the stencil is much more complete. Larger particles can easily become trapped in the miniaturized apertures, leading to insufficients and down-the-line defects. By significantly reducing the upper and lower limits on the particle size in newer generation Type 4 materials, high-speed printing through 80 µm-thick stencils with 150 µm apertures becomes a much more robust process (Figure 1).

Pb-Free Solder AdvancesPowder technology not only is critical in the move to much finer dimensions, but the overall capability of the paste and, specifically, the flux system is key. As 0201 integration has increased in production environments – particularly in the handheld sector – demands on smaller paste deposits have caused new process issues to emerge.

One such problem is graping. This phenomenon, which is partially coalesced solder that resembles a cluster of grapes, is directly attributable to extreme miniaturization (Figure 2). The cause of graping is easily understood, but not easily rem-edied without proper solder materials. With much smaller solder paste volumes, the solder particle surface-area-to-flux ratio is pushed to a point at which flux exhaustion occurs,

the relative level of surface oxidation increases, and graping is the result.

Flux’s function within the solder paste is to permit the formation of a solder joint by eliminating oxides that are present on metal surfaces – including the spheres within the paste. In addition, flux should protect the paste particles during reflow so as to prevent re-oxidation. As miniaturiza-tion requirements dictate the use of much smaller particle sizes (i.e., Type 4 and, in some cases, Type 5), the total metal surface of the solder increases and, therefore, demands more activity. Most powder oxidation occurs on the particles that are on the surface of the deposit. This puts more demands on the flux as the relative amount of solder surface is increased. Surface oxides generally melt at a higher temperature, and with older-generation formulations, the flux cannot over-come this condition.

By incorporating novel materials development technol-ogy, however, there are several ways to alleviate graping. As mentioned, smooth surface powders with a much tighter distribution range and upper/lower particle size limit greatly improve paste release from the stencil, deliver more even deposits, and provide a reduced metal surface and ideal deposit surface-area-to-volume ratio.

Next-generation solder paste flux formulations have proved that by providing sufficient activity and re-oxidation mitigation capabilities, graping can be resolved literally as it is occurring. Figure 3 illustrates this result, as traditional solder materials are compared to newer materials that have been optimized for miniaturization processes.

It also is important to note that while altering the flux and powder to accommodate for new process conditions, materials must also maintain their reliability requirements, as well as surface insulation resistance (SIR) and electrochemical migration (ECM) performance.

Heterogeneous Component Placement Another obstacle presented by extremely miniaturized com-ponents is the dilemma about how to place the large and small components most efficiently. While new solder pastes

Figure 1. Solder�paste�formulated�with�newer�Type�4�powder�and�a�tighter�particle�distribution�exhibits�significantly�lower�failure�rates�compared�to�conventional�Type�4�solder�paste.�

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are capable on both large- and small-volume deposits, stencil technologies are often the limiting factor. Designing a stencil capable of printing the large and small deposits in a single sweep is nearly impossible. A second print is out of the question, so the solution becomes dip fluxing.

Traditional dip fluxes certainly deliver the activity required to pro-mote robust solder joint formation; the problem is how to then protect those joints. Capillary flow underfills will work only if there is a gap large enough to permit sufficient flow and coverage. Because this is a relatively large “if” considering newer compo-nent geometries, an alternative meth-odology should be considered.

The process is identical, but the material – an epoxy flux – is vastly dif-ferent. Epoxy flux materials combine the solder joint formation action of a flux and the protection of an underfill into a single material. On a printed circuit board where one might need to place 0.3 mm CSPs, other very small types of area array devices or even flip-chip-on-board, epoxy flux is ideal for many reasons.

First, because the material com-bines the dual-functionality of a flux and an underfill, the secondary under-fill dispense process can be eliminat-

ed. With epoxy flux, the solder joint is formed, and the epoxy surrounds and protects each interconnect during reflow. Second, even when capillary underfilling is an option, tradition-al underfill materials have exhibited problems such as component float-ing and voiding. A fluxing underfill, however, stays around or near the solder bumps to add an extra level of reliability without inducing floating or void formation.

For manufacturers faced with the heterogeneous – large and small – com-ponent conundrum, epoxy flux is an excellent option.

The Nano Future An article on solder materials science would be sorely lacking without a dis-cussion of what the future may hold. Temperature concerns and develop-ment of novel thermal management techniques are, with the advent of very small devices and Pb-free processes, more top of mind than ever. And, while significant progress has been made in relation to temperature control, apply-ing knowledge from other markets may provide clues to soldering’s future.

As a case in point, transient liq-uid phase sintering (TLPS) is being evaluated as a thermal management solution. Used successfully in ceramic

applications, the possibilities for TLPS in electronics manufacture are intrigu-ing. TLPS processes rely on the com-bination of low-temperature melting alloy powders combined with higher-melting metal powders, which, when processed above the melting point of the lower temperature alloy, fuse to form a new intermetallic compound that will not re-melt at that same temperature but rather a much higher temperature. For electronics, this could conceivably mean that devices could be manufactured at significantly reduced temperatures and be able to withstand higher Pb-free processing temperatures with no risk of re-melt or damage. TLPS for electronics is very much in the infancy stage, of course, but many companies in the soldering industry are investigating its potential.

As technology marches on, so does materials innovation. In fact, in many cases, materials innovators are far ahead of the parade – developing materials for next-generation applica-tions a good three to five years from becoming mainstream. These latest sol-der materials developments are further evidence of the ingenuity and expertise at the foundation of our industry. Sol-der solutions such as advanced powder technologies, more capable flux for-mulations, and dual-function materials such as epoxy fluxes are all enabling the smaller, faster, cheaper demands of the consumer to be fulfilled.

Solder materials science has indeed gotten small, but only because of big ideas and large innovation initiatives from leading materials scientists. CA

Neil Poole, Ph.D.,�is�a�senior�applications�chemist�at�Henkel�Technologies�(henkel.com);�[email protected].�BriaN ToleNo, Ph.D.,�is�senior�applications�chemist�–�assembly�materials�at�Henkel.

Figure 3.�The�image�on�the�left�shows�older-generation�lead-free�solder�paste�on�a�0201�deposit,�which�exhibits�graping.�The�image�at�right�is�a�new�Pb-free�solder�paste�formulation�on�a�0201�deposit,�which�shows�no�graping.

Figure 2.�Partially�coalesced�solder�on�fine�deposits�appears�as�a�grape-like�cluster.�

solder maTerials

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Europlacer is justifiably proud to have wontwo of the industries most prominent awardsin 2008.We are thrilled that our innovative new iineo machine not onlygained recognition from the industry winning two independentawards within four months, but has also fuelled 22% growththroughout the year. The latest Global SMT Award places iineo asthe premier medium speed flexible SMT pick and place machineavailable on the market; voted by an international committee ofCEM/EMS manufacturers. This follows Circuit Assembly’s award forbest NPI/multi-function machine presented at April’s APEX exhibition.

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smt cleaning

Post-Reflow Residue Results Following PH-NeutRal CleaNeR application

A study of 40 leaded and Pb-free solders compares alkaline to newer cleaning technologies. by Harald Wack, PH.d., JoacHim BecHt, PH.d., micHael mccutcHen and umut tosun

PH-neutral product technologies that are fully compatible with anodized aluminum parts, sensitive metals and other challenging substrates are now available. Despite the absence of alkalinity, pH-neutral chemistries can still complete the job of defluxing agents. Their unique physical properties also come into play as users strive for minimal equipment wear-and-tear, which had not been the case in the past. Equipment replacements are costly and can add significantly to the overall process cost. Safety is also improved if operators can completely avoid working with caustic materials.

The performance of today’s pH-neutral, aqueous clean-ing agents hinges on previously unknown reaction pathways, which in turn permit the complete removal of any alkalinity in the product. While prior cleaning pathways relied heavily on solubilization and saponification, novel pathways include but are not limited to dipole mechanisms (Figure 1). The latter introduces the benefits of:

■ High reactivity, especially for cleaning under low-standoff components.

■ Highest level of material compatibility known to date. ■ Low operating concentrations of 5 to 15%. ■ Easy disposal; i.e., no permits or costs due to the neutral-ization of alkaline products.

■ Operator safety. ■ Reduced shipping costs due to noncorrosive nature.

For predominantly competitive reasons, experimental data on pH-neutral cleaners remained unpublished in 2009. Research presented in here focuses on internal qualification

experiments leading up to the product’s market introduction. Various customer studies com-pleted in 2009 will be pre-sented shortly.

Test ParametersThis study was initiated in 2005 to evaluate new product technologies developed in response to challenges presented by use of standard alkaline cleaning products for defluxing processes. One of the often-cited drawbacks of alkaline mate-rials is their effect on sensitive metals, which include anodized and bare aluminum, copper, different metal alloys, plastics, materials of construction, inks and others. To mitigate but not eliminate any potential surface reaction, chemical companies generally add corrosion inhibitors to alkaline products. These additives, however, pose limitations, as they are chemically altered during regular production conditions, thereby intro-ducing an unwanted variation in effectiveness.

Furthermore, alkalinity introduces a pH-level that requires water treatment in most municipalities. PH-levels above 7 cannot be considered pH neutral by definition and must be actively neutralized since they harm the environment.1 This implies an additional process step for the effluent water, which in turn adds cost to the overall process. PH-neutral products, on the other hand, do not require water neutralization and save overall process costs.

Initially the authors’ objective was to establish that a pH-neutral cleaning agent effectively cleans common flux residues at comparable process settings, as we have grown accustomed to defluxing with pH-alkaline agents. For that reason, 40 frequently used Pb-free and leaded solder pastes from leading global manufacturers were chosen and reflowed according to the manufacturers’ designated profiles. A detailed analysis was performed to assess visual cleanliness under 4 to 60x magnification, according to IPC-A-610.2 A visual inspection of the initial segment was completed first, as supplemen-tal analytical results would verify absolute and quantifi-able cleanliness. Test results were independently evaluated

Cleaning agent equipment pastes tested ConCentration temperature Belt speed

Vigon N Series Inline 40 most common Pb-free/leaded

10% 125°F/52°C 2.5 ft./min.

Table 1.�Test�Parameters

Figure 1.�Temporarydipoles�shown�on�H2O.�

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by three investigators to mitigate sub-jectivity. Moreover, ion chromatogra-phy data according to IPC-TM-650, method 2.3.283 were used to comple-ment the analytical analysis of this initial study.

A concentration level of 10% and 125°F were chosen as the initial set-points (Table 1). This not only repre-sents the latest industry trend toward lower operating temperatures and con-centrations, but also meets the com-mon goal of reducing the amount of organic effluent flowing from the chemi-cal isolation section to the drain. (As an aside, any reduction in cleaning agent concentration, assuming constant cleaning effectiveness, supports cost-cutting efforts.) At first, the cleaning temperature was set at 125ºF, which in turn reduces energy consumption and evaporative losses. As many companies are not in position to invest in advanced vapor recovery systems, the authors felt that these parameters would benefit potential and current users by optimiz-ing their cleaning process. However, all parameters combined naturally chal-lenged the performance of the cleaning agents tested. A secondary objective of this study was to demonstrate the long-term performance potential of the tested cleaning technologies. As new guidelines and legislative policies are being con-templated, companies must be prepared for current and future regulations.

Comparable ResultsThe chosen solder pastes are a represen-tative sample of currently used products in the industry. They included leaded and Pb-free materials, and the investi-gators chose individual reflow profiles to best simulate real production condi-tions. Average cleaning results above 4 were considered clean (Figure 2), based on the presence of experimental error, as well as qualitative subjectivity. [Ed.: Comparisons to alkaline cleaners also were made and will be presented at SMTA International in October 2010.] Also, this assessment was supported by additional ion chromatography data on numerous substrates. The pH-neutral product at 10% concentration achieved results of 4 and above in 34 of 40 pastes. This equates to 85% of all tested cases. Four pastes achieved a rating of 2 or below. Increasing the temperature to 160ºF improved the cleaning results

to 39 of 40. This constitutes a remark-able 97.5% of all cases tested. It should be noted that visual cleanliness does not necessarily indicate ionic cleanli-ness, but visible residues generally do indicate residual ionic contamination. Therefore, the only grade on this scale that could be considered a “pass” is a 5. Several areas assigned a score of 5 were

confirmed clean with ion chromatogra-phy. Scores of 4 or more indicate that the reflow or cleaning process could likely be dialed in to produce accept-able results. Scores of 3, 2 or 1 are unacceptable process failures. Figures 2 and 3 show the cleaning results for leaded and Pb-free solder pastes.

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the first time pH-neutral agents have demonstrated cleanliness levels equiva-lent to those of pH-alkaline clean-

ing technologies. PH-neutral cleaning agents do, however, add a new level of material compatibility and ease of efflu-

ent treatment to the equation. These results truly showcase the future of aqueous defluxing chemistry. Figure 4 shows results of a recent evaluation of the pH-neutral cleaning agent in a high-end inline cleaning process at a provider of comprehensive electron-ics design and production. Conditions were set at 86°F/30°C and 90% RH in a test chamber. The figure shows the defined process limits, as well as the range of results that passed the test. Eighty-eight boards were tested under the same high humidity conditions. One board failed the high humidity conditions, as the assessed readings did not deliver values according to the customer’s specification.

Flux residues and impurities under low-standoff components are often dif-ficult to remove, since not all water-based cleaning agents are designed to enter this minimal gap between package and board. Therefore, cleaning agent entrapment becomes a common issue: The cleaning agent is not properly rinsed away after application, and impurities together with cleaning agent residues are trapped under low-standoff components or around solder joints, making PCB boards more vulnerable to creeping and long-term corrosion. This, in turn, can cause failure, including field failures. Studies are underway to further examine dissolved flux residues and their respec-tive effect on contributing to corrosion. Generally, it is commonly understood that pH-neutral defluxing technologies can limit these risks of corrosion under-neath components, while providing high-er levels of material compatibility. CA

AcknowledgmentsZestron thanks Ersa for its generous support with the Hotflow reflow oven, and Speedline Technologies for its generous support with the Aquastorm AS 200 cleaner.

E.: For a list of references and the bibliogra-phy, please see the online version at circuit-sassembly.com.

HArAld wAck, PH.d., is president; JoAcHim BecHt, PH.d., is head of R&D; micHAel mccutcHen is sales and marketing manager; and umut tosun is application technology manager of Zestron America (Zestron.com); [email protected].

Figure 2. Cleaning results for leaded solder pastes.

Figure 3. Cleaning results for Pb-free solder pastes.

Figure 4. Excerpt of process capability trials – high humidity conditions.


smt cleAning

Circuts Assembly FPB.pdf 6/1/10 12:27:10 PM


Problems�and�Promises�of�BTCs

WhaT�are� BoTTom termination components? You may not know the term “BTC,” but because IPC is focusing on these packages, expect to hear more about them.

IPC has coined the term BTCs for descriptive package names such as QFN, DFN, SON, LGA, MLP, etc. They are in some ways similar to BGAs, which also have hidden terminations, but they are also very different. They do not have balls, but rather, metalized terminations or pads underneath the package.

Most, but not all, BTC packages have a large ground or power termination surrounded by small-er signal terminations. When it comes to inspec-tion, they pose even more challenges than BGAs, which permit inspection by endoscopes. You may not be able to see side solder fillets, and even when you can, they may look non-wetted or dewetted. But, dewetted and non-wetted side fillets in BTCs are acceptable.

BTCs provide good electrical and thermal per-formance, and they are the cheapest package on the market. However, they do require perfection – not only in the assembly processes, but perfection on the part of the PCB and component suppliers as well, which need to supply flat PCBs and packages.

Guess the chances of getting perfect PCBs and packages: not likely. Through-hole components have been in use for more than half a century, but are still far from perfect, so don’t expect to achieve nirvana when it comes to this latest package trend.

The basic driver for BTCs is cost, which to a cost-competitive industry should come as no sur-prise. It is a package with the lowest per-pin cost, as low as half a cent per pin. To put this in perspective, if a package costs less than one cent per pin, it is considered a very low cost package. Thus, it is easy to imagine the attraction of this package, especially if the application is high volume such as cellphones or other mobile products.

Designers love this package because there are no leads, making BTCs an excellent choice as a result of their very low resistance and capacitance – also known as parasitic loss. Heat transfer from the package to the PCBs is also excellent, due to their large thermal pad in direct contact with the PCBs.

But there is no room for error. With no leads or

balls, they must be perfectly flat, and the PCB must also be flat. How often does that happen?

The only variable the user has is solder thick-ness paste. However, if too much solder paste is used to compensate for package and PCB warpage, the package will float and may be misaligned. Also, expect excessive voids with too much paste.

If too little solder paste is used, and if there is any warpage in the package or PCB, expect many opens. There are difficult choices to make in the process selection, and inspection doesn’t help, since the end of the visible terminations are bare copper; hence, do not expect them to solder to achieve side fillets.

This is the reason why IPC has stepped in to help the industry develop a design and assembly guide-line for BTCs. This author co-chaired IPC-7093, Design and Assembly Process Implementation for Bottom Termination SMT Components. The docu-ment describes the design and assembly challenges for implementing bottom termination surface mount

components whose external connections consist of metalized terminations that are an integral part of the component body. The focus is on critical design, assembly, inspection, repair, and reliability issues associated with BTCs.

The target audiences are managers, design and process engineers, and operators and tech-nicians who deal with the electronic design, assembly, inspection, and repair processes. The intent is to pro-vide useful and practical information to those com-panies using or considering SnPb, Pb-free or other forms of interconnection processes for assembly of BTC-type components.

This document, although not a complete recipe, identifies many of the characteristics that influence the successful implementation of robust and reli-able assembly processes, and provides guidance to component suppliers regarding issues being faced in the assembly process.

The exchange of information between the com-ponent supplier, product design, and assembly per-sonnel about those parameters that influence good assembly practices is more critical with BTC imple-mentation than with any other surface mount part.

During IPC Apex this year, committee mem-bers voted to accept the document pending minor revisions and final editing at a meeting to be held Aug. 31. We hope to complete deliberations Sept. 2, and plan to publish the document by the end of September. CA

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SELECTIVE SOLDERING

45september 2010� PRInTeD CIRCUIT DeSIGn & FAb / CIRCUITS ASSeMblY

Know�Your�Nozzles!

Selective� SolderiNg� geNerallY uses two basic nozzle design types: One is the “round” nozzle, also known as a “bullet” or universal nozzle. It can approach any solder site from any direction, since it is completely radial in its design on the top.

The other is a component-specific wave or “letter-slot” nozzle, and its design is better suited to soldering rows of pins, such as found on an array. This nozzle shape is ideal for connectors, for example, a five or a six-row connector, with perhaps 40 to 50 pins in a row. One could use a round nozzle for such a job, but that would lead to a deviation in the overall soak time in the solder, because as the nozzle travels along parallel rows of pins, the pins in the center of travel dwell in the solder for the full diameter of the nozzle, but the pins on the outer edges – the outside rows – would see only a section of the diameter, basically an arc. As such, the dwell time under solder for the pins in the center actually could be twice as long as the exposure for the pins in the side rows. This can result in a variation in quality for the solder joints in the outside rows.

That’s when we prefer to use the wave nozzle, because it is designed for the component shape we are soldering; in this case, all the rows would see the exact same dwell time, thus ensuring consistency in solder joint formation quality.

In selective soldering, it’s important to get enough heat into the solder site, as rapidly as possible, to over-come the heat sink characteristics of the board and get good wetting and filling of barrels right up to the top side of the board. Accommodate longer pins, if encoun-tered. To do this requires flexibility in the amount of “freeboard” of molten solder – the parabolic bubble of moving solder – at the top of the nozzle. Different suppli-ers use different methods of achieving this, from control-ling pump speed to various nozzle design factors. What we find effective is a machined radial groove near the top of the inside of the nozzle that provides universal back pressure at the periphery, so that the solder in the center of the nozzle will rise higher than it would normally if the flow of the solder column were uniform.

The concept is simple, but the effect is to provide the greater freeboard of the parabolic dome of molten solder emerging from the top of the bullet nozzle. It also permits a high rate of solder exchange; this in turn provides a high rate of heat exchange, thermal transfer to the solder site, permitting proper hole filling in the barrel, a feat often difficult with multilayer, high heat sink boards. A higher freeboard actually lets the machine “pump” solder into the holes that need complete filling; but at the same time, we want a constantly controlled solder wave or fountain shape.

A rule of thumb in nozzle selection is to always use the largest diameter nozzle available that will handle

every selective soldering task on the board; don’t skimp by using a small nozzle. If a bigger one can be used, all the better; the bigger the nozzle, the more thermal energy will be imparted to the board, and also the quicker the solder joints will form, thus reducing dwell time. Try to use the same nozzle for every site on the same board, if possible.

Practically all selective soldering equipment manu-facturers provide wetted nozzles, and these deliver excellent performance. With these nozzles, the outside diameter of the nozzle is actually wetted by the solder. Everyone has their own particular approach; in our case, a proprietary alloy lets us achieve this wetted effect. Wetted nozzles provide more uniformity and control of the flow of the molten solder as it travels back toward the pot.

In many cases, for expediency, uniquely shaped nozzles can be designed to solder a number of sites and multiple solder joints simultaneously, in a stamping or a branding type of operation. For example, there might be multiple nozzles of various shapes in the same nozzle manifold that come up and stamp a certain pattern time and again. They might be a mix of square, rectangular, round and half-round, etc.

When Pb-free selective soldering, remember that even stainless steel nozzles are scavenged by the tin in the solder. SnPb alloys seem to have little effect on the longevity of stainless steel nozzles, but Pb-free alloys, and particularly SAC types, will erode the nozzle mate-rial, even stainless. One remedy is to coat the inside of the nozzles with a resistant coating to prevent or at least slow that erosion process. Erosion of stainless will add nickel content to the solder pot, and any type of dissolved metals contamination can impact solder joint reliability.

the wider the diameter, the faster solder joints will form.

Figure 1.�Wider�diameter�nozzles�impart�more�thermal�energy�and�are�less�subject�to�contamination.


TECH TIPS


The�Reballing�Process

Removing�and� RewoRking the BGA is often an economically attractive alternative to replacement with a new part. If the intent is to reuse the BGA, the solder balls must be replaced before it can be resol-dered to the circuit board. The BGA removal process renders existing solder balls unusable.

Starting with a BGA removed from the board, the first step is to bake the moisture out of the compo-nent to prevent a defect known as popcorning. This defect appears as craters in the BGA package, caused by the explosive expansion of absorbed water vapor during reflow. It is easy to see on the top and sides of components, but after the solder balls have been reflowed, it can be more difficult to see on the under-side of the component.

Next, remove the existing solder balls and clean the surface. Solder balls can be removed using a sol-dering iron with a blade tip attached. Uniform heat-ing of the part with auxiliary heating is necessary to avoid localized thermal shock to the BGA from the hot blade. This method is adequate for bulk solder removal. Care must be taken not to scratch the BGA surface. Generous use of flux increases the effective-ness of the heat transfer and also removes any oxides. Solder braid is used next to remove smaller flecks of solder, also with generous flux.

As a final cleaning and preparation, the BGA is carefully washed with isopropyl alcohol (IPA) to remove flux. The part is then inspected. Clean-liness can be confirmed using standard resistiv-ity of solvent extract (ROSE) or SEC (solvent extract conductivity) testing.

Specify the BGA type and part number to BGA reballing vendors in order to obtain the correct pre-form parts.

Continuing with a clean, solder-free BGA, the next step is to perfectly position the balls under the BGA. With hundreds of solder balls to be exactly positioned, a mechanical device is required to main-tain the alignment and position the solder balls under the chip. The two most popular methods to actually attach the solder balls are the “preform” method and the “specialized fixture” method. The preform method holds solder balls in the exact pattern using a water-soluble paper carrier (Figure 1). This precise paper form is the key to this process and ensures the balls are aligned on the carrier within 0.0004".

The perimeter of the preform is precision-cut to perfectly match the BGA dimensions. Mating the pre-form to the BGA is accomplished by applying paste flux to the BGA (Figure 2). The paste flux is sticky, and holds the BGA to the preform. A fixture is often used to speed assembly and ensure accuracy.

The next step is to reflow the two mating parts using a profile based on whether the solder balls are SnPb or Pb-free. The BGA assembly is processed through the reflow oven the same way a board is pro-cessed. The solder balls are now attached to the BGA.

Then remove the paper carrier (which is designed for easy removal). After part inspection, the BGA is ready to be attached to the board.

With some experience, good equipment and a mature process, the entire rework and BGA reballing process can be accomplished within an hour. CA

Using preforms, balls can be removed and reattached in an hour.

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Figure 1.�Preform�being�inserted�into�fixture.

Figure 2.�applying�sticky�flux. Figure 3.�mating�Bga�onto�pre-form�in�fixture.

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11: A Crash Course in Hybrid/MC Microelectronical Design ?6&'$ +4H*$(,$H4H* M+NO M

12: Basic Routing and Finishing ?6&'$ +4H*$(,$O M)NO M

13: Many Happy Returns – How to Opt PCB Return Current Paths to Minimize EMI ?6&'$ +4H*$(,$O M)NO M

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15: Accurate Simulations Predict Thermal Behavior in LED Systems ?6&'$ H4H*$(,$O4H* M+NO M

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18: Making the Most of Your Design Time %&J `4H*$(,$+*4H* M+NO M

F9: A Look at CAM Departments: How Designs Become Manufcturing Tools %&J N$(,$+* \X88C

F10: The ever-decreasing chip size and the endless circuit board configurations %&J N$(,$+* \X88C

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F5: Thermal Management in Advanced PCBs %&J H$(,$Z \X88C

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20: Placement and Routing of Complex PCBs %&J +4H*$(,$O M)NO M

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22: Implementing a Concurrent DFM Process ?L6/$ `4H*$(,$N4H* M+)O M

23: High Frequency PCBs Using Hybrid and Homogeneous Multilayer Circuits ?L6/$ `4H*$(,$N4H* M+)O M

16: Laminates and Materials Panel ?L6/$ +*$(,$+) M+NO M

25: Routing of High-Speed Transmissions ?L6/$ +*$(,$+) M+NO M

26: Layout for EMI and More ?L6/$ +*$(,$+) M+NO M

27: Flexible Circuit Technology ?L6/$ +*$(,$+) M+NO M

24: Conductor Current Carrying Capacity and IPC-2152 ?L6/$ +4H*$(,$O M)NO M

28: Printed Circuit Design Using Embedded Passives ?L6/$ +4H*$(,$O M)NO M

29: Layout for Signal Integrity ?L6/$ +4H*$(,$O M)NO M

31: The Universal Routing Grid ?L6/$ +4H*$(,$O M)NO M

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Successful ICT Boundary Scan Implementation

IEEE 1149.1 for boundary scan adoption has seen a steady climb in use for the past five years. In particu-lar, it has gained popularity with NPI test engineers working with high node count printed circuit boards for telecom network servers/switches and PC servers. There are several ways to implement boundary scan test on PCBs, the two most common being:

■ Native boundary scan on in-circuit test systems. (Note: Native boundary on ICT is an integrated solution where the boundary scan test will be developed and executed within the same ICT interface. No additional third-party hardware or software is needed.)

■ Standalone benchtop boundary scan. Stand-alone benchtop boundary scan is preferred during prototype/NPI, as it enables PCB testing without building an ICT fixture. However, it has not been adopted for high-volume manufacturing, where the majority of manufacturers use the native boundary scan on ICT. Here’s why:

■ Cost. A basic benchtop boundary scan setup is about $10,000 to $20,000. Additional licenses for development, debug and runtime features will increase the cost of the benchtop boundary scan solution up to two to three times the basic cost. Compared to the cost of using native boundary scan on ICT solution, the latter is practically free, as most EMS providers and ODMs would already have boundary scan licenses enabled on their exist-ing ICT systems, which include development and debug features.

■ Separate station. Running an extra station after ICT doesn’t appeal to most assemblers, as it means

extra system and manpower costs, not to mention an additional process.There are other minor reasons, such as local sup-

port, especially for the majority of high-volume manu-facturing sites in Asia. Availability of expert support from the benchtop boundary scan vendors in Asia has not come far compared with that offered by ICT vendors. This is understandable, since ICT has been around for more than 30 years in electronics manufac-turing, fostering a more robust support model.

These are just a few reasons why most assemblers prefer ICT for boundary scan test for volume prod-ucts. Besides, ICT offers coverage for most of the PCB defect spectrum (opens, shorts), analog components value measurements, as well as powered test, which includes voltage measurements, clock measurements, digital test and in-system programming capabilities. Table 1 compares boundary scan test coverage of a typical benchtop boundary scan setup with an ICT offering boundary native scan capabilities.

Although native boundary scan on ICT is the pre-ferred solution during volume manufacturing testing, avoidable implementation issues can affect stability of the test.

Boundary scan tests, like any other digital test during ICT testing, are susceptible to noise, which affects stability. As such, the following best practices should be considered:1. Assign critical attributes to JTAG pins (TDo,

TDI, TMS, TCK and TrST) to ensure the short-est wire possible (Figure 1). To ensure signal quality and fidelity, consider assigning critical attributes to the JTAG pins during test develop-

ment to ensure the fixture has the shortest wire possible (as short as 1") from the ICT system’s digital card pins to the test probe. The shorter the wire on those JTAG pins, the less the possibility of an adjacent wire crosstalk.

Eight steps to getting the best possible test coverage.

Jun Balangue is

technical marketing

engineer at Agilent

Technologies

(agilent.com);

jun_balangue@

agilent.com.

Boundary Scan TeST BenchTop Boundary Scan IcT

IC code Yes Yes

Infrastructure Yes Yes

Interconnect (1149.1/1149.6) Yes Yes

Buswire Yes Yes

1149. shorted capacitor No Yes

Powered short No Yes*

Connect test No Yes *

DDR (memory test) Yes Yes (Silicon Nail)

Cluster test (non-BScan digital test) Yes Yes (Silicon Nail)

NOR flash, flash SPI, I2C programming Yes Yes +

CPLD programming Yes Yes

Powered vectorless test (Cover Extend) No Yes

*Using ICT digital resources +Direct Flash programming or using 3rd party programming solution

Table 1. PC Boundary Scan and ICT Boundary Scan feature Comparison

Figure 1. Short wire ICT fixture.

tEst and inspecTion

PRInTeD CIRCuIT DeSIgn & FaB / CIRCuITS aSSeMBlY sEptEmbEr 201050


test and inspection

2.�Proper�fixture�ground�plane�implementation. The main objective of using a ground plane on the ICT fixture is to reduce ground loop created by the distance between the ICT system ground and the PCB ground via fixture wiring. Unfor-tunately, few understand proper ground plane implementa-tion, which can make or break the ICT digital or boundary scan test (Figure 2). The objective of having a proper ground plane is to help ensure the PCB ground is as short as possible to the ICT system’s digital ground during digital test, to mini-mize ground loop, as well as ensure that the signal wire stays closer to the ground to minimize crosstalk. Figure 3 is an example of a badly implemented ICT fixture ground plane, which is worse than not having a ground plane.

3.�Twisted-pair�wiring�on�JTAG�pins�(TDO,�TDI,�TMS,�TCK�and�TRST). Aside from short wiring, another strategy to ensure signal integrity and minimizing noise is implement-ing twisted-pair wiring on JTAG pins. Twisted-pair imped-ance of approximately 100 Ω matches the low output impedance of the digital driver of the ICT system, which will result in a better drive signal integrity.

4.�Removing�physical�test�probes. For nodes that have only boundary scan devices connected to them (100% boundary scan nodes), removing these probes could ensure the signal integrity on those nodes stays clean. However, use a conser-vative approach in removing test probes on boundary scan nodes, as it will mean losing test coverage if there are non-boundary scan devices or analog components connected to it.

5.�Dual-stage�fixture.�Most of the designs of high node count assemblies have resorted to a dual-stage fixturing solution where during the first stage, all the test probes are in con-tact while executing unpowered and powered in ICT (Fig-ure 4). At the second stage, executed after all first stage tests have been passed, the fixture probe plate will move up either mechanically or via a pneumatic cylinder to disen-gage most of the normal test probes, with only a few long travel test probes remaining in contact. The test probes in contact during this second stage are power, ground, JTAG pins (TDI, TDO, TCK, TMS and TRST), as well as com-pliance and disabling pins (Figure 5). With the dual-stage fixture strategy, most noise coupled through the fixture wires is eliminated, resulting in a stable boundary scan test.

6.� Power� cycling� or� reset� sequence. Adding a power cycling or reset sequence procedure to the test plan ensures the boundary scan devices in chains are in the proper state

for testing. During boundary scan, the core logic of the devices in the chain is disconnected from the rest of the board, which probably would affect other devices operat-ing in normal mode. Other devices exchanging data with boundary scan devices will consider the devices inoperable.

Note that when the board comes out of boundary scan mode, all the boundary scan devices go into BYPASS, and the core logic is reconnected to the I/O pins, but the board and the boundary scan devices do not necessarily pick up where they left off. To get the board back to normal operat-ing mode, the board reset procedure must be run, or board power must be cycled. This can be done by adding a reset sequence or power cycling procedure to the test plan.

For multiple chains, interactions between chains can be a problem. For problems with connect tests or disabling difficul-ties, try adding a power cycling or reset sequence to the test. 7.�Disabling�upstream�device,�oscillator,� switching�volt-

age� regulator.� When a digital or boundary scan device is being tested, its surrounding devices can affect the way the device operates. This, in turn, can affect the test for that device, resulting in an unstable boundary scan test. To some extent, the effect that other devices have on the inputs to the device under test is minimized in the test sys-tem by overdriving. However, this is not always completely effective and cannot be used with high-speed signals. Dis-abling the upstream devices ensures that there is no other signal interference while executing boundary scan test. Disabling on-board oscillator and switching voltage regu-lators ensure that noise coupled through fixture wiring is minimized, which will result in a stable boundary scan test.

8.�Maintaining�JTAG�pins�signal�during�boundary�scan�test�and�disable�state.�Most PCBA with good boundary scan design for test implementation will take care of the pull-up/down resistor of the JTAG pins to ensure stability of the boundary scan test. If these DfT factors have not been includ-ed on the board, implementing them on the fixture will help.

The TCK (test clock) should be treated like any clock pin, although it has nothing to do with the on-board clock func-tion. The TCK should be terminated with a 68 Ω resistor in series with a 100 pF capacitor to ground.

Maintaining stable TMS (test mode select) signals, either during boundary scan test or the disable state, is very impor-tant. During boundary scan test, the test generated by ICT will ensure that TMS will maintain its level according to the state diagram. However, during boundary scan test, disabled TMS should maintain a signal level to remain in the reset state. A pull-up resistor will help to ensure that TMS remains high.

Figure 2.�Ground�plane�implementation�on�an�ICT�fixture.�Ground�plane�wire�should�be�as�short�as�possi-ble�and�avoid�going�through�above�the�signal�wires.�

Figure 3.�Wrong�ground�plane�implementation�on�ICT�fixture.�The�black�wire�represents�long�ground�wire,�which�in�this�case�is�on�top�of�all�the�blue�signal�wires�that�create�a�ground�loop.

Figure 4.�First�stage�–�fixture�during�ICT.

Figure 5.�Second�stage�–�fixture�during�boundary�scan�test.



PAUL LoToSkY

is global director -

customer technical

support at Cookson

Electronics

(cooksonelectronics.

com); plotosky@

cooksonelectronics.

com. His column

appears monthly.

We� continue� our series on solder bridging. This month, we look at potential problems caused by the placement machine and reflow profile.

If the pick-and-place machine is suspected:

Problem: Placement inaccuracy narrows gap between pads, increasing the chance of bridging.recommendations:�

■ Verify component placement pressure. ■ Use x-ray to verify BGA placement. ■ Use microscope for QFPs.

Problem: Excessive component placement pressure will squeeze paste out of pads. recommendations:�

■ Verify actual component height against data entered in the machine.

■ Component placement height should be ±1/3 of paste height.If the reflow profile is suspected:

Problem:�Extended soak will input more heat to the paste and result in paste hot slump phenomenon.recommendation:�Adopt a straight ramp to spike profile, without soak zone if possible. CA

Bridging�causes,�Part�3Identify and solve placement and reflow-related solder defects.

Figure 1 and 2.�inaccurate�or�high-pressure�parts�placement�may�lead�to�bridging.

Figure 3.�Deleting�the�soak�will�help�eliminate�paste�slump,�a�cause�of�bridging.�

smt trOUbLesHOOtING

THE DEFECTS DATABASETHE DEFECTS DATABASE

this�month�We feature one recent problem of sol-der balls or fines.

Dip solder paste now commonly used in package-on-package (PoP) assembly has a lower metal con-tent, more often designed for nitrogen reflow than air, and also has smaller solder particle size. The powder may be Type 5-6, as opposed to a stencil printing grade of Type 3-4, and hence more prone to solder balling during reflow. It is fairly uncommon for stan-dard SMT solder paste to slump and solder ball like the example, unless it has been poorly stored.

It’s important for engineers to learn how to con-duct solder balling and solder slump measurements of paste from different vendors. IPC and SMART Group specifications describe tests of this type using automated test equipment available from a range of suppliers. In simple terms, a sample of paste is printed on a non-solderable surface – in this case, a ceramic tile – and reflowed. The result observed should be a lack of spread during preheat, one single ball on the surface of the plate after reflow.

These are typical defects shown in the National Physical Laboratory’s interactive assembly and sol-dering defects database. The database (http://defects-database.npl.co.uk), available to all this publication’s readers, allows engineers to search and view countless defects and solutions, or to submit defects online. CA

rolling�with�solder�BallsFiner powders may be more prone to solder balling.

Figure 1.�spread�during�reflow�could�be�a�sign�of�improperly�stored�solder.�

DR. DAvIDE DI MAIo is with the

National Physical

Laboratory Industry

and Innovation

division (npl.co.uk);

defectsdatabase@

npl.co.uk. His column

appears monthly.

3D Imaging

Contact Leica Microsystems today for a free demo of our new 3D imaging capabilities, and receive a free ES2 stereomicroscope. (Limited time offer)

Your QA standards and Leica Microsystems’quality make his digital world possible.

From compound and stereomicroscopes to our newest Leica DVM5000 digital microscopes with powerful 3D imaging, only Leica Microsystems delivers a complete solution matched precisely to your application needs and standards .. . backed by more than 160 years of experience.

It takes quality to make quality.Visit www.leica-microsystems.com/bigpicture to arrange a FREE on-site demonstration.

In the big picture, it’s the smallest things that matter most.

Living up to Life


A�‘Disconnection�Approach’�to�Cleaning�Process�Selection

PoSt-reflow� reSiDueS� of SnPb and newer Pb-free soldering materials are more difficult to remove due to increases in component density, larger compo-nent packages, higher lead counts, finer lead spacing and lower stand off distances. While modern aqueous alkaline cleaning agents effectively remove these flux residues, achieving satisfactory cleanliness depends on the interplay of temperature, exposure time, chemical concentration and mechanical energy. At first glance, the path toward a perfect cleaning pro-cess may appear elusive and complex, if the process with all the associated variables is considered. As a chemist, I would equate the challenge of setting up a proper cleaning process to that of synthesizing a complex molecule. In fact, one approach to organic synthesis known as retrosynthetic analysis, or “the disconnection approach,” is also useful as a strategy for selecting the perfect cleaning process.

A disconnection approach is simply a way of breaking down a very complex target to make the best path to success more apparent. With this approach, a chemist will start with the structure of their target molecule and progressively go through the mental exercise of cutting bonds to create sim-pler molecules. The result is the complex molecule is reduced to individual building blocks where each can be judged as a viable or non-viable option by asking common sense questions: Is the building block read-ily available? Is it expensive? Is it safe to use? Once a viable list of building blocks is obtained, simply reversing this process gives a synthetic route to the desired target molecule from simpler and commer-cially available starting materials.

What does this have to do with selecting a clean-ing process? More than you think. Like a chemist who faces the task of synthesizing a complex mol-ecule, engineers developing a cost-effective, long-term cleaning process often feel overwhelmed. Naturally, they rely heavily on equipment and chemistry vendors to offer advice and support. Yet unless the customer fully understands the building blocks that make up the total cleaning process, as well as how each one can impact the process window, the result may be far from optimal, and expensive.

Before beginning any evaluation, it is important to have well-defined requirements or a “wish list” of what you would like to achieve. In other words, there are many factors to consider and rank, such as mate-rial compatibility, cost, consumption, throughput, etc. Some customers may need high belt speeds to handle high volumes of parts, thus avoiding bottle-necks in production. Others may place more value on low operating temperatures, which save energy and reduce evaporative losses, etc. The cleaning chem-

istry and cleaning equipment have to be considered in parallel, not selected sequentially. For example, selecting a cleaning chemistry that is not appropriate for use with high-pressure sprays can result in a shop full of bubbles.

Using a disconnection approach, one can break down cleaning processes into basic building blocks so that each can be tested against customer require-ments. Basically, cleaning involves chemistry (or water), force, temperature and time, and each of these variables influences cleaning performance or material compatibility. Consequently, it is important to design your evaluation in such a way to optimize these fac-tors to achieve your predefined goal. Communicate your objectives with each supplier openly and in advance so that they can share with you how they can contribute. For example, if your primary goal is to achieve the fastest belt speed, this will require achiev-ing the desired cleaning results within short periods of exposure time. In the case of spray-in-air processes, contamination is partially dissolved or emulsified by the cleaning agent and partially washed away by the kinetic energy of the spray jet. Since chemical energy provided by the cleaning agent and the mechanical energy of the equipment will have significant impact on exposure time, it is important to design your experiments to test each factor independently.

The key factor for long-term success is to never recombine the building blocks during the evaluation until the impact of each important factor has been truly differentiated. For example, one should never allow vendors to change nozzles while doing a chem-istry evaluation. Any change in nozzles would result in significant changes in mechanical energy, which will overshadow or negate otherwise significant dif-ferences in chemistry. One chemistry can be made to outperform another this way. Once the best chem-istry is selected by keeping all parameters constant, explore improvements in mechanical energy until the best equipment is selected, etc. The same can be said of changing chemistry while testing different equip-ment configurations. This seems logical, but you would be surprised how often these mistakes occur.

In summary, you do not have to be an expert in solvency or in equipment design. However, you do need to understand the cleanliness and surface quality requirements of your own product line in the context of your process. You should also disconnect the pro-cess to take a good look at the impact of each build-ing block. It is unwise to simply adopt a suggested strategy without question. Make sure the cleaning chemistry is truly optimal for your process. Likewise, independently confirm that the cleaning equipment is best suited to your product line. CA

breaking down cleaning processes into basic building blocks reveals the optimal choice.

HARALD WACk, PH.D., is president

of Zestron (zestron.

com); h.wack@

zestronusa.com.

PROCESS DOCTOR


Evolution�in�the�Solar�Show�Circuit

For�thoSE� oF us who came to the solar industry from electronics, it is hard not to draw comparisons between their respective trade shows. Especially as this year, the world’s top solar shows are as big as some of the leading electronics shows, filling numer-ous halls in some very big venues. I should point out that last year, I would not have thought of comparing the two sectors’ events. The year before that, many solar shows were almost insignificant; three years ago, a solar event would typically have filled a single hall in an average exhibition center. Visiting Taiwan two years ago, I walked an entire exhibition in 15 minutes. But that’s all changing, and rapidly. In fact, the speed at which these events are growing is like nothing else we’ve ever seen, and that holds true wherever you are in the world.

By dint of the fact that Germany is still the largest and best established photovoltaic marketplace, Europe still hosts the world’s largest events, such as the big shows in Germany, and the annual EUPVSEC, held in Valencia on alternate years. Some major shows in the US, particularly on the West Coast, are also grow-ing quickly. And as China grows exponentially as a solar market, Shanghai, too, with its proximity to the main solar manufacturing areas, and for its excellent access, is proving to be a massive and fast-growing suc-cess. That said, it is, like all the Asian events, smaller than its European counterparts, presumably because there are so very many to choose from. If you were so inclined, you could visit a different solar show in China almost every week.

That the solar industry is global can be seen from the fact that wherever you go – Europe, Asia, the US – the shows are all pretty much the same, apart from their size. And it's striking that they are so all-encompassing. Everybody’s there, from the companies making the big smelting furnaces that melt silicon and grow it into ingots, through cell manufacturing equipment people like us, the panel manufacturing and assembly equipment suppliers, the firms that make the fixtures that you bolt to your roof to house the panels, the panel installation equipment suppliers themselves, right through to the guys who provide the ladders and cherry-pickers for getting the whole shooting match up onto your roof.

And that’s before you go to the non-PV-specific shows. The events promoting solar in general add in the dimension of thermal solar and all the equipment, consumables and issues involved in this part of the solar energy marketplace. From sand to water to sunshine – a vertical, horizontal, highly diversified marketplace.

This must be because solar is relatively new. Clearly, the challenge for any new show is to fill the halls and raise the exhibitor and visitor numbers. As

the event grows, however, it will get to a point where its large size can be a disadvantage. Consider only that the visitors who want to discuss cell manufactur-ing equipment with us are extremely unlikely to be the potential future clients of the rooftop installation equipment guys down the aisle in booth B4. That’s OK in a smaller show, but in a larger exhibition, even if well organized into distinct sectors, high diversity can become dissipative, and for the visitor, extremely bewildering. There must be a point at which it makes more sense to divide a large event into smaller, dedi-cated exhibitions – which will arguably have more vigor, thanks to their new focus, permitting them to grow into their own specific potential.

This is exactly what happened in the electronics sector, with shows like Electronica, now in its 24th edi-tion. Based in Munich, this now biennial show, span-ning a broad spectrum from electronics manufacture to electronics products and applications, grew swiftly, to the point that after just five editions, the decision was made to split the electronics production sector into its own dedicated show, Productronica, leav-ing Electronica with a specific focus on components, systems and applications. They now share the same venue, taking place on alternating years, and have both grown immensely since those early days – testament to the vision and courage of their organizers. Many electronics events followed similar evolutionary paths as they grew – and outgrew – their remits. Others merged, as a natural consequence of there being too many shows for exhibitors and visitors to support.

In the near future, it is likely we will see the same thing happening in the solar show circuit. The larger shows will divide into more targeted events, while the smaller shows, especially in China, where there are simply too many to visit, will probably merge or disap-pear. As industry growth settles and exhibitors define advertising budgets accordingly, it is likely that in a few years’ time, there will be a handful of big shows worldwide. These will be chosen by participants for their focus, capability, and it has to be said, for their costs, which, compared with similar electronics events, are currently very high. They will foreseeably form the solar industry’s base, as launch venues for the latest and greatest in solar, attracting global interest from exhibitors and visitors alike. And, like their counter-parts in today’s electronics sector, they are likely to be supported by various orders of smaller events that invite participation through their specific technology, market and regional focus. For us at DEK, who have seen it happen elsewhere, and who believe absolutely in supporting our industry well, this is a scenario that makes a great deal of sense. CA

As with smt, expect consolidation, especially in China.

ANDY URE is

business development

director, Americas at

DEK Solar (dek.com);

[email protected].

SOLAR TECHNOLOGIES


还在为“葡萄球现象”（Graping）所困扰？

电子行业对微型化永无止尽的追求不断在挑战传统工艺，迫使它们对因微型化所直接引起的许多问题提出解决方案。在电路板级，可以肯定地说，这些问题的大部分都与要在这么小尺寸的元器件上得到高品质焊点所需的焊料沉积量有关。因此，焊接工艺－从焊膏的印刷到回流－至关重要。然而，随着0402s密间距元件向0201s发展（很快将是01005s），以及0.4mm焊盘间距CSP（芯片尺寸封装）向0.3mm焊盘间距CSP发展，后者更多地进入主流生产也可以说是让一些问题更加严重了。事实上，这种间距尺寸不断减小的趋势甚至还揭示了一个以前从没见过的“葡萄球现象”（graping)，它产生的直接原因就是高度微型化。

葡萄球现象，顾名思义，是指回流后焊点有类似葡萄珠的不完全熔合锡膏的形成。那么，为什么会发生这种情况呢？大家知道，较少的焊膏沉积量不仅要求印刷模板更薄，脱模更彻底，还需焊膏材料中所含的锡粉颗粒更小，同时这些微型化的必要条件也造成锡粉的总表面积对助焊剂量的比濒临极限。另外，焊膏沉积量越小，其比表面积就越大，表面氧化的程度也相对增加。

助焊剂的主要功能是清除被焊金属表面以及焊膏所含锡粉表面的任何氧化物。它也能防止锡粉在回流过程中再氧化。当我们使用较小粒度的锡粉时，锡粉的总金属表面积迅速增加，因而需要更高的活性功能。同样，与较大的焊膏沉积相比,较小的焊膏沉积会有一个更高的比表面积。由于大多数的锡粉氧化都是发生在沉积表面的颗粒上，所以沉积表面积的相对增大就进一步增加了对助焊剂量的需求。当助焊剂不再能去除需更高温度才能熔化的表面氧化物时, 助焊剂耗尽，葡萄球现象就出现了。

一个焊膏材料有可能在0402s元件或0.5mm间距CSP上回流焊接得非常好，但在沉积量小时却有极大问题。这是因为沉积比表面积的增加造成锡粉有太多额外氧化，以至于助焊剂的量就变得不够了。在这种情况下，焊膏的充分结合不能发生导致出现葡萄球现象。

幸运的是，有许多方法可以帮助减轻这个问题。首先要确保焊膏脱模良好并且沉积均匀，从而使沉积的比表面积最小化。二是采用先进的粉末技术来设计焊膏材料, 控制锡粉粒度分布。改进的粒度分布既能提供一个较低的金属表面积，又能使焊膏沉积有一个最佳的比表面积。三是配方助焊剂使其既有足够的活性，又有能尽量减少锡粉再氧化的能力，从而消除葡萄球现象的发生。换句话说，助焊剂不但要在焊膏沉积量小时回流良好，而且它必须能够清除已有的氧化物并保护所有的金属不被再氧化。当然，所有这些活性功能的增强都不能损害免清洗焊膏的可靠性，或影响其SIR（表面绝缘电阻）和ECM（电迁移）性能。

通过综合这些解决方案，新焊膏配方可提供减轻葡萄球现象所需之技术。随着新型活性剂的使用，现代无铅，无卤，免清洗焊膏旨在消除葡萄球现象，同时带来其他更多优越性能。

当然，这些新一代材料所必须解决的不只是葡萄球焊点的问题，它们还需要满足所有以前制定的关于无铅焊膏的要求。这些要求包括在CSP的 via-in-pad（微型焊盘中过孔）焊点只有极少空洞，以及在大多数表面上均能提供优越的可焊性，这些表面包括镍/金，浸锡，浸银和有OSP(有机保焊膜）涂层的铜。（表面处理和焊膏的相容性对葡萄球现象而言非常重要，因为有些表面处理已经表现出会比其他表面出现更多的葡萄球焊点。）其他的无铅材料要求还包括：高的湿粘力以保证组件在高速贴装时稳定无位移，印刷可允许停滞时间长，更长的印刷工作寿命，和在炎热和潮湿的环境中表现稳定。

随着高度微型化的趋势站稳了脚跟，相关的研发专业知识也已经发展得非常成熟。虽然要配方出满足所有这些严格要求的材料绝非易事，但今日的材料专家们已能够做到这一点。

致谢：作者感谢汉高公司张建东工程师和申丽华博士的宝贵意见。

JIE BAI is a

chemist at Henkel

Electronics Group

(henkel.com); jie.

[email protected].

MATERIALS WORLD

Figure 2. 新一代锡膏消除了葡萄球现象

Figure 1. 0201元件焊点填充部分（fillet）出现葡

萄球现象

新型焊膏配方克服了现代电子产品微型化的挑战白洁，汉高公司


EdgE-Card SoCkEt DSEC� Series� high-speed� dual-stack�edge-card�socket�accepts� two�1.6�mm-thick�PCB�cards.�This�0.8�mm�pitch�sys-tem,� in� a� right-angled� configuration,�permits� dual-stacked� cards� at� 7� mm�spacing� between� cards.�Available� with�30,� 40� or� 50� edge-rate� contacts� per�row.� Is� optimized� for� signal� integrity�and� impedance� control,� high� cycles,�reduced� broadside� coupling,� and� low�insertion�and�withdrawal�force.�Pb-free�solder� charge� terminations� standard;�SnPb�solder�charges�optional.�

Samtec

samtec.com

Small-SCalE PCB dESign toolCadstar� Lite� includes� schematic� editor,�PCB�design�editor�with�max.�capability�of�2000�pins/pads,�place�and�route�edi-tor�with�unlimited�numbers�of� interac-tive� routing� layers,� library� editor� and�access�to�the�online�library�of�more�than�250,000�components,�plus�ODBC-com-pliant�database�support�and�a�datasheet�publisher.�For�smaller�scale�projects.

Zuken

zuken.com/cadstarlite

BidirECtional PCB/rF dESignHFSS� and� Pantheon� PCB/Hybrid/RF�layout� design� application� have� an�enhanced�bidirectional�link.�Design�can�begin� either� in� HFSS� or� layout,� with�the� latest� improvements� further� auto-mating�transfer�of�design�intelligence.�Reportedly� saves� considerable� time�during� RF� design;� design� cycle� times�are�reduced�by�half�or�more.

Intercept Technology

intercept.com/solutions/rf-design.html

ParaSitiC ExtraCtion tool 3D� EXT� analysis� tool� is� reportedly� capable�of� full-wave� parasitic� extraction� of� hundreds�or�thousands�of�interconnects�simultaneously.�Supports�all� types�of� interconnects,� including�wire� bond,� column� grid� and� via� arrays,� and�TSVs�used�in�ICs�and�silicon�interposers.�Output�is�standard�Touchstone�file�or�RLGC�information�that�can�be�directly�input�to�Sphinx�for�Signoff�for�frequency�simulation�or�converted�to�Spice�with�Idem�Plus�for�simulation�in�any�customer-preferred�spice�timing-based�simulator.

E-System Design

e-systemdesign.com

Phototooling gUiIGI�Phototooling�Toolbox�enables�phototo-ols�to�be�graphically�defined�and�viewed,�including� polarity� and� parity.� WYSIWYG�viewer� bridges� gap� between� hierarchi-cal� and� flat� data� formats� with� the� ability�to� intermix� them,� along� with� supporting�concepts� found� in� both� types� of� editors.�Reads� AutoCAD� DXF� and� DWG,� GDSII,�and�ODB++.��

Infinite Graphics

igi.com

Emi ShiElding gaSkEtS Cho-Seal� 6502� and� 6503� are� for� aero-space,� automotive� and� telecommunica-tion�applications.�Are�Ni-plated�aluminum�particle-filled� silicone� and� fluorosilicone�elastomers.�Offer�shielding�after�exposure�to�high�and�low�humidity�and�temperature�cycles,� as� well� as� salt/fog� environments.�Come� in� molded� and� extruded� product�forms,� as� well� as� a� silicone,� thermally�cured,� robotically�dispensed�and�a� form-in-place�version.��

Chomerics

chomerics.com

thErmoSEtting rESin analySiS FLOW-3D�ThermoSET� CAE� software� pre-dicts� void� formations,� incomplete� filling,�overfilling,� and� gold� wire� deformations�caused�by�use�of�thermosetting�resins.

Flow Science

flow3d.com/index.html

inkjEt-PrintaBlE CondUCtivE ink Water-based�#9101�adheres�to�polyester�substrates.� Is� formulated� for� thermal�and�piezo�inkjet�systems.�Contains�con-ductive�silver�nano-particles;�requires�no�secondary�curing�or�additional�process-ing.� Near� full� conductivity� is� achieved�within� a� few� min.� of� printing.� RoHS-compliant.� Negligible�VOCs� are� created�during�printing.�

Methode Electronics

methode.com

EP Cam SoFtwarE EP� Doctor� CAM� enables� simulation,�design,�and�manufacturing�of�high-preci-sion� embedded� passive� components� in�RF�PCBs.�Uses�a�learning�model�to�adapt�to� individual� PCB� manufacturing� pro-cesses�to�produce�high-precision�compo-nents�without�the�need�for�corrective�laser��trimming.�

Troops First Research Initiative

tfriinc.com

othErS oF notE

maChinES matErialS toolS SyStEmS SoFtwarE


OTHERS OF NOTE

Pick-aNd-PlacE TEST HaNdlER MT9510XP� tri-temp� pick-and-place�handler�now�offers�a�pressure�booster�option� said� to� increase� contact� force.�Enables� testing� of� high� pin� count�devices� in� up� to� eight� contact� sites�in�parallel.�Reportedly�doubles�overall�force�available;�twice�as�many�pins�can�be�contacted�simultaneously.��

Multitest

multitest.com/MT9510

dESkTOP WiREbONd aOi S2088BO-II� detects� defects� on� die,� ball-wedge,� wedge-wedge� and� security�bonds.�High-res�camera�records�all�bond�sites�and�wires.�Inspects�aluminum�thick�wire� and� aluminum,� or� gold� thin� wire�connections,� down� to� diameters� of� 17�µm.� Inspection� library� includes� inspec-tion�patterns�for�damaged�and�misplaced�components.� Is� compatible� with� all�Vis-com�inline�systems;�can�be�employed�as�a�programming�station.

Viscom

viscom.com

Count On Tools

cotinc.com

UPgRadEd baRcOdE imagER QX�Hawk�barcode�imager�now�includes�HX-Mode� 3.0� firmware� upgrade,� more�accessory� options,� and� new� CCD� ver-sion.� Reads� HU1D� and� 2D� barcodesUH�in�any�orientation.� Improves�algorithms�for�reading�direct�part�marks,�additional�symbologies�such�as�Aztec�Code,�Micro�QR,�Pharmacode,�and�postal�codes,�and�adds� XML� for� advanced� programming.�CCD�version�has�1.2�Mp�sensor�and�high-resolution�modular�optical�zoom.�

Microscan

microscan.com

dUal-PlacEmENT liNEFlex�Line� includes�twin�MC-385�pick-and-place� machines� with� a� combined� place-ment� rate� of� 10,000� cph� and� each� IPC-9850-rated�at�5,500�cph;�capable�of�placing�parts� ranging� from� 0201� up� to� 150� mm�x� 100� mm.� Includes� MC-1400� automatic�stencil� printer,� CR-8000� 8-zone� Pb-free�reflow�oven,�and�two�conveyors�to�permit�pre-reflow�inspection.

Manncorp

manncorp.com

TURNkEy TEST STaTiONiTherm-100� turnkey�system�of� laboratory�instruments� and� sensors� is� for� precise�airflow� velocity� and� temperature� mea-surement.� Applications� include� thermal�management�studies�on�boards.�Includes�a�benchtop,�laboratory-grade�wind�tunnel,�automated� controller,� and� multiple� sen-sors� for� characterizing� airflow� and� mea-suring� pressure� drop� across� heat� sinks�and�over�other�PCB�components.�With�an�attached� thermocouple,� permits� analysis�of�CPUs�and�other�hot�components.�

Advanced Thermal Solutions

qats.com

Si REacTivE HOT mElT PV� InstantSeal� supports� high-speed�assembly,� improving� solar� frame� and�junction� box� sealing.� Is� a� 100%-silicone,�neutral� cure� sealant� that� minimizes� con-tamination�of�module�components�during�assembly.�Pot� life�reportedly�up�to�24�hr.�and�long�overall�open�time�below�125°C.

Dow Corning Solar Solutions

dowcorning.com/solar

cONFORmal cOaT iNSPEcTiON FX-UV� automatically� inspects� for� cov-erage,� selected� areas� of� non-coverage,�delamination,� cracks� and� bubbles.� No�programming� required.� Inspection� setup�reportedly� requires� a� few� minutes.� A�known� good� board� is� used� to� learn� the�coverage�and�non-coverage�areas.�Inspec-tion� typically� takes� a� few� seconds,� with�results� immediately� displayed.� Results�can�be�stored�and�reviewed�offline.

Nordson YesTech

nordsonyestech.com

NONcORROSivE mETalS adHESivE Permabond�TA459�magnet�adhesive�does�not� corrode� electrically� conductive� sur-faces,� including� copper.� Is� for� bonding�magnets�and�metals,�achieving�50%�of�full�strength� within� 15� min.� Is� high-viscosity,�with� exceptional� shear� strength;� forms�strong� bonds� to� a� variety� of� plated� and�non-plated� surfaces� with� a� resistance� to�high-temperatures,�vibration�and�impact.

�

Permabond Engineered Materials

permabond.com

PlacEmENT NOzzlES A�full�line�of�standard�300-series�nozzles�are�for�the�Assembléon�MC-24�and�MC-24X,�and�the�Yamaha�YG300�placement�machines.� Handle� component� sizes�from� 01005� to� larger� BGAs� and� QFPs�for�large�mix�and�minimum�changeover.

macHiNES maTERialS TOOlS SySTEmS SOFTWaRE

MACHINES MATERIALS TOOLS SYSTEMS SOFTWARE

OTHERS OF NOTE

MACHINES MATERIALS TOOLS SYSTEMS SOFTWARE

OTHERS OF NOTE


LED PLACEMENT LS60V-LED� automated� SMT� pick-and-place� machine� handles� longer� LED�panel� lengths�and�LED�package�nozzle�dimensions� and� material� selection.�Touchless�centering�system�helps�place�at�rates�of�up�to�4,800�cph.�Handles�pan-els�up�to�800�mm.�Comes�with�an�array�of� nozzles� for� common� LED� packages.�Custom�nozzles�available.�Places�0201s,�SOICs,� 0.0015"� pitch� QFPs� and� CSPs,�BGAs,�and�µBGAs.��

APS Novastar

apsgold.com

HIgH-SPEED CODE READERSR-600�series�code�reader�provides�code�applications�moving�as�quickly�as�160�m/min.;�has�high-intensity�LED�lighting,�high-speed� DSP� decoding� ability,� and� decod-ing� software� filters.� Filters� enable� stable�reading�on�difficult�codes�caused�by� low�contrast,� scratches,� distortion,� or� reflec-tions.� Optional� direct� programming� on�the� reader� with� visible� laser� pointers� or�connecting� using� free� AutoID� software.�With�TUNE�button,�it�selects�the�appropri-ate� combination�of� filters,� shutter� speed,�aperture�and�lighting�conditions.�

Keyence

keyence.com/SR6PR

ROTARY SPRAY FLuxERATS� Spray� Fluxer� is� a� closed� system�in� which� a� rotary� pump� continuous-ly� transports� flux� from� the� container�into� a� bypass� system.� For� spraying,�a� bypass� valve� interrupts� the� circuit�and� leads� the� flux� to� the� spray� head.�Atomizes� flux�with�comparatively� low�pressure;� ensures� a� stable� spray� jet�with� a� homogeneous� spray� pattern.�Creates� considerably� less� spray� mist,�reducing� soiling� in� the� fluxer� area.�Both�flux�quantity�and�spray�pressure�are�adjustable.

Seho Systems

seho.de

LARgE LOAD LIFT BlissLift� (BL600)�has�a�more� robust� col-umn,� larger� lift� platform� and� increased�load�capacity.�Features�adjustable�width�legs�and�push�bar�as�standard.�Is�capable�of�lifting�more�than�600�lb.�at�a�24"�load�center.��Lift�platform�can�pick�up�19"�rack-mount�chassis.�Works�with�standard�Bliss�Chassis�Cart.��

Bliss Industries

blissindustries.com

HALOgEN-FREE POLYIMIDE LAbEL XF-603� is� a� 0.0001"� white� polyimide,�halogen-free� label� material� that� meets�VTM-0�level�of�flame�retardants�per�UL94.�Has� significant� self-extinguishing� perfor-mance.�When�combined�with�a�high-tem-perature� resistant� polyimide� film,� is� said�to� prevent� flame� propagation.� Is� coated�with� a� high-opacity� gloss� white� topcoat�designed� for� flexo-graphic� and� thermal�transfer� printing.� When� matched� with�proper� inks� or� thermal� ribbon,� it� report-edly�withstands�high�temperatures,�harsh�chemicals�and�solvents.�

Polyonics

polyonics.com

TuRNkEY bOx-buILD LINEBox� Builder� Line� features� MC-387� placer�with� 224-feeder� capacity� and� IPC-9850-rated� speed� of� 5,500� cph.� Is� for� low-vol-ume,�high-mix�runs.�Can�be�programmed�for� multiple� processing� scenarios� with-out� changeovers� and� downtime.� Line�includes�MC-1400�automatic�stencil�print-er,� CR-5000� 5-zone� Pb-free� reflow� oven�and�CT-90L�inspection�conveyor.

�

Manncorp

manncorp.com

PARTS MONITORINg SOFTWARE MYLabel� PRM� (proactive� replenishment�monitor)� software� improves� uptime�and� ensures� correct� material� delivery� to�the� SMT� assembly� line.� Gives� immedi-ate� overview� of� replenishment� needs.�Replenishment� requests�are�displayed� in�advance,� preventing� material� shortage.�Is� integrated� with� an� extensive� material�database.�When�combined�with�automatic�SMD� tower,� automates� replenishment�process�completely.

Mydata Automation

mydata.com

INLINE JET FLuxER Spectrum�S-930N�series�of�inline�dispensers�are�said�to�improve�throughput�and�material�utilization�for�selectively� jetting�low-viscosity�flux�and�phase-change�high-tack�fluxes.�Also�coats�other�materials�such�as�polyimides.�In�conjunction�with�special�valves,�enables�flux�coatings�as�low�as�5�µm.�Is�said�to�provide�edge� definition� of� 0.5� to� 1� mm,� minimize�flux� residue� and� overspray,� and� reduce� or�eliminate�cleaning.�Jets�flip�chips�of�varying�bump�heights.�

Nordson Asymtek

asymtek.com

PV SI CONFORMAL COATINg1-2577� silicone� conformal� coating� is� for�use� as� a� PV� cell� and� module� coating.�Offers� abrasion� resistance� and� good�dielectric� properties.� Cures� with� a� hard,�slick� surface,� and� is� Mil� spec� and� UL-approved.� One-part� RTV� also� contains�a� UV� indicator� and� adheres� to� metal,�aluminum,�ceramic�and�plastic.�Comes�in�bottles,�pails�and�drums.

�

Dow Corning

dowcorning.com


AD INDExto learn about the advertisers in this issue, go to pcdandf.com or circuitsassembly.com and select “Current Issue” to access the digital edition. this will provide you with direct links to the websites of each advertiser in this index.

Company Page No.

Bare Board Group, www.bareboard.com . . . . . . . . . . . . . . . . . 60, 63

BEST Inc., www.solder.net . . . . . . . . . . . . . . . . . . . . . . . . . . . . insert

Cookson Electronics, www.alphasolderpaste.com. . . . . . . . . . . . 31

CST, www.cst.com/emc; www.cst.com/emc . . . . . . . . . . . . . . . . . 19

Custom Design Services . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

DEK, www.dek.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Design 2 Part, www.cst.com/pcb; www.cst.com/emc . . . . . . . . . . 43

Digi-Key Corp., www.digikey.com . . . . . . . . . . . . . . . . . . . . . Cover 2

Dow Electric Materials, www.dow.com . . . . . . . . . . . . . . . . . . . . . 13

DownStream Technologies, www.pcbshows.com/webinars . . . . . . . 5

DownStream Technologies, www.downstreamtech.com . .Cover 3, 15

eFabPCB, www.efabpcb.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

EMS Directory, www.circuitsassembly.com/dems . . . . . . . . . . . . . 63

Eremex, www.eremex.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Europlacer, www.europlacer.com . . . . . . . . . . . . . . . . . . . . . . . . . 37

EzPCB, www.ezpcb.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Fine Circuits, www.finecircuits.com . . . . . . . . . . . . . . . . . . . . . . . 62

Imagineering Inc., www.PCBnet.com . . . . . . . . . . . . . . . . . . . . 1, 61

Koh Young, www.kohyoung.com . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Leica Microsystems, www.leica-microsystems.com/bigpicture . . 53

Mentor, www.mentor.com/go/pads-eval . . . . . . . . . . . . . . . . Cover 4

Miller-Stephenson Chemical, www.miller-stephenson.com . . . . . 63

MIRTEC, www.mirtecusa.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

National Instruments, www.ni.com/multisim . . . . . . . . . . . . . . . . . 4

Numerical Innovations, www.numericalinnovations.com . . . . . . . 61

Online Electronics, www.pcb4less.com . . . . . . . . . . . . . . . . . . . . 62

Overnite Protos, www.pcborder.com . . . . . . . . . . . . . . . . . . . . . . . 62

PCB Fab Express, www.pcbfabexpress.com . . . . . . . . . . . . . . . . . 61

PCB West, www.pcbwest.com. . . . . . . . . . . . . . . . . . . . insert, 48, 49

PICA, www.picasales.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

ResinLab, www.resinlab.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Rogers, www.rogerscorp.com/acm . . . . . . . . . . . . . . . . . . . . . . . . 11

Production Solutions, www.production-solutions.com . . . . . . . . . 57

Rogers, www.rogerscorp.com/acm . . . . . . . . . . . . . . . . . . . . . . . . 29

Samtec, www.samtec.com/edgerate . . . . . . . . . . . . . . . . . . . . . . . 7

Seika Machinery, www.seikausa.com . . . . . . . . . . . . . . . . . . . 30, 39

SEA Awards, http://www.circuitsassembly.com/cms/sea-award . .47

Sierra Circuits, www.protoexpress.com/betterDFM . . . . . . . . . . insert

Sierra Circuits, www.protoexpress.com/webpcb . . . . . . . . . . . . insert

SMTA International, www.smta.org/smtai . . . . . . . . . . . . . . . . . . 40

Speedline, www.speedlinetech.com/mpm . . . . . . . . . . . . . . . . . . 29

Streamline Circuits, www.streamlinecircuits.com . . . . . . . . . . . . 25

Superior Processing, www.superior-processing.com . . . . . . . . . . 61

Valor Computerized Systems, www.valor.com. . . . . . . . . . . . . . . . 33

Virtual PCB, www.virtualpcb.com . . . . . . . . . . . . . . . . . . . . . . . . . 34

Advertising SalesNorth America/Europe/Asia (except Korea):UP Media Group, Inc. PO Box 470, Canton, GA 30169

CirCuits Assembly Sales Manager: Krista Fabian, 302-519-4064, [email protected]

Printed CirCuit design & FAb Sales Manager: Frances Stewart, 678-817-1286, [email protected]

Korea Sales: Young Media, 82 2 756 4819, [email protected]

The advertising index is published as an additional service. The publisher does not assume any liability for errors or omissions.

Test and Inspection, continued from p. 51

TRST (test rest) is an optional JTAG pin designed to let the boundary scan test get into the TEST-LOGIC-RESET mode regardless of the state of TMS or TCK. Whenever TRST gets asserted alternatively in the absence of

TRST pins, boundary scan will enter the TEST-LOGIC-RESET mode when TMS is held high for at least five rising edges of TCK. The TRST signal should include a pull-down resistor when pos-sible to reduce the chance the signal floats when it is not being driven by the ICT driver.

The success of boundary scan test implementation on ICT lies not only with the tools used, but also the project team’s support of the strategy from design and test engineering up to production. With a new set of boundary scan-related IEEE standards (P1687, P1581, 1149.7, 1149.8.1) expected soon, boundary scan will get a further boost in the board testing environment. CA

BiBliogrAPhy

1. IEEE, 1149.1-2001, “Standard Test Access Port and Boundary-Scan Archi-tecture.” June 2001.

2. SMTA, SMTA/TMAG Testability Guidelines TP-101D, 2008.

3. Kenneth P. Parker, Boundary Scan Handbook, 3d edition, 2003.

Selective Soldering, continued from p. 45

Have uniform control of the “free-board” of solder above the nozzles. However, selective soldering nozzles, particularly smaller-diameter nozzles, are notorious for gradually losing the height of the solder freeboard over time due to the buildup of contamination inside the nozzle. Real-time measure-ment of the solder height that will auto-matically adjust pump speed in order to maintain a pre-set desired height is valuable here. That’s a critical part of the process. If solder height diminishes and you aren’t aware of it, soon you’re not soldering at all, or at least not get-ting the desired quality.Selection, shape, design and function of selective soldering nozzles are a critical focal point of successful solder-ing. Know your nozzles! Understand their features, how they affect and control the solder wave, and what their vulnerabilities may be to the specific alloy used. CA


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SEARCHING FOREMS PROVIDERS?

NOW IN EXCEL! The CIRCUITS ASSEMBLY Directory of EMS Companieslists more than 1,950 EMS facility listings worldwide, including detailed info on:• Facility contact info• Annual sales revenue• Number of employees• Number and type of

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Special Advertising Section

Assembly InsIder

This column provides

abstracts from recent

industry conferences

and company white

papers. With the

amount of informa-

tion increasing, our

goal is to provide an

added opportunity

for readers to keep

abreast of technology

and business trends.

TECHNICAL ABSTRACTS


In�Case�You�Missed�It

Environmental Regulations“Asian Chemicals Regulations”

Author: Gregory Dripps; [email protected]: Asia is adopting core elements of

REACH, although the region is not adopting the regulation itself. Registration and reporting are based on tonnage bands, with mandated testing require-ments (physical/chemical plus toxicity). Possession of data packages will become a currency of the future as management controls consider a substance’s potential hazards and use, not just hazards. A philosophical shift is underway, whereby the notion that existing or new materials are safe is being abandoned, and comprehensive analysis and testing data are required to demonstrate an acceptable hazard profile. In many nations, rules will go into effect as early as this year. (IPC Symposium on Electronics and the Environ-ment, July 2010)

“Recent Developments in the Implementation of the EU REACH Regulations”

Author: Michael Kirschner; mike@designchain-associates.

Abstract: More than 140,000 substances have been preregistered, almost five times more than expected. To date, there are 38 candidate substances of very high concern (SVHC), and the Commis-sion expects 165 by 2012. Until a listed substance is authorized or restricted, it remains a Candidate SVHC. To use an SVHC, make sure your supplier is legally authorized if your supply chain goes through the European Environment Agency. Furthermore, compliance in the EU does not mean compliance elsewhere. (IPC Symposium on Electronics and the Environment, July 2010)

“Halogen–Free: A Regulatory Overview”Author: Susan Landry; susan.landry@albemarle.

com.Abstract: Combustion gases generated during

fires (whether or not flame retardants are present) that contribute to acute toxicity include CO, HCN, HCl, and acrolein. Carbon monoxide is responsible for more than 90% of all fire-related deaths. The most important pollutants generated in fires are poly-cyclic aromatic hydrocarbons (PAHs) and polyhalo-genated dibenzodioxins and furans (PHDDs/PHDFs). Measurements made in large fires have shown that the PAHs have an up to 500 times higher cancer risk than the PHDDs/PHDFs. PAHs are generated in all fires, and many are carcinogenic compounds. In the US, the “Chemicals of Concern” Action List includes phthalates, short-chain chlorinated paraffins, poly-brominated diphenyl ethers (PBDEs), and perfluori-

nated chemicals, including PFOA. An upcoming DfE will review Deca-BDE alternatives. The Department of Toxic Substances Control is called on to scien-tifically and systematically identify and prioritize chemicals and consumer products for manufacturers to conduct alternatives assessments, and DTSC could impose regulatory responses for alternatives selected by manufacturers. In June the European Parliament Environmental Committee voted to support amend-ments that require further evaluation instead of a ban on the use of certain organobrominated materi-als and PVC in electronics and electrical equipment, with certain exclusions for materials for military purposes and vehicles. (MEPs also called for a ban on nanosilver and carbon nanotubes, and that other EEE material containing nanomaterials should be labeled.) Amendments will now be considered by the full plenary session of the European Parliament. (IPC Symposium on Electronics and the Environment, July 2010)

Laminate Environmental Testing“The Combustion Testing Phase EPA DfE Project on Flame Retardants for Circuit Boards”

Author: Dr. Emma Lavoie, et al; [email protected].

Abstract: Goals of this work, a partnership of the US EPA and various industry suppliers, included identifying and characterizing commercially available flame retardants and their environmental, health, safety, and fate aspects in FR-4 printed circuit boards. The work applied lifecycle thinking to consider haz-ards and exposures, and used EPA New Chemicals Program criteria to evaluate hazard and environmen-tal fate concerns. Methods included comparing the combustion byproducts from FR-4 laminates and PCB materials with different flame retardants dur-ing potential thermal end-of-life processes, including open burning, incineration, and smelting. Testing is designed to be a first step in providing industry with a comparative analysis of combustion byproducts from these materials, and to help inform further studies to better understand these byproducts in real-world sce-narios. Investigations covered combustion testing of printed circuit board laminates, including materials containing phosphorus, TBBPA and no flame-retar-dant additives under temperatures of 300°, 700° and 900°C, with and without oxygen. (IPC Symposium on Electronics and the Environment, July 2010) CA

PCB WEST

BOOTHS 300-302

SEPTEMBER 29, 2010

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