Princess Sumaya Univ. Computer Engineering Dept. حاله ك سام ب د.Dr. Bassam Kahhaleh
Princess Sumaya Univ.Computer Engineering Dept.
كحـالــه. بســام دDr. Bassam Kahhaleh
Princess Sumaya Univ.Computer Engineering Dept.
Chapter 2:Chapter 2:
Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Basic Computer OrganizationBasic Computer Organization
The 5 Classic Components of a Computer
The Basic Hardware/Software Interface
The Stored-Program Concept
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.InstructionsInstructions
Assembly Language Instruction:
Perform: a = b + c
ADD a, b, c ; a b + c
What are ‘a’, ‘b’ and ‘c’?
● The storage concept:
♦ Registers (R1, R2 …)
♦ Memory
Sequence of Instructions:
Perform:
a = (b + c) – (d + e)44 / 19 / 19
11:42 AM11:42 AM
Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.InstructionsInstructions
Design Principle 1: Simplicity Favors Regularity
● Fixed number of operands
● Arithmetic operations on registers only
Design Principle 2: Smaller is Faster
Small number of registers faster hardware
● Fill registers with data
● Not enough registers to hold all data
Simpler hardware
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Memory OperandsMemory Operands
Data Transfer Instructions
● Memory Address (Location)
● Slower than registers
● Lower bandwidth than registers
● Keep commonly used data in registersand avoid Spilling Registers.
Load and Store Instructions
012••
Memory
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.OperandsOperands
Design Principle 3: Make the Common Case Fast
● Constant operands:
Perform a = b + 4
● Immediate operands
Memory
b
4
••
21
22••
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Memory AccessMemory Access
Height and Width
1 KB
4 KB
Address & Data 16 Locations 1 K Locations 1 M Locations
Read & Write
Memory
4301
0001
••
21
22••
1024
8 bit
1 KB
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Stored Program ArchitectureStored Program Architecture
Instructions(Program)
Operands(Data)
Memory1024 x 32
Opcode Operands
Binary Operand
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Memory OrganizationMemory Organization
Byte Access
Word Access
• •20 Byte
21 Byte • •
• •20 Byte Byte Byte Byte
24 Byte Byte Byte Byte • •
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• •20 Byte Byte
22 Byte Byte • •
Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Memory OrganizationMemory Organization
Mixed Access
● Little Indian
● Odd/EvenAlignment
• •20 Byte Byte
22 Byte Byte • •
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DATADATA
BUSBUS
MSB
LSB
Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Memory OrganizationMemory Organization
Mixed Access
● Alignment! • •20 Byte Byte Byte Byte
24 Byte Byte Byte Byte • •
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DATADATA
BUSBUS
MSB
LSB
Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Instruction RepresentationInstruction Representation
Instruction Format
Machine Language & Machine Code
Sequence of instructions
Design Principle 4: Good Design Demands Good Compromises
Opcode Operands ADD R1, R2, 47
5 1 2 2F
0101 0001 0010 00101111
5 1 2 2 F
AssemblyLanguage
MachineLanguage
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Operations (Opcodes)Operations (Opcodes)
Arithmetic
● Add, Sub, Mul, Div, Inc, Dec …
Logic
● Shift
♦ Logical & Arithmetic
♦ Right & Left
● Bitwise AND, OR, XOR
● Complement (NOT)
1 0 1 0 0 1 1 1
1 0 1 0 0 1 1 1
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Operations (Opcodes)Operations (Opcodes)
Shift Operation for Multiplication
● Multiply by 2
♦ Shift Left 1 bit
♦ Unsigned Binary
♦ 2’s Complement
● Multiply by 10
♦ BCD
♦ Shift Left 4 bits
0 0 0 0 0 1 0 0
1 1 1 1 1 1 0 1
0 0 0 0 0 1 0 0 1 0 0 1
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Control InstructionsControl Instructions
Making Decisions (Conditional Branches)
Perform if (i == j) then a = b + c else a = b – c
i == j ?
a = b + c a = b – c
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Control InstructionsControl Instructions
Transferring Execution
● Unconditional Branch or Jump
● Call Subroutine
● Software Interrupt
••
••
•
••
••••
•••
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Intel Architecture IA-32Intel Architecture IA-32
Year Microprocessor Address Bits Data Bits Transistors
1971 4004 12 4 2,300
1974 8080 16 8 6,000
1978 8086 20 16/8 29,000
1982 80286 24 16/8 134,000
1985 80386 32 32/16/8 275,000
1989 80486 32 32/16/8 1,200,000
1992 Pentium 32 32/16/8 3,100,000
1995 Pentium Pro 32 32/16/8 5,500,000
1997 Pentium II 32 32/16/8 7,500,000
1999 Pentium III 32 32/16/8 9,500,000
2001 Pentium 4 32 32/16/8 42,000,000
2004 Pentium 4 EM64T 64 32/16/8 125,000,000
2008 Core 2 Quad 64 32/16/8 820,000,000
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.
EAX
Intel Architecture IA-32Intel Architecture IA-32
General-Purpose Registers (GPRs)
Segment Registers
Segmented Memory Addressing(Real Mode)
ALAX EAX AX AL
EBX BX BL
ECX CX CL
EDX DX DL
ESI SI
EDI DI
“Base”
“Count”
CS
SS
DS
“Division”
“String Source”
“String Destination”
Also:“Accumulator”
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Intel Architecture IA-32Intel Architecture IA-32
Variable Length Instruction Format
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Princess Sumaya University 22343 – Computer Organization & DesignPrincess Sumaya University 22343 – Computer Organization & Design Computer Computer Engineering Dept.Engineering Dept.Chapter 2Chapter 2