presentation with right format

8/10/2019 presentation with right format

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Shri shankaracharya Engineering

College


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VLSI began in 1970s when complex semiconductor and

communication technologies were being developed.

The first integrated circuits held only a few devices, perhaps as many

as ten diodes, transistors, resistors and capacitors, making it

possible to fabricate one or more logic gates on a single device.

Current technology has moved far past this mark and

today's microprocessors have many millions of gates and billions of

individual transistors.

The vlsi is designed by using the MOORES LAW.A notable example is NVidia's 280 series GPU. This GPU is unique in

the fact that almost all of its 1.4 billion transistors are used for logic,

in contrast to the Itanium, whose large transistor count is largely due

to its 24 MB L3 cache.

Current designs, as opposed to the earliest devices, useextensive design automation and automated logic synthesis to lay

out the transistors, enabling higher levels of complexity in the

resulting logic functionality.

VLSI technology is moving towards radical level miniaturization with

introduction of NEMS (NANOELECTROMECHANICAL SYSTEM)

technology.


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Moore's law

Moore's law describes a long-term trend in the history of

computing hardware whereby the number of transistors that

can be placed inexpensively on an integrated circuit doublesapproximately every two years.

The capabilities of many digital electronic devices are strongly

linked to Moore's law: processing speed, memory capacity,

sensors and even the number and size of pixels in digital

cameras.Moore's law describes a driving force of technological and social

change in the late 20th and early 21st centuries.


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FEATURES

ASIC and FPGA design flow Advanced digital design

methodologies

HDL based design methodologiesSynthesis coding styles

Place and Route - HDL based design

Static Timing Analysis

APPLICATIONS OF VLSI:

1. DSP

2. Communications

3. Microwave and RF

4. MEMS5. Cryptography.

6. Consumer Electronics

7. Automobiles

8. Space Applications


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CHALLENGES:As microprocessors become more complex due to technology scaling,

microprocessor designers have encountered several challenges which force

them to think beyond the design plane, and look ahead to post-silicon:

Power usage/Heat dissipationAs threshold voltages have ceased to scale

with advancing process technology, dynamic power dissipation has not

scaled proportionally. Maintaining logic complexity when scaling the design

down only means that the power dissipation per area will go up. This has

given rise to techniques such as dynamic voltage and frequency

scaling (DVFS) to minimize overall power.

Process variationAs photolithography techniques tend closer to the

fundamental laws of optics, achieving high accuracy in doping

concentrations and etched wires is becoming more difficult and prone toerrors due to variation. Designers now must simulate across multiple

fabrication process corners before a chip is certified ready for production.

Stricter design rulesDue to lithography and etch issues with

scaling, design rules for layout have become increasingly stringent.

Designers must keep ever more of these rules in mind while laying out

custom circuits. The overhead for custom design is now reaching a tipping

point, with many design houses opting to switch to electronic designautomation (EDA) tools to automate their design process.

Timing/design closureAs clock frequencies tend to scale up, designers

are finding it more difficult to distribute and maintain low clock

skew between these high frequency clocks across the entire chip. This has

led to a rising interest in multicore and multiprocessor architectures, since

an overall speedup can be obtained by lowering the clock frequency anddistributing processing.


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VLSI DESIGN:

VLSI chiefly comprises of Front End Design and Back

End design these days. While front end design includes

digital design using HDL, design verification throughsimulation and other verification techniques, the design

from gates and design for testability, backend design

comprises of CMOS library design and its

characterization.

It also covers the physical design and fault simulation. While Simple logic gates might be considered as SSI

devices and multiplexers and parity encoders as MSI,

the world of VLSI is much more diverse.

Generally, the entire design procedure follows a step bystep approach in which each design step is followed by

simulation before actually being put onto the hardware

or moving on to the next step.

The major design steps are different levels of

abstractions of the device as a whole:


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ARCHITECTURE DEFINITION:

Basic specifications like Floating point units,

which system to use, like RISC (Reduced

Instruction Set Computer) or CISC (ComplexInstruction Set Computer), number of ALUs cache

size etc.


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LOGIC DESIGN:

The actual logic is developed at this level. Boolean

expressions, control flow, word width, register allocation etc.

are developed and the outcome is called a Register TransferLevel (RTL) description. This part is implemented either with

Hardware Descriptive Languages like VHDL and/or Verilog.

Gate minimization techniques are employed to find the

simplest, or rather the smallest most effective

implementation of the logic.


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CIRCUIT DESIGN:

While the logic design gives the simplified implementation of the logic,

the realization of the circuit in the form of a netlist is done in this step.

Gates, transistors and interconnects are put in place to make a netlist. This again is a software step and the outcome is checked via

simulation.


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PHYSICAL DESIGN

The conversion of the netlist into its geometrical representation is

done in this step and the result is called a layout.

This step follows some predefined fixed rules like the lambda rules

which provide the exact details of the size, ratio and spacing

between components.

This step is further divided into sub-steps which are:

Circuit Partitioning:

Because of the huge number of transistors involved, it is not

possible to handle the entire circuit all at once due to limitations

on computational capabilities and memory requirements.Hence the whole circuit is broken down into blocks which are

interconnected.

Floor Planning and Placement:

Choosing the best layout for each block from partitioning step and

the overall chip, considering the interconnect area between the

blocks, the exact positioning on the chip in order to minimize thearea arrangement while meeting the performance constraints

through iterative approach are the major design steps taken care

of in this step.


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Routing:

The quality of placement becomes evident only after

this step is completed. Routing involves the

completion of the interconnections between

modules. This is completed in two steps.

First connections are completed between blocks

without taking into consideration the exact geometric

details of each wire and pin.

Then, a detailed routing step completes point to point

connections between pins on the blocks.

Layout Compaction:

The smaller the chip size can get, the better it is.

The compression of the layout from all directions to

minimize the chip area thereby reducing wire lengths,

signal delays and overall cost takes place in this

design step.

Extraction and Verification:

The circuit is extracted from the layout for

comparison with the original netlist, performance

verification, and reliability verification and to check

the correctness of the layout is done before the finalstep of packaging


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PACKAGING:

The chips are put together on a Printed Circuit

Board or a Multi Chip Module to obtain the finalfinished product.


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VHDL: VHDL stands for very high-speed integrated circuit hardware description

language. Which is one of the programming language used to model a

digital system by dataflow, behavioural and structural style of modeling.

This language was first introduced in 1981 for the department ofDefense (DoD) under the VHSIC programme. In 1983 IBM, Texas

instruments and Intermetrics started to develop this language. In 1985

VHDL 7.2 version was released. In 1987 IEEE standardized the language

VERILOG:

In the semiconductor and electronic design industry, Verilog is

a hardware description language (HDL) used to model electronic

systems.

Veri log HDL , not to be confused with VHDL (a competing language), ismost commonly used in the design, verification, and implementation

of digital logic chips at the register-transfer level of abstraction.

It is also used in the verification of analog and mixed-signal circuits.

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