1 1 Practical Power Application Issues for Switch-Mode Power Supplies Fairchild Power Seminar 2006 2 Agenda • Stability of Synchronous Buck Converters: How to Design the Compensation Network • What Non-Magnetics Designers Need to Know About Transformers
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Practical Power Application Issues for Switch-Mode Power Supplies
Fairchild Power Seminar 2006
2
Agenda
• Stability of Synchronous Buck Converters: How to Design the Compensation Network
• What Non-Magnetics Designers Need to Know About Transformers
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3
Stability of Synchronous Buck Converters: How to Design the Compensation Network
4
Part No. DescriptionMax
Io (A)Vin,op
(V)Vout(V)
Tj,op(ºC)
Fsw (kHz)
Control Mode
Compen-sation
Typ Drv Zout (Ω) Packages
Design Tools
FAN5182 + FAN5009
1 to 3-phase controller w/external drivers
90 10.8 to 13.2 0.8 to 5 0 to 125 200-1000 /phase
I-mode external 1.4 to 3.8 QSOP-20, SOIC/MLP-8
FAN6520A 8-pin PWM controller + drivers
30 4.5 to 5.5 0.8V to Vin -40 to 125 300 V-mode external 1.0 to 2.5 SOIC-8 AN-6009
FAN5069 PWM + LDO controller 30 3 to 24 0.8 to 15 -40 to 125 200-600 Summing I-mode
external 1.2 to 1.8 TSSOP-16 AN-6010
FAN5234 PWM/PFM Controller + drivers
15 2 to 24, 4.75 to 5.25
0.9 to 5.5 -10 to 150 300/600 Avg I-mode /hysteretic
internal 1.5 to 8 TSSOP-16, QSOP-16
AN-6002
FAN5236 Dual PWM/PFM Controller + drivers
15 ea. 3 to 24, 4.75 to 5.25
0.9 to 5.5 -10 to 150 300 Avg I-mode /hysteretic
internal 1.2 to 12 TSSOP-28, QSOP-28
AN-6002
FAN5026 Dual PWM Controller + drivers
15 ea. 3 to 24, 4.75 to 5.25
0.9 to 5.5 -40 to 150 300 AverageI-mode
internal 1.2 to 12 TSSOP-28 AN-6002
FAN2011/12 Integrated 1.5A synchronous buck
1.5 4.5 to 5.5 0.8V to Vin -40 to 150 1300 I-mode internal 95% max efficiency
3x3 mm MLP-6
AN-6011
FAN2001/02 Integrated 1A synchronous buck
1 2.5 to 5.5 0.8V to Vin -40 to 150 1300 / PFM
I-mode internal 96% max efficiency
3x3 mm MLP-6
FB
FAN6520A
VCC
+VOUT
Q2
COMP/OCSET RS
GND
LDRV
SW
HDRV
BOOT
5
3
4
8
2
1
67
Q1 CHF
ROFFSET
ROCSET
CFRF
CI
CBOOT
DBOOT
CBULK
CVCC
+5V
LOUT
COUT
MLP
SOIC
TSSOP
QSOP
Fairchild General Purpose Switching Regulators
3
5
Driver
Lo
Osc
Ri
Current FeedbackTransresistance
PWM Comparator
+
-
OUT
Vm
Driver
Vout
Co
ESR
RLOAD
Vin
Type 3 Error Amp +
-
OUTVref
R1
C1
VcompRbias
R2
C2
R3 C3
Synchronous Buck with Summing Current-Mode Control
6
Voltage Loop Gain Components
OutputVoltage
Gvd(s)
Gvc(s)GpwmGc(s)+
-DesiredVoltage
dVe Vc Vo
Ic
There are four elements in the output-voltage control loop:
• Subtractor element, which generates an error signal by subtracting the desired voltage from the output voltage
• Compensator element Gc(s), added by the designer to stabilize the loop and improve the loop performance
• PWM element Gpwm which defines the relationship between the compensator output signal and the duty cycle/current-mode control current (a constant)
• Control-to-output transfer function Gvd(s) or Gvc(s)
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7
G M
-180
0 dB
|T|
/ T
P M
High gain @low frequency
Wide bandwidth
-20db/dec
Gain Margin
Phase Margin
High Gain at Low Frequency
Wide Bandwidth
Desired Loop Gain Characteristics
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• Bandwidth • Related to the speed of transient response
• Phase Margin • Related to the damping of the system• Low PM causes oscillatory transient response
• Gain Margin • Gain is changed according to the variation of circuit components• Related to robustness against gain variation
Stability Terms
5
9
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
1.E+03 1.E+04 1.E+05
Frequency (Hz)
Gai
n (d
B)
0
i
Lo1p M
MRC2
1f ⋅⋅⋅π⋅
≈
i
v
Lo2p M
MR/L2
1f ⋅⋅π⋅
≈
ESRC21fo
z ⋅⋅π⋅=
-40 dB / decade
-20 dB / decade
-20 dB / decade
(dB)M0
v
0
L
Loo
2
i
0Lo
v
0
L
o
o0
MM
RESRRCLsESR
MMRC
MM
RLs1
ESRCs1M)s(M⋅
+⋅⋅⋅+⎥
⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛+⋅⋅+⋅⋅+
⋅⋅+⋅=
Open Loop System Gain
10
Type 1: Single pole - no phase boost
Type 2: Two poles, 1 zero - up to 90 degrees
Type 3: Three poles, 2 zeros - up to 180 degrees
The key task of the feedback amplifier’s compensation function is to boost the loop gain and phase to raise the crossover frequency (for better transient response) while maintaining adequate stability margins. The compensator type is determined by the amount of phase boost needed at the crossover frequency:
Compensator Types
6
11 -60
-40
-20
0
20
40
60
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Frequency (Hz)
Gai
n (d
B)
-135
-90
-45
0
45
90
135
Phas
e (d
egre
es)
Gain Phase
-20 dB / decade
-20 dB / decade)CC(R2
1f211
gain_unity +⋅⋅π⋅=
21
212
pole
CCCCR2
1f
+⋅
⋅⋅π⋅=
12zero CR2
1f⋅⋅π⋅
=
1
2
RRlog20 ⋅
Phase boost(up to 90º in theory,75º in practice)
Type 2 Error Amp+
-
OUT
R1
Vref
C1
Vcomp
Vout
Rbias
R2
C2Type 2 Compensator
12
Type 3 Compensator
-60
-40
-20
0
20
40
60
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Frequency (Hz)
Gai
n (d
B)
-135
-90
-45
0
45
90
135
Gain Phase
)CC(R21f
211gain_unity +⋅⋅π⋅
=21
212
2pole
331pole
CCCCR2
1f
RC21f
+⋅
⋅⋅π⋅==
⋅⋅π⋅=
( )3132zero
211zero RRC2
1fRC2
1f+⋅⋅π⋅
==⋅⋅π⋅
=
1
2
RRlog20 ⋅
Phase boost (up to 180º in theory, 160º in practice)
Type 3 Error Amp+
-
OUT
R1
Vref
C1
VcompRbias
R2
C2
R3
Vout
C3
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13
• A method to calculate the compensation circuit values from the amount of phase boost needed at the crossover frequency(1)
• Uses Venable’s K-factor:
• For a Type 3 compensator, this places both poles at the same frequency and both zeros at the same frequency, which maximizes the gain below crossover and minimizes it above crossover. (We will modify this later)
(1) Venable, H. Dean, "The K Factor: A New Mathematical Tool for Stability Analysis and Synthesis;' Proceedings of Powercon 10, March 1983. (Also “Optimum Feedback Amplifier Design …” from http://www.venable.biz/.)
⎟⎠⎞
⎜⎝⎛ °+
ϕ= 45
4tanK boost2
Venable K-Factor Calculation
14
-100
-80
-60
-40
-20
0
20
40
60
80
100
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Frequency (Hz)
Gai
n (d
B) Open-Loop Error Amp
Type 3 Compensator Overall Converter Modulator + Filter
Gain-bandwidth product
Converter bandwidth (BW)
Pole due to load & output capacitance
Pole due to inductor Zero due to ESR &
output capacitance
Error Amp
DC Gain
KBW KBW ⋅
Final Loop Gain with Type 3 Compensator
8
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• Excel-Based Components Calculator• Output Filter L and C• Input filter capacitor ripple current• Various external R's and C's to set:
• PSPICE modelTests loop stability and transient response from the values chosen as a result of the calculations from the Excel spreadsheet above.• Runs in student PSPICE version (free distribution from Cadence) • Continuous time model : Excellent correlation with both switching
model and lab results• Runs fast. Allowing iterative compensation design
Step Tab Input Output1 OutputFilter System requirements:
VIN, VOUT, IOUT(MAX)
Output filter L and C
2 Main Sheet RDS(ON) of MOSFETs, Start-up ramp, etc
External R's and C's
3 Compensation From Main Sheet and OutputFilter
Compensation components
4 InputFilter From OutputFilter. Calculates RMS ripple requirement for input filter cap.
Bode Plot Examine small signal stability on this tab
Compensation
Bode Plot
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Parameter: Value Units CommentsRL (load resistance) = VOUT / IMAX 0.075 ohm Use this value for Loop Bandwidth 38 KHz. Default is FSW/8.Compensator Type Synthesized
ValuesUser
ValuesBode plot uses synthesized
C1 = 373 390 pFC2 = 93 100 pFC3 = 1,524 1,500 pFR1 = 4.990 4.990 KΩ Do not modify heR2 = 25.47 25.47 KΩR3 = 1.243 1.243 KΩRBIAS 5.703 5.703 KΩ Do not modify hePhase Margin 76° 75°
Components calculated by this sheet (figure 24 in FAN5069 data
sheet)
These component-value calculations are based on Venable’s K-Factor method, modified to guarantee minimum phase margins of 60º at crossover & 45º at lower frequencies.
Values may be overwritten and results examined on the Bode plot.
Compensation Worksheet
18
-30-20-10
0102030405060708090
100110120130140150160170
1 10 100 1,000 10,000 100,000 1,000,000f(Hz)
dB o
r deg
rees
Magnitude: Synthesized components Magnitude: User ComponentsPhase margin: Synthesized ComponentsPhase Margin: User Components
Synthesized Bandwidth is 36.3 KHz.
User Phase Margin is 75°
User Bandwidth is 33.1 KHz.
Synthesized Phase Margin is 76°
Loop Gain Bode Plot
Phase Margin
10
19
CXCX
In
0 0
Notes:(1) Reset RLoad to desired value when switchingbetween AC sweep and transient simulation.(2) For more accurate AC sweep, descend into U1and set Esampling XFORM to 1+s/(wn*Qz)+(s/wn)**2.(3) For transient analysis, set XFORM to 1.
• Determine safety agency requirements: • Use yellow polyester film tape; space terminations properly …
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Techniques to Reduce Stray Effects
• Leakage Inductance:• Lowest for adjacent, thin windings (tighter coupling)
• Eddy current losses (skin & proximity effects):
• Split the primary
• Limit conductor thickness to approx. 2 “skin depths” δ
• At 100 kHz & 80ºC, maximum wire diameter is just 0.46 mm!
• Stray capacitance noise coupling:• Use shield(s)
mm23.0S/m)10t)(4.8-A-Wb/m104)(kHz100(
1177
Cu0sw
=−××
== −ππσμπδ
f
20
39
B-H Loop before gapping B-H Loop after gapping
Gapping of the magnetic core along the flux path causes a “shearing over”of the effective B-H loop (really the Φ-ℱ loop), which lowers the effective permeability and allows unsaturated operation at higher bias operating levels.
g0
g
mm
m
g0
g
L
LgLg2
Aμl
Aμl
1Aμl
A1
1A,ANL
+=
+==
lm
lg
The Gap
[Source: CoEv Magnetics]
40
Design for a “Reasonable” Gap
Fringing Flux
• If possible, use “standard” gap from core manufacturer
• Target between 0.2 & 1.5 mm
• Use spacer (“fish”) paper for prototyping
• Set final gap by measuring inductance
• For production, center leg is typically ground shorter
[Source: CoEv Magnetics]
21
41
Regulatory Jargon
• Safety agencies: VDE, UL, TUV, etc.
• Grade of Insulation System: • Functional, Basic, Supplementary, Reinforced
Without a magnetics specialist, you can do it yourself
(but it can be tricky)
Each approach has advantages:
• Do-it-yourself
• Faster prototyping & debug
• You know & control the design
• Outside expert
• Easy to find & use (ask your distributor)
• Usually can do a better job: smaller, cheaper, more
manufacturable, passes safety agencies
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The pdf version of the Power Seminar presentations are available on the our external website. To access or download the pdfs, please visit www.fairchildsemi.com/power/pwrsem2006.html
For product datasheets, please visit www.fairchildsemi.com
For application notes, please visit www.fairchildsemi.com/apnotes
For application block diagrams, please visit www.fairchildsemi.com/markets
For design tools, please visit the design center at www.fairchildsemi.com
For PSPICE models, please visit http://www.fairchildsemi.com/models/PSPICE/Discrete/index.html
For SMPS design tool, please visit http://www.fairchildsemi.com/whats_new/offline_smps_toolkit.html
Some of this content is presented with permission from CoEv Magnetics, a division of Tyco Electronics, www.tycopowercomponents.com/magnetics.asp