Power Integrity Guidelines Samtec PET/PES Series Connector ...cloud.samtec.com/ruggedpowerintegrity/PET-PES_PowerFI_empirical...PET/PES Power Integrity Guidelines Measurements •
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• The PES/PET Power Integrity test and evaluation system is comprised of two test boards connected together by dual PES/PET connectors
• This board set is designed for the precision measurement of contact, breakout, via, and plane spreading resistance, as encountered in realistic system applications.
• The PES/PET Power Integrity test and evaluation system is designed to facilitate measurements from a precision Milli-Ohm meter, such as an Instek GOM-802, utilizing Kelvin 4-wire probe techniques.
PET/PES Power Integrity GuidelinesVia/Trace Overlap Model Approximation
– Model as a trace and then scale for surface area lost.– Assume that negligible current flows on far side of via trace.
• This assumption is confirmed by 3D finite element simulation.• Resistance of Trace = Resistivity x length/Area• Surface Area of Trace = Via Inner Diameter x Via Pad Diameter / 2• Surface Area of Via Hole = π x Via Diameter 2 / 2• Scale Factor = (Surface Area of Trace – Surface Area of Via Hole) / Surface Area of Trace
PET/PES Power Integrity Guidelines Via Resistance Calculation
• The resistance of a via can be approximated by calculating the resistance of the equivalent rectangular volume described by the following: – Via Resistance = Resistivity x Length of Via / Area of Via Plating– Area = pi x (Inner diameter + Plating thickness) x Plating
thickness– Resistivity of Copper = 1.7e-6 Ω-cm (.67e-6 Ω-in)
• For a 52 mil via hole 62 mils long with 2 mil plating• Via Resistance = .67E-6 x .062 / π x (.052 + .002) x .002• Via Resistance = 122 µΩ
PET/PES Power Integrity GuidelinesVia-to-Via Trace Resistance Calculation
• The resistance of a trace can be calculated by the following standard formula:– Trace Resistance = Resistivity x Length of trace / Area of trace– Area = Trace Width x Total Thickness (copper + plating)– Resistivity of Copper = 1.7e-6 Ω-cm (.67e-6 Ω-in)
• For a 48 mil long trace, 90 mil wide, with 2 mil thickness• Trace Resistance = .67E-6 x .048 / (.090 x .002)• Trace Resistance = 179 µΩ
PET/PES Power Integrity GuidelinesTest Point-to-Via Trace Resistance Calculation
• The resistance of a trace can be calculated by the following standard formula:– Trace Resistance = Resistivity x Length of trace / Area of trace– Area = Trace Width x Total Thickness (copper + plating)– Resistivity of Copper = 1.7e-6 Ω-cm (.67e-6 Ω-in)
• For a 143 mil long trace, 65 mil wide, with 2 mil thickness• Trace Resistance = .67E-6 x .123 / (.090 x .002)• Trace Resistance = 458 µΩ
PET/PES Power Integrity GuidelinesVia/Trace Overlap Resistance Calculation
• The resistance of a trace can be calculated by the following standard formula:– Trace Resistance = Resistivity x Length of trace / Area of trace– Area = Trace Width x Total Thickness (copper + plating)– Resistivity of Copper = 1.7e-6 Ω-cm (.67e-6 Ω-in)
• For a 26 mil long trace, 90 mil wide, with 2 mil thickness• Trace Resistance = .67E-6 x .026 / (.090 x .002)• Trace Resistance = 97 µΩ• Surface Area of Trace = .052 x .090/2 = 2.34e-3• Surface Area of Via Hole = π x (.052/2) 2 /2 = 1.062e-3• Scale Factor = (2.34e-3 - 1.062e-3) / 2.34e-3 = .546• Resistance = 178 µΩ
PET/PES Power Integrity GuidelinesVia Array Resistance Measurements
159 µΩ
Ansoft Extracted Via Barrel
Resistance
510 µΩ
Average Linear Via
Interconnect Resistance
351 µΩ
Residual non-Via
Interconnect Resistance
19.38 mΩ (19.9 by hand)21.9 mΩ52 mil
40 Via Resistance Simulated
Ansoft SIWave
40 Via ResistanceMeasured
Via
Linear Via Interconnect Resistance – the resistance of the via barrel, pad and connecting trace, calculated by removing the test trace resistance from the 40 via measured resistance and dividing by 40.
Via Barrel Resistance – the resistance of the via barrel by itself.
Residual non-via interconnect resistance – the resistance of the pad and connecting trace for one via, calculated by subtracting the barrel resistance from the linear resistance.
PET/PES Power Integrity GuidelinesDaisy Chained Resistance Test
• The chained resistance test provides a reasonable estimate of the total mounted contact resistance for a connector that is mounted to small fill areas of limited size.
– Most interconnect resistance can be calculated using trace resistance calculations. (see slides 10-17)
• Resistance of Trace = Resistivity x length/Area
– Mounted contact resistance (one mated contact), for the direct connect case, can be estimated from the previous slide as 500 µΩ maximum, if we assume that the connector contact resistance is at it’s upper limit of 440 µΩ.
• At rated current of 35.9A for a 30C temperature rise, this would amount to a voltage drop across the connector of 17.95 mV, and a total power dissipation of 644 mW per mated contact.
– Mounted contact resistance (one mated contact), for the Thermal Spoke connect case, can be estimated from the previous slide as 590 µΩ maximum, if we assume that the connector contact resistance is at it’s upper limit of 440 µΩ.
• At rated current of 35.9A for a 30C temperature rise, this would amount to a voltage drop across the connector of 21.2 mV, and a total power dissipation of 760 mW per mated contact.
PET/PES Power Integrity GuidelinesDirect Plane Attach Resistance Test (1 contact)
• The direct plane attach resistance test provides a reasonable estimate of the total mounted contact resistance for a connector that is mounted through vias on large planes.– Resistance of plane spreading resistance and attachments
dominates the total resistance.– Measurement uncertainty, due to difficult test probes and points,
is larger than actual contact resistance.• Since attach and plane spreading resistance dominates, this is not an
issue.
– For multiple contact power systems the focus needs to be on the resistive loss through the planes.
PET/PES Power Integrity GuidelinesPowering Multiple Contacts
• When multiple contacts on a power connector system are used, power delivery is mostly accomplished by one or multiple planes within a PCB.– Plane attach resistance measurements and simulations from the
previous section apply ONLY to the case where one contact is powered from a given plane, with no current path sharing to other contacts.
• When multiple contacts are powered from the same plane, current path sharing increases the resistance seen through each contact.
• Because of this, it is necessary to either de-rate the resistance, or to simulate this with appropriate software that can model DC drop.
Connector connections to planes experience current sharing, which increases the path resistance to each contact. As more contacts are added, this additional resistive loss must be accounted for, either through measurement or simulation.
Connectors placed at the edge of a PCB exhibit current starvation on the outside edge of the board, because the current required for all connector contacts must be diverted around the edge and share the same path. Current densities become higher in these cases.
PET/PES Power Integrity GuidelinesCurrent and Voltage Gradient (Seven Contacts Excited)
PET/PES Power Integrity GuidelinesThermal Spoke Connection through 2 mil Cu Plane Voltage Drop vs. Current
Plane spreading resistance and current path sharing dominate the voltage drop through the PES/PET system.
This plot represents a one-way current path from one board to another through PES/PET mated connectors. Total voltage drop for a ground and power system would incorporate a round-trip current loop, and would be double the total voltage drop from these curves.
PES/PET Thermal Spoke Attach Through 2 mil Cu PlaneVoltage Drop vs. Current