Power Adaptive Computing System De Power Adaptive Computing System De Qi Li 1 J W L 2 T Qiang Liu 1 , Jun Wen Luo 2 , Terr 1 Department of Comp t 1 Department of Comput 2 School of Electrical Electronic and C 2 School of Electrical, Electronic and C 1It d ti dM ti ti 1It d ti dM ti ti For the power adaptive sy 1. Introduction and Motivation 1. Introduction and Motivation For the power adaptive sy dynamic power consumption m dynamic power consumption m Traditional energy storage system has the drawback that 1 can not working in long time due to the limitation of battery f C V P 2 1 can not working in long time due to the limitation of battery or ultra capacitors With advances in energy harvesting f C V P ower 2 or ultra capacitors. With advances in energy harvesting t it i ibl t i l t lf d t system, it is possible to implement a self – powered system The system works as follows: that harvests ambient energy from environment such as The system works as follows: solar vibration and wind Such energy harvesting system solar, vibration and wind. Such energy harvesting system provides a promising alternative to battery powered system provides a promising alternative to battery powered system d t t it f hit t d d i and creates an opportunity for architecture and design method innovation for the exploitation of ambient energy source source. In this poster, we present a new approach to develop In this poster, we present a new approach to develop power adaptive computing system which can efficiently use power adaptive computing system which can efficiently use energy harvesting from ambient source and the highlights energy harvesting from ambient source, and the highlights are: t t ti i ti h f d i i • a two stage optimization approach for designing power adaptive systems. • a custom convex model used at run – time to determine clock gating schemes, adjusting system power clock gating schemes, adjusting system power consumption to instant power supplied from a solar consumption to instant power supplied from a solar harvester harvester . Figure 4: A power adaptive en Figure 4: A power adaptive en i Gl b l i ll td 2 Research hypothesis and Objective 2 Research hypothesis and Objective i. Global memories collected 2. Research hypothesis and Objective 2. Research hypothesis and Objective ii The system controller sen ii. The system controller sen and run time optimizer to br and run –time optimizer to br iii The estimator estimates iii. The estimator estimates minutes and optimizer deter minutes and optimizer deter h b d th ti scheme based on the estima iv The computing system iv. The computing system t ll ti dt t controllers triggers data trans Figure 1 : The energy harvesting system. It consists of six major components to ensure a robust and stable system i When finish the computin major components to ensure a robust and stable system performance i. When finish the computin sends back a signal and aga performance. sends back a signal and aga 900 1000 900 1000 E H t 3Mthdl d 3Mthdl d 700 800 700 800 • Energy Harvester 3. Methodology and 3. Methodology and 600 700 W/m 2 ) 600 700 W/m 2 ) The solar panel results from 3. Methodology and 3. Methodology and 400 500 Power (W 400 500 Power (W The solar panel results from harvesting the sun radiation To To develop develop and and manage manage t 300 300 harvesting the sun radiation 22/10/2010 To To develop develop and and manage manage t adaptive adaptive system system we we propo propo 100 200 100 200 on 22/10/2010. adaptive adaptive system, system, we we propo propo ti i ti ti i ti h 0 100 200 300 400 500 600 700 800 900 1000 0 Time (minute) 0 100 200 300 400 500 600 700 800 900 1000 0 Time (minute) optimization optimization approach approach. 10 X: 4927 Y: 9.796 0.4kW/m 2 0 6kW/m 2 10 X: 4927 Y: 9.796 0.4kW/m 2 0 6kW/m 2 D i ll l • MPPT 8 9 0.6kW/m 0.8kW/m 2 1kW/m 2 8 9 X: 4924 Y: 7.827 0.6kW/m 0.8kW/m 2 1kW/m 2 Design a parallel com f 6 7 6 7 X: 4910 Y: 5.862 applications with expl The figure shows that the 5 Power(W) X: 4894 5 Power(W) X: 4894 applications with expl l i li i d l maximum power points 3 4 Y: 3.899 3 4 Y: 3.899 loop pipelining and loo change as solar insolation 2 2 changes. 0 1000 2000 3000 4000 5000 6000 0 1 Voltage(mV) 0 1000 2000 3000 4000 5000 6000 0 1 Voltage(mV) Voltage(mV) Voltage(mV) Design the Run – time Design the Run time t d For power prediction we employ a method based on system power mode For power prediction, we employ a method based on i ht d f th hi t i l d i optimizer weighted sum of the historical average and previous optimizer . day’ s values. The results are shown as follows: •Design Design-time time optimization optimization 1000 1000 Design Design-time time optimization optimization 900 1000 900 1000 Actuall energy source Esitmator performace(Best) Esitmator performance (worst ) The objective is to minimize 800 800 The objective is to minimize The design optimization proble 700 700 The design optimization proble 500 600 gy( W) 500 600 gy( W) 400 500 Energ 400 500 Energ min min ii k ( T 300 300 min min ii , k , ( T 200 200 0 100 0 100 subject subject to to i , k , ( R 2000 3000 4000 5000 6000 7000 8000 0 Time (min) 2000 3000 4000 5000 6000 7000 8000 0 Time (min) subject subject to to mem i , k , ( R Figure 2: The estimator performance , k , ( R comp , k , ( R It can be seen the prediction accuracy is depended on the This stage decides the compu sample length time, weight value and change rate of This stage decides the compu d H thi k sample length time, weight value and change rate of weather Here is the relationship between prediction speed. However, this peak weather . Here is the relationship between prediction (MAPE) d th h t achievable due to the chan accuracy (MAPE) and throughput. energy harvesting environmen energy harvesting environmen 0.6 System with controller 0.6 System with controller 0.5 System without controller 0.5 System without controller • Run Run-time time optimization optimization 0.4 (%) 0.4 (%) 0.3 ficiency( 0.3 ficiency( 1) 1) power power model model: For the pa 0.2 Eff 0.2 Eff derived in the previous s derived in the previous s consumption variation wit 0.1 0.1 consumption variation wit 0.65 0.7 0.75 0.8 0.85 0.9 0 MAPE 0.65 0.7 0.75 0.8 0.85 0.9 0 MAPE schemes can be expressed i MAPE MAPE Fi 3 Th l ti hi bt MAPE d th h t P P P Figure 3: The relationship between MAPE and throughput pu const c P m P P pu const c Wh th fi t t i 6.5 System with controller System without controller 6.5 System with controller System without controller • Energy Storage Where the first part is sys 6 6 Energy Storage single work unit consumptio 5.5 ut 5.5 ut The design should obey different clock gating scheme 5 Throughpu 5 Throughpu energy neutral operation, different clock gating scheme 4.5 4.5 which ensures a nominal 4 4 system operation principle. 150 200 250 300 350 400 3.5 Battery Capacity 150 200 250 300 350 400 3.5 Battery Capacity system operation principle. Battery Capacity Battery Capacity esign in Energy Harvesting Environment esign in Energy Harvesting Environment Mk 2 W Lk 1 Al Yk l 2 rence Mak 2 , Wayne Luk 1 , Alex Yakovlev 2 ting Imperial College London UK ting, Imperial College London, UK Computer Engineering Newcastle University UK Computer Engineering, Newcastle University, UK ystem (Figure 4) a typical 2 ) Customized optimization model: 2 ) Customized optimization model: ystem (Figure 4), a typical model for CMOS circuits is 2 ) Customized optimization model: 2 ) Customized optimization model: model for CMOS circuits is A simplified optimization problem is customized from A simplified optimization problem is customized from the previous constraints and shown below: the previous constraints and shown below: min min ) m ( T ) m ( T ) m ( T t ) 1 v ( i min min ) m ( T ) m ( T ) m ( T t ) 1 v ( out comp in Subject to max Subject to max t )) m ( T ), m ( T ), m ( T ( t i Subject to max Subject to max t )) m ( T ), m ( T ), m ( T ( out comp in P ) m ( P P ) m ( P s c 1 K 1 K m 1 1 1 v m L 1 v m L This customized optimization model can be transformed This customized optimization model can be transformed f into a convex model, leading to an optimal and fast solution. For the test applications, the system speed is solution. For the test applications, the system speed is maximum while the system power consumption is not maximum while the system power consumption is not greater than the supplier power greater than the supplier power . 4 Results and Discussion 4. Results and Discussion nabled computing system In our experiments the power adaptive system is nabled computing system In our experiments ,the power adaptive system is l td h d l tf h i Fi 5 Th evaluated on a hardware platform shown in Fig. 5. The dt d t d power estimator and system controller are on a data and stored. ARM926EJ-S processor running at 160MHz and having ARM926EJ S processor running at 160MHz and having 64MByte SDRAMs while computation system is mapped nds signals to the estimator 64MByte SDRAMs, while computation system is mapped t Vi t 5 330t FPGA ith 192 DSP d 324RAM nds signals to the estimator ring them to work onto Virtex5 -330t FPGA with 192 DSP and 324RAM. ring them to work. s power supply in next 5 s power supply in next 5 rmine a proper clock gating rmine a proper clock gating t ator received signals and local received signals and local f d ti sfers and computing ng job the local controller ng job, the local controller in in. Fi 5 E i tl h d l tf Figure 5: Experimental hardware platform d P Three benchmarks are shown: d Programme Programme Three benchmarks are shown: d d Programme Programme he he above above described described power power he he above above described described power power ose ose a two two stage stage design design ose ose a two two – stage stage design design ti t f mputing system for loitation of data use loitation of data use, ll li i Fi 6 Mti lti li ti op parallelization Figure 6: Matrix multiplication e optimization: a) a e optimization: a) a l d b) f t el and b) a fast e the system execution time Figure 6: K – means clustering algorithm e the system execution time. em is the following: em is the following: ) i ) i s Re ) ii ram s Re ) ii s Re ) ii , comp s Re ) ii , Figure 8: Sobel edge detection utation structure with the peak Figure 8: Sobel edge detection utation structure with the peak d t b l In addition, we also compare two different approaches to speed may not be always In addition, we also compare two different approaches to determine the clock gating scheme: nging power supplier in the determine the clock gating scheme: nt nt. arallel computation structure section the system power section, the system power th different clock gating th different clock gating n a model as: C 5. Conclusion and Future work 5. Conclusion and Future work We present a two-stage optimization approach for We present a two stage optimization approach for designing power adaptive computing systems applied in t l d PU i designing power adaptive computing systems applied in i t Th i t id t ti stem power loss and PU is a environments. The purpose is to provide computation on when experimenting with capability to nodes in distributed sensor work. es m is the number of units Ft k i ld i i ffi i d d i es , m is the number of units. Future work includes improving efficiency and design approach to energy harvesting networks.