May 2015 DocID027783 Rev 1 1/31 31 AN4687 Application note PoE synchronous flyback, IEEE802.3at compliant, 3.3 V - 6 A PD converter based on the PM8803 controller Roberto Baragetti Introduction This document describes a reference design for a PoE+, high efficiency, 3.3 V - 6 A flyback converter based on the PM8803 PoE controller. The PM8803 is highly integrated device embedding an IEEE802.3at compliant “Powered Device” (PD) interface together with a PWM controller and support for auxiliary sources. The STEVAL-TSP009V2 reference design is based on an isolated flyback topology CCM converter with synchronous rectification and gate driver transformer. The same PCB can be populated in different ways to support various configurations and topologies (flyback with diode rectification, synchronous flyback with or without active clamp, self-driven synchronous flyback). Figure 1. STEVAL-TSP009V2 evaluation board photo www.st.com
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May 2015 DocID027783 Rev 1 1/31
31
AN4687Application note
PoE synchronous flyback, IEEE802.3at compliant, 3.3 V - 6 A PDconverter based on the PM8803 controller
Roberto Baragetti
Introduction
This document describes a reference design for a PoE+, high efficiency, 3.3 V - 6 A flyback converter based on the PM8803 PoE controller.
The PM8803 is highly integrated device embedding an IEEE802.3at compliant “Powered Device” (PD) interface together with a PWM controller and support for auxiliary sources.
The STEVAL-TSP009V2 reference design is based on an isolated flyback topology CCM converter with synchronous rectification and gate driver transformer. The same PCB can be populated in different ways to support various configurations and topologies (flyback with diode rectification, synchronous flyback with or without active clamp, self-driven synchronous flyback).
Main characteristics and circuit description AN4687
4/31 DocID027783 Rev 1
1 Main characteristics and circuit description
The main characteristics (reference and electrical specifications) of the converter are listed in Table 1 and Table 2.
This document details the characteristics and performances of the PM8803 evaluation kit STEVAL-TSP009V2, which has been designed to cover a broad range of Power over Ethernet (PoE) applications.
The PM8803 is a highly integrated device embedding an IEEE802.3af/at compliant powered device (PD) interface together with a PWM controller and support for auxiliary sources.
Table 1. Reference
Reference code
Device PM8803
Evaluation board STEVAL-TSP009V2
Table 2. Electrical specification
Parameter Specifications
Input voltage supplies VIN [VDC] From 40 to 60 V
Auxiliary input voltage range From 30 to 60 V
Output voltage VOUT [VDC] 3.3 VDC ±5% at 6 A
Peak to peak output ripple < 25 mVPP
Efficiency DC-DC at full-load > 90%
Efficiency overall at full load > 87%
Transient response ∆VOUTPK to 50% load step < 250 mV
∆VOUT in load line case < 0.5%
GLOOP bandwidth > 4 kHz
GLOOP phase margin at 0 dB > 60 deg.
GLOOP dB margin at 0 deg. > 10 dB
DocID027783 Rev 1 5/31
AN4687 Main characteristics and circuit description
31
Even though PM8803 device can be configured to work in several isolated topologies, self-driven or a transformer gate driven; this application note focuses on a high efficiency isolated flyback converter topology with synchronous rectification, 3.3 V output voltage with 6 A output current capability.
Auxiliary sources can be connected to the board on two different input connectors. One input (AUX II) allows prevalence of the auxiliary sources with respect to the PoE, while the other input ( AUX I ) allows the usage of a wall adaptor with voltage lower than the internal PoE UVLO threshold and still benefits from the inherent inrush and DC current limit.
The possible configurations supported by the PM8803 demonstration kit as options on the same PCB are:
Alternative input bridge rectification: 4 possible options including standard diode bridges, discrete schottky diode bridges, half active bridges and full active bridges; schottky diode bridges are mounted on this eval board.
Optional 4 pairs detection circuit, to detect if power is provided on 2 pairs or on 4 pairs by a high power PSE source; this circuit is not used on this eval board.
Optional booster circuit, to increase the max. input current over 1A; this circuit is not used on this eval board.
Diode or synchronous rectification; 4 package options for the diode and 2 package options for the MOSFET;
Primary side snubber; 3 options included an active clamp; a simple R-C snubber is used on this eval board.
Power transformer; 3 size options for transformer gate driven solutions and 2 size options for self-driven applications.
The bill of material (BOM) in Table 3, provides the list of components to be mounted to obtain a flyback CCM converter with gate transformer driven synchronous rectifier, with 3.3 V output at a 6 A evaluation board.
Schematic and BOM for 3.3 V at 6 A AN4687
6/31 DocID027783 Rev 1
2 Schematic and BOM for 3.3 V at 6 A
2.1 Schematic
Figure 2. STEVAL-TSP009V2 circuit schematic (1 of 2)
R37
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GSPG17042015DI1215
DocID027783 Rev 1 7/31
AN4687 Schematic and BOM for 3.3 V at 6 A
31
Figure 3. STEVAL-TSP009V2 circuit schematic (2 of 2)
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GSPG20042015DI1120
Schematic and BOM for 3.3 V at 6 A AN4687
8/31 DocID027783 Rev 1
2.2 Bill of material
Table 3. STEVAL-TSP009V2 evaluation board BOM
Item Ref. Description Value PCB footprint Supplier Voltage
Item Ref. Description Value PCB footprint Supplier Voltage
Measurements results AN4687
14/31 DocID027783 Rev 1
3 Measurements results
3.1 Efficiency comparison with three rectification bridge options
STEVAL-TSP009V2 provides different rectification bridge options: single Schottky diode, half active bridge, full active bridge and diode bridge. They are alternatively usable thanks the options available on the STEVAL-TSP009V2 demo’s PCB. Efficiency measurements have been executed to compare the different characteristics cost/efficiency through three different rectification bridge options. Here below the schematics:
Figure 4. Schematic Schottky bridge
R37
0R01206
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D13STPS2H100ASMA
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TP2Red
C15NM0805
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D14STPS2H100ASMA
D17STPS2H100ASMA
D9STPS2H100ASMA
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J2
SP
123
D7STPS2H100ASMA
T1 pin.4 T1 pin.10T1 pin.1 T1 pin.7SP
POE+F
VSS
AUX 1
GSPG22042015DI1500
DocID027783 Rev 1 15/31
AN4687 Measurements results
31
Figure 5. Schematic full active bridge
Figure 6. Schematic half active bridge
C77NM
R291M
0603
Q4P-Ch. 100V
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4
51
6 7 8
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0603
C75NM
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0603
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0603
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0603
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4
51
6 7 8
2 3
C73NM
D15MM3Z15VT1SOD323
C15
NM0805
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C78NM
D18MM3Z15VT1SOD323
D19MM3Z15VT1SOD323
D5MM3Z15VT1SOD323
C72NM
Q5N-Ch. 100V
SO8
4
51 2 3
6 7 8
TP3BLACK
Q6N-Ch. 100V
SO8
4
51 2 3
6 7 8
D16MM3Z15VT1SOD323
R41200K0603
R351M0603
R331M
0603
C76NM
C74NM
TP2Red
D1
STTH302SSMC
Q2P-Ch. 100V
SO8
4
51
6 7 8
2 3
J2
SP
123
Q3P-Ch. 100V
SO8
4
51
6 7 8
2 3
R22200K0603
Q8N-Ch. 100V
SO8
4
51 2 3
6 7 8
SP
T1 pin.4 T1 pin.10
T1 pin.1 T1 pin.7
POE+F
VSS
AUX 1
GSPG22042015DI1505
R26
0R01206
R331M
0603
C76NM
D7STPS2H100ASMA
C15NM0805
R40200K0603
R42200K0603
C78NM
TP2Red
R39200K0603
Q6N-Ch. 100V
SO8
4
51 2 3
6 7 8 Q8N-Ch. 100V
SO84
51 2 3
6 7 8
R41200K0603
J2
SP
123
R341M
0603
R361M
0603
D1
STTH302SSMC
D16MM3Z15VT1SOD323
D18MM3Z15VT1SOD323
Q5N-Ch. 100V
SO8
4
51 2 3
6 7 8
C79NM
D8STPS2H100ASMA
D15MM3Z15VT1SOD323
R37
0R01206
C77NM
D4
STPS2H100ASMA
TP3BLACK
R3215K0805
R351M
0603
D19MM3Z15VT1SOD323
D9STPS2H100ASMA
Q7N-Ch. 100V
SO8
4
51 2 3
6 7 8
SP
T1 pin.4 T1 pin.10T1 pin.1 T1 pin.7
VSS
POE+F
AUX 1
GSPG22042015DI1510
Measurements results AN4687
16/31 DocID027783 Rev 1
The measurement has been executed providing a 48 V on the RJ45 connector and connecting the Poe+/Vss (TP22 vs TP23) with external electronic load with different current values to cover around 40 W of input power.
Figure 7. Comparison efficiency bridge
Figure 7 shows the input stage efficiency comparison with three different bridge rectification type. The green line shows the efficiency of the Schottky diode bridge option, the cheaper of them, populated with four Schottky diodes STPS2H100A of each bridge. The yellow line shows the efficiency of the full active bridge, the most efficient, using two 100 V - 240 mΩ, P-channel MOSFET on high side and two 100 V - 65 mΩ N-channel MOSFET on low side of each bridge. The red line shows the half active bridge solution, which represent a right compromise in term of cost vs. efficiency.
Changing the input bridge it is possible to gain up to 2% about on the overall converter efficiency.
96.0%
96.5%
97.0%
97.5%
98.0%
98.5%
99.0%
99.5%
100.0%0
100
200
300
400
500
600
700
800
Efficiency [%]
Input Current [mA]
Efficiency Data Transfo + Bridge
Schottky Diode Bridge
Full Active Bridge
Half Active Bridge
DocID027783 Rev 1 17/31
AN4687 Measurements results
31
3.2 Converter efficiency
Figure 8. Overall and DC/DC efficiency
Figure 8 shows overall and DC/DC efficiencies for the converter at 48 Vindc.
The dotted green line is the STEVAL-TSP009V2 DC-DC efficiency. The measurement has been executed supplying 48 V to the input RJ45 connector J1 and measuring the input voltage by TP22/TP23, input voltage of DC/DC converter stage. Figure 8 shows also the overall efficiency comparison measured with the same DC-DC converter stage connected to the three different rectification bridge stages previously mentioned.
Please note that:
Overall efficiency includes all loss from RJ45 to the output voltage rail.
DC/DC efficiency is a figure of merit of the converter standalone and typically does not include the losses associated to the PoE interface section that are: the RJ45 connector, data transformer, bridges, power consumption of the I/F of the PM8803 device.
On the STEVAL-TSP009V2 eval board is mounted the simple Schottky diodes bridge solution (green line).
Thanks to the bridge rectification options foreseen on the pcb it is then possible to select the best compromise cost/efficiency depending on the target request.
75.0%
77.5%
80.0%
82.5%
85.0%
87.5%
90.0%
92.5%
95.0%
0.0 1.0 2.0 3.0 4.0 5.0 6.0
Efficiency
Iout [mA]
3.3 Vout Overall and DC/DC Efficiency
Overall with Schottky
Overall FAB
Overall HAB
DC-DC
Measurements results AN4687
18/31 DocID027783 Rev 1
Figure 9. Output voltage drift
3.3 Voltage ripple
Above measurements are referred at the output voltage ripple.
3.330
3.332
3.334
3.336
3.338
3.340
0.0 1.0 2.0 3.0 4.0 5.0 6.0
Output Voltage
Iout [mA]
3.3 Vout changhe with load
drift 3V3 at 48V
Figure 10. Ripple on 3.3 V at 0.6 A Figure 11. Ripple on 3.3 V at 6 A
DocID027783 Rev 1 19/31
AN4687 Measurements results
31
In Figure 12 and Figure 13 a measurement of the ripple on the input voltage has been done, to give an indication of the noise at the input of the converter.
3.4 Startup
Figure 12. Ripple before and after input filter with 3.3 V at 0.6 A (measured on C26 and C28)
Figure 13. Ripple before and after input filter with 3.3V at 6A (measured on C26 and C28)
Figure 14. Startup from Microsemi 9001G injector - 3.3 V at 0.6 A
Figure 15. Startup from Microsemi 9001G injector - 3.3 V at 6 A
Measurements results AN4687
20/31 DocID027783 Rev 1
Figure 16. Startup from Microsemi 9501G injector - 3.3 V at 0.6 A
Figure 17. Startup from Microsemi 9501G injector - 3.3 V at 6 A
Figure 18. Detail of the output voltage at startup with no load
Figure 19. Detail of the output voltage at startup with 6 A load
DocID027783 Rev 1 21/31
AN4687 Measurements results
31
3.5 Primary side waveforms
Figure 20. Primary steady state 0.6 A Figure 21. Primary steady state 6 A
Figure 22. Detail of primary drain at 6 A load
Measurements results AN4687
22/31 DocID027783 Rev 1
3.6 Secondary side waveforms
3.7 Load transients
Figure 23. Secondary steady state 0.6 A Figure 24. Secondary steady state 6 A
Figure 25. Detail of secondary drain at 6 A load
Figure 26. Secondary steady state 0.6 A Figure 27. Secondary steady state 6 A
DocID027783 Rev 1 23/31
AN4687 Measurements results
31
3.8 PoE to auxiliary switchover
In Figure 28 is shown a smooth transition from a PoE line set to 54 V toward an auxiliary adapter at 44 V; the output voltage is maintained stable during the transition.
3.9 Gloop
Figure 28. Detail of secondary drain at 6 A load
Figure 29. Gloop 48 V at 6 A Figure 30. Gloop 48 V at no load
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