Top Banner
ERICSSOnl Standard Application Features Up to 15-A Output Current 3.3-V Input Voltage Wide-Output Voltage Adjust (0.8 V to 2.5 V) Efficiencies up to 95 % 125 W/in³ Power Density On/Off Inhibit Output Voltage Sense Pre-Bias Startup Output Over-Current Protection (Non-Latching, Auto-Reset) Rset = Resistor to set the desired output voltage (see spec. table for values) C in = Required electrolytic 470 µF C out = Recommended 330 µF electrolytic Auto-Track Sequencing (1) Margin Up/Down Controls Under-Voltage Lockout Operating Temp: 40 to +85 °C DSP Compatible Output Voltages IPC Lead Free 2 Safety Agency Approvals (Pend- ing) UL 1950, CSA 22.2 950, & EN60950 Point-of-load Alliance (POLA) Compatible Description The PMG 4318 T series of non-isolated power modules are small in size but big on perfor- mance and flexibility. Their high output current, compact footprint, and indus- try-leading features offers system designers a versatile module for powering complex multi- processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down power conversion for up to 15 A of output current from a 3.3-V input bus voltage. The output voltage of the PMG 4318 T can be set to any value over the range, 0.8 V to 2.5 V, using a single resistor. This series includes Auto-Track™. Auto-Track simplifies the task of supply voltage sequencing in a power system by en- abling modules to track each other, or any external voltage, during power up and power down. Other operating features include an on/off inhibit, output voltage adjust (trim), and margin up/down controls. To ensure tight load regula- tion, an output voltage sense is also provided. A non-latching over-current trip serves as load fault protection. Target applications include complex multi- voltage, multi-processor systems that incorporate the industry’s high-speed DSPs, micro-processors and bus drivers. Pin Configuration Pin Function 1 GND 2 Vin 3 Inhibit * 4 V o Adjust 5 Vo Sense 6 V out 7 GND 8 Track 9 Margin Down * 10 Margin Up * * Denotes negative logic: Open = Normal operation Ground = Function active NOMINAL SIZE = 1.37 in x 0.62 in (34,8 mm x 15,75 mm) PMG 4318 T 3.3-V Input 15-A, 3.3-V Input Non-Isolated Wide-Output Adjust Power Module PMG 4318 T Datasheet © Ericsson Power Modules, June 2004 0DUJLQ8S 0DUJLQ'RZQ 9 & ®) 5HTXLUHG & ®) 2SWLRQDO ,QKLELW *1' *1' 9 9 6HQVH 7UDFN 5 : 5HTXLUHG 30*7 7RS9LHZ Note: (1) Auto-Track is a trademark of Texas Instruments POLA code: PTH03010 W
19

PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

Aug 21, 2020

Download

Documents

dariahiddleston
Welcome message from author
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Page 1: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

!

"##$$%& '()*+, '##-. / )0/ 1 )$23$-45!

!!""

6$78/9$#

:'+* 3$7 6;<=>?@ +/) ;. ) 3A /#,$,1)!3%4 / %4B"2C%

)#$)3! ;.

The PMG 4318 T series of non-isolatedpower modules are small in size but big on perfor-mance and flexibility. Their highoutput current, compact footprint, and indus-try-leading features offers system designers aversatile module for powering complex multi-processor digital systems.

The series employs double-sided surface mountconstruction and provides high-performancestep-down power conversion for up to 15 A ofoutput current from a 3.3-V input bus voltage.The output voltage of the PMG 4318 T can be setto any value over the range, 0.8 V to 2.5 V, usinga single resistor.

This series includes Auto-Track™.

Auto-Track ™ simplifies the task of supplyvoltage sequencing in a power system by en-abling modules to track each other, or anyexternal voltage, during power up and powerdown.

Other operating features include an on/offinhibit, output voltage adjust (trim), and marginup/down controls. To ensure tight load regula-tion, an output voltage sense is also provided.A non-latching over-current trip serves asload fault protection.

Target applications include complex multi-voltage, multi-processor systems that incorporatethe industry’s high-speed DSPs, micro-processorsand bus drivers.

! "#$%

& "#'(

!! "

42)*:

!

"# "#

$%

&'(

)*+,)-.

/"-0&&

-

1

- 2 0

3

*

2< #6$78;7#6D;

)3$<)6E

Page 2: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

Vin: The positive input voltage power node to the module,which is referenced to common GND.

Vout: The regulated positive power output with respect to theGND node.

GND: This is the common ground connection for the Vinand Vout power connections. It is also the 0 VDC reference forthe control inputs.

Inhibit: The Inhibit pin is an open-collector/drain negative logicinput that is referenced to GND. Applying a low-level groundsignal to this input disables the module’s output and turns offthe output voltage. When the Inhibit control is active, theinput current drawn by the regulator is significantly reduced.If the Inhibit pin is left open-circuit, the module will pro-duce an output whenever a valid input source is applied.

Vo Adjust: A 0.5 %, 0.1 W resistor must be connected be-tween this pin and the GND pin to set the output voltage tothe desired value. The set point range for the output voltage isfrom 0.8 V to 2.5 V. The resistor required for a given outputvoltage may be calculated from the following formula. If leftopen circuit, the module output will default to its lowest outputvoltage value. For further information on the adjustment and/ortrimming of the output voltage, consult the related applicationnote.

Rset = 10 k· 0.8 V

– 2.49 k Vout – 0.8 V

The specification table gives the preferred resistor values for anumber of standard output voltages.

Vo Sense: The sense input allows the regulation circuit to com-pensate for voltage drop between the module and the load.For optimal voltage accuracy Vo Sense should be connected toVout. It can also be left disconnected.

Track: This is an analog control input that enables the outputvoltage to follow an external voltage. This pin becomes activetypically 20 ms after the input voltage has been applied, andallows direct control of the output voltage from 0 V up to thenominal set-point voltage. Within this range the output willfollow the voltage at the Track pin on a volt-for-volt basis.When the control voltage is raised above this range, the moduleregulates at its set-point voltage. The feature allows the out-put voltage to rise simultaneously with other modules poweredfrom the same input bus. If unused, the input may be left un-connected. Note: Due to the under-voltage lockout feature, the output ofthe module cannot follow its own input voltage during power up. For moreinformation, consult the related application note.

Margin Down: When this input is asserted to GND, the outputvoltage is decreased by 5% from the nominal. The input requiresan open-collector (open-drain) interface. It is not TTL compat-ible. A lower percent change can be accomodated with aseries resistor. If unused, this input may be left unconnected.For further information, consult the related application note.

Margin Up: When this input is asserted to GND, the outputvoltage is increased by 5%. The input requires an open-collector(open-drain) interface. It is not TTL compatible. The percentchange can be reduced with a series resistor. If unused, thisinput may be left unconnected. For further information, con-sult the related application note.

42)*:

!

'

;D )

;D

#!$!% $!%&! !'

"# $ +1,:9/##D"D;

()*+ !,-&./(&.

(*,012003!,-&4 /(&4

)$7 )*+$ 5)6(&57*8*)8 !"#

2/(

Page 3: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

%& $' $$()$+ #% ( $*Characteristics Symbols Conditions Min Typ Max Units

Track Input Voltage Vtrack –0.3 — Vin + 0.3 V

Operating Temperature Range Ta Over Vin Range –40 — 85 °C

Solder Reflow Temperature Treflow Surface temperature of module body or pins 235 (i) °C

Storage Temperature Ts — –40 — 125 °C

Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted

Mechanical Vibration Mil-STD-883D, Method 2007.2 — 20 — G’s20-2000 Hz

Weight — — 5 — grams

Flammability — Meets UL 94V-O

$ ,

)'+$ % -. /0-

.1 -

.-0

.& 23-0

.& 23-

.

45*

67&&&8

Characteristics Symbols Conditions Min Typ Max Units

Output Current Io 0.8 V Vo 2.5 V, 60 °C, 200 LFM airflow 0 — 15 (1)A

25 °C, natural convection 0 — 15 (1)

Input Voltage Range Vin Over Io range 2.95 (2) — 3.65 V

Set-Point Voltage Tolerance Vo tol — — ±2 (3) %Vo

Temperature Variation Regtemp –40 °C <Ta < +85 °C — ±0.5 — %Vo

Line Regulation Regline Over Vin range — ±10 — mV

Load Regulation Regload Over Io range — ±12 — mV

Total Output Variation Regtot Includes set-point, line, load, — — ±3 (3) %Vo–40 °C Ta +85 °C

Efficiency Io =10 A RSET = 2.21 k Vo 2.5 V — 93 —RSET = 4.12 k Vo 2.0 V — 92 —RSET = 5.49 k Vo 1.8 V — 91 — %RSET = 8.87 k Vo 1.5 V — 89 —RSET = 17.4 k Vo 1.2 V — 87 —RSET = 36.5 k Vo 1.0 V — 85 —

Vo Ripple (pk-pk) Vr 20 MHz bandwidth — 20 — mVpp

Over-Current Threshold Io trip Reset, followed by auto-recovery — 27.5 — A

Transient Response 1 A/µs load step, 50 to 100 % Iomax,Cout =330 µF

ttr Recovery Time — 70 — µSecVtr Vo over/undershoot — 100 — mV

Margin Up/Down Adjust Vo adj — ± 5 — %

Margin Input Current (pins 9 /10) IIL margin Pin to GND — – 8 (4) — µA

Track Input Current (pin 8) IIL track Pin to GND — — –130 (5) µA

Track Slew Rate Capability dVtrack/dt Vtrack – Vo 50 mV and Vtrack < Vo(nom) 5 — — V/ms

Under-Voltage Lockout UVLO Vin increasing — 2.8 2.95 VVin decreasing 2.2 2.7 —

Inhibit Control (pin3) Referenced to GNDInput High Voltage VIH Vin –0.5 — Open (5)

VInput Low Voltage VIL –0.2 — 0.8Input Low Current IIL inhibit Pin to GND — –130 — µA

Input Standby Current Iin inh Inhibit (pin 3) to GND, Track (pin 8) open — 10 — mA

Switching Frequency ƒs Over Vin and Io ranges 275 300 325 kHz

External Input Capacitance Cin 470 (6) — — µF

External Output Capacitance Cout 0 330 (7) 3,300 µF

Reliability MTBF Per Bellcore TR-332 5.7 — — 106 Hrs50 % stress, Ta =40 °C, ground benign

!" ##$%&" #'() *++,,-(

%%./0++1 (*23%% 456* #" *#7*((( (*

23%% 4565'& 18%*95 +8%% 8 : + ))% 95+(

42)*:

Page 4: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

$ , $ 9, !

" !# $# %&'()

)*+,-+

990+:-*84))0

;0)7--,*:-*84))0

,2,,30:-*84))0

"*+,-+

,%3*<0!%

,%3*<0%

42)*:

>

Page 5: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

C!

"##$$%C& C'()*+, '##-. / )0/ :'+*

!!""

6$78/9$#

3$7 1 )$23$-45!

/#$:. 6;<=>?@ +/) ;. ) 3A )#3$)3! ;.

The PMG 5518 T series of non-isolated

power modules are small in size but big onperformance and flexibility. Their high out-put current, compact footprint, andindustry-leading features offers systemdesigners a versatile module for powering com-plex multi-processor digital systems.

The series employs double-sided surfacemount construction and provides high-per-formance step-down power conversion for upto 15 A of output current from a 5-V inputbus voltage. The output voltage of the PMG5518 T can be set to any value over the range,0.8 V to 3.6 V, using a single resistor.

This series includes Auto-Track™.

Auto-Track simplifies the task of supplyvoltage sequencing in a power system by en-abling modules to track each other, or anyexternal voltage, during power up and powerdown.

Other operating features include an on/offinhibit, output voltage adjust (trim), and mar-gin up/down controls. To ensure tight loadregulation, an output voltage sense is alsoprovided. A non-latching over-current tripserves as load fault protection.

Target applications include complexmulti-voltage, multi-processor systems thatincorporate the industry’s high-speed DSPs,micro-processors and bus drivers.

! "#$%

& "#'(

!! "

42)*:

!"#$

%% !"& '

() *

+ +

,

-.

/

0

1

%

#

#$ 2345

2< #6$78;7#6D;

)3$<)6E

Page 6: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

GND: This is the common ground connection for the Vin andVout power connections. It is also the 0 VDC reference for thecontrol inputs.

Vin: The positive input voltage power node to the module, whichis referenced to common GND.

Inhibit: The Inhibit pin is an open-collector/drain negative logicinput that is referenced to GND. Applying a low-level groundsignal to this input disables the module’s output and turns offthe output voltage. When the Inhibit control is active, the inputcurrent drawn by the regulator is significantly reduced. If theInhibit pin is left open-circuit, the module will produce anoutput whenever a valid input source is applied.

Vo Adjust: A 0.1 W, 1 % tolerance (or better) resistor must bedirectly connected between this pin and pin 7 (GND) pin to setthe output voltage to the desired value. The set point range for theoutput voltage is from 0.8 V to 3.6 V. The resistor required for agiven output voltage may be calculated from the followingformula. If left open circuit, the module output will default to itslowest output voltage value. For further information on outputvoltage adjustment consult the related application note.

5 F7 = >%7$ =

The specification table gives the preferred resistor values for a numberof standard output voltages.

Vo Sense: The sense input allows the regulation circuit to compen-sate for voltage drop between the module and the load. Foroptimal voltage accuracy Vo Sense should be connected to Vout.It can also be left disconnected.

Vout: The regulated positive power output with respect to theGND node.

Track: This is an analog control input that allows the outputvoltage to follow another voltage during power-up and power-down sequences. The pin is active from 0 V up to the nominalset-point voltage. Within this range the module’s output willfollow the voltage at the Track pin on a volt-for-volt basis. Whenthe control voltage is raised above this range, the module regulatesat its nominal output voltage. If unused, this input may be leftunconnected. For further information consult the related applicationnote.

Margin Down: When this input is asserted to GND, the outputvoltage is decreased by 5% from the nominal. The input requires anopen-collector (open-drain) interface. It is not TTL compatible. Alower percent change can be accomodated with a series resistor. Forfurther information, consult the related application note.

Margin Up: When this input is asserted to GND, the outputvoltage is increased by 5%. The input requires an open-collector(open-drain) interface. It is not TTL compatible. The percentchange can be reduced with a series resistor. For further informa-tion, consult the related application note.

42)*:

C

.. !

'

;D )

;D

!$!!% $%&! !'

"# $ +1,:9/##D"D;

()*+ !,-&./!!(&.

(*,012003!,-&4 /!!(&4

)$7 )*+$ 5)6(&57*8*)8 !"#

2/!!(

Page 7: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

%& $' $$()$+ #% ( $*Characteristics Symbols Conditions Min Typ Max Units

Track Input Voltage Vtrack –0.3 — Vin + 0.3 V

Operating Temperature Range Ta Over Vin Range –40 — 85 °C

Solder Reflow Temperature Treflow Surface temperature of module body or pins 215 (i) °C

Storage Temperature Ts — –40 — 125 °C

Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted

Mechanical Vibration Mil-STD-883D, Method 2007.2 Suffix H — 20 — G’s20-2000 Hz Suffix S — 15 —

Weight — — 5 — grams

Flammability — Meets UL 94V-O

! !" #$# # %

)'+$ % -. /0-. -.1-0.& 23-0.& 23-.45*

67&&&8

Characteristics Symbols Conditions Min Typ Max Units

Output Current Io 0.8 V Vo 3.6 V 60 °C, 200 LFM airflow 0 — 15 (1)A

25 °C, natural convection 0 — 15 (1)

Input Voltage Range Vin Over Io range 4.5 — 5.5 V

Set-Point Voltage Tolerance Vo tol — — ±2 (2) %Vo

Temperature Variation Regtemp –40 °C <Ta < +85 °C — ±0.5 — %Vo

Line Regulation Regline Over Vin range — ±10 — mV

Load Regulation Regload Over Io range — ±12 — mV

Total Output Variation Regtot Includes set-point, line, load, — — ±3 (2) %Vo–40 °C Ta +85 °C

Efficiency Io =10 A RSET = 698 Vo 3.3 V — 95 —RSET = 2.21 k Vo 2.5 V — 93 —RSET = 4.12 k Vo 2.0 V — 92 — %RSET = 5.49 k Vo 1.8 V — 91 —RSET = 8.87 k Vo 1.5 V — 90 —RSET = 17.4 k Vo 1.2 V — 88 —RSET = 36.5 k Vo 1.0 V — 86 —

Vo Ripple (pk-pk) Vr 20 MHz bandwidth — 30 — mVpp

Over-Current Threshold Io trip Reset, followed by auto-recovery — 27.5 — A

Transient Response 1 A/µs load step, 50 to 100 % Iomax,Cout =330 µF

ttr Recovery Time — 70 — µSecVtr Vo over/undershoot — 100 — mV

Margin Up/Down Adjust Vo margin — ± 5 — %

Margin Input Current (pins 9 /10) IIL margin Pin to GND — – 8 (3) — µA

Track Input Current (pin 8) IIL track Pin to GND — — –130 (4) µA

Track Slew Rate Capability dVtrack/dt Vtrack – Vo 50 mV and Vtrack < Vo(nom) 5 — — V/ms

Under-Voltage Lockout UVLO Vin increasing — 4.3 4.45 VVin decreasing 3.4 3.7 —

Inhibit Control (pin3) Referenced to GNDInput High Voltage VIH Vin –0.5 — Open (4)

VInput Low Voltage VIL –0.2 — 0.8Input Low Current IIL inhibit Pin to GND — –130 — µA

Input Standby Current Iin inh Inhibit (pin 3) to GND, Track (pin 8) open — 10 — mA

Switching Frequency ƒs Over Vin and Io ranges 275 300 325 kHz

External Input Capacitance Cin 470 (5) — — µF

External Output Capacitance Cout 0 330 (6) 15,000 µF

Reliability MTBF Per Bellcore TR-332 5.7 — — 106 Hrs50 % stress, Ta =40 °C, ground benign

& '( )* + , -$ + + !

! "#$%& "!'()*+# ,% -.! # ,%-/# "#

$%& "!'()*+* 0 1! ".2 3* 4 2 " 5! "6 4 "% 3* ,

42)*:

G

Page 8: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

$ , $ 9, !

" !#$%&'(

)*+,.+

990+:-*84))0

;0)7--,*:-*84))0

,2,,30:-*84))0

"*+,.+

,%3*<0%

,%3*<0%

42)*:

Page 9: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

!

The Vo Adjust control (pin 4) sets the output voltage of thePMG 4318 T and PMG 5518 T products. The adjustmentrange of the PMG 4318 T (3.3-V input) is from 0.8 V to2.5 V 1, and the PMG 5518 T (5-V input) from 0.8 V to 3.6 V.The adjustment method requires the addition of a single exter-nal resistor, Rset, that must be connected directly between the VoAdjust and GND pins 2. Table 1-1 gives the preferred value of theexternal resistor for a number of standard voltages, along with theactual output voltage that this resistance value provides.

For other output voltages the value of the required resistor caneither be calculated using the following formula, or simplyselected from the range of values given in Table 1-2. Figure 1-1shows the placement of the required resistor.

5 F 7 = >%7$ =

2<

!"# $ %&' ( )* ' $#+ , *'-

./ 0$ # $

&1&& :(

&1 &1& &1 & &1!&& 1 &1! 1 &1!& &1 &1! 1 1&&& 1 1& 1 1&& !1 1& 1 1&& 1 1 1 1& &1 1 1 1&& 1 1 1 1& 1 1 1 1&& 1 1 1 1& 1 1 1 1&& &1 1 &1 1& !1 1 !1 1& 1! 1 1 1& 1 1 1! 1& 1 1 1! 1& 1 1 1 1!& 1 1! 1

) * ;)6<=+* ) +*

1 ! 1&!

1 1 1&

1 1&&

1 1! 1&

1 1 1&

1 1 1&

1 1&&

&1 :( &1

):H>6B):H6

;>= ; ;>= ;

1&& 1 1& 1! 1& 1 1 1 1& 1 1 1& 1& 1 1 1 1& 1 1 1 1& 1 1 1& 1& 1! 1 1 1& 1 1 1 1& 1 1 1 1!& 1 1! 1 1&& 1 1& 1& 1&!1!1&11&&11&1!1&1!1&

!"#$%

&

'

%

Page 10: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

$The recommended input capacitor(s) is determined by the470 µF minimum capacitance, and 700 mA rms minimum ripplecurrent rating.

Ripple current and <100 mW equivalent series resistance(ESR) values are the major considerations, along with tem-perature, when designing with different types of capacitors.Tantalum capacitors have a recommended minimum voltagerating of twice 2´ (the maximum DC voltage + AC ripple).This is standard practice for tantalum capacitors to insure reli-ability.

$!The recommended ESR of the capacitors is equal to or less than150 mW. Electrolytic capacitors have marginal ripple perfor-mance at frequencies greater than 400 kHz but excellent lowfrequency transient response. Above the ripple frequency, ce-ramic capacitors are necessary to improve the transientresponse and reduce any high frequency noise componentsapparent during higher current excursions. Preferred low-ESRtype capacitor part numbers are identified in Table 2-1.

6; $Tantalum type capacitors can be used for the output but onlythe AVX TPS, Sprague 593D/594/595 or Kemet T495/T510series. These capacitors are recommended over many other tan-talum types due to their higher rated surge, power dissipation,and ripple current capability. As a caution, the TAJ series byAVX is not recommended. This series has considerably higherESR, reduced power dissipation, and lower ripple current capa-bility. The TAJ series is less reliable than the AVX TPS serieswhen determining power dissipation capability. Tantalum, ceramicor Os-con types are recommended for applications where ambi-ent temperatures fall below 0 °C.

Ceramic capacitors may be substituted for electrolytic typeswith the minimum capacitor value for improved ripple reduc-tion on the input and output bus.

$6.Table 1 identifies the characteristics of capacitors from a num-ber of vendors with acceptable ESR and ripple current (rms)ratings. The number of capacitors required at both the inputand output buses is identified for each capacitor type.

This is not an extensive capacitor list. Capacitors from other vendors areavailable with comparable specifications. Those listed are for guidance. TheRMS ripple current rating and ESR are the critical parameters necessary toinsure both optimum regulator performance and long capacitor life.

/rodneVroticapaCseireS

scitsiretcarahCroticapaC y titnauQ

gnikroWegatloV

)Fµ(eulaV t nelaviuqE)RSE(ecnatsiseRseireS

elppiR.xaMC˚501@tnerruC

)smrI(

eziSlacisyhP)mm(

tupnIsuB

tuptuOsuB

rebmuNtraProdneV

cinosanaP)laidaR(CF

KF ).tMecafruS(

V01V61V52V53

065074074074

090.0 Ω090.0 Ω0800 Ω060.0 Ω

Am557Am557Am058Am0011

01 × 5.2101 × 5.2101 × 2.015.21 × 5.31

1111

1111

165A1CFUEE174C1CFUEEP174E1KFVEEQ174V1KFVEE

noc-imehCdetinU).tMecafruS(AXP

seireSZXLXF

seireSZXL

V3.6V01V01V61

074086086074

020.0 Ω090.0 Ω510.0 Ω090.0 Ω

Am0314Am077Am5374

Am067

01 × 7.701 × 5.2101 × 5.0101 × 5.21

1111

1111

PT08JM174CV3.6AXPLL21X01M186BV01ZXL

M086XF01LL21X01M174BV61ZXL

nocihciNseireSMP

DH

V61V61V61

033074074

021.0 ÷ 060.0=2 Ω090.0 Ω0301 Ω

Am547Am077Am0301

01' × 5.2101 × 51

5.21x01

211

111

6HPM133C1MPU6HPM174C1MPU

RPM174C1DHU

:noc-sO-oynaSPS

).tMecafruS(PVSV01V01

074065

510.0 Ω310.0 Ω

Am0054>Am0025>

01 × 5.0111 × 7.21

11

11

M074PS01M065PVS01

mulatnaTXVA).tMecafruS(SPT

V01V01

074074

540.0 Ω060.0 Ω

Am3271Am6281

L3.7× W7.5× H1.4

11

11

5400R010M774ESPT0600R010M774VSPT

remyloPtemeKmulatnaT

seireS035T/025T).tMecafruS(

V01V01

033033

040.0 Ω510.0 Ω

Am0081Am0083>

W3.4× L3.7× H0.4

22

11

SA010M733X025TSA010M733X035T

mulatnaTeugarpSseireSD595

).tMecafruS(

V01 074 001.0 Ω Am0441 L2.7× W6× H1.4

1 1 T2R0100X774D595

Page 11: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

!!"#$ %%&'()*+ & ,- . /&*) 0!1

2!13.4!

5 (!60!,78

29:;#%<=> ( 0? . +!+5(

0"%7 ."%7@6A%"%

( 0!(0 9-

The PMG 8618 L is a non-isolated power

module that is small in size but big on per-formance and flexibility. The high outputcurrent, compact footprint, and industry-leading features offers system designers aversatile module for powering complex multi-processor digital systems.

The series employs double-sided surfacemount construction and provides high-performance step-down power conversion for upto 12 A of output current. The output volt-age of the PMG 8618 L can be set to any valueover the range, 1.2 V to 5.5 V, using a singleresistor. This series includes Auto-Track™Sequencing.

Auto-Track simplifies the task of supplyvoltage sequencing in a power system byenabling modules to track each other, or anyexternal voltage, during power up and powerdown. Other operating features include anon/off inhibit, output voltage adjust (trim), andmargin up/down controls. For improved loadregulation, an output voltage sense is alsoprovided. A non-latching over-current tripserves as load fault protection.

Target applications include complexmulti-voltage, multi-processor systems thatincorporate the industry’s high-speed DSPs,micro-processors and bus drivers.

! "#$%

& "#'(

!! "

!"#$% &''"#$%

!"#!

$%&&

!"

#$$#

'(%

)*

+

, -

.$

/01234 !"

Page 12: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

GND: This is the common ground connection for the Vinand Vout power connections. It is also the 0 VDC reference forthe control inputs.

Vin: The positive input voltage power node to the module,which is referenced to common GND.

Inhibit: The Inhibit pin is an open-collector/drain negative logicinput that is referenced to GND. Applying a low-level groundsignal to this input disables the module’s output and turns offthe output voltage. When the Inhibit control is active, theinput current drawn by the regulator is significantly reduced.If the Inhibit pin is left open-circuit, the module will pro-duce an output whenever a valid input source is applied.

Vo Adjust: A 1 % 0.1 W resistor must be directly connected be-tween this pin and pin 7 (GND) to set the output voltage to avalue higher than 1.2 V. The temperature stability of theresistor should be 100 ppm/°C or better. The set point range isfrom 1.2 V to 5.5 V. The resistor required for a given outputvoltage may be calculated from the following formula. If leftopen circuit the output voltage will default to its lowest value.For further information on output voltage adjustment consultthe related application note.

' (& &)* +)*$ +)

The specification table gives the preferred resistor values for anumber of standard output voltages.

Vo Sense: The sense input allows the regulation circuit to com-pensate for voltage drop between the module and the load.For optimal voltage accuracy Vo Sense should be connected toVout. It can also be left disconnected.

Vout: The regulated positive power output with respect to theGND node.

Track: This is an analog control input that allows the outputvoltage to follow another voltage during power-up and power-down sequences. The pin is active from 0 V up to the nominalset-point voltage. Within this range the module’s output willfollow the voltage at the Track pin on a volt-for-volt basis.When the control voltage is raised above this range, the moduleregulates at its nominal output voltage. If unused, this inputmaybe left unconnected. For further information consult therelated application note.

Margin Down: When this input is asserted to GND, the outputvoltage is decreased by 5% from the nominal. The input requiresan open-collector (open-drain) interface. It is not TTL compat-ible. A lower percent change can be accomodated with a seriesresistor. For further information, consult the related applicationnote.

Margin Up: When this input is asserted to GND, the outputvoltage is increased by 5%. The input requires an open-collector(open-drain) interface. It is not TTL compatible. The percentchange can be reduced with a series resistor. For further infor-mation, consult the related application note.

#$ #!!$% &

!" #

'()* !+,%-.%-

')+/01//2!+,%3 .%3()%*+,

)* 4(5'%46)7)(7-./ &01 2,

!.'

"

Page 13: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

$% #& ##')$+ #% ( $*Characteristics Symbols Conditions Min Typ Max Units

Track Input Voltage Vtrack –0.2 — Vin V

Operating Temperature Range Ta Over Vin Range –40 (i) — 85 °C

Solder Reflow Temperature Treflow Surface temperature of module body or pins 215 (ii) °C

Storage Temperature Ts — –40 — 125 °C

Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted

Mechanical Vibration Mil-STD-883D, Method 2007.2 — 20 — G’s20-2000 Hz

Weight — — 5 — grams

Flammability — Meets UL 94V-O

! "#$$%"&#'&$' '

$#'$ ($'#)$*#*$%*'+

)'+$ % ,-./,-,-0,/-&12,/-&12,-34*

56&&7

Characteristics Symbols Conditions Min Typ Max Units

Output Current Io 1.2 V Vo 5.5 V 60 °C, 200 LFM airflow 0 — 12 (1)A

25 °C, natural convection 0 — 12 (1)

Input Voltage Range Vin Over Io range 10.8 — 13.2 V

Set-Point Voltage Tolerance Vo tol — — ±2 (2) %Vo

Temperature Variation Regtemp –40 °C <Ta < +85 °C — ±0.5 — %Vo

Line Regulation Regline Over Vin range — ±10 — mV

Load Regulation Regload Over Io range — ±12 — mV

Total Output Variation Regtot Includes set-point, line, load, — — ±3 (2) %Vo–40 °C Ta +85 °C

Efficiency Io =8 A RSET = 280 Vo 5.0 V — 94 —RSET = 2.0 k Vo 3.3 V — 93 —RSET = 4.32 k Vo 2.5 V — 91 —RSET = 8.06 k Vo 2.0 V — 90 — %RSET = 11.5 k Vo 1.8 V — 89 —RSET = 24.3 k Vo 1.5 V — 88 —RSET = open cct Vo 1.2 V — 86 —

Vo Ripple (pk-pk) Vr 20 MHz bandwidth Vo 2.5 V — 25 — mVpp

Vo 2.5 V — 1 — % Vo

Over-Current Threshold Io trip Reset, followed by auto-recovery — 20 — A

Transient Response 1 A/µs load step, 50 to 100 % Iomax,Cout =330 µF

ttr Recovery Time — 70 — µSecVtr Vo over/undershoot — 100 — mV

Margin Up/Down Adjust Vo adj — ± 5 — %

Margin Input Current (pins 9 /10) IIL margin Pin to GND — – 8 (3) — µA

Track Input Current (pin 8) IIL track Pin to GND — — –0.13 (4) mA

Track Slew Rate Capability dVtrack/dt Vtrack – Vo 50 mV and Vtrack < Vo(nom) 5 — — V/ms

Under-Voltage Lockout UVLO Vin increasing — 9.5 10.4 VVin decreasing 8.8 9 —

Inhibit Control (pin3) Referenced to GNDInput High Voltage VIH Vin –0.5 — Open (4)

VInput Low Voltage VIL –0.2 — 0.5Input Low Current IIL inhibit Pin to GND — –0.24 — mA

Input Standby Current Iin inh Inhibit (pin 3) to GND, Track (pin 8) open — 10 — mA

Switching Frequency ƒs Over Vin and Io ranges 300 350 400 kHz

External Input Capacitance Cin 560 (5) — — µF

External Output Capacitance Cout 0 330 (6) 10,000 µF

Reliability MTBF Per Bellcore TR-332 6.4 — — 106 Hrs50 % stress, Ta =40 °C, ground benign

!""!#$%&&"'() "

* "%+,&& -./""0

1 023045"%%% "%+,&& -./""

3 36&7.8" """4&&" "."$

6 98 **&7. %"

Page 14: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

$ 8 $ 98 !

" !# $# %&'()

()*+,*

88/*9,)73((/

:/(6,,+)9,)73((/

+1++2/9,)73((/

!)*+,*

+$2);/!$

+$2);/$

+$2);/$

!"!#$

%&'(&'(&'()"*

!+

Page 15: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

The Vo Adjust control (pin 4) is used to set the output volt-age to a value higher than 1.2 V. The adjustment methodrequires the addition of a single external resistor, Rset, that mustbe connected directly between the Vo Adjust and GND pins 1.Table 1-1 gives the preferred value for the external resistor for anumber of standard voltages, along with the actual outputvoltage that this resistance value provides.

For other output voltages the value of the required resistor caneither be calculated using the following formula, or simplyselected from the range of values given in Table 1-2. Figure 1-1shows the placement of the required resistor.

$

! "# $ % ##"&'( ) *+ , # ( $!#-.,+(/

0 # % " 1$# #! %% $ % ,

0&& :(

0 0& 0 & 0&& 0 0 0 0& 0 0 0! 0&& 0 0 0 0& &0 0 0 0& 0 0 0& 0 0 0& 0 0 0 0& 0 0 &0 0!& !0 0! 0 0&& 0 0& 0! 0& 0& 0 0 0& 0 0 0 0& 0 0 0 0& 0 0 0 0& 0 0 0 0& 0! 0 0 0& 0

) * ;)5<=+* ) +*

& 0&&!

0 0!

0 0 0&

0& 0&&

0 0 0&

0 0 0&

0 :( 0&&

;>= ; ;>= ;0 0 0& 0 0 0& 0!& 0! 0! 0 0&& 0 0& 0 0& 0! 0 0 0& 0 0 0& 0& 0!! 0 0! 0& 0 0 0 0& 0 0 0 0 0 0 0 0 0 0! 0 0& 0& 0 !!0 0 0 &0 &0 0 0 &0! 0& 0 0 &0 0 0

!

"#$%#&

'()#)*

#

#

+

,

- )

.

Page 16: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

)* ?;@$ $330A$+ # #$$ 3 333$( #+3 0

Tantalum type capacitors can be used for the output but onlythe AVX TPS, Sprague 593D/594/595 or Kemet T495/T510series. These capacitors are recommended over many othertantalum types due to their higher rated surge, power dissipa-tion, and ripple current capability. As a caution the TAJ seriesby AVX is not recommended. This series has considerablyhigher ESR, reduced power dissipation, and lower ripple cur-rent capability. The TAJ series is also less reliable than theAVX TPS series when determining power dissipation capabil-ity. Tantalum or Oscon® types are recommended forapplications where ambient temperatures fall below 0°C.

Ceramic capacitors will compliment electrolytic types. Adding10 µF to 47 µF of ceramic capacitance will reduce ripple on theinput and output bus. Output ripple and transient measure-ment accuracy is improved by measuring directly across a 10 µFceramic capacitor.

Table 2-1 identifies the characteristics of capacitors from a numberof vendors with acceptable ESR and ripple current (rms) ratings.The number of capacitors required at both the input and outputbuses is identified for each capacitor type.

This is not an extensive capacitor list. Capacitors from other vendors areavailable with comparable specifications. Those listed are for guidance.The RMS ripple current rating and ESR (at 100 kHz) are criticalparameters necessary to insure both optimum regulator performance andlong-term reliability.

The recommended input capacitance is determined by 800 mArms minimum ripple current rating and 560 µF minimumcapacitance.

Ripple current and <100 mW equivalent series resistance(ESR) values are the major considerations, along with tem-perature, when designing with different types of capacitors.Tantalum capacitors have a recommended minimum voltagerating of 2 ´ (max. DC voltage + AC ripple). This is necessaryto insure reliability for input voltage bus applications. Tanta-lum capacitors are not recommended on the input bus.

The recommended ESR of the output capacitor is less thanor equal to 150 mW. Electrolytic capacitors have marginalripple performance at frequencies greater than 400 kHz butexcellent low frequency transient response. Above the ripplefrequency, ceramic capacitors are necessary to improve thetransient response and reduce any high frequency noise compo-nents apparent during higher current excursions. Preferredlow-ESR capacitor part numbers are identified in Table 2-1.

/rodneVroticapaCseireS

scitsiretcarahCroticapaC y titnauQ

gnikroWegatloV

)Fµ(eulaV t nelaviuqE)RSE(ecnatsiseRseireS

mumixaMC˚501elppiR

)smrI(tnerruC

lacisyhP)mm(eziS

tupnIsuB

lanoitpOtuptuO

suB

rebmuNtraProdneV

)TMS(AWcinosanaPlaidaR-CF

)TMS(KF

V61V52V52V53

0330330001

086

220.0 Ω090.0 Ω060.0 Ω060.0 Ω

Am0014>Am557Am0011Am0011

01 × 2.0101 × 5.215.21 × 5.315.21 × 5.31

2211

1111

P133C1AWFEE133E1CFUEEQ201E1KFVEEQ186V1KFVEE

XF-noC-imehCdetinUseireSSP

ZXL)TMS(AXP

V61V61V61V61

033033086

3x081

810.0 Ω410.0 Ω860.0 Ω620.0 Ω

Am0054Am0505>

Am0501Am0043>

01 × 5.0101 × 5.2101 × 6101 × 7.7

2213

1111

M033XF6121JM033SP61

LL61X01M186BV61ZXLPT08JM181CV61AXP

nocihciNseireSMP

GW

V52V52V53V52

065086065033

060.0 Ω550.0 Ω840.0 Ω

51.0 ÷2 Ω

Am0601Am0721Am0631Am0001>

5.21 × 5161 × 5161 × 5101 × 01

1112

1112

6HHM165E1MPU6HHM186E1MPU6HHM165V1MPU

SG1RNM133E1GWU

:noc-sOPS

)TMS(PVSV61V61

072033

810.0 Ω610.0 Ω

Am0053>Am0074

01 × 5.0111 × 21

22

11

M072PS61M033PVS61

mulatnaTXVASPT )TMS(

V01V01

033033

01.0 Ω60.0 Ω

Am0052>Am0003>

L3.7× W7.5× H1.4

R/N )1(

R/N )1(11

0010R010M733ESPT V( o )V1.5<0600R010M733VSPT V( o )V1.5<

mulatnaTtemeKseireS594T/025T

)TMS(

V01V01

033022

40.0 Ω70.0 Ω

Am0061Am0002>

W3.4× L3.7× H0.4

R/N )1(

R/N )1(11

SA010M733X025 V( o )V1.5<SA0010M722X594T V( o )V1.5<

mulatnaTeugarpS)TMS(seireSD495

V01 033 540.0 Ω Am0632 L2.7× W6× H1.4

R/N )1( 1 T2R0100X733D495 V( o )V1.5<

Page 17: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

PMG Series Mechanical data

PMG Series Datasheet © Ericsson Power Modules, June 2004 19

Page 18: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

PMG Series Mechanical data

PMG Series Datasheet © Ericsson Power Modules, June 200420

Page 19: PMG 4318T beta1file.yizimg.com/316215/2009051204334587.pdf · processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down

21 EN/LZT 146 076 R1A ©Ericsson Power Modules, June 2004PMG Series Datasheet

Sales Offi ces and Contact Information

Company HeadquartersEricsson Power Modules ABLM Ericssons väg 8SE-126 25 StockholmSweden

Phone: +46-8-568-69620Fax: +46-8-568-69599

ChinaEricsson Simtek Electronics Co.33 Fuhua RoadJiading DistrictShanghai 201 818

Phone: +86-21-5951-6258Fax: +86-21-5951-6188

France, Switzerland, BeneluxEricsson Power Modules ABBat Sologne17 Rue des 4 vents92380 Garches

Phone: +33-1-4741-5244Fax: +33-1-4741-5244

North and South America Ericsson Inc. Power Modules6300 Legacy Dr.Plano, TX 75024

Phone: +1-972-583-5254 +1-972-583-6910Fax: +1-972-583-7839

Hong Kong (Asia Pacifi c)Ericsson Ltd.12/F. Devon House979 King’s RoadQuarry BayHong Kong

Phone: +852-2590-2453Fax: +852-2590-7152

Italy, Spain (Mediterranean)Ericsson Power ModulesVia Cadorna 7120090 Vimodrone (MI)Italy

Phone: +39-02-265-946-07Fax: +39-02-265-946-69

UK, EireEricsson Power Modules ABUnited Kingdom

Phone: +44-1869-233-992Fax: +44-1869-232-307

All other countriesContact Company Headquartersor visit our website:www.ericsson.com/powermodules

Information given in this data sheet is believed to be accurate and reliable. No re sponsibility is assumed for the con sequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. No license is grant ed by implication or otherwise under any patent or patent rights of Ericsson Power Modules. These products are sold only ac cording to Ericsson Power Modules’ general conditions of sale, unless oth erwise con fi rmed in writing. Specifi cations subject to change without notice.