JSL 1 Photovoltaic Power Conversion Systems Jih-Sheng (Jason) Lai, Ph.D. James S. Tucker Professor Virginia Polytechnic Institute and State University Future Energy Electronics Center 106 Plantation Road Blacksburg, VA 24061 Presentation at IEEE Virginia Mountain Section Blacksburg, Virginia January 31, 2013
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JSL1
Photovoltaic Power Conversion Systems
Jih-Sheng (Jason) Lai, Ph.D.James S. Tucker Professor
Virginia Polytechnic Institute and State UniversityFuture Energy Electronics Center
106 Plantation RoadBlacksburg, VA 24061
Presentation at
IEEE Virginia Mountain SectionBlacksburg, Virginia
January 31, 2013
JSL2
Outline
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum Power
Point Tracking 3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles 5. Future Trends
JSL3
Outline – Part 1
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum
Power Point Tracking 3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles 5. Future Trends
JSL4
PV Market Outlook
(GW)• PV market continues growing especially in Asia;
China grew 470% in 2011; US looks to 3GW in 2012• PV industry generates $93B global revenues with
27.4GW installation in 2011 (~$3/W)
20132012
JSL5
Desertec 2050
• MENA desert power can supply around two-thirds of the region’s rising energy demand and 17 percent of EU consumption.
• In 2009, DESERTEC Foundation was founded with financial plan to 2050 • Invest in renewable energy and interconnected grids in EU-MENA• Tunisia started 2-GW CSP in 2011 and scheduled to deliver power in 2016
“Within 6 hours deserts receive more energy from the sun than humankind consumes within a year.”Dr. Gerhard Knies
JSL6
PV System Cost TargetsUS SunShot Initiative (Feb. 2012)
• 75% solar system cost reduction through – Reducing solar technology costs– Reducing grid integration costs – Accelerating solar deployment
• By 2020, cost targets are: – $1/W for utility-scale PV systems – $1.25/W for commercial rooftop PV – $1.50/W for residential rooftop PV
• Inverter cost targets: – $0.10/W for utility-scale systems – $0.11/W for commercial systems – $0.12/W for residential systems
JSL7
Power Electronics Cost Reduction• Solving fundamental power electronics problems at the
component level.• Reducing the cost of advanced components (SiC, GaN). • Addressing reliability failures due to thermal cycling of
materials.• Developing technologies that allow high penetrations of
solar technologies onto grid (VAR control, storage). • Developing PV system technologies that reduce overall
Balance of System costs (high-voltage systems). • Developing technologies that harvest more energy from
sun (MPPT and micro-inverters). • Integrating micro-inverters into modules, reducing
installation effort and achieving further cost reductions through mass production.
JSL8
Outline – Part 2
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum Power
Point Tracking 3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles 5. Future Trends
JSL9
State-of-the-Art Solar PV Technologies
Cell Type *Best Reported Efficiency
Comments
SiliconMono crystalline Poly crystalline
25.0%27.6%
• Conventional technologies • Cost became competitive with Asian manufacturing
• Used in everything, from solar watches to solar shingles to megawatt
• Ink jet printing cost down will challenge Si
Concentrating PV (CPV) 41.6% • Need solar concentrators• Too expensive in near term
Organic and dye sensitized
11.1% Powering portable electronics
* Efficiency data referred to J. Milliken, “Solar Energy Technologies Program Overview,” Apr. 2010, NREL
JSL10
PV Cell V-I Characteristics Representation
Isc +
–D
ID
VVD
+
–
I
ID
V+
–
ID-V curve
V
I-V curveID-V curve
I-V curve
ID
–Isc
I
V V
Derivation of I-V CurveI = Isc – ID
Flip current direction V-I Curve
ID Isc
JSL11
0
10
20
30
40
50
60
70
0 0.1 0.2 0.3 0.4 0.5 0.6
Solar Cell V-I Characteristics as a Function of Temperature
Out
put C
urre
nt (m
A)
Output voltage (V)
Hot
Cold
Maximum power point (MPP)
Isc change +0.04%/°K
Voc change –0.34%/°K
JSL12
Typical Solar Cell V-I Characteristics
0
10
20
30
40
50
60
70
0 0.1 0.2 0.3 0.4 0.5 0.6
Out
put C
urre
nt (m
A)
Output voltage (V)
Maximum power point
Illumination level (125 mW/cm2)
100 mW/cm2
JSL13
Solar Spectrum: Atmosphere Influence
Air mass definition: AMx = Ax/A1 = 1/cos ()
2
1
hsAM
h
s
AM1 means = 0AM1.5 means = 48.2°
JSL14
Example PV Panel Specifications Kyocera KD180GX-LP
Dimension: 1341mm x 990mm x 36mm (52.8in x 39.0in x 1.4in)Weight: 16.5 kg (36.4 lbs)
48 cells
JSL15
Manufacturer’s Datasheet Kyocera KD180GX-LP
(b) Irradiance effect
0 10 20 30Voltage (V)
9
8
7
6
5
4
3
2
1
0
Cur
rent
(A)
1000W/m2
800W/m2
600W/m2
400W/m2
200W/m2
At 25°C9
8
7
6
5
4
3
2
1
00 10 20 30
Voltage (V)
Cur
rent
(A)
75°C
25°C
50°C
(a) Temperature effect
At 1000W/m2
JSL16
Four-Quadrant Photovoltaic Cell Characteristics
• PV cell may operate in different quadrants: Q1, Q2, Q4.
• Q1 is normal operating zone. Cell is generating power.
• Q2 has reverse cell voltage, may appear in series-connected cells. Cell is dissipating power.
• Q4 has reverse cell current, may appear in parallel-connected cells. Cell is dissipating power.
Isc +
–D
ID
VVD
+
–
I
V
I
Q1Q2
Q4
+
–
+
–
+
–
JSL17
Series String PV Cell Under Shaded Condition
V
I 2 non-shaded cells
1 shaded cell
Io
–Vc Va+VbVBD
Potential hot spot or failure when Vc > VBD
Io
Vo
+
–
Va
Vb
Vc
cbao VVVV
DC-DCConverter
orDC-ACInverter
V
I 2 non-shaded cells
1 shaded cell
Io
Vdiode Va+VbVBD
Io
Vo
+
–
Va
Vb
Vc
DC-DCConverter
orDC-ACInverter
Adding anti-paralleled diode avoids failure
JSL18
Bypass Diodes in a Typical PV Panel
• A PV panel typically consists of 48 to 72 cells with 3 bypass diodes.
• A bypass diode covers 16 to 24 cells.
• For 24 cells case, if each cell voltage is 0.5V, and diode voltage drop is 0.6V, then the worst case shaded cell reverse voltage = 240.5+0.6 = 12.6 V (< breakdown voltage)
Junction box +–
JSL19
Bypass Diode Power Dissipation
Junction box +–
Assume Io = 8A. Diode dissipations:
• Si diode: 0.7V8A = 5.6W • Schottky diode:
0.4V8A = 3.2W • Active diode (synchronous
rectification): (8A)2(5m) = 0.32W
Io
JSL20
Lightning Impact
vDiDilt
MvDiDilt
M
dtdiMv lt
D
ltD iL
kMi
Case a: • Bypass diode
stressed in forward direction
• High forward current (~kA) may destroy diode
Case b: • Bypass diode
stressed in reverse direction
• High induced voltage may exceed diode breakdown voltage VBD and result in over-voltage failure
k: frame reduction factor (0.1-0.5)
M: mutual inductance (20-100 nH)
L: loop inductance of each string (1-3 µH)
JSL21
Lightning Catastrophic Failure Case
–
+
Inverter
• Normally, PVs are protected with metal oxide varistor (MOV), i.e., RGND = 0, VPV = VMOV, but when the ground wire is broken, lightning surge can conduct through parasitic capacitors, i.e., RGND = , VPV = kVsurge, k<1.
• Photos show a catastrophic failure when ground wires were stolen in a MW PV farm installation. All cells were shattered, and diodes were broken.
VPV
JSL22
Maximum Power Point of a PV Cell
• Typically, Isc 1.05 to 1.15 IMPP, VMPP 0.8Voc• Defining fill factor (FF)• Typical fill factors are:
– C-Si: 0.75 ~ 0.85– A-Si: 0.5 ~ 0.7
scoc
MPPMPP
scoc
MPP
IVIV
IVPFF
Maximum Power Point (MPP)
JSL23
Multiple Peaks Due to Shading Effect with 3-Bypass Diode Configuration
0
20
40
60
80
100
120
0 4 8 12 16 20 24
012345678
0 4 8 12 16 20 24
partial shaded condition
Pow
er (W
)
Voltage (V)
Cur
rent
(A)
partial shaded condition
full-sun condition
full-sun condition
Shading condition:• Modules a & b: full-sun
condition• Module c: shaded
condition
12-cells in series
a
b
c
V
I
JSL24
Case with Mismatched Panels and Different Irradiation Levels Among Them
Two different types of PV panels in series with different irradiation levels among them can result in multiple MPPs
0 50 100 150 200 250 300 350 4000
200
400
600
800
1000
1200
Voltage(V)
Pow
er(W
)
Voltage--PowerMPP
187.6V 252V 329V
JSL25
Maximum Power Point Tracking (MPPT)
• MPP control is required to harness as much energy as possible.
• Poor MPPT method is equivalent to having additional loss.• Important MPPT design considerations:
– Tracking speed – Control loop stability – Oscillation around MPP including double line frequency oscillation – Global MPP versus local MPP – Which stage performs MPPT, DC-DC stage or DC-AC stage? – Control of VPV or IPV? – Step size? – Digital versus analog
• Almost 20 distinct published methods, ranging from ripple correlation control (a fast method that uses converter ripple to find the MPP) to fuzzy logic controls.
JSL26
Fractional Open-Circuit Voltage• For most PV cell types,
there is a nearly linear relationship between VMPPand VOC, VMPP xVoc
• x depends on PV material, typically 0.74 to 0.8 Voc
• Measure VOC at infrequent intervals, then use the known fraction as the basis for control
• Only an approximation →operation practically never exactly at the MPP
Simple, low cost, fast, and robust
Poor accuracy, lost power during Voc measurement
Cur
rent
(A)
Voltage (V)
10
9
8
00
1
2
3
4
5
7
6
80
20
2
40
4
60
6 1210
Pow
er (W
)
JSL27
Hill-Climbing/Perturb & Observe Methods
• Alter the operating point, by changing a duty ratio slightly.• Check whether the power rises or falls.• Keep changing to get higher power.
Perturbation Change in Power Next PerturbationPositive Positive PositivePositive Negative NegativeNegative Positive NegativeNegative Negative Positive
Key Features• Clear and effective.• Convergence depends on perturbation step size and converter
settling times.• Goes to a local maximum power point.
JSL28
Outline – Part 3
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum Power
Point Tracking3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles 5. Future Trends
JSL29
Different PCS Architectures
Centralized DC/AC with distributed
series strings
Centralized DC/AC with distributed
series strings+ DC/DC
Centralized DC/AC with
SeriesDC modulesDistributed
series strings+ DC/AC
~MW ~kW DC/DC 100’s W DC/AC ~kW
~100’s W
DistributedAC modules
Centralized DC/AC with Paralleled
DC modules
1 2 3 4 5 6
JSL30
Panel Level Power Electronics Becomes More Popular Choices
DC-AC
(a) String inverter 3‐12kW (e.g. SunnyBoy)
(b) Microinverter 190‐240W (e.g. Enphase)
DC-AC
DC-AC
(c) Series DC‐DC power optimizer (e.g. SolarMagicTM)
DC-AC
(d) Paralleled DC‐DC power optimizer (e.g. VT IntelliSOLARTM)
JSL31
Power Output Comparison with and without Power Optimizer Under Shaded Condition
5s
4A
300V
VPV
IPV
(a) Without SolarMagicTMshaded
DC-AC
4A
5s
300V
VPV
IPV
(b) With SolarMagicTMshaded
DC-AC
DC-DC
Using SolarMagicTM as power optimizer for series connected panelsa) Without SolarMagicTM, the PV inverter output power drops from 1300W to
60W (95% reduction)b) With SolarMagicTM, the PV inverter output power drops from 1450W to
1200W (17% reduction)
JSL32
VT Solar House PCS Configured with SunnyBoy, SolarMagicTM, and Enphase Inverters
AC Grid Configuration
• For each SolarMagic or Enphase, input peak voltage is 40V
• Each PCS branch consists of 26 PV panels with 1.95kW peak power feeding into a “mini micro grid”
• Cumulated energy production over a two‐month period further verifies the partial shading impact to the centralized inverter
JSL38
Outline – Part 4
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum Power
Point Tracking 3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles 5. Future Trends
JSL39
Inverter Efficiency Standards• California Energy Commission (CEC)
– All inverters must meet the requirements in Emerging RenewablesProgram, Final Guidebook, Eighth Edition, Section C Inverters.
– There are no set minimum requirements, but the conversion efficiency must be tested and reported to CEC –as defined here.
• IEC 61683:1999, First Edition, 1999-11, Photovoltaic systems –Power conditioners – Procedures for measuring efficiency. – This standard describes guidelines for measuring the efficiency of
power conditioners used in standalone and utility interactive photovoltaic systems, where the output of the power conditioner is a stable ac voltage of constant frequency or a stable dc voltage. The efficiency is calculated from a direct measurement of input ad output power in the factory. An isolation transformer is included where it is applicable.
• China: GB/T 20514-2006 Photovoltaic systems – Power conditioners – Procedure for measuring efficiency. – Based on IEC 61683:1999.
JSL40
CEC and IEC Weighted Efficiency Measurement
CEC IEC
5% 0 0.03
10% 0.04 0.06
20% 0.05 0.13
30% 0.12 0.10
50% 0.21 0.48
75% 0.53 0
100% 0.05 0.20
JSL41
CEC Efficiency Evaluation for a 200-W PV Inverter Sample #5Sample #4Sample #3Sample #2Sample #1Specified
(%)(Vdc)(W)(%)(Vdc)(W)(%)(Vdc)(W)(%)(Vdc)(W)(%)(Vdc)(W)(Vdc)(% of rated)
JSL42
CEC Efficiency Evaluation Report for a 200-W Microinverter
CEC Efficiency
Vmin: 95.4% Vnom: 95.7% Vmax: 95.7%
Average: 95.6%9192939495969798
0% 20% 40% 60% 80% 100%Percent output power
Effi
cien
cy (%
)
Vnom = 40.5 V
Vmin = 31 V
Vmax = 50 V
• Minimum 5 samples are needed for efficiency evaluation. • Efficiencies need to be measured at different input voltages and
different load conditions. The final reported CEC efficiency is the average of CEC efficiencies at three voltages.
JSL43
A Grid-Tie Solar Power Conversion System
AC/DCVPV
+
–
HFPWM
DC/AC
HFXformer HF
SPWMDC/AC
VacVdc
VPV
IPV
DC-AC inverter with AC filtering (Low frequency)
PV source
Utility grid
DC-DC converter with isolation (Low to High voltage DC)
JSL44
Isolated Single- v.s. Two-Stage Configurations
(a) Single PWM stage type, no high voltage energy storage
(b) Two‐PWM stage type, with high voltage DC bus and energy storage
AC/DCRectifier
HFSPWMDC/AC
Vac
Vdc
Vin
+
–
HFPWMDC/AC
HighFreq.
Xformer
AC/DCRectifier
Vin
+
–
HFPWMDC/AC
HighFreq.
Xformer LFunfolding
DC/AC
Vac
• Single PWM stage is generally more efficient, but requires largestorage capacitor at the input to stabilize MPPT
• Two PWM stages mean more costly components and higher switching loss, but the system allows high voltage DC bus to absorb 120Hz ripple and thus eliminating electrolytic capacitor
JSL45
Switching with Hybrid Line and PWM Frequencies
S1
S2
S3
S4
S4
S1
S2
S3
vo
Features:• Line frequency switching for bottom or top switches (IGBT as the
switching device) • PWM switching for top switching (MOSFET as the switching
device)• Ultra fast reverse recovery diodes can be used for freewheeling • Potential high efficiency • Less shoot-through concerns• Ground loop leakage current is an issue with unipolar PWM
JSL46
Ground Loop Leakage Current Issues• With thin-film PV getting more popular, the parasitic
capacitance between PV and ground also draws more attention due to the increase of the ground loop leakage current.
• Different inverter modulation methods may produce the same output load current, but they may see different output common mode voltage against the neutral and ground, and thus producing different ground loop leakage current.
• The ground loop leakage current may be alleviated by providing circuit isolation, modulation methods, or different circuit topologies.
JSL47
Non-isolated H5TM Inverter – Avoid Leakage Current with Unipolar Switching (SMA 8000TL)
Basic Operation:• S3 and S5 operates in SPWM on negative cycle• S4 and S5 operates in SPWM on positive cycle• Complementary PWM at the input No
leakage current • IGBT’s S1 and S2 serve as low frequency
selection network• S6 is for over-voltage protection
208 VAC output8 kWPower
98.0 %CEC efficiency98.3 %Max. efficiency345 VNominal voltage
300–480VPV voltage range
JSL48
Full-Bridge Inverter with Low-Frequency Transformer Isolation (SMA 5000US)
inductance to serve as differential mode inductance
• Reasonable efficiency • Very bulky and heavy (150 lbs for a 5-
kW inverter)
PV array
Transformer with leakage inductance
30’s
240 VAC output5 kWPower
95.5%CEC efficiency96.4%Max. efficiency310 VNominal voltage
250–480VPV voltage range
JSL49
A Microinverter with Two-stage Power Conversion
Push-pull DC-DC
Features:• Two power stages, two PWM stages • Push-pull stage converts the input voltage
to around 230V (26 kHz)• Inverter uses fast reverse recovery diodes
and IGBTs (30 kHz) • Low THD• Relatively low efficiency
VPV
vac
120 VAC output voltage212 WPower
94.5 %CEC efficiency95.3 %Max. efficiency50 VNominal voltage
36–55 VPV voltage range
Full-bridge DC-AC
Exeltech
JSL50
Active-Snubber Flyback Microinverter
Q3
D2
D1
Sx2 S2
S1Sx1
Q1
Q2 Q4Q5
Basic Operation:• Interleaved flyback converters serve as single-stage power conversion. Sx1 and
Sx2 are auxiliary switches for active snubber. • Q1, Q2, Q3, and Q4 thyristors serve as polarity selection switches. • Q5 helps commutate thyristors under low dc bus voltage condition.Key Design Features:• Single-stage power conversion, good overall efficiency• Good waveform fidelity, low THD • Burst mode operation at load below 30% of rated power• Concern on the life span of electrolytic capacitors
190 WPower
95 %CEC efficiency95.4 %Max. efficiency32.5 VNominal voltage
22–40 VPV voltage range
Enphase
JSL51
Highly Efficient and Reliable Concept (Heric) Inverter
Vdc
LoRo
S1
S2 S4S5
S6
IoIS1
IS3
S3
IS2
IS4
a b
• Unipolar operation to reduce current ripple. • Main switches (S1 ~ S4) operate in switching frequencies• Auxiliary switches (S5 and S6) with fast reverse recovery diodes operate
in low-frequency to serve as the freewheeling path to avoid reverse recovery problem of slow body diode of the main switch, which are CoolMOS with very low conduction drop.
S5
S1,S4
S2,S3
S6
Vo
Fraunhofer Society
JSL52
Outline – Future Trend
1. PV Market Outlook and Cost Targets2. PV Cell Characteristics and Maximum Power
Point Tracking 3. Energy Production Comparison for Different
PV System Architectures4. Commercial PV Power Conversion Circuits
and Efficiency Profiles5. Future Trends
JSL53
Future Trend in Cost Reduction
• Cost Target – with 10¢/W as cost target, pressure is high to further reduce the cost of power electronics
• More Power Electronics Integration – with 50/60-Hz low-frequency component, cost and size reduction on inverter side is difficult, but DC-DC will have chance for more integration
• More Use of Wide Bandgap Devices – By pushing frequency to MHz range, GaN and SiC devices will be adopted for significant size and cost reduction
• Plug-and-Play – Ease of installation is a way to reduce labor cost. We may see more integration with PV panels and power electronics
JSL54
Future Trend in Efficiency Figures Historical figures: Enphase inverter was 95.5% in Gen-1 and 96% in Gen-2 SMA inverter was 95.5% with isolated version and 98% with
non-isolated version Efficiency will continue moving up. Future
development needs to target: Micro-inverter – 97% String/centralized inverter – 99%
Key factors driving up efficiency Wide bandgap and super-junction devices More efficient converter/inverter circuit
• with reduced circulating current for conduction loss reduction • With soft switching for switching loss elimination