Photonic Packet Switches: Architectural and design issues Yatindra Nath Singh Electrical Engineering Dept./ACES IIT Kanpur-208016 Email: [email protected] http://home.iitk.ac.in/~ynsingh
Mar 31, 2015
Photonic Packet Switches: Architectural and design issues
Yatindra Nath Singh
Electrical Engineering Dept./ACES
IIT Kanpur-208016
Email: [email protected]
http://home.iitk.ac.in/~ynsingh
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Outline of the talk
- What is packet switch?
- Functionalities of packet switch
- Why optical packet switching?
- Basic switching elements and buffering
- Various architectures
- What we have been doing?
- Conclusion
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NxN switch
1
N
1
N
Input ports
Output
ports
What is a packet switch?
- Packet arrivals at inputs
- Header analysis and routing to designated output port
- Header replacement
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Functions in a packet switch
- Routing
- communication between neighbors
- resulting in provisioning of network connectivity information
- ultimately gives routing tables
- Forwarding
- analysis of header
- comparison of destination info with routing table
- decision regarding destination output port.
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- Switching
- directing each packet to proper output (as defined by forwarding process)
- needs switching and interconnect elements
-Buffering
- resolving contention by storing packets
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Problems with optical circuit switching
- BW granularity is poor.
- IP Router A not connected to IP Router B. Both connected to IP Router C.
- Packet from A to B goes via C.
- AC and CB light path may share some physical link.
- If traffic between AB high, Light path should be adjusted.
- Average traffic per physical link should be minimized.
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Why optical packet swtiching?
• clock skew
• cheaper electronic interfaces
• bit rate, modulation and format need not be standard
• Need to be agreed between two edge routers only.
• leads to payload transparency.
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Basic elements needed for the switching
- SOA
- Electro-optic switch (based on 2x2 coupler)
- Spatial Light modulator
- Tunable wavelength converters alongwith wavelength filter/ AWGM
- Fixed wavelength converter with tunable filter
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Basic generic packet switch
Synchroni-zing block
HeaderReplace-
ment block
SwitchingAnd
Bufferingblock
Switch controller
1
N
1
N
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- Routing and forwarding - difficult to implement using optical technology at the moment
- Switching and buffering - can be implemented optically as well as electronically
For photonic packet switch
- hybrid approach preferred
Routing and forwarding - using electronics
switching and buffering - optically
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Format for packets
For implementing certain optical header regeneration techniques
- packet format may be different. This structure need to be standardized over the network.
- for payload only duration need to be standardized.
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For buffering
- No equivalent of RAM in optical domain.
- Bits can be stored in bistable laser diodes or flip-flops
made using optical logic gates. (Technology is not
matured for implementing large optical RAMs.)
- Optical fiber delay lines
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Effective Refractive index in fiber ~ 1.5
Speed of light in fiber ~ 2x108 m/s
For packet with 1024 bytes = 8192 bits ~ 9000 bits (overhead bits, synchronization bits etc.), transmission rate 1Gb/s,
duration of transmission = 9x10-6 secs (slot period)
Fiber length to delay the packet by one slot = 1.8 km
T
b
n
cl
l - length of loop,
c - Speed of light,
n - R.I. of fiber,
b - number of bits in packet,
T - transmission rate
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Various types of buffers
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Other devices available
- WDM (multiplexers, demultiplexers),
- Couplers,
- filters,
- Add drop multiplexers
using these and other elements
switch architectures can be build.
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Wavelength routed all-optical packet switch
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Frontiernet architecture : another wavelength routed switch
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Broadcast and select type of switch
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Fiber loop memory based switch
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Architectural issues
- Processing time for a header
- Switch throughput – limited by number of headers that can be processed by controller.
- Payload should be sufficiently large in size.
- Ideally header processing time should be less than packet duration.
- Header replacement technique
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- Guard band duration.
- too small, tight tolerances on fiber delay lines and switch control implementation.
- too large, channel utilization low.
- Control points
- more separation of control points
- control synchronization required.
- Architectures with control points at inputs or output only – simpler to implement.
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- Noise accumulation
- ASE (amplified spontaneous emission noise) of Optical
amplifiers
- Gain crosstalk of optical amplifier
- Gain in loop if maintained equal to loss of loop, minimization
of noise accumulation.
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What we have been done so far?
(using analysis and simulations – in fiber loop buffer memory
switch)
- degradation due to ASE noise with number of recirculations
- control algorithm for the switch (with and without priority
mechanisms
- queuing performance analysis (exact and approaximate
methods) – appeared in IEEE comm. Letters, May 2001.
Detailed paper submitted in IEEE/OSA Journal of Lightwave
technology.
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- gain control techniques for EDFA to optimize switch performance
- gain in the loop should be maintained equal to loss for optimized operation test
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Recent results on this submitted to Electronics Letters.
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Summary and future scope
- Optical switching can be a viable technique for switching in backbone
- Investigation on queuing performance for multiple priority traffic/ multicast traffic need to be done.
- Investigations in high speed optical memories needed.
- control function of routing and forwarding using optical processing (need investigation)
- Switching architecture using free space optics