Top Banner
Published by ER /TY 1162 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 19100 2011-Feb-18 © Copyright 2011 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Colour Television Chassis Q552.2E LA 19100_000_110214.eps 110214 Contents Page Contents Page 1. Revision List 2 2. Technical Specifications, Diversity, and Connections 2 3. Precautions, Notes, and Abbreviation List 6 4. Mechanical Instructions 10 5. Service Modes, Error Codes, and Fault Finding 17 6. Alignments 36 7. Circuit Descriptions 40 8. IC Data Sheets 46 9. Block Diagrams Wiring diagram Blockbuster 32" 59 Wiring diagram Blockbuster 37" 60 Wiring diagram Blockbuster 40" 61 Block Diagram Video 62 Block Diagram Audio 63 Block Diagram Control & Clock Signals 64 Block Diagram I2C 65 Supply Lines Overview 66 10. Circuit Diagrams and PWB Layouts Drawing B01 393912364954 67 B02 393912364954 78 B03 393912364954 87 B04 393912364954 95 B05 393912364954 100 B06 393912364954 101 B07 393912364954 105 B08 393912364954 106 B09 393912364954 108 313912364954 SSB Layout 109 E 27221719026x IR/LED/Key Board 111 11. Styling Sheets Blockbuster 32" 112 Blockbuster 37" 113 Blockbuster 40"& 46" 114
114

Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Oct 30, 2014

Download

Documents

Tiberiu2006
Welcome message from author
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
Page 1: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Published by ER/TY 1162 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 19100

2011-Feb-18

©Copyright 2011 Koninklijke Philips Electronics N.V.All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Colour Television Chassis

Q552.2ELA

19100_000_110214.eps110214

Contents Page Contents Page1. Revision List 22. Technical Specifications, Diversity, and Connections23. Precautions, Notes, and Abbreviation List 64. Mechanical Instructions 105. Service Modes, Error Codes, and Fault Finding 176. Alignments 367. Circuit Descriptions 408. IC Data Sheets 469. Block Diagrams

Wiring diagram Blockbuster 32" 59Wiring diagram Blockbuster 37" 60Wiring diagram Blockbuster 40" 61Block Diagram Video 62Block Diagram Audio 63Block Diagram Control & Clock Signals 64Block Diagram I2C 65Supply Lines Overview 66

10. Circuit Diagrams and PWB Layouts DrawingB01 393912364954 67B02 393912364954 78B03 393912364954 87B04 393912364954 95B05 393912364954 100B06 393912364954 101B07 393912364954 105B08 393912364954 106B09 393912364954 108313912364954 SSB Layout 109E 27221719026x IR/LED/Key Board 111

11. Styling SheetsBlockbuster 32" 112Blockbuster 37" 113Blockbuster 40"& 46" 114

Page 2: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Revision ListEN 2 Q552.2E LA1.

2011-Feb-18 back to div. table

1. Revision ListManual xxxx xxx xxxx.0• First release.

2. Technical Specifications, Diversity, and Connections

Index of this chapter:2.1 Technical Specifications2.2 Directions for Use2.3 Connections2.4 Chassis Overview

Notes:• Figures can deviate due to the different set executions.• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the CTN links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model Numbers and Diversity

2.2 Directions for Use

You can download this information from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com

CTN Styling

SSB 2 4 7 9 10

3139

123

xxx

xx

Co

nn

ecti

on

Ove

rvie

w

Mechanics Descriptions

Wir

ing

Dia

gra

m

Schematics

Wir

e D

ress

ing

Ass

emb

ly R

emo

val

LC

D R

emo

val

PS

U

Tu

ner

Am

biL

igh

t

TC

ON

AL

xx (

Am

bili

gh

t) L

iteO

n

AL

xx (

Am

bili

gh

t) E

verl

igh

t

B01

(T

un

er)

B02

(P

NX

8550

0)

B03

(D

C/D

C /

Cla

ss D

)

B04

(I/O

)

B05

(D

DR

)

B06

(n

on

-DV

BS

-LV

DS

)

B07

(D

VB

S-F

E)

B08

(D

VB

S-S

up

p.)

B09

(n

on

-DV

BS

-co

nn

.)

E (

IR/L

ED

/Key

Bo

ard

)

- -

32PFL6606H/12 Blockbuster11-1

64954 2.3 4-1 4.3 4.3.8 7.2 7.4.1 - - 9-1 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

32PFL6606K/02 Blockbuster11-1

64954 2.3 4-1 4.3 4.3.8 7.2 7.4.1 - - 9-1 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

37PFL6606H/12 Blockbuster11-2

64954 2.3 4-2 4.3 4.3.8 7.2 7.4.1 - - 9-2 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

37PFL6606K/02 Blockbuster11-2

64954 2.3 4-2 4.3 4.3.8 7.2 7.4.1 - - 9-2 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

40PFL6606H/12 Blockbuster11-3

64954 2.3 4-3 4.3 4.3.8 7.2 7.4.1 - - 9-3 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

40PFL6606K/02 Blockbuster11-3

64954 2.3 4-3 4.3 4.3.8 7.2 7.4.1 - - 9-3 - - 10-1 10-2 10-3 10-4 10-5 10-6 10-7 10-8 10-9 10-11 - -

Page 3: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Technical Specifications, Diversity, and Connections EN 3Q552.2E LA 2.

2011-Feb-18back to div. table

2.3 Connections

Figure 2-1 Connection overview

Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Rear Connections

1 - EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out

Figure 2-2 SCART connector

1 - Audio R 0.5 VRMS / 1 kohm �

2 - Audio R 0.5 VRMS / 10 kohm �3 - Audio L 0.5 VRMS / 1 kohm �

4 - Ground Audio Gnd �

5 - Ground Blue Gnd �6 - Audio L 0.5 VRMS / 10 kohm �

7 - Video Blue 0.7 VPP / 75 ohm ��

8 - Function Select 0 - 2 V: INT4.5 - 7 V: EXT 16:99.5 - 12 V: EXT 4:3 �

9 - Ground Green Gnd �10 - n.c. 11 - Video Green 0.7 VPP / 75 ohm �

12 - n.c.

13 - Ground Red Gnd �14 - Ground P50 Gnd �

15 - Video Red 0.7 VPP / 75 ohm �

16 - Status/FBL 0 - 0.4 V: INT1 - 3 V: EXT / 75 ohm �

17 - Ground Video Gnd �

18 - Ground FBL Gnd �19 - Video CVBS/Y 1 VPP / 75 ohm �

20 - Video CVBS 1 VPP / 75 ohm �

21 - Shield Gnd �

2 - Service Connector (UART)1 - Ground Gnd �

2 - UART_TX Transmit �

3 - UART_RX Receive �

3 - EXT2: Cinch: Video YPbPr - In, Audio - InGn - Video Y 1 VPP / 75 ohm ��

Bu - Video Pb 0.7 VPP / 75 ohm ��Rd - Video Pr 0.7 VPP / 75 ohm ��

Rd - Audio - R 0.5 VRMS / 10 kohm ��

Wh - Audio - L 0.5 VRMS / 10 kohm ��

4 - Cinch: Audio - In (VGA/DVI)Rd - Audio R 0.5 VRMS / 10 kohm ��

Wh - Audio L 0.5 VRMS / 10 kohm ��

5 - SAT - In- - F-type Coax, 75 ohm �

REAR CONNECTORS

BOTTOM REAR CONNECTORS

SIDE CONNECTORS

19100_043_110214.eps110216

12

5

3

4

2

1

13

14

15

16

6 7 8 9 10 11

21

20

1

2

10000_001_090121.eps090121

Page 4: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Technical Specifications, Diversity, and ConnectionsEN 4 Q552.2E LA2.

2011-Feb-18 back to div. table

2.3.2 Rear Connections - Bottom

6 - RJ45: Ethernet

Figure 2-3 Ethernet connector

1 - TD+ Transmit signal �

2 - TD- Transmit signal �3 - RD+ Receive signal �

4 - CT Centre Tap: DC level fixation5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal �

7 - GND Gnd �

8 - GND Gnd �

7 - Cinch: S/PDIF - OutBk - Coaxial 0.4 - 0.6VPP / 75 ohm ��

8 - HDMI 2: Digital Video, Digital Audio - In

Figure 2-4 HDMI (type A) connector

1 - D2+ Data channel �2 - Shield Gnd �

3 - D2- Data channel �

4 - D1+ Data channel �5 - Shield Gnd �

6 - D1- Data channel �

7 - D0+ Data channel �8 - Shield Gnd �

9 - D0- Data channel �

10 - CLK+ Data channel �11 - Shield Gnd �

12 - CLK- Data channel �

13 - Easylink/CEC Control channel ��14 - n.c. 15 - DDC_SCL DDC clock �

16 - DDC_SDA DDC data ��17 - Ground Gnd �

18 - +5V �

19 - HPD Hot Plug Detect �20 - Ground Gnd �

9 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/Out

Figure 2-5 HDMI (type A) connector

1 - D2+ Data channel �2 - Shield Gnd �

3 - D2- Data channel �

4 - D1+ Data channel �5 - Shield Gnd �

6 - D1- Data channel �

7 - D0+ Data channel �8 - Shield Gnd �

9 - D0- Data channel �

10 - CLK+ Data channel �11 - Shield Gnd �

12 - CLK- Data channel �

13 - Easylink/CEC Control channel ��

14 - ARC Audio Return Channel �

15 - DDC_SCL DDC clock �16 - DDC_SDA DDC data ��

17 - Ground Gnd �

18 - +5V �19 - HPD Hot Plug Detect �

20 - Ground Gnd �

10 - Aerial - In- - IEC-type (EU) Coax, 75 ohm �

11 - VGA: Video RGB - In

Figure 2-6 VGA Connector

1 - Video Red 0.7 VPP / 75 ohm �

2 - Video Green 0.7 VPP / 75 ohm �

3 - Video Blue 0.7 VPP / 75 ohm �4 - n.c. 5 - Ground Gnd �

6 - Ground Red Gnd �7 - Ground Green Gnd �

8 - Ground Blue Gnd �

9 - +5VDC +5 V �10 - Ground Sync Gnd �

11 - n.c. 12 - DDC_SDA DDC data �13 - H-sync 0 - 5 V �

14 - V-sync 0 - 5 V �

15 - DDC_SCL DDC clock �

2.3.3 Side Connections

12 - Common Interface68p- See diagram B01A Common Interface ��

13 - SD-Card: Secure Digital Card - In/Out (optional)

Figure 2-7 SD-Card connector

1 - DAT3/CS Signal ��

2 - CMD/DI Signal �

3 - GND1 Gnd �4 - Vdd Supply �

5 - CLOCK Signal �

6 - GND2 Gnd �7 - DAT0/D0 Signal ��

8 - DAT1/IRQ Signal ��

9 - DAT2/NC Signal ��10 - CD Signal �

11 - GND Gnd �

11 2 3 4 5 6 7 8

10000_025_090121.eps090121

10000_017_090121.eps090428

19 1

18 2

10000_017_090121.eps090428

19 1

18 2

1

610

11

5

15

10000_002_090121.eps090127

10000_049_100210.eps100210

10

11

12

CD

GND

WP

14GND

13GND

1

2

3

4

5

6

7

8

9

DAT3/CS

CMD/DI

GND1

VDD

CLOCK

GND2

DAT0/D0

DAT1/IRQ

DAT2/NC

Page 5: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Technical Specifications, Diversity, and Connections EN 5Q552.2E LA 2.

2011-Feb-18back to div. table

12 - WP Signal �

13 - GND Gnd �

14 - GND Gnd �

14 - USB2.0

Figure 2-8 USB (type A)

1 - +5V �

2 - Data (-) ��

3 - Data (+) ��4 - Ground Gnd �

15 - Head phone (Output)Bk - Head phone 32 - 600 ohm / 10 mW ��

16 - HDMI : Digital Video, Digital Audio - InSee 8 - HDMI 2: Digital Video, Digital Audio - In

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

1 2 3 4

10000_022_090121.eps090121

Page 6: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Precautions, Notes, and Abbreviation ListEN 6 Q552.2E LA3.

2011-Feb-18 back to div. table

3. Precautions, Notes, and Abbreviation List

Index of this chapter:3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:• Connect the set to the Mains/AC Power via an isolation

transformer (> 800 VA).• Replace safety components, indicated by the symbol ,

only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the

mounted cable clamps.• Check the insulation of the Mains/AC Power lead for

external damage. • Check the strain relief of the Mains/AC Power cord for

proper function.• Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M.

4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD ). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (�), or hot ground (�), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with (�) and without (�) aerial signal. Measure the voltages in the power supply section both in normal operation ( ) and in stand-by (�). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).

• All capacitor values are given in micro-farads ( 10-6), nano-farads (n 10-9), or pico-farads (p 10-12).

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

IntroductionFor more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature ProfilesFor BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:• Use only lead-free soldering tin. If lead-free solder paste is

required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:– To reach a solder-tip temperature of at least 400°C.– To stabilize the adjusted temperature at the solder-tip.– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

Page 7: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Precautions, Notes, and Abbreviation List EN 7Q552.2E LA 3.

2011-Feb-18back to div. table

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number.By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page

ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control

signal used to tune to the correct frequency

AGC Automatic Gain Control: algorithm that controls the video input of the feature box

AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black bars without discarding video information

ATSC Advanced Television Systems Committee, the digital TV standard in the USA

ATV See Auto TVAuto TV A hardware and software control

system that measures picture content, and adapts image parameters in a dynamic way

AV External Audio VideoAVC Audio Video ControllerAVIP Audio Video Input ProcessorB/G Monochrome TV system. Sound

carrier distance is 5.5 MHzBDS Business Display Solutions (iTV)BLR Board-Level RepairBTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries

B-TXT Blue TeleteXTC Centre channel (audio)CEC Consumer Electronics Control bus:

remote control bus on HDMI connections

CL Constant Level: audio output to connect with an external amplifier

CLR Component Level RepairComPair Computer aided rePairCP Connected Planet / Copy ProtectionCSM Customer Service ModeCTI Color Transient Improvement:

manipulates steepness of chroma transients

CVBS Composite Video Blanking and Synchronization

DAC Digital to Analogue ConverterDBE Dynamic Bass Enhancement: extra

low frequency amplificationDCM Data Communication Module. Also

referred to as System Card or Smartcard (for iTV).

DDC See “E-DDC”D/K Monochrome TV system. Sound

carrier distance is 6.5 MHzDFI Dynamic Frame Insertion

10000_024_090121.eps100105

MODEL :

PROD.NO:

~

S

32PF9968/10 MADE IN BELGIUM220-240V 50/60Hz

128WAG 1A0617 000001 VHF+S+H+UHF

BJ3.0E LA

Page 8: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Precautions, Notes, and Abbreviation ListEN 8 Q552.2E LA3.

2011-Feb-18 back to div. table

DFU Directions For Use: owner's manualDMR Digital Media Reader: card readerDMSD Digital Multi Standard DecodingDNM Digital Natural MotionDNR Digital Noise Reduction: noise

reduction feature of the setDRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote

control designed for service technicians

DTCP Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394

DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel

(VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display.

EDID Extended Display Identification Data (VESA standard)

EEPROM Electrically Erasable and Programmable Read Only Memory

EMI Electro Magnetic InterferenceEPG Electronic Program GuideEPLD Erasable Programmable Logic DeviceEU EuropeEXT EXTernal (source), entering the set by

SCART or by cinches (jacks)FDS Full Dual Screen (same as FDW)FDW Full Dual Window (same as FDS)FLASH FLASH memoryFM Field Memory or Frequency

ModulationFPGA Field-Programmable Gate ArrayFTV Flat TeleVisionGb/s Giga bits per secondG-TXT Green TeleteXTH H_sync to the module HD High DefinitionHDD Hard Disk DriveHDCP High-bandwidth Digital Content

Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding.

HDMI High Definition Multimedia InterfaceHP HeadPhoneI Monochrome TV system. Sound

carrier distance is 6.0 MHzI2C Inter IC busI2D Inter IC Data busI2S Inter IC Sound busIF Intermediate FrequencyIR Infra RedIRQ Interrupt RequestITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for hotels, hospitals etc.

LS Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences

LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I

LPL LG.Philips LCD (supplier)LS LoudspeakerLVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound

carrier distance is 4.5 MHzMHEG Part of a set of international standards

related to the presentation of multimedia information, standardised by the Multimedia and Hypermedia Experts Group. It is commonly used as a language to describe interactive television services

MIPS Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor

MOP Matrix Output ProcessorMOSFET Metal Oxide Silicon Field Effect

Transistor, switching deviceMPEG Motion Pictures Experts GroupMPIF Multi Platform InterFaceMUTE MUTE LineMTV Mainstream TV: TV-mode with

Consumer TV features enabled (iTV)NC Not ConnectedNICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital sound system, mainly used in Europe.

NTC Negative Temperature Coefficient, non-linear resistor

NTSC National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)

NVM Non-Volatile Memory: IC containing TV related data such as alignments

O/C Open CircuitOSD On Screen DisplayOAD Over the Air Download. Method of

software upgrade via RF transmission. Upgrade software is broadcasted in TS with TV channels.

OTC On screen display Teletext and Control; also called Artistic (SAA5800)

P50 Project 50: communication protocol between TV and peripherals

PAL Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M=

Page 9: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Precautions, Notes, and Abbreviation List EN 9Q552.2E LA 3.

2011-Feb-18back to div. table

3.575612 MHz and PAL N= 3.582056 MHz)

PCB Printed Circuit Board (same as “PWB”)PCM Pulse Code ModulationPDP Plasma Display PanelPFC Power Factor Corrector (or Pre-

conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer can give directly the desired frequency

POD Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set)

POR Power On Reset, signal to reset the uPPSDL Power Supply for Direct view LED

backlight with 2D-dimmingPSL Power Supply with integrated LED

driversPSLS Power Supply with integrated LED

drivers with added Scanning functionality

PTC Positive Temperature Coefficient, non-linear resistor

PWB Printed Wiring Board (same as “PCB”)PWM Pulse Width ModulationQRC Quasi Resonant ConverterQTNR Quality Temporal Noise ReductionQVCP Quality Video Composition ProcessorRAM Random Access MemoryRGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced.

RC Remote ControlRC5 / RC6 Signal protocol from the remote

control receiver RESET RESET signalROM Read Only MemoryRSDS Reduced Swing Differential Signalling

data interfaceR-TXT Red TeleteXTSAM Service Alignment ModeS/C Short CircuitSCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et Téléviseurs

SCL Serial Clock I2CSCL-F CLock Signal on Fast I2C busSD Standard DefinitionSDA Serial Data I2CSDA-F DAta Signal on Fast I2C busSDI Serial Digital Interface, see “ITU-656”SDRAM Synchronous DRAMSECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz

SIF Sound Intermediate FrequencySMPS Switched Mode Power SupplySoC System on ChipSOG Sync On GreenSOPS Self Oscillating Power SupplySPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link standard

S/PDIF Sony Philips Digital InterFaceSRAM Static RAMSRP Service Reference ProtocolSSB Small Signal BoardSSC Spread Spectrum Clocking, used to

reduce the effects of EMISTB Set Top BoxSTBY STand-BYSVGA 800 × 600 (4:3)

SVHS Super Video Home SystemSW SoftwareSWAN Spatial temporal Weighted Averaging

Noise reductionSXGA 1280 × 1024TFT Thin Film TransistorTHD Total Harmonic DistortionTMDS Transmission Minimized Differential

SignallingTS Transport StreamTXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP MicroprocessorUXGA 1600 × 1200 (4:3)V V-sync to the module VESA Video Electronics Standards

AssociationVGA 640 × 480 (4:3)VL Variable Level out: processed audio

output toward external amplifierVSB Vestigial Side Band; modulation

methodWYSIWYR What You See Is What You Record:

record selection that follows main picture and sound

WXGA 1280 × 768 (15:9)XTAL Quartz crystalXGA 1024 × 768 (4:3)Y Luminance signalY/C Luminance (Y) and Chrominance (C)

signalYPbPr Component video. Luminance and

scaled color difference signals (B-Y and R-Y)

YUV Component video

Page 10: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical InstructionsEN 10 Q552.2E LA4.

2011-Feb-18 back to div. table

4. Mechanical Instructions

Index of this chapter:4.1 Cable Dressing Blockbuster Styling (xxPFL66xx/xx series)4.2 Service Positions4.3 Assy/Panel Removal Sundance Styling (xxPFL76xx/xx series)4.4 Set Re-assemblyNotes: • Figures below can deviate slightly from the actual situation,

due to the different set executions.

4.1 Cable Dressing Blockbuster Styling (xxPFL66xx/xx series)

Figure 4-1 Cable dressing 32PFL6606x/xx (Blockbuster)

19100_044_110214.eps110214

Page 11: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical Instructions EN 11Q552.2E LA 4.

2011-Feb-18back to div. table

Figure 4-2 Cable dressing 37PFL6606x/xx (Blockbuster)

19100_045_110214.eps110214

Page 12: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical InstructionsEN 12 Q552.2E LA4.

2011-Feb-18 back to div. table

Figure 4-3 Cable dressing 40PFL6606x/xx (Blockbuster)

4.2 Service Positions

For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.

4.3 Assy/Panel Removal Sundance Styling (xxPFL76xx/xx series)

The instructions in this section also apply to the Blockbuster sets (xxPFL66xx/xx series).

For the 40" and 46" Blockbuster sets, additional instructions (rear cover removal) apply. Refer to subsection Additional instructions for Blockbuster 40-/46PFL6606x/xx.

The instructions apply to the 32PFL7406K/02.

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove the rear cover.Note: it is not necessary to remove the stand while removing the rear cover.

1. Remove all screws of the rear cover.2. Lift the rear cover from the TV. Make sure that wires and

flat coils are not damaged while lifting the rear cover from the set.

Additional instructions for Blockbuster 40-/46PFL6606x/xx40"and 46"Blockbuster (40-/46PFL6606x/xx) sets have a dedicated method to open the bottom catches when removing the rear cover.Refer to Figure 4-4 and Figure 4-5 for details.

Figure 4-4 Bottom catches 40" and 46" Blockbuster sets -1-

19100_046_110214.eps110214

19100_048_110216.eps110216

1 1

Page 13: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical Instructions EN 13Q552.2E LA 4.

2011-Feb-18back to div. table

Figure 4-5 Bottom catches 40" and 46" Blockbuster sets -2-

It is advised to lay the set with front facing down before executing this operation.1. Remove all screws from the rear cover.2. Use a round rod (diameter 2 mm) and insert it in one of the

holes [1].3. Push the catch located inside the rear cover away by

inserting the rod [2] through the hole and lifting the rear cover at the same time.

4. Repeat the same procedure on the other hole.

4.3.2 Speakers

TweetersEach tweeter unit is mounted with one screw. When defective, replace the whole unit.

SubwooferThe central subwoofer is located in the centre of the set and is secured by two bosses. When defective, replace the whole unit.

4.3.3 Mains Switch

Refer to Figure 4-6 for details.

Figure 4-6 Mains switch

The mains switch is mounted on a plastic subframe and can be removed without removing the subframe.1. Use a screwdriver and push the switch out of its casing [1].2. Unplug the connectors [2].When defective, replace the whole unit.

4.3.4 Main Power Supply

Refer to Figure 4-7 for details.

Figure 4-7 Main Power Supply

1. Unplug all connectors [1].2. Remove the fixation screws [2].3. Take the board out.When defective, replace the whole unit.

4.3.5 Small Signal Board (SSB)

Refer to Figure 4-8 for details.

Figure 4-8 SSB

1. Unplug all connectors [1].2. Remove the fixation screws [2].3. Take the board out.When remounting, ensure that the side shielding [3] is positioned correctly.

19100_049_110216.eps110216

2

19100_047_110216.eps110216

1

19100_050_110216.eps110216

1

1

1

22

2 2

19100_051_110216.eps110216

1

2

2

22

2

21

Page 14: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical InstructionsEN 14 Q552.2E LA4.

2011-Feb-18 back to div. table

4.3.6 Keyboard Control, IR & LED Board

Refer to Figure 4-9 and Figure 4-10 for details.

Figure 4-9 Keyboard control, IR & LED board [1/2]

Figure 4-10 Keyboard control, IR & LED board [2/2]

1. Remove the stand and the plastic support [1].2. Unplug the connector [2].3. Remove the screws [3] and take the board out.When defective, replace the whole unit.

4.3.7 Ambilight Units

The Ambilight units can be lifted from the subframes without the use of tools.Refer to Figure 4-11 for details.

Figure 4-11 Ambilight units

1. Unplug the connector [1].2. Carefully lift the board [2] and take the board out.When defective, replace the whole unit.

19100_052_110216.eps110216

1

1

1

1

11

19100_053_110216.eps110216

2 2 23

19100_054_110216.eps110216

1

2

Page 15: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical Instructions EN 15Q552.2E LA 4.

2011-Feb-18back to div. table

4.3.8 LCD Panel

Refer to Figure 4-12 and Figure 4-13 for details.

Figure 4-12 LCD panel [1/2]

1. Remove the SSB as described earlier.2. Remove the PSU as described earlier.3. Remove the tweeters with their subframes and subwoofer

as described earlier.4. Remove the stand and -support as described earlier.5. Remove the cables [1].6. Remove the stand subframe [2].7. Remove the mains switch subframe [3].8. Remove the Ambilight units together with their subframes

as described earlier.9. Unplug the connector from the keyboard control-, and IR &

LED board as described earlier.10. Remove all remaining cables and subframes.11. Use a screwdriver to release the clamps [4] that secure the

panel and take the panel out. Remove the clamps from the panel before sending the panel in for Service.

Figure 4-13 LCD panel [2/2]

19100_055_110216.eps110216

44

4 4 4 4

4

2

2

2 2

2

1

19100_056_110217.eps110217

4

Page 16: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Mechanical InstructionsEN 16 Q552.2E LA4.

2011-Feb-18 back to div. table

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:• While re-assembling, make sure that all cables are placed

and connected in their original position. • Pay special attention not to damage the EMC foams in the

set. Ensure that EMC foams are mounted correctly.

Page 17: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 17Q552.2E LA 5.

2011-Feb-18back to div. table

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:5.1 Test Points5.2 Service Modes5.3 Stepwise Start-up5.4 Service Tools5.5 Error Codes5.6 The Blinking LED Procedure5.7 Protections5.8 Fault Finding and Repair Tips5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions:• Service Default Mode.• Video: Colour bar signal.• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair”).

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose• To create a pre-defined setting, to get the same

measurement results as given in this manual.• To override SW protections detected by stand-by

processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3 Stepwise Start-up”.

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes”).

Specifications

Table 5-1 SDM default settings

• All picture settings at 50% (brightness, colour, contrast).• Sound volume at 25%.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer.– Child/parental lock.– Picture mute (blue mute or black mute).– Automatic volume levelling (AVL).– Skip/blank of non-favourite pre-sets.

How to Activate SDMFor this chassis there are two kinds of SDM: an analogue SDM and a digital SDM. Tuning will happen according Table 5-1.• Analogue SDM: use the standard RC-transmitter and key

in the code “062596”, directly followed by the “MENU” (or “HOME”) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.Analogue SDM can also be activated by grounding for a moment the solder path on the SSB, with the indication “SDM” (see Service mode pad).

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or "HOME") button.Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.

Figure 5-1 Service mode pad

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to NavigateWhen the “MENU” (or “HOME”) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.

How to Exit SDMUse one of the following methods:• Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”-

sequence.

5.2.2 Service Alignment Mode (SAM)

Purpose• To perform (software) alignments.• To change option settings.• To easily identify the used software version.• To view operation hours.• To display (or clear) the error code buffer.

How to Activate SAMVia a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” or “OK” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Region Freq. (MHz)Default system

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

DVB-T

19100_057_110217.eps110217

SDM

Page 18: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 18 Q552.2E LA5.

2011-Feb-18 back to div. table

Contents of SAM• Hardware Info.

– A. SW Version. Displays the software version of the main software (example: Q555X-1.2.3.4 = AAAAB_X.Y.W.Z). • AAAA= the chassis name.• B= the SW branch version. This is a sequential

number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. STBY PROC Version. Displays the software version of the stand-by processor.

– C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes”).

• Reset Error Buffer. When “cursor right” (or “OK” button) pressed here, followed by the “OK” button, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” sub-menu. See Chapter 6. Alignments.

• Dealer Options. Extra features for the dealers.• Options. Extra features for Service. For more info

regarding option codes, see chapter 6. Alignments.Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored, otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment):– Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct values for the options can be found in Chapter 6. Alignments) or a method via a standard RC (described below).Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or "HOME") button and “XXX” (where XXX is the 3 digit decimal display code as mentioned on the sticker in the set). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• Operation hours display. Displays the accumulated total of operation hours of the screen itself. In case of a display replacement, reset to “0” or to the consumed operation hours of the spare display.

• SW Maintenance.– SW Events. In case of specific software problems, the

development department can ask for this info.– HW Events. In case of specific software problems, the

development department can ask for this info :- Event 26: refers to a power dip, this is logged after the TV set reboots due to a power dip.- Event 17: refers to the power OK status, sensed even before the 3 x retry to generate the error code.

• Test settings. For development purposes only.• Development file versions. Not useful for Service

purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Alignments”, “Identification data” (includes the set type and prod code + all 12NC like SSB, display, boards), “History list”. The “All” item supports to upload all severalitems at once.First a directory “repair\” has to be created in the root of the USB stick.To upload the settings, select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until the message “Done” appears. In case the download to the USB stick was not successful, “Failure” will be displayed. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download into another TV or other SSB. Uploading is of course only possible if the software is running and preferably a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download from USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as described in “Upload to USB”. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. The “All” item supports to download all several items at once.

• NVM editor. For NET TV the set “type number” must be entered correctly.Also the production code (AG code) can be entered here via the RC-transmitter.Correct data can be found on the side/rear sticker.

How to Navigate• In SAM, the menu items can be selected with the

“CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items

10000_038_090121.eps090819

PHILIPSMODEL:32PF9968/10

PROD.SERIAL NO:

AG 1A0620 000001

040

39mm

27m

m

(CTN Sticker)

Display OptionCode

Page 19: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 19Q552.2E LA 5.

2011-Feb-18back to div. table

fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to:– (De) activate the selected menu item.– (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAMUse one of the following methods:• Switch the TV set to STAND-BY via the RC-transmitter.• Via a standard RC-transmitter, key in “00” sequence, or

select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

PurposeWhen a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer.The CSM is a read only mode; therefore, modifications in this mode are not possible.

When in this chassis CSM is activated, a test pattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX51X0 (located on the 200Hz board as part of the display). So if this test pattern is shown, it could be determined that the back end video chain (PNX51X0 and display) is working.For TV sets without the PNX51X0 inside, every menu from CSM will be used as check for the back end chain video. When CSM is activated and there is a USB stick connected to the TV set, the software will dump the CSM content to the USB stick. The file (CSM_model number_serial number.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed. When in CSM mode (and a USB stick connected), pressing “OK” will create an extended CSM dump file on the USB stick. This file (Extended_CSM_model number_serial number.txt) contains:• The normal CSM dump information,• All items (from SAM “load to USB”, but in readable format),• Operating hours,• Error codes,• SW/HW event logs. To have fast feedback from the field, a flashdump can be requested by development. When in CSM, push the “red” button and key in serial digits ‘2679’ (same keys to form the word ‘COPY’ with a cellphone). A file “Dump_model number_serial number.bin” will be written on the connected USB device. This can take 1/2 minute, depending on the quantity of data that needs to be dumped. Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed (see also section 5.5 Error Codes).

How to Activate CSM Key in the code “123654” via the standard RC transmitter.Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to NavigateBy means of the “CURSOR-DOWN/UP” knob on the RC-transmitter, can be navigated through the menus.

Contents of CSMThe contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

General• Set Type. This information is very helpful for a helpdesk/

workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display.• 12NC supply. Shows the 12NC of the power supply.• 12NC 200Hz board. Shows the 12NC of the 200Hz Panel

(when present).• 12NC AV PIP. Shows the 12NC of the AV PIP board

(when present).

Software versions• Current main SW. Displays the build-in main software

version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet.Example: Q55xx1.2.3.4

• Stand-by SW. Displays the build-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9 Software Upgrading).Example: STDBY_83.84.0.0.

• e-UM version. Displays the electronic user manual SW-version (12NC version number). Most significant number here is the last digit.

• AV PIP software.• 3D dongle software version.

Quality items• Signal quality. Bad / average /good (not for DVB-S).• Ethernet MAC address. Displays the MAC address

present in the SSB.• Wireless MAC address. Displays the wireless MAC

address to support the Wi-Fi functionality.• BDS key. Indicates if the set is in the BDS status.• CI module. Displays status if the common interface

module is detected.• CI + protected service. Yes/No.• Event counter :

S : 000X 0000(number of software recoveries : SW EVENT-LOG #(reboots)S : 0000 000X (number of software events : SW EVENT-LOG #(events)H : 000X 0000(number of hardware errors)H : 0000 000X (number of hardware events : SW EVENT-LOG #(events).

Page 20: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 20 Q552.2E LA5.

2011-Feb-18 back to div. table

How to Exit CSMPress “MENU” (or "HOME") / “Back” key on the RC-transmitter.

5.3 Stepwise Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the SDM solder path on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Caution: in case the start-up in this mode with a faulty FET 7U0X is done, you can destroy all IC’s supplied by the +1V8 and +1v1, due to overvoltage (12V

on XVX-line). It is recommended to measure first the FET 7U0X or others FET’s on shortcircuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:• SP: protection or error detected by the Stand-by

Processor.• MP: protection or error detected by the MIPS Main

Processor.

Figure 5-3 Transition diagram

18770_250_100216.eps100402

ActiveSemiSt by

St by

Mains on

Mainsoff

GoToProtection

- WakeUp requested- Acquisition needed- Tact switch pushed

- stby requested andno data Acquisitionrequired

- St by requested- tact SW pushed

WakeUprequested

Protection

WakeUp requested

(SDM)

GoToProtectionHibernate

- Tact switch pushed- last status is hibernateafter mains ON

Tact switchpushed

Page 21: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 21Q552.2E LA 5.

2011-Feb-18back to div. table

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

18770_251_100216.eps100216

No

EJTAG probe connected ?

No

Yes

Release AVC system resetFeed warm boot script

Cold boot?

Yes

No

Set I²C slave address of Standby µP to (A0h)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

Detect EJTAG debug probe(pulling pin of the probe interface to ground by inserting EJTAG probe)

Release AVC system resetFeed cold boot script

Release AVC system resetFeed initializing boot scriptdisable alive mechanism

Off

Standby Supply starts running.All standby supply voltages become available.

st-by µP resets

Stand by or Protection

Mains is applied

- Switch Audio-Reset high.It is low in the standby mode if the standby

mode lasted longer than 10s.start keyboard scanning, RC detection. Wake up reasons are

off.

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will

not be entered.

Detect2 is moved to an interrupt. To be checked if the detection on interrupt base is feasible or not or if we should stick to the standard 40ms interval.

+12V, +24Vs, AL and Bolt-on poweris switched on, followed by the +1V2 DCDC converter

Enable the supply detection algorithm

Switch ON Platform and display supply by switching LOW the Standby line.

Initialise I/O pins of the st-by µP:- Switch reset-AVC LOW (reset state)- Switch reset-system LOW (reset state)- Switch reset-Ethernet LOW (reset state)- Switch reset-USB LOW (reset state)- Switch reset-DVBs LOW (reset state)- keep Audio-reset and Audio-Mute-Up HIGH

Enable the DCDC converters (ENABLE-3V3n LOW)

NoDetect2 high received

within 2 seconds?

12V error: Layer1: 3

Layer2: 16

Enter protectionYes

Wait 50ms

Page 22: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 22 Q552.2E LA5.

2011-Feb-18 back to div. table

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

18770_252_100216.eps100216

Yes

MIPS reads the wake up reasonfrom standby µP.

Semi-Standby

initialize tuner and channel decoders

Initialize video processing IC’s

Initialize source selection

initialize AutoTV by triggering CHS AutoTV Init interface

3-th try?

No

Blink Code as error code

Bootscript readyin 1250 ms?

Yes

No

Enable Alive check mechanism

Wait until AVC starts to communicate

SW initialization succeededwithin 20s?

No

Switch Standby I/O line highand wait 4 seconds

RPC start (comm. protocol)

Set I²C slave address of Standby µP to (60h)

Yes

Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.

switch off the remaining DC/DC converters

Wait 5ms

Switch AVC PNX85500 in reset (active low)

Wait 10ms

Flash to Ramimage transfer succeeded

within 30s?No

Yes

Code =Layer1: 2

Layer2: 53

Code = Layer1: 2Layer2: 15

Initialize Ambilight with Lights off.

Timing need to be updated if more mature info is available.

Timing needs to be updated if more mature info is available.

Timing needs to be updated if more mature info is available.

Initialize audio

Enter protection

Reset-system is switched HIGH by the AVC at the end of the bootscript

AVC releases Reset-Ethernet, Reset-USB and Reset-DVBs when the end of the AVC boot-

script is detectedThis cannot be done through the bootscript, the I/O is on the standby µP

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the

startup process

Reset-system is switched HIGH by the AVC at the end of the bootscript

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the

startup process

Wake up reason coldboot & not semi-

standby?

85500 sends out startup screen

Startup screen cfg file present?

85500 starts up the display.

Startup screen visible

yes

yes

To keep this flowchart readable, the exact display turn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup

sequence.

During the complete display time of the Startup screen, the preheat condition of

100% PWM is valid.

No

No

Startup screen shall only be visible when there is a coldboot to an active state end situation. The startup screen shall not be visible when waking up for reboot reasons or waking up to semi-standby conditions or waking up to enter Hibernate mode..

The first time after the option turn on of the startup screen or when the set is virgin, the cfg file is not present and hence the startup screen will not be shown.

AVC releases Reset-Ethernet, Reset-USB and Reset-DVBs when the end of the AVC boot-

script is detected

200Hz set?

No

yes

85500 sends out startup screen

200Hz Tcon has started up the display.

Startup screen visible

85500 requests Lamp on

Page 23: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 23Q552.2E LA 5.

2011-Feb-18back to div. table

Figure 5-6 “Semi Stand-by” to “Active” flowchart (EEFL or LED backlight 50/100 Hz only)

18770_253_100216.eps100216

Active

Semi Standby

Initialize audio and video processing IC's and functions according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than 2seconds ago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In these states,

the AVC is still active and can provide the 2s delay. Atransition ON->SEMI->STBY->SEMI->ON cannot be

made in less than 2s, because the standby state will be maintained for at least 4s.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC.- To have a reliable operation of the EEFL backlight, the backlight should be driven with a maximum PWM duty cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

Restore dimming backlight feature, PWM and BOOST output and unblank the video.

Wait until valid and stable audio and video, corresponding to the requested output is delivered by the AVC

ANDthe backlight has been switched on for at least the time which is

indicated in the display file as preheat time.

The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or

at the same time as the unblanking of the video.

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

CPipe already generates a valid output clock in the semi-standby state: display

startup can start immediately when leaving the semi-standby state.

Switch on LCD backlight (Lamp-ON)

Switch off the dimming backlight feature, set the BOOST control to nominal and make sure PWM output is set to maximum allowed PWM

Switch on the Ambilight functionality according the last status settings.

Delay Lamp-on with the sum of the LVDS delay and the Lamp delay indicated in the display file

Switch on the display power by switching LCD-PWR-ON low

Wait x ms

Switch on LVDS output in the 85500

No

The exact timings to switch on the display (LVDS

delay, lamp delay) are defined in the

display file.

Start POK line detection algorithm

return

Display already on?(splash screen)

Yes

Display cfg file presentand up to date, according

correct display option?

Startup screen Optionand Installation setting

Photoscreen ON?

Yes

No

Prepare Start screen Display config file and copy to Flash

No

Yes

A LED set does not normally need a preheat time. The preheat remains present

but is set to zero in the display file.

Page 24: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 24 Q552.2E LA5.

2011-Feb-18 back to div. table

Figure 5-7 “Semi Stand-by” to “Active” flowchart (LED backlight 200 Hz)

18770_254_100216.eps100216

Active

Semi Standby

Initialize audio and video processing IC's and functions according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than 2seconds ago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In these states, the AVC is still active and can

provide the 2s delay. If the transition ON->SEMI->STBY->SEMI->ON can be made in less than 2s, we have to delay the semi -> stby transition until

the requirement is met.

Switch Audio-Reset low and wait 5ms

unblank the video.

Wait until valid and stable audio and video, corresponding to the requested output is delivered by the AVC.

The higher level requirement is that audio and video should be demuted without transient

effects and that the audio should be demuted maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

Request Tcon to Switch on the backlight in a direct LED or

set Lamp-on I/O line in case of a side LED

Switch on the Ambilight functionality according the last status settings.

There is no need to define the display timings since the timing

implementation is part of the Tcon.

Start POK linedetection algorithm

return

Display cfg file presentand up to date, according

correct display option?

Startup screen Optionand Installation setting

Photoscreen ON?

Yes

No

Prepare Start screen Display config file and copy to Flash

No

Yes

Backlight already on?(splash screen)

No

Yes

Page 25: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 25Q552.2E LA 5.

2011-Feb-18back to div. table

Figure 5-8 “Active” to “Semi Stand-by” flowchart

18770_255_100216.eps100216

Semi Standby

Active

Wait x ms (display file)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight(I/O or I²C)

Force ext audio outputs to ground (I/O: audio reset)

And wait 5ms

switch off Ambilight

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Wait until Ambilight has faded out: Output power Observer should be zero

Switch off the display power by switching LCD-PWR-ON high

Wait x ms

Switch off LVDS output in 85500The exact timings to

switch off the display (LVDS

delay, lamp delay) are defined in the

display file.

Switch off POK linedetection algorithm

200Hz set?

No

Yes

Instruct 200Hz Tcon to turn off

the display

Page 26: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 26 Q552.2E LA5.

2011-Feb-18 back to div. table

Figure 5-9 “Semi Stand-by” to “Stand-by” flowchart

18770_256_100216.eps100216

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand by

Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3n)

Switch OFF all supplies by switching HIGH the Standby I/O line

Switch AVC system in reset state (reset-system and reset-AVC lines)

Switch reset-USB, Reset-Ethernet and Reset-DVBs LOW

Important remarks:

release reset audio 10 sec after entering standby to save power

Also here, the standby state has to be maintained for at least 4s before starting

another state transition.

Wait 5ms

Wait 10ms

Delay transition until ramping down of ambient light is finished. *)

If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light (see CHS

ambilight)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more stable condition when switching off the power).

Page 27: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 27Q552.2E LA 5.

2011-Feb-18back to div. table

5.4 Service Tools

5.4.1 ComPair

IntroductionComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:1. ComPair helps to quickly get an understanding on how to

repair the chassis in a short and effective way.2. ComPair allows very detailed diagnostics and is therefore

capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the µP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

SpecificationsComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to ConnectThis is described in the chassis fault finding database in ComPair.

Figure 5-10 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs can be blown!

How to OrderComPair II order codes:• ComPair II interface: 3122 785 91020.• Software is available via the Philips Service web portal.• ComPair UART interface cable for Q55x.x.

(using 3.5 mm Mini Jack connector): 3138 188 75051. Note: When you encounter problems, contact your local support desk.

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained).To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed: • If no errors are there, the LED should not blink at all in

CSM or SDM. No spacer must be displayed as well.• There is a simple blinking LED procedure for board

level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2).– LAYER 1 errors are one digit errors.– LAYER 2 errors are 2 digit errors.

• In protection mode.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.

• In CSM mode.– When entering CSM: error LAYER 1 will be displayed

by blinking LED. Only the latest error is shown.• In SDM mode.

– When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED.

• Error display on screen.– In CSM no error codes are displayed on screen.– In SAM the complete error list is shown.

Basically there are three kinds of errors:• Errors detected by the Stand-by software which lead to

protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error.(see section “5.6 The Blinking LED Procedure”).

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes, 5.5.4 Error Buffer”. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

5.5.2 How to Read the Error Buffer

Use one of the following methods:• On screen via the SAM (only when a picture is visible).

E.g.:– 00 00 00 00 00: No errors detected– 23 00 00 00 00: Error code 23 is the last and only

detected error.– 37 23 00 00 00: Error code 23 was first detected and

error code 37 is the last detected error.– Note that no protection errors can be logged in the

error buffer.

10000_036_090121.eps091118

TOUART SERVICECONNECTOR

TOUART SERVICECONNECTOR

TOI2C SERVICECONNECTOR

TO TV

PC

HDMII2C only

Optional power5V DC

ComPair II Developed by Philips Brugge

RC outRC in

OptionalSwitch

Power ModeLink/Activity I2C

ComPair IIMulti

function

RS232 /UART

Page 28: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 28 Q552.2E LA5.

2011-Feb-18 back to div. table

• Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer.

• Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:• By activation of the “RESET ERROR BUFFER” command

in the SAM menu.• If the content of the error buffer has not changed for 50+

hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the

content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:• Via error bits in the status registers of ICs.• Via polling on I/O pins going to the stand-by processor.• Via sensing of analog values on the stand-by processor or

the PNX8550.• Via a “not acknowledge” of an I2C communication.

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Table 5-2 Error code overview

Extra Info• Rebooting. When a TV is constantly rebooting due to

internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.7 Logging). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Error 13 (I2C bus 3, SSB bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 14 (I2C bus 2, TV set bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 18 (I2C bus 4, Tuner bus blocked). In case this bus is blocked, short the “SDM” solder paths on the SSB during startup, LAYER error 2 = 18 will be blinked.

• Error 15 (PNX8550 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8550 (supplies not OK, PNX 8550 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C1 bus is blocked (NVM). I2C1 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS.

Other root causes for this error can be due to hardware problems regarding the DDR’s and the bootscript reading from the PNX8550.

• Error 16 (12V). This voltage is made in the power supplyand results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 21 (PNX51X0). When there is no I2C communication towards the PNX51X0 after start-up, LAYER 2 error = 21 will be logged and displayed via the blinking LED procedure if SDM is switched on. This device is located on the 200 Hz panel from the display.

• Error 23 (HDMI). When there is no I2C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 24 (I2C switch). When there is no I2C communication towards the I2C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark: this only works for TV sets with an I2C controlled screen included.

• Error 28 (Channel dec DVB-S). When there is no I2C communication towards the DVB-S channel decoder,

LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

Description Layer 1 Layer 2Monitoredby

Error/Prot

Error Buffer/Blinking LED Device Defective Board

I2C3 2 13 MIPS E BL / EB SSB SSB

I2C2 2 14 MIPS E BL / EB SSB SSB

I2C4 2 18 MIPS E BL / EB SSB SSB

PNX doesn’t boot (HW cause) 2 15 Stby µP P BL PNX8550 SSB

12V 3 16 Stby µP P BL / Supply

Inverter or display supply 3 17 MIPS E EB / Supply

PNX51X0 2/9 21 MIPS E EB PNX51X0 200 Hz board

HDMI mux 2 23 MIPS E EB Sil9x87A SSB

I2C switch 2 24 MIPS E EB PCA9540 SSB

Channel dec DVB-S 2 28 MIPS E EB STV0903 SSB

Lnb controller 2 31 MIPS E EB LNBH23 SSB

Tuner 2 34 MIPS E EB DTT 71300 SSB

Main nvm 2 35 MIPS E EB STM24C64 SSB

Tuner DVB-S 2 36 MIPS E EB STV6110 SSB

T° sensor SSB/set 2 42 MIPS E EB LM 75 T° sensor

T° sensor LED driver/Tcon 7 42 MIPS E EB LM 75 T° sensor

PNX doesn’t boot (SW cause) 2 53 Stby µP P BL PNX8550 SSB

Display 5 64 MIPS E BL / EB Altera Display

Page 29: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 29Q552.2E LA 5.

2011-Feb-18back to div. table

• Error 31 (Lnb controller). When there is no I2C communication towards this device, LAYER 2 error = 31 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I2C communication towards the tuner during start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 35 (main NVM). When there is no I2C communication towards the main NVM during start-up, LAYER 2 error = 35 will be displayed via the blinking LED procedure when SDM is switched “on”. All service modes (CSM, SAM and SDM) are accessible during this failure, observed in the Uart logging as follows: "<< ERRO >>> PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".

• Error 36 (Tuner DVB-S). When there is no I2C communication towards the DVB-S tuner during start-up, LAYER 2 error = 36 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 42 (Temp sensor). Only applicable for TV sets equipped with temperature devices.

• Error 53. This error will indicate that the PNX8550 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.

• Error 64. Only applicable for TV sets with an I2C controlled screen.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:• Blinking LED procedure LAYER 1 error. In this case the

error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code overview”) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview”) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark: For an empty error buffer, the LED should not blink at all in CSM or SDM. No spacer will be displayed.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit2. A pause of 1.5 s3. “n” short blinks (where “n”= 1 to 9)4. A pause of approximately 3 s,5. When all the error codes are displayed, the sequence

finishes with a LED blink of 3 s (spacer).6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the

decimal digit) followed by a pause of 1.5 s2. Two short blinks of 250 ms followed by a pause of 3 s3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s5. One long blink of 3 s to finish the sequence (spacer).6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:• Activate the CSM. The blinking front LED will show only

the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the Stand-by processor.In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair Tips, 5.8.7 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections.There are several types of software related protections, solving a variety of fault conditions:• Related to supplies: presence of the +5V, +3V3 and 1V2

needs to be measured, no protection triggered here.• Protections related to breakdown of the safety check

mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply ErrorsThe detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-upDuring TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Stepwise Start-up”).

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D audio amplifier (item 7D10; see diagram B03A) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

Repair Tip• There still will be a picture available but no sound. While

the Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again. The headphone amplifier will also behaves similar.

Page 30: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 30 Q552.2E LA5.

2011-Feb-18 back to div. table

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”.

5.8.1 Ambilight

Due to degeneration process of the LED’s fitted on the ambi module, there can be a difference in the colour and/or light output of the spare ambilight modules in comparison with the originals ones contained in the TV set. Via SAM => alignments => ambilight, the spare module can be adjusted.

5.8.2 Audio Amplifier

The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class D-IC could break down in short time.

5.8.3 AV PIP

To check the AV PIP board (if present) functionality, a dedicated tespattern can be invoke as follows: select the “multiview” icon in the User Interface and press the “OK” button. Apply for the main picture an extended source, e.g. HDMI input. Proceed by entering CSM (push ‘123654’ on the remote control) and press the yellow button. A coloured testpattern should appear now, generated by the AV PIP board (this can take a few seconds).

5.8.4 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.5 DC/DC Converter

Description basic board The basic board power supply consists of 4 DC/DC converters and 5 linear stabilizers. All DC/DC converters have +12V input voltage and deliver:• +1V1 supply voltage (1.15V nominal), for the core voltage

of PNX855xx, stabilized close to the point of load; SENSE+1V1 signal provides the DC-DC converter the needed feedback to achieve this.

• +1V8 supply voltage, for the DDR2 memories and DDR2 interface of PNX855xx.

• +3V3 supply voltage (3.30V nominal), overall 3.3 V for onboard IC’s, for non-5000 series SSB diversities only.

• +5V (5.15V nominal) for USB, WIFI and Conditional Access Module and +5V5-TUN for +5V-TUN tuner stabilizer.

The linear stabilizers are providing:• +1V2 supply voltage (1.2V nominal), stabilized close to

PNX855xx device, for various other internal blocks of PNX855xx; SENSE+1V2 signal provides the needed feedback to achieve this.

• +2V5 supply voltage (2.5V nominal) for LVDS interface and various other internal blocks of PNX855xx; for 5000 series SSB diversities the stabilizer is 7UD2 while for the other diversities 7UC0 is used.

• +3V3 supply voltage (3V3 nominal) for 5000 series SSB diversities, provided by 7UD3; in this case the 12V to 3V3 DC-DC converter is not present.

• +5V-TUN supply voltage (5V nominal) for tuner and IF amplifier.

+3V3-STANDY (3V3 nominal) is the permanent voltage, supplying the Stand-by microprocessor inside PNX855xx. Supply voltage +1V1 is started immediately when +12V voltagebecomes available (+12V is enabled by STANDBY signal when "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN are switched "on" by signal ENABLE-3V3 when "low", provided that +12V (detected via 7U40 and 7U41) is present.

+12V is considered OK (=> DETECT2 signal becomes "high", +12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter can be started up) if it rises above 10V and doesn’t drop below 9V5. A small delay of a few milliseconds is introduced between the start-up of 12V to +1V8 DC-DC converter and the two other DC-DC converters via 7U48 and associated components. Description DVB-S2:• LNB-RF1 (0V = disabled, 14V or 18V in normal operation)

LNB supply generated via the second conversion channel of 7T03 followed by 7T50 LNB supply control IC. It provides supply voltage that feeds the outdoor satellite reception equipment.

• +3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal) and +1V-DVBS (1.03V nominal) power supply for the silicon tuner and channel decoder. +1V-DVBS is generated via a 5V to 1V DC-DC converter and is stabilized at the point of load (channel decoder) by means of feedback signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS are generated via linear stabilizers from +5V-DVBS that by itself is generated via the first conversion channel of 7T03.

At start-up, +24V becomes available when STANDBY signal is "low" (together with +12V for the basic board), when +3V3 from the basic board is present the two DC-DC converters channels inside 7T03 are activated. Initially only the 24V to 5V converter (channel 1 of 7T03 generating +5V-DVBS) will effectively work, while +V-LNB is held at a level around 11V7 via diode 6T55. After 7T05 is initialized, the second channel of 7T03 will start and generates a voltage higher then LNB-RF1 with 0V8. +5V-DVBS start-up will imply +3V3-DVBS start-up, with a small delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will be enabled.

If +24V drops below +15V level then the DVB-S2 supply will stop, even if +3V3 is still present.

DebuggingThe best way to find a failure in the DC/DC converters is to check their start-up sequence at power “on” via the mains cord, presuming that the stand-by microprocessor and the external supply are operational. Take STANDBY signal "high"-to-"low" transition as time reference.When +12V becomes available (maximum 1 second after STANDBY signal goes "low") then +1V1 is started immediately. After ENABLE-3V3 goes "low", all the other supply voltages should rise within a few milliseconds.

Tips• Behaviour comparison with a reference TV550 platform

can be a fast way to locate failures.• If +12V stays "low", check the integrity of fuse 1U40.• Check the integrity (at least no short circuit between drain

and source) of the power MOS-FETs before starting up the platform in SDM, otherwise many components might be damaged. Using a ohmmeter can detect short circuits between any power rail and ground or between +12V and any other power rail.

• Short circuit at the output of an integrated linear stabilizer (7UC0, 7UD2 or 7UD3) will heat up this device strongly.

• Switching frequencies should be 500 kHz ...600 kHz for 12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,

Page 31: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 31Q552.2E LA 5.

2011-Feb-18back to div. table

900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V LNB DC-DC converters operates at 300 kHz while for 5 V to 1.1 V DC-DC converter 900 kHz is used.

5.8.6 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normallyhappens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode).Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.

5.8.7 Logging

When something is wrong with the TV set (f.i. the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box.Required settings in ComPair before starting to log:- Start up the ComPair application.- Select the correct database (open file “Q55X.X”, this will set the ComPair interface in the appropriate mode).- Close ComPairAfter start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COMx2. Bits per second = 1152003. Data bits = 84. Parity = none5. Stop bits = 16. Flow control = noneDuring the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.8 Guidelines Uart logging

Description possible cases: Uart loggings are displayed:• When Uart loggings are coming out, the first conclusion we

can make is that the TV set is starting up and communication with the flash RAM seems to be supported. The PNX855xx is able to read and write in the DRAMs.

• We can not yet conclude : Flash RAM and DRAMs are fully operational/reliable.There still can be errors in the data transfers, DRAM erros, read/write speed and timing control.

No Uart logging at all:• In case there is no Uart logging coming out, check if the

startup script can be send over the I2C bus (3 trials to startup) + power supplies are switched on and stable.

• No startup will end up in a blinking LED status : error LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM solder paths short).

• Error LAYER 2 = “15” (hardware cause) is more related to a supply issue while error LAYER 2 = “53” (software cause) refers more to boot issues.

Uart loggings reporting fault conditions, error messages, error codes, fatal errors:• Failure messages should be checked and investigated.For

instance fatal error on the PNX51x0: check startup of the back-end processor, supplies..reset, I2C bus. => error mentioned in the logging as: *51x0 failed to start by itself*.

• Some failures are indicated by error codes in the logging, check with error codes table (see Table “5-2 Error code overview”).e.g. => <<<ERROR>>>PLFPOW_MERR.C : First Error (id=10,Layer_1=2,Layer_2=23).

• I2C bus error mentioned as e.g.: “ I2C bus 4 blocked”.• Not all failures or error messages should be interpreted as

fault.For instance root cause can be due to wrong option codes settings => e.g. “DVBS2Suppoprted : False/True.

In the Uart log startup script we can observe and check the enabled loaded option codes. Defective sectors (bad blocks) in the Nand Flash can also be reported in the logging.

Startup in the SW upgrade application and observe the Uart logging:Starting up the TV set in the Manual Software Upgrade mode will show access to USB, meant to copy software content from USB to the DRAM.Progress is shown in the logging as follows: “cosupgstdcmds_mcmdwritepart: Programming 102400 bytes, 40505344 of 40607744 bytes programmed”.

Startup in Jett Mode:Check Uart logging in Jet mode mentioned as : “JETT UART READY”.

Uart logging changing preset:=> COMMAND: calling DFB source = RC6, system=0, key = 4”.

5.8.9 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.10 PSL

In case of no picture when CSM (test pattern) is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the PSL + wiring (LAYER 2 error = 17 is displayed in SDM).

5.8.11 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.12 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

New in this chassis:While in the download application (start up in TV mode + “OK” button pressed), the display option code can be changed via 062598 HOME XXX special SAM command (XXX=display option in 3 digits).

Page 32: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 32 Q552.2E LA5.

2011-Feb-18 back to div. table

5.8.13 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure “SSB replacement flowchart”.

Figure 5-11 SSB replacement flowchart

H_16771_007a.eps100402

STAR T

C onnect the U SB s tick to the set, go to SAM and save the current TV settings via “Upload to USB”

Set is s till operating?

Yes

1. D isconnect the WiF i module from the PC I connector (only for Q549.x SSB)2. Replace the SSB by a Service SSB.3. Place the WiFi module in the PCI connector.4. Mount the Service SSB in the set.

Set behaviour?

Yes

No

N o

Instruction note SSB replacem ent Q543.x, Q548.x, Q549.x, and Q55x.x

Before starting:- prepare a USB memory stick with the latest software- download the latest Main Software (Fus) from www.p4c.philips.com- unzip this file- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder.Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this incase there are more than one "autorun.upg" files on the USB stick.

No picture displayed Picture displayedSet is starting up without software upgrade menu appearing on screen

Picture displayedSet is starting up with software upgrade menu appearing on screen

Due to a possible wrong display option code in the received ServiceSSB (NVM), it’s possible that no picture is displayed. Due to this the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC(this for visual feedback).

Start-up the set

1) Start up the TV set, equiped with the Service SSB, and enable the UART logging on the PC.

2) The TV set will start-up automatically in the download application if main TV software is not loaded.

3) Plug the prepared USB stick into the TV set. Follow theinstructions in the UART log file, press “Right” cursor key to enter

the list. Navigate to the “autorun.upg” file in the UART loggingprintout via the cursor keys on the remote control. When the

correct file is selected, press “Ok”.

4) Press "Down" cursor and “Ok” to start flashing the mainTV software. Printouts like: “L: 1-100%, V: 1-100% and P: 1-100%” should be visible now in the UART logging.

5) Wait until the message “Operation successful !” is logged inthe UART log and remove all inserted media. Restart the TV set.

1) Plug the USB stick into the TV set and select the “autorun .upg” file in the displayed browser.

2) Now the main software will be loaded automatically,supported by a progress bar.

3) Wait until the message “Operation successful !” is displayedand remove all inserted media. Restart the TV set.

Set the correct “Display code” via “062598 -HOME- xxx” where“xxx” is the 3 digit display panel code (see sticker on the side

or bottom of the cabinet)

After entering the “Display Option” code, the set is going to Standby

(= validation of code)

Restart the set

Connect PC via the ComPair interface to Service connector.

Start TV in Jett mode (DVD I + (OSD))Open ComPair browser Q54x

Program set type number, serial number, and display 12 NCProgram E - DFU if needed.

Go to SAM and reload settingsvia “Download from USB” function.

In case of settings reloaded from USB, the set type,serial number, display 12 NC, are automatically storedwhen entering display options.

- Check if correct “display option” code is programmed.- Verify “option codes” according to sticker inside the set.- Default settings for “white drive” > see Service Manual.

Q54x.E SSB Board swap – VDSUpdated 22-03-2010

If not already done:Check latest software on Service website.

Update main and Stand-by software via USB.

Check and perform alignments in SAM according to theService Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.Special attention for HDMI Keys and Mac address.

Check if E - D F U is present.

End

Attention point for Net TV: If the set type and serial number are notfilled in, the Net TV functionality will not work. It will not be possibleto connect to the internet.

Saved settingson USB stick?

Page 33: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 33Q552.2E LA 5.

2011-Feb-18back to div. table

Figure 5-12 SSB replacement flowchart - Factory mode

H_16771_007b.eps100322

Restart the set

Set is start ing up in Factory m ode

Set is starting up in Factory mode?

Noisy picture with bands/lines is visible and theRED LED is continuous on.

An “F” is displayed (and the HDMI 1 input is displayed).

- Press the “volume minus” button on the TVs local keyboard for 5 ~10 seconds

- Press the “SOURCE” button for 10 seconds until the “F” disappears from the screen or the noise on the screen is replaced by “blue mute”

The noise on the screen is replaced with the blue mute or the “F” is disappeared!

Unplug the mains cord to verify the correctdisabling of the Factory mode.

Program display option code via “062598 MENU”, followed by

the 3 digits code of the display(this code can be found

on a sticker on - or inside - the set).

After entering “display option” code, the set is going in stand-by mode (= validation of code)

Page 34: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault FindingEN 34 Q552.2E LA5.

2011-Feb-18 back to div. table

Figure 5-13 SSB start-up

5.9 Software Upgrading

Attention!Software version numbers for 2011 sets are all defined below number 0.40.x.x. This might confuse servicers who store software versions for more than one set and/or platform on the same storage device (USB stick).

Always check the latest software version on the servicer website in relation to the correct CTN!!!

5.9.1 Introduction

The set software and security keys are stored in a NAND-Flash, which is connected to the PNX855xx.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (CI +, MAC address, ...).Perform the following actions after SSB replacement:1. Set the correct option codes (see sticker inside the TV).2. Update the TV software => see the eUM (electronic User

Manual) for instructions.3. Perform the alignments as described in chapter 6 (section

6.5 Reset of Repaired SSB).4. Check in CSM if the CI + key, MAC address.. are valid.

For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

Automatic Software UpgradeIn “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q555X_ x.x.x.x_prod.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick.How to upgrade:1. Copy “AUTORUN.UPG” to the root of the USB stick.2. Insert USB stick in the set while the set is operational. The

set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software UpgradeIn case that the software upgrade application does not start automatically, it can also be started manually.How to start the software upgrade application manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “OK” button on a Philips TV remote control or a

Philips DVD RC-6 remote control (it is also possible to use

18753_211_100811.eps100811

Page 35: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Service Modes, Error Codes, and Fault Finding EN 35Q552.2E LA 5.

2011-Feb-18back to div. table

a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

Attention!In case the download application has been started manually, the “autorun.upg” will maybe not be recognized.What to do in this case:1. Create a directory “UPGRADES” on the USB stick.2. Rename the “autorun.upg” to something else, e.g. to

“software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.4. Insert USB stick into the TV.5. The renamed “upg” file will be visible and selectable in the

upgrade application.

Back-up Software Upgrade ApplicationIf the default software upgrade application does not start (could be due to a corrupted boot sector) via the above described method, try activating the “back-up software upgrade application”.How to start the “back-up software upgrade application” manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “CURSOR DOWN”-button on a Philips TV

remote control while reconnecting the TV to the Mains/AC Power.

3. The back-up software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB.Use the following steps:1. Create a directory “UPGRADES” on the USB stick.2. Copy the Stand-by software (part of the one-zip file, e.g.

StandbyFactory_88.0.0.0.upg) into this directory.3. Insert the USB stick into the TV.4. Start the download application manually (see section “

Manual Software Upgrade”.5. Select the appropriate file and press the “OK” button to

upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.• AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the

program instruction and software content, needed to upgrade the ambilight CPLD on the TV550 platform.

• BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the BalanceFPGA software in “upg” format.

• FUS_Q555X_x.x.x.x_prod.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the PNX5130 software in “upg” format.

• StandbySW_Q555X_x.x.x.x_prod.zip. Contains the StandbyFactory software in “upg” format.

• ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 UART logging 2K10 (see section “5.8 Fault Finding and Repair Tips, 5.8.7 Logging)

Page 36: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

AlignmentsEN 36 Q552.2E LA6.

2011-Feb-18 back to div. table

6. Alignments

Index of this chapter:6.1 General Alignment Conditions6.2 Hardware Alignments6.3 Software Alignments6.4 Option Settings6.5 Reset of Repaired SSB6.6 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:• Power supply voltage (depends on region):

– AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%).– AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%).– EU: 230 VAC / 50 Hz ( 10%).– LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%).– US: 120 VAC / 60 Hz ( 10%).

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.• Measure voltages and waveforms in relation to correct

ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 M, Ci < 20 pF.• Use an isolated trimmer/screwdriver to perform

alignments.

6.1.1 Alignment Sequence

• First, set the correct options:– In SAM, select “Option numbers”.– Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4 Option Settings).

– Press OK on the remote control before the cursor is moved to the left.

– In submenu “Option numbers” select “Store” and press OK on the RC.

• OR:– In main menu, select “Store” again and press OK on

the RC.– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below.The following items can be aligned:• White point• Ambilight. To store the data:• Press OK on the RC before the cursor is moved to the

left• In main menu select “Store” and press OK on the RC• Switch the set to stand-by mode. For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 White Point

• Choose “TV menu”, “Setup”, “More TV Settings” and then “Picture” and set picture settings as follows:

• In menu “Picture”, choose “Pixel Plus HD” and set picture settings as follows:

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:• Use a 100% white screen (format: 720p50) to the HDMI

input and set the following values:– “Colour temperature”: “Cool”.– All “White point” values to: “127”.

In case you have a colour analyser:• Measure, in a dark environment, with a calibrated

contactless colour analyser (Minolta CA-210 or Minolta CS-200) in the centre of the screen and note the x, y value.

• Change the pattern to 90% white screen. If a Quantum Data generator is used, select the “GreyAll” test pattern at level = 230.

• Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1 White D alignment values - LED - Minolta CA-210, or 6-2 White D alignment values - LED - Minolta CS-200). Tolerance: dx: 0.002, dy: 0.002.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values - LED - Minolta CA-210

Table 6-2 White D alignment values - LED - Minolta CS-200

Picture Setting

Contrast 100

Brightness 50

Colour 0

Light Sensor Off

Picture format Unscaled

Picture Setting

Dynamic Contrast Off

Dynamic Backlight Off

Colour Enhancement Off

Gamma 0

Value Cool (9420K) Normal (8120K) Warm (6080K)

x 0.282 0.292 0.320

y 0.298 0.311 0.345

Value Cool (11000K) Normal (9000K) Warm (6500K)

x 0.276 0.287 0.313

y 0.282 0.296 0.329

Page 37: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Alignments EN 37Q552.2E LA 6.

2011-Feb-18back to div. table

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.• Select a COLOUR TEMPERATURE (e.g. COOL,

NORMAL, or WARM).• Set the RED, GREEN and BLUE default values according

to the values in Table 6-3 to Table 6-5.• When finished press OK on the RC, then press STORE (in

the SAM root menu) to store the aligned values to the NVM.• Restore the initial picture settings after the alignments.

Table 6-3 White tone default setting 32" (Blockbuster)

Table 6-4 White tone default setting 37" (Blockbuster)

Table 6-5 White tone default setting 40" (Blockbuster)

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX51XX ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes. Notes:• After changing the option(s), save them by pressing the OK

button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”.See Table 6-6 SAM mode overview.

6.4.3 (Service) Options

From 2011 onwards, it is not longer possible to change individual option settings in SAM. Options can only be changed all at once by using the option codes as described in section 6.4.4.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers).An option number (or “option byte”) represents a number of different options. When you change these numbers directly,you can set all options very quickly. All options are controlled via eight option numbers.When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set.Example: The options sticker gives the following option numbers:• 08192 00133 01387 45160• 12232 04256 00164 00000The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8.Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set).When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

DiversityNot all sets with the same Commercial Type Number (CTN) necessarily have the same option code!Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. Refer to Chapter 2. Technical Specifications, Diversity, and Connections.

6.4.5 Option Code Overview

Refer to the sticker in the set for the correct option codes.Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB.A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”.Also the virgin bit is to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Dealer options” items in SAM (do not forget to “store”).

After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code of the TV has to be set according to the type plate of the set. For this, you can use the NVM editor in SAM. This action also ensures the correct functioning of the “Net TV” feature and access to the Net TV portals. The loading of the CTN and production code can also be done via ComPair (Model number programming).

After a SSB repair, the original channel map can be restored, provided that the original channel map was stored on a USB stick before repair was commenced and that basic functionality of the TV, needed for this procedure, was not hampered as a result of the defect. The procedure of “channel map cloning” is clearly described in the (electronic) user manual.

In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.

White Tone e.g. 32PFL6606x

Colour Temp R G B

Normal t.b.d. t.b.d. t.b.d.

Cool t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d.

White Tone e.g. 37PFL6606x

Colour Temp R G B

Normal 126 118 127

Cool 112 106 127

Warm 127 110 88

White Tone e.g. 40PFL6606x

Colour Temp R G B

Normal t.b.d. t.b.d. t.b.d.

Cool t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d.

Page 38: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

AlignmentsEN 38 Q552.2E LA6.

2011-Feb-18 back to div. table

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

Figure 6-1 SSB identification

6.6 Total Overview SAM modes

Table 6-6 SAM mode overview

18310_221_090318.eps090319

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Info A. SW version e.g. “Q5551_0.9.1.0 Display TV & Stand-by SW version and CTN serial numberB. Stand-by processor version e.g. “STDBY_83.84.0.0”

C. Production code e.g. “see type plate”

Operation hours Displays the accumulated total of operation hours.TV switched “on/off” & every 0.5 hours is increase one

Errors Displayed the most recent errors

Reset error buffer Clears all content in the error buffer

Alignment White point Colour temperature Normal 3 different modes of colour temperature can be selectedWarn

Cool

White point red LCD White Point Alignment. For values, see Table 6-3 White tone default setting 32" (Blockbuster) to 6-5 White tone default setting 40" (Blockbuster)

White point green

White point blue

Ambilight Select module

Brightness

Select matrix

Dealer options Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)

Auto store mode None

PDC/VPS

TXT page

PDC/VPS/TXT

Option numbers Group 1 e.g. “00008.00001.15421.02239” The first line (group 1) indicates hardware options 1 to 4

Group 2 e.g. “44816.34311.33024.00000” The second line (group 2) indicates software options 5 to 8

Store Store after changing

Initialise NVM N.A.

Store Select Store in the SAM root menu after making any changes

Operation hours display 0003 In case the display must be swapped for repair, you can reset the “”Display operation hours” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour)

Software maintenance Software events Display Display information is for development purposes

Clear

Test reboot

Test cold reboot

Test application crash

Hardware events Display Display information is for development purposes

Clear

Page 39: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Alignments EN 39Q552.2E LA 6.

2011-Feb-18back to div. table

Test setting Digital info Current frequency: 538

QAM modulation: 64-qam Display information is for development purposes

Symbol rate:

Original network ID: 12871

Network ID: 12871

Transport stream ID: 2

Service ID: 3

Hierarchical modulation: 0

Selected video PID: 35

Selected main audio PID: 99

Selected 2nd audio PID: 8191

Install start frequency 000 Install start frequency from “0” MHz

Install end frequency 999 Install end frequency as “999” MHz

Default install frequency

Installation Digital only Select Digital only or Digital + Analogue before installationDigital + Analogue

Development file versions

Development 1 file version Display parameters DISPT5.0.9.29 Display information is for development purposes

Acoustics parameters ACSTS 5.0.6.20

PQ - TV550 1.0.27.22

PQS- Profile set

PQF - Fixed settings

PQU - User styles

Ambilight parameters PRFAM 5.0.5.2

Development 2 file version 12NC one zip software Display information is for development purposes

Initial main software

NVM version Q55x1_0.4.5.0

Flash units software

Temp com file version none

Upload to USB Channel list To upload several settings from the TV to an USB stickPersonal settings

Option codes

Alignments

Identification data

History list

All (options included)

Download from USB Channel list To download several settings from the USB stick to the TVPersonal settings

Option codes

Alignments

Identification data

All (options included)

NVM editor Type number see type plate NVM editor; re key-in type number and production code after SSB replacementAG code see type plate

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Page 40: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit DescriptionsEN 40 Q552.2E LA7.

2011-Feb-18 back to div. table

7. Circuit Descriptions

Index of this chapter:7.1 Introduction7.2 Power Supply7.3 DC/DC Converters7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception7.5 Front-End DVB-S(2) reception7.6 HDMI7.7 Video and Audio Processing - PNX855xx

Notes: • Only new circuits (circuits that are not published recently)

are described. • Figures can deviate slightly from the actual situation, due

to different set executions.• For a good understanding of the following circuit

descriptions, please use the wiring-, block- (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q552.2E LA is part of the TV550 platform, is a derivative from the Q552.1E LA and uses the (same) PNX855xx chipset. The major deltas versus its predecessor Q551 are:• support of DVB-T2 (“second generation” DVBT)

• implementation of “passive” 3D• removal of TCON from the SSB (comes with the display)• changed power architecture• new USB hub (for Sundance xxPFL76xx/xx sets).

The Q552.2E LA chassis comes with the following stylings: • Blockbuster (series xxPFL66xx),• Sundance (series xxPFL76xx).

7.1.1 Implementation

Key components of this chassis are:• PNX855xx System-On-Chip (SOC) TV Processor• TX26xx Hybrid Tuner (DVB-T/C, analogue)• STV6110AT DVB-S Satellite Tuner• SII9x87 HDMI Switch• TPA312xD2PWP Class D Power Amplifier• LAN8710 Dual Port Gigabit Ethernet media access

controller.

7.1.2 TV550 Architecture Overview

For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV550 2011 architecture can be found in Figure 7-1.

Figure 7-1 Architecture of TV550 platform 2011

19100_059_110217.eps110217

NXPPNX85500

SOC

DV

B-T

(E

U)

DV

B-C

(E

U+

HK

)

HybridTuner

DVB-S2Tuner

DVB-S2 (EU)

HDMI 1.3mux

EthernetPHY

SD-CARD

32

FLASH512MB

NVM8kB

CI

DDR24x 128MB-533

LVDS only

AL

SPI64kB

buffer

MatrixFHD@120pFHD@100p

DC/DC

1V11V82V53V35V

Stdby 3V3 USB

WIF

I

3D

IR

CLASS-D

CPLD

Page 41: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Descriptions EN 41Q552.2E LA 7.

2011-Feb-18back to div. table

7.1.3 SSB Cell Layout

Figure 7-2 SSB layout cells (top view)

19100_058_110217.eps110217

9187

OUT

0

1

2

3CTRL

HD

MI

HD

MI

HD

MI

SPDIFOutput

VGA

HDMI

3 D

DDR2

DDR2

DDR2

DDR2

FLASH

PNX85500M1

27x271.00mm

DD

R

ETH

I²SSPDIF

ANAAUD

ANAVID

STDBY

GPIO

HDMI

CA

TS-IN

LVDS-OUT

USB

Class-D

DC/DC

AmbilightCPLD

C

Pro

cess

Su

pp

ort

Wi r

e

Hea

dP

ho

ne

L/R

1F24

SVCSCART1/YPbPr

SD-SLOT

LON

G

PC

MC

IA

PNX85500M1

27x271.00mm

DD

R

ETH

I²SSPDIF

ANAAUD

ANAVID

STDBY

GPIO

HDMI

CA

TS-IN

LVDS-OUT

USB

Heatsink

DVB-S DC/DC1M59

USB2.0

DVB-S DC/DC

TDVB-S2

HybridTuner

unerCD

7E01

1M95 1M991M

71

1E32

1735

1D38

1M20

1G50

1G51

1 M2 1

F-t

ype

13.6

5mm

YLR Pb Pr

Page 42: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit DescriptionsEN 42 Q552.2E LA7.

2011-Feb-18 back to div. table

7.2 Power Supply

7.2.1 Power Supply Unit

All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.Consult the Philips Service web portal for the order codes of the boards.

In this manual, no detailed information is available because of design protection issues.

7.2.2 Connector overview Blockbuster (series xxPFL6600/xx)

Table 7-1 Connector overview 32" sets

Table 7-2 Connector overview 37" sets

Table 7-3 Connector overview 40" sets

7.3 DC/DC Converters

The on-board DC/DC converters deliver the following voltages (depending on set execution):• +3V3-STANDBY, permanent voltage for the Stand-by

controller, LED/IR receiver and controls; connector 1M95 pin 1

• +12V, input from the power supply for TV550 common (active mode); connector 1M95 pins 6, 7 and 8

• +24V, input from the power supply for DVB-S2 (in active mode); connector 1M09 pins 1 and 2

• +1V1, core voltage supply for PNX855xx; has to be started up first and switched "off" last (diagram B03B)

• +1V2, supply voltage for analogue blocks inside PNX855xx• +1V8, supply voltage for DDR2 (diagram B03B)• +2V5, supply voltage for analogue blocks inside PNX855xx

(see diagram B03E)• +3V3, general supply voltage (diagram B03E)• +5V, supply voltage for USB and CAM (diagram B03E)• +5V-TUN, supply voltage for tuner (diagram B03E)• +V-LNB, input voltage for LNB supply IC (item no. 7T50)• +5V-DVBS, input intermediate supply voltage for DVB-S2

(diagram B08A)• +3V3-DVBS, clean voltage for silicon tuner and DVB-S2

channel decoder• +2V5-DVBS, clean voltage for DVB-S2 channel decoder• +1V-DVBS, core voltage for DVB-S2 channel decoder.

A +12 V under-voltage detector (see diagram B03C) enables the 12V to 3.3V and 12V to 5V DC/DC converters via the ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter via the ENABLE-1V8 line. DETECT2 is the signal going to the Stand-by microcontroller and ENABLE-3V3n is the signal coming from the Stand-by microcontroller.

Diagram B03D contains the following linear stabilisers:• +2V5 stabiliser, built around item no. 7UCO• +5V-TUN stabiliser, built around items no. 7UA6 and 7UA7• +1V2 stabiliser, built around items no. 7UA3 and 7UA4.

Diagram B08A contains the DVB-S2-related DC/DC converters and -stabilisers:• a +24V under-voltage detection circuitry is built around

item no. 7T04• the switching frequency of the 24 to 14...20V switched

mode converter is 350 kHz (item no. 7T03 and +V-LNB lines)

• the output signal on the +V-LNB line goes to the LNBH23Q (item no. 7T50)

• the LNBH23Q (item no. 7T50) sends a feedback signal via the V0-CNTRL line

Connector

no. 1308 1316 1M95

Descr. Mains to display to SSB

Pin CN1 CN2 CN4

1 N A2 +3V3SB

2 L n.c. Standby

3 - pin 5 GND1

4 - n.c. GND1

5 - pin 3 +12V3

6 - n.c. +12V3

7 - OCD +Vsnd

8 - n.c. GND1

9 - A1 BL-ON-OFF

10 - n.c. BL-DIM1

11 - pin 13 BL-I-CTRL

12 - n.c. POK

13 - pin 11 +24V

14 - n.c. GND1

15 - GND1 -

Connector

no. 1308 1316 1M95

Descr. Mains to display to SSB

Pin CN1 CN2 CN4

1 N Anode_R +3V3stdby

2 L n.c. Standby

3 - R5 Cathode GND1

4 - R4 Cathode GND1

5 - R3 Cathode +12V

6 - R2 Cathode +12V

7 - R1 Cathode +Vsnd (+24V)

8 - L1 Cathode GND_SND

9 - L2 Cathode BL-ON-OFF

10 - L3 Cathode BL-DIM1 (Vsync)

11 - L4 Cathode BL-I-CTRL

12 - L5 Cathode POK

13 - n.c. +24V (AL2_DVBS)

14 - Anode_L GND1

15 - - -

Connector

no. 1308 1316 1M95

Descr. Mains to display to SSB

Pin CN1 CN2 CN4

1 N Anode 1+ +3V3stdby

2 L n.c. Standby

3 - Cathode 1- GND1

4 - n.c. GND1

5 - Anode 2+ +12V

6 - n.c. +12V

7 - Cathode 2- +Vsnd (+24V)

8 - n.c. GND_SND

9 - Anode 3+ BL-ON-OFF

10 - n.c. BL-DIM1 (Vsync)

11 - Cathode 3- BL-I-CTRL

12 - n.c. POK

13 - Anode 4+ +24V (AL2_DVBS)

14 - n.c. GND1

15 - Cathode 4- -

Page 43: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Descriptions EN 43Q552.2E LA 7.

2011-Feb-18back to div. table

• the switching frequency of the +5V-DVBS to +1-DVBS switched mode converter is 900 kHz (item no. 7T00)

• a delay line for the +2V5-DVBS and +1V-DVBS lines is created with item no. 3T03 (R=10k) and 2T06 (C=100n)

• a 3.3V to 2.5V linear stabiliser is built around item no. 7T01• a 5V to 3.3V linear stabiliser is built around item no. 7T02.

Diagram B08B contains the DVB-S2 LNB supply:• the +V-LNB signal comes from item no. 7T03• the V0-CTRL signal goes to item no. 7T03• the LNB-RF1 goes to the LNB.

Figures gives a graphical representation of the DC/DC converters with its current consumptions:

Figure 7-3 DC/DC converters

7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception

7.4.1 European/China region

The Front-End for the European/China region consist of the following key components:

• Hybrid Tuner• Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter

(8 MHz) (China)• Bandpass filter • Amplifier• PNX855xx SoC TV processor with integrated DVB-T and

DVB-C channel decoder and analogue demodulator.

Below find a block diagram of the front-end application for this region.

Figure 7-4 Front-End block diagram European/China region

7.5 Front-End DVB-S(2) reception

The Front-End for the DVB-S(2) application consist of the following key components:

• Satellite Tuner; I2C address 0xC6 (bridged via channel decoder)

• Channel decoder; I2C address 0xD0• LNB switching regulator; I2C address 0x14• Amplifier• PNX855xx SoC TV processor with integrated DVB-T and

DVB-C channel decoder and analogue demodulator.

Below find a block diagram of the front-end application for DVB-S(2) reception.

Figure 7-5 Front-End block diagram DVB-S(2) reception

This application supports the following protocols:• Polarization selection via supply voltage (18V = horizontal,

13V = vertical)• Band selection via “toneburst” (22 kHz): tone “on” = “high”

band, tone “off” = “low” band• Satellite (LNB) selection via DiSEqC 1.0 protocol• Reception of DVB-S (supporting QPSK encoded signals)

and DVB-S2 (supporting QPSK, 8PSK, 16APSK and 32APSK encoded signals), introducing LDPC low-density parity check techniques.

7.6 HDMI

In this platform, the Silicon Image Sil9x87 HDMI multiplexer is implemented. Refer to figure 7-6 HDMI input configuration for the application.

18770_226_100127.eps100426

+5V 5-TUN196 m A

+5V +5V 5-TUN +5V -TUN2179 m A 196 m A

+12V +3V 3 +3V 3 +2V 5

2919 m A 2371 m A 450 m A

+1V 8 +1V 8 +1V 22450 m A 550 m A

+1V 15100 m A

+1V 1dc-dc

+5Vdc-dc

+5V -TUNs tab ilizer

+3V 3dc-dc

+2V 5s tab ilizer

+1V 8dc-dc

+1V 2s tab ilizer

18770_235_100127.eps100219

18770_237_100127.eps100219

Page 44: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit DescriptionsEN 44 Q552.2E LA7.

2011-Feb-18 back to div. table

Figure 7-6 HDMI input configuration

The following multiplexers can be used:• Sil9187A (does not support “Instaport” technology for fast

switching between input signals)• Sil9287B (supports “Instaport” technology for fast

switching between input signals).The hardware default I2C addresses are:• Sil9187A: 0xB0/0xB2 (random: software workaround)• Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:• +5V detection mechanism• Stable clock detection mechanism• Integrated EDID• RT control• HPD control• Sync detection• TMDS output control• CEC control• EDID stored in Sil9x87, therefore there are no EDID pins

on the SSB.

7.7 Video and Audio Processing - PNX855xx

The PNX855xx is the main audio and video processor (or System-on-Chip) for this platform. It has the following features:

• Multi-standard digital video decoder (MPEG-2, H.264, MPEG-4)

• Integrated DVB-T/DVB-C channel decoder• Integrated CI+• Integrated motion accurate picture processing (MAPP2)• High definition ME/MC• 2D LED backlight dimming option• Embedded HDMI HDCP keys• Extended colour gamut and colour booster• Integrated USB2.0 host controller• Improved MPEG artefact reduction compared with

PNX8543• Security for customers own code/settings (secure flash).

The TV550 combines front-end video processing functions, such as DVB-T channel decoding, MPEG-2/H.264 decode, analog video decode and HDMI reception, with advanced back-end video picture improvements. It also includes next generation Motion Accurate Picture Processing (MAPP2). The MAPP2 technology provides state-of-the-art motion artifact reduction with movie judder cancellation, motion sharpness

and vivid colour management. High flat panel screen resolutions and refresh rates are supported with formats including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @ 100Hz/120Hz. The combination of Ethernet, CI+ and H.264 supports new TV experiences with IPTV and VOD. On top of that, optional support is available for 2D dimming in combination with LED backlights for optimum contrast and power savings up to 50%.

For a functional diagram of the PNX855xx, refer to Figure 7-7.

18770_243_100203.eps100203

Page 45: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Descriptions EN 45Q552.2E LA 7.

2011-Feb-18back to div. table

Figure 7-7 PNX855xx functional diagram

18770_241_100201.eps100219

TS out/in for

TS input

CVBS, Y/C,

LVDS for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CAMPEG

PRIMARYLVDS

VIDEOSECONDARY

MEMORY

VIDEO 3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

560 MHz

I2C PWM GPIO IR ADC UART I2C GPIO Flash

analog audio

I2S

SPDIF

SYSTEM

USB 2.0

PNX85500x

DVB-T/Cchannel decoderDVB

AV-PIP

SPI

MPEG/H.264

RECEIVER

(8051)CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSORSYSTEM

CONTROLLER

DECODERVIDEO

24KEf CPUMIPS32

x 8

AV-DSP

REDUCTIONAND NOISE

DE-INTERLACE

OUTPUTVIDEO

SUB-PICTURE

ENCODER

OUTPUTVIDEO

quad channel)(single, dual orflat panel display

DRAWINGENGINE

DMA BLOCK

Motion-accuratepixel processing

SDMemory

Card

EthernetMAC

Page 46: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 46 Q552.2E LA8.

2011-Feb-18 back to div. table

8. IC Data Sheets

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram USB Hub B01C, USB2513B (IC 7F25)

Figure 8-1 Internal block diagram and pin configuration

18770_301_100217.eps100217

Block diagram

Pinning informationNote : The LED port indicators only apply to USB2513i.

To UpstreamVBUS

3.3 V

Upstream PHY

Upstream USB Data

Repeater ControllerSerial

Interface Engine

SerialInterface

To EEPROM or SMBus Master

SCLSDA

Port Controller

Bus-PowerDetect/

Vbus Pulse

PHY#1

USB DataDownstream

OC SenseSwitch/

LEDDrivers

USB DataDownstream

Port Power

3.3 V

PLL

24 MHz Crystal

Routing & Port Re-Ordering Logic

Regulator

CRFILT

Port Power

Regulator

PHY#xPort #xOC Sense

Switch Driver/ LED Drivers

TT#x

TT#1

...Port #1OC Sense

Switch Driver/ LED Drivers

OC SenseSwitch/

LEDDrivers

...

The ‘x’ indicates the number of available downstream ports: 2, 3, 4, or 7.

Ground Pad(must be connected to VSS)

SMSCUSB2512/12A/12B

USB2512i/12Ai/12Bi(Top View QFN-36)

26

VDD

33

25

RES

ET_N

24

HS_

IND

/ C

FG_S

EL[1

]

23

SCL

/ SM

BCLK

/ C

FG_S

EL[0

]

22SD

A / S

MBD

ATA

/ NO

N_R

EM[1

]

21N

C

20N

C

19

VBU

S_D

ET27

NC

18 NC

17 OCS_N[2]

16 PRTPWR[2] / BC_EN[2]*

15

OCS_N[1]

14

VDD33

13

CRFILT

12 PRTPWR[1] / BC_EN[1]*

11 TEST

10 VDD33

SUSP_IND / LOCAL_PWR / NON_REM[0] 28

VDD33 29

USBDP_UP 31

XTALOUT 32

XTALIN / CLKIN 33

RBIAS

36VDD33

35

PLLFILT 34

USBDM_UP 30

VDD

33

1U

SBD

M_D

N[1

]

2U

SBD

P_D

N[1

]

3U

SBD

M_D

N[2

]

4U

SBD

P_D

N[2

]

5

NC

6

NC

7

NC

8

NC

9

Indicates pins on the bottom of the device.

Page 47: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 47Q552.2E LA 8.

2011-Feb-18back to div. table

8.2 Diagram Temp sensor & headphone B01J, LM75BDP (IC 7FD1)

Figure 8-2 Pin configuration

18770_300_100217.eps100217

Block diagram

Pinning information

LM75B

SDA

VCC

SCLA0

OS

DNG1AA2

BIASREFERENCE

BAND GAPTEMP SENSOR

OSCILLATOR

POWER-ONRESET

11-BITSIGMA-DELTA

A-to-DCONVERTER

POINTERREGISTER

TIMER

COMPARATOR/INTERRUPT

COUNTER

LOGIC CONTROL AND INTERFACE

CONFIGURATIONREGISTER

THYSTREGISTER

TOSREGISTER

TEMPERATUREREGISTER

LM75BDP

VADS CC

0ALCS

1ASO

2ADNG

1

2

3

4

6

5

8

7

Page 48: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 48 Q552.2E LA8.

2011-Feb-18 back to div. table

8.3 Diagram NANDflash - conditional access B02A, PNX855xx (IC7S00)

Figure 8-3 Internal block diagram and pin configuration

18770_308_100217.eps100217

Block diagram

Pinning information

TS out/in for

TS input

CVBS, Y/C,

LVDS for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CAMPEG

PRIMARYLVDS

VIDEOSECONDARY

MEMORY

VIDEO3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

500 MHz

I2C PWM Px_x IR ADC UART I2C GPIO Flash

analog audio

I2S

SPDIF

SYSTEM

USB 2.0

PNX8550x

DVB-T/Cchannel decoderDVB

AV-PIP

SPI

RECEIVER

(8051)CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSORSYSTEM

CONTROLLER

MULTI-STANDARD

VIDEODECODER

24KEf CPUMIPS32

x 10

AV-DSP

REDUCTIONAND NOISE

DE-INTERLACE

OUTPUTVIDEO

SUB-PICTURE

ENCODER

OUTPUTVIDEO

quad channel)(single, dual orflat panel display

DRAWINGENGINE

Scatter/GatherTS Demux

Motion-accuratepixel processing

SDMemory

Card

EthernetMAC

analog Y/C

Direct-IF

PNX8550xE

Transparent top view

2 4 6 8 10 1213

1415 17

1619

18 2021 23

22 2425

261 3 5 7 9 11

ball A1index area

AB

AD

AA

AC

YW

VU

R

N

T

P

ML

KJ

H

F

D

G

E

CB

A

AFAE

Page 49: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 49Q552.2E LA 8.

2011-Feb-18back to div. table

8.4 Diagram Audio B03A, TPA312xD2PWP (IC7D10)

Figure 8-4 Internal block diagram and pin configuration

I_18020_142.eps100402

Block diagram

Pinning information

123

456789

101112

242322

212019181716

151413

PVCCLSD

PVCCLMUTE

LINRIN

BYPASSAGNDAGND

PVCCRVCLAMP

PVCCR

PGNDLPGNDLLOUTBSLAVCCAVCCGAIN0GAIN1BSRROUTPGNDRPGNDR

PWP (TSSOP) PACKAGE(TOP VIEW)

1 F

SD

PVCCL

TPA3120D2

PVCCR

VCLAMP

GAIN1

BYPASS

1 F

1 F

0.22 F

AGND

} Control

ShutdownControl

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 F

22 H

22 H

0.68 F

470 F

0.68 F

1 F

470 F

GAIN0

AVCC

MUTE

ROUT

LOUT

Page 50: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 50 Q552.2E LA8.

2011-Feb-18 back to div. table

8.5 Diagram DC/DC B03B, TPS53126PW (IC7U03)

Figure 8-5 Internal block diagram and pin configuration

18310_300_090319.eps100416

Block diagram

Pinning informationVBST1

NC

EN1

VO1

VFB1

NC

GND

TEST1

NC

VFB2

VO2

EN2

NC

VBST2

DRVH1

LL1

DRVL1

PGND1

TRIP1

VIN

VREG5

V5FILT

TEST2

TRIP2

PGND2

DRVL2

LL2

DRVH2

28

27

26

25

24

23

22

21

20

19

18

17

16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TP

S5

31

24

15

Page 51: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 51Q552.2E LA 8.

2011-Feb-18back to div. table

8.6 Diagram DC/DC B03E, ST1S10PH (IC 7UD0)

Figure 8-6 Internal block diagram and pin configuration

I_18010_083.eps100402

Block diagram

Pinning information

PowerSO-8DFN8 (4 × 4)

Page 52: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 52 Q552.2E LA8.

2011-Feb-18 back to div. table

8.7 Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)

Figure 8-7 Internal block diagram and pin configuration

F_15710_166.eps100402

Block diagram

Pinning information

DPAK

LD1117DT

Page 53: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 53Q552.2E LA 8.

2011-Feb-18back to div. table

8.8 Diagram Ethernet & Service B04C, LAN8710A-EZKH (IC 7E10)

Figure 8-8 Internal block diagram and pin configuration

18770_302_100217.eps100217

Block diagram

Pinning information

10M Rx Logic

100M Rx Logic

DSP System:Clock

Data RecoveryEqualizer

Analog-to-Digital

100M PLL

Squelch & Filters

10M PLL

Receive Section

Central Bias

HP Auto-MDIX

Management ControlSMI

RM

II / MII Logic

TXP / TXN

TXD[0:3]TXENTXER

TXCLK

RXD[0:3]RXDVRXER

RXCLK

CRSCOL/CRS_DV

MDCMDIO

LED1LED2LED Circuitry

MODE Control

nINT

nRST RXP / RXN

10M Tx Logic

10M Transmitter

100M Tx Logic

100M Transmitter

Transmit Section

PLLXTAL1/CLKIN

XTAL2

MODE0MODE1MODE2

PHYAddress Latches

PHYAD[0:2]

Auto-Negotiation

InterruptGenerator

RMIISELMDIX

Control

Reset Control

RBIAS

VDD2A

LED2/nINTSEL

LED1/REGOFF

XTAL2

XTAL1/CLKIN

VDDCR

RXD3/PHYAD2

RXCLK/PHYAD1

RXD

2/R

MIIS

EL

RXD

1/M

OD

E1

RXD

0/M

DE

0

VD

DIO

RXE

R/R

XD4/

PHYA

D0

CR

S

MD

IO

CO

L/C

RS

_DV

/MO

DE

2

TXD2

MDC

nRST

nINT/TXER/TXD4

TXD0

TXEN

TXCLK

TXD1

RBI

AS

TXD

3

TXN

RXD

V

RXN

VDD

1A

TXP

RXP

1

2

3

4

5

6

7

8

SMSCLAN8710/LAN8710i

32 PIN QFN(Top View)

9 10 11 12 13 14 15

22

21

20

19

18

17

28 27 26 2516

24

23

32 31 30 29

VSS

Page 54: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 54 Q552.2E LA8.

2011-Feb-18 back to div. table

8.9 Diagram HDMI B04D, SII9x87B (IC 7EC1)

Figure 8-9 Internal block diagram and pin configuration

18770_303_100217.eps100217

Block diagram

Pinning information

Page 55: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 55Q552.2E LA 8.

2011-Feb-18back to div. table

8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)

Figure 8-10 Internal block diagram and pin configuration

18770_309_100217.eps100217

Block diagram

Pinning information

BiasControl

8

1

7

4

VO1

VO2

VDD

5

2

3

6

IN1−

BYPASS

SHUTDOWN

VDD/2

IN2−

−+

−+

1234

8765

VO1IN1−

BYPASSGND

VDDVO2IN2−SHUTDOWN

D OR DGN PACKAGE(TOP VIEW)

Page 56: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 56 Q552.2E LA8.

2011-Feb-18 back to div. table

8.11 Diagram DVBS-FE B07A, STV6110AT (IC 7R02)

Figure 8-11 Internal block diagram and pin configuration

18770_304_100217.eps100217

Block diagram

PLL, dividers

Amplifier

RF_INIP

I2C bus interface

INQP

QNAGC

RF_OUT

SCLXTAL_IN

SDA

DC offset compensation

XTAL_OUT

XTAL_INN

Page 57: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data Sheets EN 57Q552.2E LA 8.

2011-Feb-18back to div. table

8.12 Diagram DVBS supply B08A, TPS54283PWP (IC 7T03)

Figure 8-12 Internal block diagram and pin configuration

18770_305_100217.eps100217

Block diagram

7FB1

+

Soft Start1 CCOMP

+

S Q

QRR

+

CurrentComparator

BP

f(IDRAIN1) + DC(ofst)

2

1

3

Anti-CrossConduction

1.2 MHzOscilator

Divideby 2/4

RampGen 1

RampGen 2

CLK1

CLK2

BP

CLK1WeakPull-DownMOSFET

5EN1

6EN2

6 A6 A

VDD2

InternalControl

10SEQ

150 k

150 k

OutputUndervoltage

Detect

BPFB1

FB2

CLK1

4GND

8FB2

+

Soft Start2 CCOMP

+

S Q

QRR

+

CurrentComparator

BP

13

14

12

Anti-CrossConduction

BP

CLK2WeakPull-DownMOSFET

11BP

9ILIM2

150 k

150 kBP

CLK2

4GND

LevelSelect

5.25-VRegulator

References

BOOT1

PVDD1

SW1

BOOT2

PVDD2

SW2

f(IDRAIN2) + DC(ofst)

0.8 VREF

IMAX2 (Set to one of two limits)

f(IDRAIN1)

f(IMAX1)

Overcurrent Comp

f(ISLOPE1)

LevelShift

LevelShift

f(IDRAIN2)

f(IMAX2)f(ISLOPE2)

FETSwitch

TSD

PVDD2

f(ISLOPE1)

f(ISLOPE2)

SD1

SD2

UVLO

0.8 VREF

SD2

0.8 VREF

SD1

UDG-07007

Overcurrent Comp

RCOMP

RCOMP

Page 58: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

IC Data SheetsEN 58 Q552.2E LA8.

2011-Feb-18 back to div. table

8.13 Diagram DVBS supply B08B, LNBH23Q (IC 7T50)

Figure 8-13 Internal block diagram and pin configuration

18770_306_100217.eps100217

Block diagram

Pinning information

SDA SCL

LNBH23

ADDR

A-GND

I2C Diagnostics

I2C interface

DSQIN

Vup

VoRX

VoTX

LX

22KHz Oscill.

PWM

ControllerRsense EN

VSEL

Linear Post-reg+Modulator +Protections+Diagnostics

ITEST

TTX ENVSEL

VOUT Control

EXTM

P-GND

Preregulator+U.V.lockout+P.ON reset

BypVcc Vcc- LISEL TTX

TEN

DSQOUT

DETIN22KHz Tone Amp. Diagn.

22KHz Tone Freq. Detector

TTX

VCTRL

SDA SCL

LNBH23

ADDR

A-GND

I2C Diagnostics

I2C interface

DSQIN

Vup

VoRX

VoTX

LX

22KHz Oscill.22KHz Oscill.

PWM

ControllerRsense EN

VSEL

Linear Post-reg+Modulator +Protections+Diagnostics

ITEST

TTX ENVSEL

VOUT Control

EXTM

P-GND

Preregulator+U.V.lockout+P.ON reset

BypVcc Vcc- LBypVcc Vcc- LISEL TTX

TEN

DSQOUT

DETIN22KHz Tone Amp. Diagn.

22KHz Tone Freq. Detector

TTXTTX

VCTRL

1 n.c .2 n.c .3 n.c .4 LX5 P -GND6 S DA7 n.c .8 n.c .9 S CL

10 A DDR11 DS Qout12 DS QIN13 E XTM14 TTX15 B Y P16 n.c .17 n.c .18 V cc-L19 V cc20 A -GND21 V oRX22 V oTX23 n.c .24 n.c .25 n.c .26 n.c .27 V up28 IS E L29 DE TIN30 V CTRL31 n.c .32 n.c .

Connected with power grounds and to the ground layer through vias to dissipate the heat.

Epad

Page 59: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Block Diagrams EN 59Q552.2E LA 9.

2011-Feb-18 back to div. table

9. Block Diagrams

9-1 Wiring diagram Blockbuster 32"

LCD DISPLAY(1004)

MAIN POWER SUPPLY32" DPS-93BP(1005)

LOUDSPEAKER(5213)

LO

UD

SP

EA

KE

R(5

216)

LO

UD

SP

EA

KE

R(5

216)

1735

4P

1M19

8P

1D38

3P

1M95

14P

SSB3139 123 6495.x(1150)

B

SD-C

ARD

REA

DER

USB

USB

ETH

ERN

ET

TUN

ER

PHO

NE

SPD

IF

HD

MI

HDMIHDMIHDMI VGA

1316

10P

1M95

14P

MAINSSWITCH

(8308)

SCART

INL

ET

1M95

8G51

8G50

19100_808_110211.eps110211

TO DISPLAY

51P

TO DISPLAY

41P

C2 C1

IR / LED BOARD (1108)

J1

8P

WIRING DIAGRAM 32" BLOCKBUSTER

1M19 (B09A)1. LIGHT-SENSOR2. GND3. RC4. LED-25. +3V3-STANDBY6. LED-17. KEYBOARD8. +5V

1735 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT-SPEAKER

1D38 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. RIGHT-SPEAKER

1308 (PSU)1. N2. L

1M95 (B03C)1. +3V3-STANDBY2. STANDBY3. GND4. GND5. +12VIN6. +12VIN7. +24V-AUDIO-POWER8. GND9. LAMP-ON10. BACKLIGHT-PWM_BL-VS11. BACKLIGHT-BOOST12. POWER-OK13. +24VGND

1M95 (PSU)1. +3V3STDBY2. STANDBY3. GND4. GND5. +12V6. +12V7. +VSND8. GND_SND9. BL-ON-OFF10. BL-DIM111. BL-I-CTRL12. POK13. +24V14. GND1

1316 (PSU)1. ANODE 12. NC3. CATHODE 14. GND5. ANODE 26. NC7. CATHODE 28. NC9. ANODE 310. NC11. CATHODE 312. NC13. ANODE 414. NC15. CATHODE 4

1G51 (B06B)1. +VDISP 2. +VDISP3. +VDISP4. +VDISP||51. CTRL-DISP

TO D

ISP

LA

YS

UP

PLY

8308

1G50

41P

1G51

51P

2P1308

1735 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT-SPEAKER

Page 60: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 60Q552.2E LA 9.Block Diagrams

2011-Feb-18 back to div. table

9-2 Wiring diagram Blockbuster 37"

LCD DISPLAY(1004)

MAIN POWER SUPPLY37" FSP110-4FS01(1005)

LOUDSPEAKER(5213)

LO

UD

SP

EA

KE

R(5

216)

LO

UD

SP

EA

KE

R(5

216)

1735

4P

1M19

8P

1D38

3P

1M95

14P

SSB3139 123 6495.x(1150)

B

SD-C

ARD

REA

DER

USB

USB

ETH

ERN

ET

TUN

ER

PHO

NE

SPD

IF

HD

MI

HDMIHDMIHDMI VGA

1316

10P

1M95

14P

MAINSSWITCH

(8308)

SCART

INL

ET

1M95

8G51

8G50

19100_809_110211.eps110211

TO DISPLAY

51P

TO DISPLAY

41P

C2 C1

IR / LED BOARD (1108)

J1

8P

WIRING DIAGRAM 37" BLOCKBUSTER

1M19 (B09A)1. LIGHT-SENSOR2. GND3. RC4. LED-25. +3V3-STANDBY6. LED-17. KEYBOARD8. +5V

1735 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT-SPEAKER

1D38 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. RIGHT-SPEAKER

1308 (PSU)1. N2. L

1M95 (B03C)1. +3V3-STANDBY2. STANDBY3. GND4. GND5. +12VIN6. +12VIN7. +24V-AUDIO-POWER8. GND9. LAMP-ON10. BACKLIGHT-PWM_BL-VS11. BACKLIGHT-BOOST12. POWER-OK13. +24VGND

1M95 (PSU)1. +3V3STDBY2. STANDBY3. GND4. GND5. +12V6. +12V7. +VSND8. GND_SND9. BL-ON-OFF10. BL-DIM111. BL-I-CTRL12. POK13. +24V14. GND1

1316 (PSU)1. ANODE 12. NC3. CATHODE 14. GND5. ANODE 26. NC7. CATHODE 28. NC9. ANODE 310. NC11. CATHODE 312. NC13. ANODE 414. NC15. CATHODE 4

1G51 (B06B)1. +VDISP 2. +VDISP3. +VDISP4. +VDISP||51. CTRL-DISP

TO DISPLAYSUPPLY

8308

1G50

41P

1G51

51P

2P1308

Page 61: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Block Diagrams EN 61Q552.2E LA 9.

2011-Feb-18 back to div. table

9-3 Wiring diagram Blockbuster 40"

LCD DISPLAY(1004)

MAIN POWER SUPPLY40" PLDE-P007A(1005)

LOUDSPEAKER(5213)

LOUDSPEAKER(5216)

LOUDSPEAKER(5216)

1735

4P

1M19

8P

1D38

3P

1M95

14P

1G50

41P

1G51

51P

SSB3139 123 6495.x(1150)

B

SD-C

ARD

REA

DER

USB

USB

ETH

ERN

ET

TUN

ER

PHO

NE

SPD

IF

HD

MI

HDMIHDMIHDMI VGA

1316

10P

MAINSSWITCH

(8308)

SCART

14P

1M99

1308

2P

INLET

8308

1M95

8G51

8G50

19100_807_110211.eps110211

TO DISPLAY

51P

TO DISPLAY

41P

C2 C1

IR / LED BOARD (1112)

J1

8P

WIRING DIAGRAM 40" BLOCKBUSTER

1M19 (B09A)1. LIGHT-SENSOR2. GND3. RC4. LED-25. +3V3-STANDBY6. LED-17. KEYBOARD8. +5V

1735 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT-SPEAKER

1D38 (B03A)1. LEFT-SPEAKER2. GND-AUDIO3. RIGHT-SPEAKER

1308 (PSU)1. N2. L

1M95 (B03C)1. +3V3-STANDBY2. STANDBY3. GND4. GND5. +12VIN6. +12VIN7. +24V-AUDIO-POWER8. GND9. LAMP-ON10. BACKLIGHT-PWM_BL-VS11. BACKLIGHT-BOOST12. POWER-OK13. +24VGND

1M95 (PSU)1. +3V3STDBY2. STANDBY3. GND4. GND5. +12V6. +12V7. +VSND8. GND_SND9. BL-ON-OFF10. BL-DIM111. BL-I-CTRL12. POK13. +24V14. GND1

1316 (PSU)1. ANODE 12. NC3. CATHODE 14. GND5. ANODE 26. NC7. CATHODE 28. NC9. ANODE 310. NC11. CATHODE 312. NC13. ANODE 414. NC15. CATHODE 4

1G51 (B06B)1. +VDISP 2. +VDISP3. +VDISP4. +VDISP||51. CTRL-DISP

TO DISPLYSUPPLT

Page 62: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 62Q552.2E LA 9.Block Diagrams

2011-Feb-18 back to div. table

9-4 Block Diagram Video

B02 PNX85500 B06B VIDEO OUT - LVDS

B04A ANALOGUE EXTERNALS A

B01I VGA

B04B ANALOGUE EXTERNALS B

B01A COMMON INTERFACE

B10A DVBT2

B01F TUNER

B07A DVBS-FE

B05A DDR

B01C USB HUB

B01B FLASH

B01H HDMI B04D HDMI

1E04

1E08

1E03

21

7R02STV6110A

DVB-STUNER

7R01STV0903BAC

DVB-SCHANNELDECODER

7

7S00PNX85537EB

VIDEO STREAMB02A

LVDSB02F

ANALOG VIDEOB02I

HDMI_DVB02C

AV3-PB

AV3-Y

AV3-PR

PB

PR

Y

EXT 1

EXT 3

1E01

2021

1

7

11

1516

SCART1

19

1

1E05

2

3

14

13

R-VGA

G-VGA

B-VGA

H-SYNC-VGA

V-SYNC-VGA

1 610

11

5

15

VGACONNECTOR

AD15

AE15

AC15

AC18

AB18

AE16

AD16

AF16

AV1-BLK

16

AV1-STATUS8B02G

B02GCONTROL

CONTROL

63 HDMIA-RXC-

HDMIA-RX0+

HDMIA-RX0-HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

62

61

60

59

58

57

56

HDMIA-RXC+

U26

T25

T26

W24

U25

V26

W26

W25

V25

RREF

PN

X85

537

19100_811_110214.eps110214

IP

SAT IN

VIDEO

PCMCIA

CONDITIONALACCESS

2

2

2

20+3V3

MD0

MDI

TUNER_P

TUNER_N

IF_AGC

CVBS-MON-OUT1 AF11CVBS1_OUT

VGA_R

VSYNC_IN

VGA_G

VGA_B

PR_R_C1

Y_G1

PB_B1

AC1315 AV1-RAV1_R

7 AD13AVI-BAV1_B

11 AE13AV1-GAV1_G

20 AB15AV1-CVBS CVBS_Y1

TNR_SER1_MIVAL

TNR_SER1_SOP

TNR_SER1_MICLK

TNR_SER1_DATA

HSYNC_IN

+3V33S0W

7F0174LVC245APW

BUFFER

1P00

68P

51

52

18

17+5VCA

CA-MDO(0-7)MDO(0-7)

CA-MDI(0-7)

PX1

PX2

PX3

PX4

TO DISPLAY

TO DISPLAY

1G51

+VDISP

I2C

N.C.50

51

49

40

40

3

4

2

1

1G50

N.C.

1

2

3

3

4120 8

49

53

50

IM

32 122XTAL

18 12QP

19 11QM

2 16AGC

78 TS-DVBS-VALID

75 TS-DVBS-SOP

74 TS-DVBS-CLOCK

73

4

3

5

7

TS-DVBS-DATA

TS-FE-VALID

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

4

AD12

AE12

R23

T22

R22

T21

AF12

MEMORYB02B

V1DDR2-VREF-CTRL3

A2DDR2-VREF-CTRL2

VREF_2VREF_1

CONROLB02E

FLASHB02A

7F20H27U4G8F2DTR

NANDFLASH

USB-DMUSB-DP

R26

R25

12,37+3V3

VCC

USB_DP

USB_DN

LOUT1

LOUT2

LOUT3

LOUT4

XIO_D XIO-D(00-07)

*7EC1SII9187BCSII9287BC

HDMISWITCH

VCC33

RXC

RXD

RXB

RXA

18

17

16

15

14

13

12

11

8

7

6

5

4

3

2

1

72

71

70

69

68

67

66

65

26

25

24

23

22

21

20

19

191

182

1

1P05

3

4

7

910

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-HDMI SIDECONNECTOR

191

182

1

1P02

3

4

7

910

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-HDMI 1CONNECTOR

1

1P03

3

4

7

910

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

910

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

191

182

HDMI 2CONNECTOR

191

182

HDMI 3CONNECTOR

9,27,64+3V3-HDMI

PNX-IF-AGC

5

4

1F75

SAW 36MHZ17

2F74

2F78

2F90 3F79-1

3F79-45F70

1T01TH2627

IF-OUT1

RF_AGC

IF-OUT2

MAIN HYBRIDTUNER

2

3

4

7

6

PNX-IF-P

PNX-IF-N11

10

3

14

3

1

2 2

7F75UPC3221GV

AGC AMPLIFIER

IN

VCC

OUTAGC CONTROL

1

SELECT-SAW

RF IN5F73

7F70

B02ECONTROL

BANDPASSFILTER

TUN-IF-P

RF-AGC

TUN-IF-N

1R10

16M

31

30

DDR2-VREF-DDR

A1 E2A1 E2A1 E2A1 E2

+1V8

SDRAM128Mx8

7B01H5PS1G83E

SDRAM128Mx8

7B02H5PS1G83E

SDRAM128Mx8

7B03H5PS1G83E

DQ

A

SDRAM128Mx8

7B00H5PS1G83E

VR

EF

VD

DL

VR

EF

VD

DL

VR

EF

VD

DL

VR

EF

VD

DL

DDR2-D(0-31)

D(2

4-31

)

D(1

6-23

)

D(8

-15)

D(0

-7)

DDR2-A(0-14)

TXC_NTXC_P

TX0_N

TX0_P

TX1_NTX1_P

TX2_N

TX2_P

9R03-1

9R04

9R03-2

9R03-4

1R01

+5V-TUN-PIN

RX1_A_N

RX0_A_P

RX0_A_N

RX1_A_P

RX2_A_N

RXC_A_N

RXC_A_P

RX2_A_P

7FJ0CXD2820R

DVBT2CHANNELDECODER

TS-FE-VALID

DVBT2-IFN

DVBT2-IFP

64IF-AGC

IF-P-DVBT2

IF-P-DVBT2

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

SSB 3104 313 6519.x

43

21

USB1-DM

USB1-DP

USB2-DMUSB2-DP

SIDE USBCONNECTOR

1P08

+5V-USB2

+5V-USB1

17

21

22

18

9

10

5

6

2

1

3

4

43

21

SIDE USBCONNECTOR

1P07

2

1

+5V

3

USB-WIFI-DDnUSB-WIFI-DDP

13

14

4

9F26

9F25

7FL5CY7C65631

USBHUB

1F24

2

1

4

5

3

1FL5

24M

SSB 3139 123 6519.x

7E09-1

7E05EF

7E06EF

*6000 SERIE MUX SII9187 NON INSTAPORT 7000 SERIE MUX SII9287 INSTAPORT

7FJ1

Page 63: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Block Diagrams EN 63Q552.2E LA 9.

2011-Feb-18 back to div. table

9-5 Block Diagram Audio

B01H HDMI B04D HDMI B02D PNX85500: AUDIO

B02D CLASS-D B03A AUDIO

B04E HEADPHONE

B04B ANALOGUE EXTERNALS B

B04A ANALOGUE EXTERNALS A

B01J TEMP SENSOR + HEADPHONE

B02 PNX85500

B05A DDR

B01C USB HUB

B01B FLASH

B01A COMMON INTERFACE

B10A DVBT2

B01F TUNER

B07A DVBS-FE

7S00PNX85537EB

AUDIOB02D

STANDBYB02G

HDMI_DVB02C

STANDBYB02G

PN

X85

537

19100_812_110215.eps110215

AD7

AE7

17351

2

SPEAKER L3

4

SPEAKER R

SPEAKERWOOFER

ADAC(1)

ADAC(2)

+AUDIO-L

-AUDIO-R

RESET-AUDIOAB19

AC19

ADAC(4)

AMP1

AMP2ADAC(3)

HEADPHONEOUT 3.5mm

AF7

AD6

7EE1TPA6111A2DGN

HEADPHONEAMPLIFIER

1

7IN-1

SHUTDOWN

IN-2

2

6

5

A-PLOP B03A

B03C

7D10TPA3123D2PWP

CLASS DPOWER

AMPLIFIER

OUT-L

PVCC_L

PVCC_R

OUT-R

512

10 6

22

15

IN-R

IN-L

MUTE

SD

4

2

AUDIO-MUTE-UP

A-STBY

A-STBY

B04A

STANDBY &PROTECTION

7D03

MAINS SWITCHDETECT

7D03

LEFT-SPEAKER

RIGHT-SPEAKER

AE6

AF6

AE10

AF10

AUDIO-OUT-L 1

7

3

1E08

4

6

5

ADAC(5)

ADAC(6)

AUDIO-IN3-L

AUDIO-IN3-R

AE9

AF9AUDIO IN

L+R

ADAC_2

PO_7

PO_6

ADAC3

ADAC4

ADAC_1

1328

2

3

1

7EE0-1 7EE0-2

1D381

2

3DETECT2

1

1E01-13

6

AP-SCART-OUT-L

AP-SCART-OUT-R

2

SCART1

A-PLOP

7E01A-PLOP B04E

2021

1

7

11

1516

7S05

AUDIO-OUT-R3EA7-4

3EA7-1

AUDIO

AUDIO-IN1-L

AUDIO-IN1-R

5D03

*7EC1SII9187BCNU SII9287BCNU

HDMISWITCH

VCC33

RXC

RXD

RXB

RXA

191

182

1

1P05

3

4

7

910

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-HDMI SIDECONNECTOR

191

182

1

1P02

3

4

7

910

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-HDMI 1CONNECTOR

1

1P03

3

4

7

910

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

910

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

191

182

HDMI 2CONNECTOR

191

182

HDMI 3CONNECTOR

14 ARC-eHDMI+ eHDMI+

9,27,64+3V3-HDMI

8+3V3

1,3

10,12+24V-AUDIO-POWER

5D07

5D08

VDD

VO_1

VO_2

AD9

AC9

AUDIO-IN4-L

AUDIO-IN4-RVGA (OR DVI)

AUDIO

1E09

2

3

1

AIN4_L

AIN4_R

ADAC_5

ADAC_6

AIN1_R

AIN3_L

AIN3_R

AIN1_L

VIDEO STREAMB02A

ANALOG VIDEOB02I

MD0

MDI

TUNER_P

TUNER_N

IF_AGC

TNR_SER1_MIVAL

TNR_SER1_SOP

TNR_SER1_MICLK

TNR_SER1_DATA

MEMORYB02B

V1DDR2-VREF-CTRL3

A2DDR2-VREF-CTRL2

VREF_2VREF_1

7S05LM324P

14

8

1E07

1

AF5

AF18

DIGITALAUDIO

OUTSPDIF-OUT-PNX

SEL-HDMI-ARC

SPDIF-OUT

SPDIF-OPT

2

1

4

5

3

8

SPDIF_OUT

P0_4

7S09&

+3V3

A-PLOP

7D15

A-PLOPB04E

CONROLB02E

FLASHB02A

7F20H27U4G8F2DTR-BC

NANDFLASH

R26

R25

12,37+3V3VCC

USB_DP

USB_DN

XIO_D XIO-D(00-07)

5EC2

63 HDMIA-RXC-

HDMIA-RX0+

HDMIA-RX0-HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

62

61

60

59

58

57

56

HDMIA-RXC+

U26

T25

T26

W24

U25

V26

W26

W25

V25

RREF+3V33S0W

TXC_NTXC_P

TX0_N

TX0_P

TX1_NTX1_P

TX2_N

TX2_P

RX1_A_N

RX0_A_P

RX0_A_N

RX1_A_P

RX2_A_N

RXC_A_N

RXC_A_P

RX2_A_P

DDR2-VREF-DDR

A1 E2A1 E2A1 E2A1 E2

+1V8

SDRAM128Mx8

7B01H5PS1G83EFR

SDRAM128Mx8

7B02H5PS1G83EFR

SDRAM128Mx8

7B03H5PS1G83EFR

DQ

A

SDRAM128Mx8

7B00H5PS1G83EFR

VR

EF

VD

DL

VR

EF

VD

DL

VR

EF

VD

DL

VR

EF

VD

DL

DDR2-D(0-31)

D(2

4-31

)

D(1

6-23

)

D(8

-15)

D(0

-7)

DDR2-A(0-14)

21

7R02STV6110A

DVB-STUNER

7R01STV0903BAC

DVB-SCHANNELDECODER

7IP

SAT IN

PCMCIA

CONDITIONALACCESS

20+3V3

7F0174LVC245APW

BUFFER

1P00

68P

51

52

18

17+5VCA

CA-MDO(0-7)MDO(0-7)

CA-MDI(0-7)

20 8

49

50

IM

32 122XTAL

18 12QP

19 11QM

2 16AGC

78 TS-DVBS-VALID

75 TS-DVBS-SOP

74 TS-DVBS-CLOCK

73

4

3

5

7

TS-DVBS-DATA

TS-FE-VALID

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

4

AD12

AE12

R23

T22

R22

T21

AF12

PNX-IF-AGC

5

4

1F75

SAW 36MHZ17

2F74

2F78

2F90 3F79-1

3F79-45F70

1T01TH2627

IF-OUT1

IF-OUT2

MAIN HYBRIDTUNER

2

3

4

7

6

PNX-IF-P

PNX-IF-N11

10 4

3

1

2 2

1

7F75UPC3221GV

AGC AMPLIFIER

IN

VCC

OUTAGC CONTROL

1

SELECT-SAW

RF IN 5F73

7F70

B02ECONTROL

BANDPASSFILTER

TUN-IF-P

TUN-IF-N

1R10

16M

31

30

9R03-1

9R04

9R03-2

9R03-4

1R01

+5V-TUN-PIN

7FJ0CXD2820R

DVBT2CHANNELDECODER

TS-FE-VALIDDVBT2-IFN

DVBT2-IFP

IF-P-DVBT2

IF-P-DVBT2

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

SSB 3139 123 6519.x

1E10

SSB 3139 123 6519.*

SSB 3139 123 6495.*

+3V312

3

USB-DM

USB-DP

43

21

USB1-DM

USB1-DP

USB2-DMUSB2-DP

SIDE USBCONNECTOR

1P08

+5V-USB2

+5V-USB1

17

21

22

18

9

10

5

6

2

1

3

4

43

21

SIDE USBCONNECTOR

1P07

2

1

+5V

3

USB-WIFI-DDnUSB-WIFI-DDP

13

14

4

9F26

9F25

7FL5CY7C65631

USBHUB

1F24

2

1

4

5

3

1FL5

24M

SSB 3139 123 6519.x

*6000 SERIE MUX SII9187 NON INSTAPORT 7000 SERIE MUX SII9287 INSTAPORT

18

17

16

15

14

13

12

11

8

7

6

5

4

3

2

1

72

71

70

69

68

67

66

65

26

25

24

23

22

21

20

19

Page 64: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 64Q552.2E LA 9.Block Diagrams

2011-Feb-18 back to div. table

9-6 Block Diagram Control & Clock Signals

B04D HDMI

B01D SD-CARD B02A PNX85500

B06C AMBILIGHT CPLD

B04C ETHERNET + SERVICE

B01A COMMON INTERFACE

B09A CONNECTORS COMP

B01B FLASH

B03C DC / DC

B05A DDR

B01E PNX85500-CONTROL

B04C ETHERNET + SERVICE

B02E PNX85500: MIPS B01C USB HUB

B03C DC / DC

B02G PNX85500: STANDBY CONTROLLER

B07A DVBS-FE

B02G PNX85500: STANDBY CONTROLLER

CONTROL + CLOCK SIGNALS

B09A NON DVBS CONNECTOR BOARD

B10A DVBT2

RES

VIDEO STREAMB02A

B02E ETHERNET

CA-A(00-14)

1M95

11

10

9

LED1 AD26

AE26

AA22DETECT2

AA26

AF19

RESET-STBYn

4x HDMICONNECTOR

AB22RESET-SYSTEMn

AD21 ENABLE-3V3n

PN

X85

537

7S00PNX85537EB

SD-CARDCONNECTOR

AC25LED2

1S02

54M

AF17

AE17

CONTROLB02E

STANDBYB02G

HDMI_DVB02C

AD22AV1-BLK

AF20 STANDBY

AD19

AD23KEYBOARD

RC

LIGHT-SENSOR

AD18

AC19

RESET-USBn

AB19 RESET-AUDIO

AF1 SENSE+1V1

AE25AV1-STATUS

BACKLIGHT-PWM_BL-VS

BACKLIGHT-BOOST

B01C

AC21 POWER-OK

B02G

B01F

B02E

B01F

B03B

B06C

B01E

7S20 NCP303LSN28G

2INP

1OUTP

+3V3-STANDBY

GND

B02E

B02H POWER

7EC1 SII9187ACNU SII9187ACNU

HDMISWITCH

B04A

1P001

68

PCMCIA

CONDITIONALACCESS

P3_0

P3_1

P1_7

P6_4

P2_2

P2_7

P1_1

P2_6

P0_6

P2_3

VDD_1V1

XTAL_IN

XTAL_OUT

P5_1

P5_0

P3_2P3_3

P3_5

CADC_2

RESET_IN

P1_2

W24 RREF

RX

P1_0

PWM_1

PWM_0

7F027F03

7F047F05

7F01

TOPOWER SUPPLY

B04A

CO

MM

ON

INT

ER

FAC

E

+3V3-STANDBY

+5V

B04E

B03C

SDM

SPI-PROGAF22

AB20 FF04

FF29

19100_813_110216.eps110216

RXD-UP

TXD-UP

Y23

Y24UART

SERVICECONNECTOR

AE21

AF21

RXD1-MIPS

TXD1-MIPS

LED-2

LED-1

1

2

3

4

5

6

7

8

1M19

7U43

ARX-HOTPLUG

1E06

2

3

1

P2_0AC20LCD-PWR-ONnB03H

RESET-STBYn

AUDIO-MUTE-UPB03AP0_7

RESET-DVBS

AA15

N5

N4

SENSE+1V2B03DVDDA_1V2

AA18 RESET-DVBSB07AP0_1

AE18 RESET-ETHERNETnB04CP0_3

AF18 SEL-HDMI-ARCB02DP0_4

AE20 LAMP-ON

V23 BOOST-PWMGPIO_10 B03C

BACKLIGHT-BOOST

12

2

31BRX-HOTPLUG

CRX-HOTPLUG 41

DRX-HOTPLUG 45

35

PCEC-HDMI CEC-HDMI

1 2

19

18

1P05-19

1P02-191P03-19

1P04-19

TO PIN:1P02-131P03-131P04-131P05-13

FLASHB02A7F20H27U4G8F2DTR

NANDFLASH

12,37+3V3VCC

MDI

1P09

W21 SDIO-DAT3CC_DAT3

2 W6

SDIO-CLK

SDIO-CMDCMD

AA2ETH-TXCLKRXCLK

10 U6SDIO-CDnSDCD

AA3ETH-RXCLK

TXCLK

12 V6SDIO-WPSDWP

RXD

TXD

W15CLK

7 W5SDIO-DAT0DAT_0

8 W4SDIO-DAT1 DAT_19 W3SDIO-DAT2 DAT_2

DDR-CLK_N

DDR-CLK_P

3

SPI_CLK

SPI_CSBSPI_SDOSPI_SDI

P6_5

7F52M25P05-AVMN6P

FLASH

512K

8+3V3-STANDBYVCC

6PNX-SPI-CLKAF24

3PNX-SPI-WPnAE22

1PNX-SPI-CSBnAF235PNX-SPI-SDOAE23

2PNX-SPI-SDIAF25

CO

NT

RO

L

+3V3-STANDBY+12V

ENABLE-1V8

ENABLE-3V3-5V

DETECT2

XIO-D(00-07)

CA-MDI(0-7)

MDOCA-MDO(0-7)MDO(0-7)

ETH-TXD

ETH-RXD

XIO_A

XIO_D

XIO-A(0-15)

CA-D(0-7)

MEMORYB02B

F8 E8F8 E8F8 E8F8 E8

SDRAM128Mx8

7B01H5PS1G83EFR

SDRAM128Mx8

7B02H5PS1G83EFR

SDRAM128Mx8

7B03H5PS1G83EFR

DQ

A

CLK_NCLK_P

GPI0_2

V22GPI0_7

GPI0_3

SDRAM128Mx8

7B00H5PS1G83EFR

DDR2-D(0-31)

D(2

4-31

)

D(1

6-23

)

D(8

-15)

D(0

-7)

DDR2-A(0-13)

B06C

BL_PWMBACKLIGHT-PWMAD5 BACKLIGHT-PWM_BL-VS

RESET-SYSTEMnAE4 B01K B02GRESET_SYSGPI0_11

SELECT-SAWU23B01F

CLK_54_OUT AC5 PXCLK54

B02G

+3V33S0W

TO IR / LED BOARD ANDKEYBOARD CONTROL

9U41

9CH0

B03E

B03B B03D

B02G B03A

EF7EC0

7R01STV0903BAC

MULTI STANDARD

DEMODULATORFOR SAT DIG TV

7R02STV6110A

SATELLITETUNER

122XTAL32

12QP18

11QM197IP21

8IM20

52SENSE+1V0-DVBS

T21TS-DVBS-DATA73

T22TS-DVBS-CLOCK74

7

20

R22

R23

TS-DVBS-SOP75TS-DVBS-VALID78

62

TS-FE-DATA

TS-FE-CLOCK

TS-FE-SOP

TS-TS-VALID

9R03-4

9R04

9R03-2

9R03-1

B02GRESET-ETHERNETn19

B08A

XIO-D(00-15)

1M59

2

1

3

5

8

7

10

11

14

13

15

Pin

8P

in3

Pin

5P

in7

Pin

6P

in4

Pin

9

Pin

2P

in1

7GA0XC9572XL

CPLD

26VIO

VCCIO

41

43GPIO_1 Y22 7

40PNX-SPI-SDI

39PNX-SPI-SDO

3PNX-SPI-CS-BLn

PNX-SPI-CLK

3D-LR

AMBI-SPI-CLK-OUT

AMBI-SPI-SDO-OUT27

AMBI-SPI-SDI-OUT_G123AMBI-PWM-CLK_B229

AMBI-SPI-CS-OUTn_R230

AMBI-LATCH1_G231

AMBI-PROG_B119AMBI-BLANK_R120

AMBI-LATCH2_DIS28

AMBI-SPI-CS-EXTLAMPSn21AMBI-TEMP32

5PNX-SPI-CSBn

HDMIA-RC

43

21

USB-DM2

USB-DP2

USB-DM1USB-DP1

SIDE USBCONNECTOR

1P08

+5V-USB1

+5V-USB2

17

21

22

18

9

10

5

6

2

1

3

4

43

21

SIDE USBCONNECTOR

1P07

2

1

+5V

3

USB-DM3USB-DP3

13

14

4

9F26

9F25

7FL5CY7C65631

USBHUB

1F24

2

1

4

5

3

USB-DM

USB-DP

R26

R25USB_DP

USB_DN

TNR_SER1_MIVALTNR_SER1_SOP

TNR_SER1_MICLK

TNR_SER1_DATA

1F51

1

3

4

5

2LEVEL SHIFTED

FOR DEBUG USE

ONLY

7E10LAN8710A-EZK

ETHERNET

ETHERNETCONNECTOR

RJ45

TO AMBILIGHTMODULE

SDM

SPI-PROG

1FL5

24M

1E70

25M

4

5

K24CA-MOCLKMOCLKVS_2

20

L23CA-MOVALMOVALMOVAL

62L22CA-MOSTRTMOSTRT

MOSTRT63

7F00

1N00

7FJ0CXD2820R

DVBT2CHANNELDECODER

DVBT2-IFN

DVBT2-IFP

4

349

505

7

TS-FE-VALID

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

SSB 3139 123 6519.x

SSB 3139 123 6495.x

OPTIONAL9GA0

B03C

RESET-SYSTEMn

Page 65: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Block Diagrams EN 65Q552.2E LA 9.

2011-Feb-18 back to div. table

9-7 Block Diagram I2CI²C

PNX85500: MIPSB02E

DDRB05A

FLASHB01B

ETHERNET + SERVICEB04C

PNX85500: CONTROLB01E PNX85500-CONTROLB01E

PNX85500: STANDBYCONTROLER

B02G

HDMIB04D DVBT2B10A

HDMIB01H

TEMP SENSOR + HEADPHONE

B01J DVBS-FEB07A DVBS-SUPPLYB08BTUNER BRAZILB01K

TUNERB01F

PNX85500: ANALOG VIDEOB02I

ETHERNET + SERVICEB04CVGAB01I

VIDEO OUT - LVDSB06B

DVBS CONNECTOR BOARDB09A

1F52

7S00PNX85537EB

PNX85537

SDA-SSB

SCL-SSB

C25

C26

1_SDA

1_SCL

AC23

AC24

MC_SDA

MC_SCL

B25

A24

3_SDA

3_SCL

SDA-UP-MIPS

SCL-UP-MIPS

CONTROL

STANDBY

1

3DEBUGONLY

19100_814_110217.eps110217

RES 3F63

3F62

5 6

7F58M24C64

EEPROM(NVM)

3F60

3F59

TUN-P7

TUN-P6

SDA-TUNER

SCL-TUNER

7 6

1T01TH2627

MAINTUNER

3S60

3S61

3F75

3F76

53 54

7EC1SII9287BSII9187A

HDMIMUX

3EC

5

3EC

3

HDMICONNECTOR 3

HDMICONNECTOR 2

1P04

16

15

29

30

1P03

16

15

33

34

1P02

16

15

39

40

HDMICONNECTOR

SIDE

1P05

16

15

3FB

F-2

3FB

F-1

DIN-5V

43

44

47

48

Y25

Y26

Y23

Y24

GPIO_2

GPIO_3

DDCA-SDA

DDCA-SCL

ARX-DDC-SDA

ARX-DDC-SCL

BRX-DDC-SDA

BRX-DDC-SCL

CRX-DDC-SDA

CRX-DDC-SCL

DRX-DDC-SDA

DRX-DDC-SCL

1 2

7FD1LM75BDP

TEMPSENSOR

3FD

3

3FD

4

46 45

7FE0TC90517FG

DEMODULATOR

3FE

9

3FE

8

13 12

3S56

3S57

3S2F

3S2G

3S5Y

3S5Z

3S6D

3S6E

+3V3

3S69

3S6A

+3V3

3S6V

3S6W

+3V3-STANDBY

3S81

3S80

+3V3

3S83

3S84

+3V3

3S6F

3S6G

+3V3

AD25

AD24

1E05

12

15

VGA-SDA-EDID-HDMI

VGA-SCL-EDID-HDMI

VGA-SDA-EDID

VGA-SCL-EDID

3FC

1

3FC

2

+5V-VGA

9FC2

9FC4

9FC1

9FC3

RES

RES

3S5V-1

3S5V-3

3EC

1-1

3EC

1-3

AIN-5V

3EC

A-1

3EC

A-2

BIN-5V

3EC

A-3

3EC

A-4

CIN-5V

3EC

P-3

3EC

P-1

+5V-EDID

3EC

U-2

3EC

U-4

+3V3

B24

Y5

Y6

AB4

AC1

AA3

11

10

9

8

7

A23

4_SDA

4_SCL

AE21

AF21

P3_0

P3_1

1 610

11

5

15

VGACONNECTOR

RXD1-MIPS

TXD1-MIPS

W21

W22

GPIO_2

GPIO_3

RXD2-MIPS

TXD2-MIPS

UARTSERVICE

CONNECTOR

1E06

3

2

1

3E53-3

3E53-1

3E53-4

3E53-2

1F51

1

3

B02E

B02G

MEMORY

B02B

FLASH

B02A

ANALOGUEVIDEO

VGA_EDID_SDA

VGA_EDID_SCL

B02I

B02C]

ERR35

ERR15

ERR53

1M71

1

3TO

TEMPERATURESENSOR

4

5

SDA-BL

SCL-BL

LVDSCONNECTOR

Programmable via USB

1G51

50

49

SDA-DISP

SCL-DISP

RES

3C83

3C81

3S67

3S65

3S68

3S66

+3V3

B26

A25

2_SDA

2_SCL

SDA-SET

SCL-SET

3S58

3S5W

3S6B

3S6C

+3V3

3S1G

3S1H

+3V3-STANDBY

RES

7

8

9S13

9S10

3G2W

3G2Y

uPLEVEL SHIFTED

FOR DEBUGUSE ONLY

RXD-UP

TXD-UP

3F65

3F64

2 1

7S01PCA9540B

2 CHAN.MULTIPLEX.

ERR24

ERR34

ERR23

ERR42

6 9

7T50LNBH23QT

LNBCONTROLLER

3T61

3T51

ERR31

29 30

7FJ0CXD2820R

DVBTCHANNELDECODER

3FJJ

3FJH

98 97

7R01STV903BAC

CHANEL DECDVBS

3R00

3R01

ERR28

7R02STV6110A

SATELITETUNER

ERR36

9S12

9S11

7E10LAN8710A-EZK

ETH-RXD(0)

ETH-RXD(3)

ETH-RXCLK

ETH-RXD(1)

ETH-RXD(2)

AA1

AA4

AB1

AB2

AA2

22

23

24

25

20

ETH-TXD(0)

ETH-TXD(3)

ETH-TXCLK

ETH-TXD(1)

ETH-TXD(2)

RXD_0RXD_1

RXD_2RXD_3

RXCLK

TXD_0TXD_1

TXD_2TXD_3

TXCLK

XIO_D

DQ

A

ETHERNET

3R15

3R14

+3V3RF

18

19

SDAT

SCLT

DDC_A_SDA

DDC_A_SCL

HDMI_DV

HDMICONNECTOR 1

ETHERNETCONNECTOR

RJ45

RESRES

SDRAM128Mx8

7B01H5PS1G83EFR

SDRAM128Mx8

7B02H5PS1G83EFR

FLASH(4Gx16)

SDRAM128Mx8

7B03H5PS1G83EFR

SDRAM128Mx8

7B00H5PS1G83EFR

DDR2-D(0-31)

XIO-D(00-07)

D(2

4-31

)

D(1

6-23

)

D(8

-15)

D(0

-7)

DDR2-A(0-13)

191

182

191

182

191

182

191

182

SPI_CLK

SPI_CSBSPI_SDOSPI_SDI

P6_5

7F52M25P05-AVMN6P

FLASH

512K

8+3V3-STANDBY VCC

6 PNX-SPI-CLK AF24

3 PNX-SPI-WPn AE22

1 PNX-SPI-CSBn AF235 PNX-SPI-SDO AE23

2 PNX-SPI-SDI AF25

7F20H27U4G8F2DTR

ERR13

ERR18

ERR14

ERR64

STANDBYSW

MAINSW

MAIN NVMSW

EDIDSW

SW

RES

RES

OPTIONALOPTIONAL

Page 66: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 66Q552.2E LA 9.Block Diagrams

2011-Feb-18 back to div. table

9-8 Supply Lines Overview

B01A COMMON INTERFACE

B01D SD-CARD

B01F TUNER

B01K TUNER BRAZIL

B01C USB HUB

B02B PNX85500: SDRAM

B01B FLASH

B02A PNX85500: NANDFLASH CONDITIONAL ACCESS

B02C PNX85500: DIGITAL VIDEO IN

B02E PNX85500: MIPS

B02G PNX85500: STANDBY CONTROLLER

B02H PNX85500: POWER

B01H HDMI

B01I VGA

B01J TEMP SENSOR + HEADPHONE

B01E PNX85500: CONTROL

B03D DC / DC

B03E DC / DC

B08A DVBS-SUPPLY

B08B DVBS-SUPPLY

B09A CONNECTORS COMP

B10A DVBT2

B04A ANALOGUE EXTERNALS A

B04C ETHERNET + SERVICE

B03F TEMPSENSOR + AMBILIGHT

B06A DISPLAY INTERFACING-VDISP

B02D PNX85500: AUDIO

B03A AUDIO

B03B DC / DC

SUPPLY LINES OVERVIEW

PSU

B03C DC / DC

B03H VDISP - SWITCH

B04D HDMI

B04E HEADPHONE

B04B ANALOGUE EXTERNALS B

B06B VIDEO OUT - LVDS

B06D SPI-BUFFER

B06C AMBILIGHT CPLD

B07A DVBS-FE

B05A DDR

B01G TOSHIBA SUPPLY

B03G FAN - CONTROL

+5V+5V

+5VCA3F01

+T

B03e

+3V3+3V3B03e

B03e

B03e

+3V3-SD3F40

+T

+3V3+3V3

+5V-TUN-PIN

+5V-TUN+5V-TUN

B03e

+5V+5V

+5V-USB23F32

+T

B03e

+3V3+3V3B03e

+1V8+1V8

DDR2-VREF-CTRL2

DDR2-VREF-CTRL3

B03c

+3V3+3V3

+3V3+3V3

+5V+5V

B03e

+3V3+3V3B03e

B03e

B01g

B03e

B03b

+3V3+3V3B03e

B03b,d,e,g,B08b,B09a

B01e,B02e,g,h,B03a,b,h,B04d,e,B09a

B03h

B02d,B03a

+3V3+3V3B03e

+3V3-STANDBY+3V3-STANDBYB03c

+1V1+1V1B03b

+3V3-STANDBY+3V3-STANDBYB03c

+1V1+1V1B03b

B10a

+1V2+1V2B03d

+1V8+1V8B03b

+2V5+2V5B03d

+2V5-AUDIO+2V5-AUDIOB02d

+2V5-LVDS+2V5-LVDSB03d

+3V3+3V3B03e

+3V3-STANDBY+3V3-STANDBYB03c

DIN-5V

+3V3+3V3

+1V2-BRA-VDDC+1V2-BRA-VDDC

+1V2-BRA-DR1+1V2-BRA-DR1

+3V3+3V3B03e

+3V3-STANDBY+3V3-STANDBYB03c

+5V+5VB03e

B03d

B03e

9F71

+3V3-BRA

+3V3+3V3

5FE7

+3V3

+5V+5V

+2V5-LVDS

+2V5

B03e

+2V5-AUDIO

+3V3-ARC

+3V3+3V3

B03d+2V5+2V5

+2V5-BRA

+3V3-BRA-FLT

+5V+5V

7FE3

IN OUTCOM

5FE9

5FE4

3S20

3S06

+24V-AUDIO-POWER+24V-AUDIO-POWER

+24V-AUDIO-VDD3S0Z

3S11

B03c

B03c+3V3-STANDBY+3V3-STANDBY

+24V-AUDIO-POWER+24V-AUDIO-POWER

+AVCC3D09

7U03TPS53126PW

+12V

+1V812

14

+1V15U01

23

24

+12V

12V/1V1COVERSION

12V/1V8COVERSION

5U02

5U00

B03c

+3V3-STANDBY+3V3-STANDBYB03c

DualSynchronousStep-DownController

7U04

7U01

7U02-2

7U02-1

1

1M95

1 1

6 6

7 7

8 8

1M95+3V3-STANDBY

+12V_AL

3V3SB

+12V3

1M99

1 1

6 6

7 7

2 2

3 3

4 4

8 8

5 5

LAMP-ON

14 14

1M99

BACKLIGHT-BOOST

GND_AL

B03h

B03h

B08a,B09a

+12VIN

BACKLIGHT-PWM_BL-VS

+12V

9 9

+24V-AUDIO-POWER

13 13 +24V

10 10

+VSND

BL-DIM1BL-I-CTRL

POK

9 9

2 23 3

4 4

5 5

STANDBYSTANDBY

GND1

GND1

GND1

BL-ON-OFF

GND1

11 11

+24V

GND1

1U40

T 3.0A

+12VIN

+12VD

CUA0

+1V2

+1V8+1V8

+12V

7UA3B03b

+3V3-ET-ANA

+3V3+3V3

B03e

B03e

+2V5-REF

+12V+12VB03c

B03bB02hB03c

B03e

B03e

B03e

3U16

3UA0

7UC0

IN OUTCOM

3U15

7UA0VOLT.REG.

+5V-TUN

+5V5-TUN+5V5-TUN

7UA6

ENABLE-1V8

+3V3

+12V+12V

+1V1+1V1

+5V+5V

+3V3+3V3

B03e+3V3+3V3

5UD3 5UD2

+5V

+5V5-TUN

6UD0

7UD1

IN OUTCOM

+3V3+3V3

V-AMBI1UM0

T 1.0A

5UM1

+VDISP-INT+VDISP-INT

+VDISP1G03

T 3.0A

1C87

T 2.0A

5E08

+VDISP-INT

+12VD+12VD

+3V3+3V3

7UU2LCD-PWR-ONn

7UU0

B03c

B03e+3V3-STANDBY+3V3-STANDBY

B03c

1P0318HDMI 2

CONNECTORBIN-5V

1P0218HDMI 1

CONNECTOR

+5V-EDID

+3V3-STANDBY+3V3-STANDBY

+3V3+3V3

+3V3-HDMI

CIN-5V

1P0418HDMI 3

CONNECTORAIN-5V

5EC0B03e

B03c

B03e

+5V-VGA+5V-VGA

+5V +5V

B01I

B02b,h,B03d,B05a

B02h,g,B03e

DIN-5VDIN-5VB01h

B03e

B03c

B03h

B03b

6EC

1

+3V3-STANDBY+3V3-STANDBY

+3V3+3V3

B03e+5V+5V

B03e

B06a+VDISP+VDISP

+3V3+3V3

B08a

B08a+2V5-DVBS+2V5-DVBS

+1V-DVBS+1V-DVBS

B03e+3V3+3V3

B01f

B06a

B03d

VIO

+3V3+3V3B03e

5GA1

VINT5GA0

+3V3RF

+3V3-DVBS+3V3-DVBSB08a

5R01

+3V3-DEMOD5R00

B03c+24V

+5V-DVBS

+2V5-DVBS

+24V

31

12

B03e+3V3+3V3

+V-LNB

B03c+12V+12V

B08a+V-LNB+V-LNB

B08a+3V3-DVBS+3V3-DVBS

B03e

B03c

B03c

B03e

B03c+3V3-STANDBY+3V3-STANDBY

+5V+5V

+12V+12V

+24V

+3V3+3V3

5T03

5T04

7T03TPS54283PWP

DualN-SynchrConverter

+3V3-DVBS7T02

IN OUTCOM

+1V-DVBS7T00

IN OUTCOM

5T00 5T01

7T01

IN OUTCOM

5T02

1M20

8

61M19

8

5

1M5921

TOIR/LEDBOARD

TOAMBILIGHT

MODULE

+24V

B01,a,c,e,k,B03c,d,e,B04a,b,d,B09a

B08b

B07a,B08b

B07a

B07a

1P05

B02g,h,B03e,B10a

B02d,h

B02h

18HDMI SIDECONNECTOR B04d

+5V-VGA1E05

9VGACONNECTOR B04d

B01g

19100_803_110208.eps100917

B01EPOWER-OK12 12 B02G

3D-LR

B02G

B02GB06C

B02E

B01,a,b,c,d,e,g,j,k,B02a,c,d,e,h,B03c,f,g,h,B04a,c,d,e,B06b,c,d,B08a,B09a,B10a

+12V3

+12V3

+12V3

N.C.

+12V3

GND1

GND1

GND1

GND1

DDR2-VREF-DDR

+1V8+1V8

B03b

3B20

B03e +1V2-BRA-VDDC

+3V3+3V3

+1V2-BRA-DR1

B01k

B01k

7FA3

IN OUTCOM

5FA3

7S08

IN OUTCOM

+3V3-DVBT2-R

+2V5-DVB

+2V5-DVBT2-A

+2V5-DVBT2-X

+3V3+3V3B03e

5FK1

5FJ2

+3V3-DVBT2-D5FJ1

+1V2-DVBT2-C

+1V2-DVBT2-M

+1V2-DVBT2-P

+1V2+1V2B03d

B06a

+5V-TUN-PIN+5V-TUN-PINB01f

+1V2-FE

7FK1

IN OUTCOM

9FK6

5FJ7

5FJ5

5FJ6

5FJ3

5FJ4

SSB 3139 123 6519.x

5FA4

B03e

B03c+12V+12V

+3V3+3V3

5UD0 5UD17UD0

IN OUTCOM

Page 67: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 67Q552.2E LA 10.

2011-Feb-18 back to div. table

10. Circuit Diagrams and PWB Layouts

10-1 B01 393912364954Common Interface

19100_001_110114.eps110114

Common InterfaceB01A B01A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

G3

12

3EN23EN1

G3

12

3EN23EN1

+T

G3

12

3EN23EN1

G3

12

3EN23EN1

G3

12

3EN23EN1

G3

12

3EN23EN1

CONTROL

15-BIT ADDRESS

8-BIT DATA

TRANSPORT STREAM FROM CAM

1 8

IF03

3F04-1 100RIF05

IF08

IF04

3F07-33 6

4 5

10K

3F07-4

10K

4 5

2 7

10K

3F09-4

+5V +5VCA

100R

3F03-2

+3V3

1 8

5

3F09-1

10K

10K

3F08-44

1514131211

1

10

19

20

3456789

18

1716

74LVC245A7F03

2

+5VCA

1X07REF EMC HOLE1

10

19

20

789

18

17161514131211

74LVC245A7F05

2

3456

RES2F03

100n

3F01

0R3

+3V3

3F10-4

10K4 5

3F06

IF07

100K

IF02

3F05-4 4 5

2 7

100R100R3F05-3 3 6

3F05-2 100R

3F11-4

10K4 5

10

19

20

9

18

17161514131211

1

2

345678

2 7

7F0074LVC245A

3F11-2

10K

100R3F04-4 4 53F04-3 100R3 6

100R2 7

2 7

3F04-2

10K

3F07-2

100n

2F04

IF01

19

20

RES

18

17161514131211

110

7F0274LVC245A

2

3456789

100n

2F06RES

3 6

+3V3

2F05

100n

10K

3F11-3

7172

RES

6465666768

789

6970

5556575859

6

60616263

4546474849

5

5051525354

3536373839

4

4041424344

26272829

3

3031323334

1819

2

202122232425

1

1011121314151617

19

201P00

92789-055LF

9

18

17161514131211

1

10

2

345678

74LVC245A7F04

10K3 6

10K

3F09-22 7

3F09-3

+3V3

RE

S

IF06

u22V61

2F01

3F02

100R

2 73F10-2

10K

+3V3

10K

3F08-33 6

3F08-2

10K2 7

+3V3

REF EMC HOLE1X08

19

20

EMC HOLE1X04

17161514131211

1

10

2

3456789

18

1 8

74LVC245A7F01

3F05-1 100R

3F12

10K

10K

3F10-11 8

+3V3

+5VCA

+5VCA

1 83F03-1

100R

18 3F11-1

10K

+3V3

2F00

100n

RES

RES

100n

2F02

REF EMC HOLE1X01

810K

1 3F08-1

+3V3

1 8

3 6

10K

3F07-1

10K

3F10-3

CA-WAITn

CA-VS1n

CA-REGn

CA-CD2n

CA-MDI6

CA-MDI4

CA-MICLK

CA-WP

CA-RDY

CA-DATADIR

CA-DATAENn

CA-MDO1

CA-MOCLK

CA-D04CA-D05CA-D06CA-D07

CA-MOVALCA-MOSTRT

CA-MDO0

CA-MDO2CA-MDO3CA-MDO4

CA-MDO6CA-MDO5

CA-MDO7

CA-RST

CA-CD1n

CA-DATAENn

CA-DATADIR

CA-ADDENn

MOCLK

MOVAL

MOSTRT

MDO0

MDO1

MDO2

MDO3

MDO4

MDO5

MDO6

MDO7

CA-WAITn

CA-INPACKn

CA-A04CA-A05CA-A06CA-A07

XIO-A00

XIO-A01XIO-A02XIO-A03XIO-A04XIO-A05XIO-A06XIO-A07

CA-ADDENn

CA-A08

CA-A09CA-A10CA-A11CA-A12CA-A13CA-A14

XIO-A08

XIO-A09XIO-A10XIO-A11XIO-A12XIO-A13XIO-A14

CA-ADDENn

CA-D00

CA-D01CA-D02CA-D03

MDO5MDO6MDO7

XIO-D00

XIO-D01XIO-D02XIO-D03XIO-D04XIO-D05XIO-D06XIO-D07

CA-REGn

CA-CE1nCA-CE2nCA-OEnCA-WEn

CA-IORDnCA-IOWRn

XIO-D10

XIO-D11

XIO-D09XIO-D08XIO-OEnXIO-WEnXIO-D14XIO-D15CA-WAITn

CA-ADDENn

CA-A00

CA-A01CA-A02CA-A03

CA-MDI2CA-MDI3

CA-MDI5

CA-MDI7

MOSTRTMOVAL

CA-CD1n

CA-CD2n

CA-CE2n

MDO2

MDO3MDO4MDO5MDO6MDO7

MDO0MDO1

CA-INPACKn

CA-IORDnCA-IOWRn

CA-RST

CA-VS1n

MOCLK

MOCLK

MOVALMOSTRT

MDO0

MDO1MDO2MDO3MDO4

CA-A00CA-A01

CA-A10

CA-A11

CA-A12

CA-A13CA-A14

CA-MIVAL

CA-A02CA-A03CA-A04CA-A05CA-A06CA-A07

CA-A08CA-A09

CA-CE1n

CA-D00CA-D01CA-D02

CA-D03CA-D04CA-D05CA-D06CA-D07

CA-OEn

CA-RDYCA-WEn

CA-WP

CA-MISTRTCA-MDI0CA-MDI1

Page 68: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 68Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Flash

19100_002_110114.eps110211

FlashB01B B01B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

WE

BRWP

VCC

VSS

IO

NC

01234567

CLEALECERE

303132

4241

43

H27U4G8F2DTR-BC

NAND-CE1n

NAND-RDY1n

NAND-WPn18

3613

3712

4G × 16[FLASH]Φ

7F20

141110

65

19353433

2

4

48

3

474645

7

8

282726252423

403938

XIO-D02

XIO-D05XIO-D04

XIO-D07XIO-D06

XIO-WEnXIO-OEn

NAND-CLENAND-ALE

XIO-D01XIO-D00

XIO-D03

29

16

917

2221

10K3F23

2015

1

44

+3V3

+3V3

+3V

33F19 10

K

100R3F22-4 4 51 8

3 6

3F22-1 100R

2 7100R3F22-3

5

3F22-2 100R

3F21-4 100R4

100R3F21-2 2 7

100R4 5

3F21-3 3 6

3F20-41 8

100R

3 6

3F21-1 100R

100R3F20-3100R3F20-2 2 7

3F20-1 100R1 8

IF22

IF21

IF23

+3V3

100n

2F20

2F21

100n

3F24

2K2

Page 69: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 69Q552.2E LA 10.

2011-Feb-18 back to div. table

USB Hub

19100_003_110114.eps110211

USB HubB01C B01C

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VDD_3V3CR PLLFILT

OSC1

OSC3

OSC2

VIAGND_HS

USBUP

NC

VBUS_DET

RESET

DM

XTALOUT

DP

RBIAS

TEST

+T

SIDE USB

+5V-USB2

9F25

4

RES

3F34-4

100K

SER 92F9

9F30

+3V3

2F26

100n

3F30

12K

1M0

+3V3

3F28

IF32

+3V3

9F26

2 7

IF44

10K

3F31-2

IF33

3F32 0R

3

+5V-USB2

3F35 10K

2F30

100n

100n

2F29

IF30

3F36

10K

10p

2F34

24

1 31F25

24M

IF39

100n

2F25

41

XTALIN|CLKIN33

32

IF37

27

5 10 29152336

38 39 40

USBDM_DN1|PRT_DIS_M11

USBDM_DN2|PRT_DIS_M23

USBDM_DN3|PRT_DIS_M36

30

USBDP_DN1|PRT_DIS_P12

USBDP_DN2|PRT_DIS_P24

USBDP_DN3|PRT_DIS_P37

31

17

19

34

35

26

SCL|SMBCLK|CFG_SEL024

SDA|SMBDATA|NON_REM122

SUSP_IND|LOCAL_PWR|NON_REM028

11

16

BC_EN3|PWRTPWR318

14

37

HS_IND|CFG_SEL125

89

2021

13

7F25USB2513B-AEZG

USB HUBΦ

BC_EN1|PWRTPWR112

BC_EN2|PWRTPWR2+5V

100n

2F33

2F32

100n

FF37FF36

5

6 7

IF45

1F24

502382-0570

1234

IF31

RES

IF35

+3V3

IF41

1u0

2F28

+5V

IF43

IF40

FF32

FF33

3 6

7

100K

3F34-3

3F34-2

100K

2

4 5

FF31

6

10K

3F31-4

3F31-3

10K

3

FF38

FF30

FF39

5 6

5401

1P08

1234

1 8

100K

3F34-1

100n

2F31

IF36

10K

3F37

+3V3

IF42

2F27

1u0

IF34

2F35

10p

USB-DP3USB-DM3

USB-DP

USB-DP3

USB-DM3

USB-DM USB-DM2

USB-DP2

USB-DP2USB-DM2

USB-OC2n

USB-OC3n

USB-OC2n

USB-OC3n

RESET-USBn

USB-DM2

USB-DM3

USB-DP2

USB-DP3USB-DMUSB-DP

Page 70: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 70Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

SD Card

19100_004_110114.eps110211

SD-CardB01D B01D

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

+T

22u2F

40

+3V3

FF44

16V

FF43

FF491 8

FF47

3F44-1

100R

1 8

0R3

3F40

100R

3F43-1

6789

13 1415 16

1P09-1

SCDA7A0200

12345

FF46

3 6

1 8

47K

3F42-3

2 7

3F42-1

47K

3F41-2

47K

3F45

10K

5

RES

47K

3F41-44

FF50

+3V3-SD

FF42

100R

3F44-22 7

FF412 7

FF48

101112

3F43-2

100R

1P09-2

SCDA7A0200

7

+3V3

FF45

3F42-2

47K

2

47K

1 8

47K

3F41-33 6

3F41-1

3 6

100R

3F44-3

3 6

100R

3F43-3

+3V3-SD

IF47

SDIO-CMD

SDIO-DAT0

SDIO-DAT1

SDIO-DAT2

SDIO-CDn

SDIO-WP

SDIO-CLK

SDIO-DAT3

SDIO-CMD

SDIO-CLK

SDIO-DAT0

SDIO-DAT1

SDIO-DAT2

SDIO-CDn

SDIO-WP

SDIO-DAT3

Page 71: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 71Q552.2E LA 10.

2011-Feb-18 back to div. table

PNX85500 Control

19100_005_110114.eps110211

PNX85500 ControlB01E B01E

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

SCLADR

012 SDA

WC

D

C

S

W

HOLD

VSS

Q

VCC

DEBUG ONLY

UP

DEBUG / RS232 INTERFACE LEVEL

FOR

SDA

SCL

USE ONLY

SHIFTED

DEBUG

MAIN NVM

FF64

7

RES

12345

6

1F51

47K

3F68

IF58

RE

S

7

2

1

84

3

7F52M25P05-AVMN6

FLASH512KΦ

6

5

5

3

4

+3V3

RES7F54-2BC847BPN(COL)

10K

3F66

100R

3F65

RE

S

+3V3-STANDBY

IF59

+3V3-STANDBY

RESPDTA114EU7F53

IF62

FF29

FF04

IF51

3F54

1K0

IF53

RE

S

IF52

FF65

5

84

7

RE

S1u

02F53

(8K × 8)

123

6

FF62

Φ

EEPROM

7F58

FF61

+3V3-STANDBY

+3V3-STANDBY

RE

S10

0n

2F52

+3V3

IF56

9CH0

FF56

FF55

10K

3F69

FF66

RE

S

2

6

1

3F64

RES7F54-1BC847BPN(COL)

100R

3F62 100R

3F53

34 5

10K

RES

12

3F58 10K

1F52

3F59

3F60

100R

100R

3F67

FF57

10K

IF54

100R3F63

10K

3F52

+3V3

FF63

+3V3

IF55

FF58

IF57

2F49

100p

IF61

2F58

100n

IF50

RES

+5VPNX-SPI-SDO

PNX-SPI-CLK

RXD-UP

TXD-UP

SDA-SSB

SCL-SSB

SCL-UP-MIPS

SDA-UP-MIPS

PNX-SPI-WPn

PNX-SPI-CSBn

PNX-SPI-SDI

BOOST-PWM

SPI-PROG

RESET-STBYn

SDM

SPI-PROG

BACKLIGHT-BOOST

Page 72: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 72Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Tuner

19100_006_110114.eps110211

TunerB01F B01F

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

IO2ISWIO1

GND

AGC CONTROL

*

*

*

*

*

*

*

*

*

*

*

For BR NIM Tuner Only

For EU Hybrid Tuner Only

*

*

**

*

*

3

12

54

X7251M

1F75

36M17

2F85

47n

2F61

3F76

47R

RES

10n

2F91

IF78

IF76

IF13

+5V-TUN

FF75

RE

S

9F04

820R

3F82

15p

2F84

3F71

4K7

220R

3F79-11

AF73

IF77

IF12

9F06

IF72

RE

S2F

9A6p

8

IF90IF89

AF70 3F77

4K7

RE

S2F

70

1p0

10n

2F64

2F71

10n

+5V-TUN-PIN

AF72

2F82

2F90

10n

3F72

1K0

9F71

IF88

NC

12

RF

_AG

C3

RF

_IO

1

TU

N4

2F62

5

I2C

_SC

L6 7

I2C

_SD

A

10IF

_OU

T1

11IF

_OU

T2

13

1415

16

94M

HZ

_RE

F

B+

_LN

A2 8

B+

_TU

N

I2C

_AD

R

IF75

TUNER

1T01

2F60

100n

10n

2F94

RE

S

9F03

+5V-TUN-PIN

9F05

22u

2F88

9F00

9F01

9F02

2F73

4n7

SE

R18

F2

47R

3F75

4

IF74

3F79-4

220R

10n

2F63

IF11

FF82FF81

3F81

220R

2F74

10n

10n

2F78

RE

S

IF81

2F96

100p

100n

2F93

FF76

5F71

6p8

2F99

RE

S

FF74

2F86

15p

IF15

3 INPUT2

7OUTPUT1

6OUTPUT2

4 VAGC

1V

CC

8G

ND

1

5G

ND

2

2 INPUT1IF73

7F75UPC3221GV-E1

5F74

+5V

-TU

N-P

IN

2F79

10n

7F70PDTC114EU

3F78

5F70 3K

3

470n

3F80

220R

IF10

6p8

2F9B

RE

S

6p8

2F9D

RE

S

2F92

10n

10n

2F75

5F66

680n

IF16

FF00

IF14

2F72

4n7

2F59

RE

S 15p

+5V-TUN-PIN

2F77

2F66

RE

S2F

976p

8

AF71

RES5F72

30R

RE

S

FF71

2F9C

6p8

100p

SE

R59

F2

23

14

5F73

ATB2012

IF80

2F98

6p8

RE

S

2p2

2F76

RE

S

IF87

IF86

IF82

6F72

BA

591

RE

S

IF79

RE

S

330n

5F76

FF01

15p

2F65

2F80

SELECT-SAW

TUN-IF-N

TUN-IF-P

TUN-P6

TUN-P1

TUN-P7

PNX-IF-P

PNX-IF-N

IF-AGC

IF+

IF-

PNX-IF-AGCTUN-IF-PTUN-IF-N

IF-AGC

SCL-TUNER

TUN-P6

SDA-TUNER

TUN-P7

Page 73: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 73Q552.2E LA 10.

2011-Feb-18 back to div. table

Toshiba Supply

19100_007_110114.eps110211

Toshiba supplyB01G B01G

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

COM

NI TUO

+1V2-BRA-VDDC

+1V2-BRA-DR1+3V3

30R

5FA

4

30R

5FA

3

100n

2FA

3

2FA

4

10u

FFAF

FFA2

1

3 2

7FA3LD1117DT12

2FA

2

100n

Page 74: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 74Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

HDMI

19100_008_110114.eps110211

HDMIB01H B01H

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

HDMI CONNECTOR SIDE

FFB4

FFB6

FFB3

FFB2FFB1

3456789

20212223

1213141516171819

21

1011

1P05

2 7

47K

3FBF-2

DIN-5V

DIN-5V

47K

18

3FB

F-1

FFB5

DIN-5V

DRX1-DRX0+

DRX0-

DRX-DDC-SCLDRX-DDC-SDA

DRX2+

DRXC+

DRXC-PCEC-HDMI

DRX-DDC-SCLDRX-DDC-SDA

DRX-HOTPLUG

DRX2-DRX1+

Page 75: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 75Q552.2E LA 10.

2011-Feb-18 back to div. table

VGA

19100_009_110114.eps110211

VGAB01I B01I

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

CONNECTORVGA

FFC5

9FC6FFC7

3FC7

18R

18R

3FC6

FFC3

1FC

2

RE

S

12V

CD

S4C

12G

TA

6FC

8

1FC

6

3456789

1617

1216-02D-15L-2EC

1

101112131415

2

1E05

RES9FC4

9FC1

RES

9FC2

FFC4

FFC8

FFC1

12V

RE

S

CD

S4C

12G

TA

6FC

6

RES

10K

3FC1

3FC2

10K

RES

RE

S

12V

CD

S4C

12G

TA

6FC

2

3FC

4

4K7

4K7

3FC

3

100p

2FC

3

100p

RE

SR

ES

2FC

1R

ES

2FC

2

100p

6FC

3R

ES

12V6F

C5

CD

S4C

12G

TA

RE

S

12V

CD

S4C

12G

TA

12V

CD

S4C

12G

TA

6FC

4R

ES

RE

S

12V

CD

S4C

12G

TA

6FC

1

9FC5

47p

2FC

4

1FC

4

3FC5

18R

2FC

5

47p

1FC

51F

C3

2FC

8

47p

FFC2

1FC

1

9FC3

47p

2FC

7

47p

2FC

6

FFC9

6FC

7

CD

S4C

12G

TA

12V

FFC6

RE

S

VGA-SCL-EDID

VGA-SDA-EDID

R-VGA

H-SYNC-VGA

V-SYNC-VGA

G-VGA

B-VGA

+5V-VGA

VGA-SDA-EDID-HDMI

VGA-SCL-EDID-HDMI

Page 76: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 76Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Temp sensor & headphone

19100_010_110114.eps110211

Temp sensor & headphoneB01J B01J

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

2FD

D

22n

3FD3

100R

RE

S

IFD4

1K0

3FD

16F

D1

IFD2

IFD5

LTS

T-C

190K

GK

T

RE

S

IFD1

3

IFD3

1328MSJ-035-12D-B-AG-PBT-BRF

2

110

0n

2FD

1

RE

S

9FD

53F

D2

1K0

6A1

A25

4G

ND

OS3

SCL2

SDA1

7FD1LM75BDP

+V

S8

A07

+3V3

18

1K0

3FD

G-1

FFDB

3FD

G-2

27

FFDA1K

0

RE

S9F

D2

9FD

1R

ES

1K0

3FD

7

1K0

3FD

6

3FD4

100R

1329

123

4 5

FFDC

502382-0370

RES

12V

RE

S

1FD

2

6FD

2

CD

S4C

12G

TA

RE

S

12V

CD

S4C

12G

TA

6FD

3

1FD

3

AMP1

22n

2FD

C

SDA-SSB

SCL-SSB

AMP2

Page 77: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 77Q552.2E LA 10.

2011-Feb-18 back to div. table

Tuner Brazil

19100_011_110208.eps110211

Tuner BrazilB01K B01K

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

X

XSEL

ADI_AI

ADQ_AI

AD_VREF

TSMD

TN

SLADRS

VSS

DR

2VD

D

DR

1VD

DVDDS

AD

_DV

DD

AD

_AV

DD

PLL

VD

D VDDC

PBVAL

RERR

RLOCK

RSEORF

SBYTE

SLOCK

SRCK

SRDT

STSFLG1

AGCCNTI

AGCCNTR

STSFLG0

SYRSTN

01

SCLSDA

FIL

AD

_AV

SS

AD

_DV

SS

PLL

VS

S

I

O

01

PN

PN

PN

AD_VREF

DTCLK

DTMB

S_INFO

01

AGCI

CKI

SCLSDA

NI TUO

INH BP

COM

* To be drawn near PNX85500

*

*

*

*

AGND

2FE

0

1u0

19

18

32

5FE0

30R

64

4 15 33 37 44 47 50 57 62

14

141

16 36 56 63 13 35 49

46

65

52

61

60

51

38

42

8

12

40

21

58

20

17

53

54

55

59

45

2524

9

10

7

11

34 48 43

39

2930

2728

2223

32

31

26

7FE0TC90517FG

Φ

DFE7

DFE8

DFE6

33R3FG6-3 3 6

AGNDAGND2FH5

1n5

18p

2FG

3

AGND

2 4

1 3

2FG

2

18p

25M4

1FE0

33R3FG7

DFE9

DFF2

DFF1

2 7

9F28

9F27-2

4 4-72F9 5

100n2FH62FG9 100n

2FG8 100n

2FG6 10n10n2FG4

AGND

100n2FG7

3FE7

AGND

10K

AGND

3FE6 10K

AGND

AGND2FH7 100n

IF29

IF49

BFE3

BFE2

IF17IF18

1u0

2FF

910

0n

2FF

8

100n

2FF

2

2FF

3

100n

100n

2FF

4

2FF

6

1u0

2FF

5

100n

30R

5FE4

IF69

IF68AGND

IF66

1u0

2FE

6

30R

5FE3

1 1-72F9 8

2FG

1

1u0

2FG

0

100n

5FE8

30R

2FF

7

100n

AGND

5FG2

30R

100R3FE93FE8 100R

IF64

IF65

IF63

IF67

IF27 IF28

FF03

IF48

3FG2-210K

10K3FG2-1

3FG4-14K7

4K7

3FG4-2

5FG0

30R

30R

5FE7

5FE9

30R

10n

2FH

3

1u0

2FH

2

2FH

4

1u0

4

2

1

3

5

5

7FE3LD3985M25

33R3FG6-4 4

10n

2FH

8

AGND

2 7

3FE5

18K

33R3FG6-2

100n

2FE

4

2FE

3

100n

2FF

1

2FE

5

100n

1u0

100n

2FF

0

2FE

8

1u0

TS-FE-VALIDTS-BR-VALID

TS-FE-SOPTS-BR-SOP

TS-FE-CLOCKTS-BR-CLOCK

TS-FE-DATATS-BR-DATA

5FE5

30R+3V3-BRA

+3V3-BRA-FLT

IF-

SCL-SSBSDA-SSB

IF-AGC

+2V5-BRA+5V

+3V3

+1V2-BRA-DR1

+3V3-BRA-FLT

RESET-SYSTEMn

+1V2-BRA-VDDC

+3V

3-B

RA

-FLT

+3V3-BRA-FLT

+2V5-BRA

+3V3-BRA

+2V5-BRA

IF+

Page 78: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 78Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

10-2 B02 393912364954NANDflash - conditional access

19100_012_110209.eps110209

PNX85500: NANDflash - conditional accessB02A B02A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

NAND

XIO_A

XIO_D

XIO

NAND

070809101112131415

OE_WE_

CLK_BURST

WP_RDY1RDY2CE2_CE1_

00010203040506

CLE

00010203040506070809101112131415

ALE

MDI

MCLK

MDO

TNR_SER1

VS

CD

CA

DATAERR

MICLKMIVAL

SOP

01234567

12

12

VPPEN

01234567

ADD_EN

DATA_DIR

DATA_EN

I

O

MISTRT

MIVAL

MOSTRT

MOVAL

OOB_EN

RDY

RST

VCCEN

TS-FE-ERR

5

4

7S02

74LVC1G08GW

1

2

3

33R

3S01-2 2 7

IS26

10K

3S15

+3V3

3S1R

560R

560R

3S1S

+3V3

3S1X

10K

3S1W

10K

+3V3

3S24470R

470R3S23

33R6 33-10S3

3S02-33 6

1 8

33R 5

33R3S01-1

3S01-4

33R4

3S02-2

33R27

3S02-1

33R1 8

+3V3

10R

3S03

+3V3

RE

S10

K

3S1V

RES

3S1T

560R

560R

3S1U

RES

IS00

RES

3S29

470R

RES 470R

3S28

IS253S

04

33R

9S01RES

2S09

100n

33R45

9S08

3S02-4

J24

K23K24

T21T23T22R23R22

M26L21

N24

N25

L22

L23

J21

L24

L26

J23

P24P25P26N21N22

N26M21M22M23M24M25

J22

K21K22

K25

K26

N23

L25

P21P22P23

B22C22

7S00-11PNX85500

VIDEO_STREAM

A22E22F24F25F26E23E24E25E26D24

G24G25G26F22F23

D25D26C24D23C23B23

J25J26H21H22H23H24H25H26G21G22G23

B21

D22

E21D21

C21

F21A20

A21

7S00-5PNX85500

FLASH

9S00

3S31

33R

XIO-D10

TS-FE-DATA

TS-FE-CLOCK

TS-FE-VALID

TS-FE-SOP

TS-FE-DATA

TS-FE-CLOCK

TS-FE-VALID

TS-FE-SOP

INPACK INPACK

XIO-A12

XIO-A14XIO-A13

XIO-A15

XIO-D00XIO-D01XIO-D02XIO-D03XIO-D04XIO-D05XIO-D06XIO-D07XIO-D08XIO-D09

XIO-D11

XIO-D14XIO-D15

XIO-OEnXIO-WEn

CA-DATADIR

CA-DATAENn

CA-ADDENn

CA-RDY

CA-RST

NAND-ALENAND-CLE

NAND-CE1n

NAND-RDY1nNAND-WPn

CA-MDO2CA-MDO3CA-MDO4CA-MDO5CA-MDO6CA-MDO7

CA-MOVAL

CA-MOSTRT

CA-CD1nCA-CD2n

CA-VS1nCA-MOCLK

CA-MOCLK

XIO-A00XIO-A01XIO-A02XIO-A03XIO-A04XIO-A05XIO-A06XIO-A07XIO-A08XIO-A09XIO-A10XIO-A11

TS-FE-DATA

TS-FE-CLOCK

TS-FE-SOPTS-FE-VALID

CA-MDI0CA-MDI1CA-MDI2CA-MDI3CA-MDI4CA-MDI5CA-MDI6CA-MDI7

CA-MIVAL

CA-MISTRT

CA-MICLK

CA-MDO0CA-MDO1

Page 79: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 79Q552.2E LA 10.

2011-Feb-18 back to div. table

SDRAM

19100_013_110209.eps110211

PNX85500: SDRAMB02B B02B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

1

3

01234567891011121314151617181920212223242526272829

0

1

RASB

CASBCKECSBODT

PCAL

0123456789

1011121314

NP

NP

3031

012

2DM

DQ

BA

A

CLK

DQS0

NP

DQS1

NP

DQS2

NP

DQS3

VREF

M0

WEB

2

100p

2S24

100p

2S25

FS01

A2V1

H3

E3

D3D4

R1R2

T3T4

M4M1M5

V3

C3

R4V5

B4F1C1E1F4B2

E2

P3

F2

N1U1P1T1V4R5U5P5N3

C2

E5C5A4G5B3F5U3P2U2

G1

K3K4

N5N4

L5

D1D5R3T5

F3

K5

K1G4L3G3L2H5L1J5

H1H2

MEMORYPNX85500

7S00-8

J1J3

J2M3J4

M2

IS42

10K

3S6Q

DDR2-VREF-CTRL3

DDR2-VREF-CTRL3

3S07

R081%1

%1R081

3S06

DDR2-VREF-CTRL2

2S17

100n

100u2S

12 2.0V 10R

10R3S33

3S30

261R

3S0V

1%

3S6P

10K

FS02

RES

R081%1

3S22

3S20

180R

1%

100n

+1V8

DDR2-VREF-CTRL2

2S20

DDR2-ODTDDR2-RASDDR2-WE

DDR2-A13DDR2-A14

DDR2-CKE

DDR2-DQS2_NDDR2-DQS2_P

DDR2-DQS3_NDDR2-DQS3_P

DDR2-BA2

DDR2-ODT

DDR2-DQM1DDR2-DQM2DDR2-DQM3

DDR2-DQS0_NDDR2-DQS0_P

DDR2-DQS1_NDDR2-DQS1_P

DDR2-D27DDR2-D29

DDR2-D4DDR2-D5DDR2-D6

DDR2-D7DDR2-D8DDR2-D9

DDR2-DQM0

DDR2-D21DDR2-D24DDR2-D30DDR2-D26DDR2-D25DDR2-D28DDR2-D31

DDR2-D3

DDR2-D16DDR2-D17DDR2-D19DDR2-D18

DDR2-D2

DDR2-D22DDR2-D23DDR2-D20

DDR2-D0DDR2-D1

DDR2-D10DDR2-D11DDR2-D12DDR2-D13DDR2-D14DDR2-D15

DDR2-A7DDR2-A8DDR2-A9

DDR2-BA0DDR2-BA1

DDR2-CASDDR2-CKE

DDR2-CLK_NDDR2-CLK_P

DDR2-CS

DDR2-A0DDR2-A1

DDR2-A10DDR2-A11DDR2-A12

DDR2-A2DDR2-A3DDR2-A4DDR2-A5DDR2-A6

Page 80: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 80Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Digital video in

19100_014_110209.eps110211

PNX85500: Digital video inB02C B02C

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

RX0_A

RX1_A

PN

RX2_A

RXC_APN

DDC_A

PN

PN

HOT_PLUG_A

SDASCL

RREF

IS10

IS01

2S2E

10u

RE

S

12K

3S0W+3V3

T25

U26U25

V26V25

W26W25

HDMI_DVPNX85500

7S00-6

Y26Y25

T24

W24

T26

HDMIA-RX1-

HDMIA-RX2+HDMIA-RX2-

HDMIA-RXC-HDMIA-RXC+

DDCA-SCLDDCA-SDA

HDMIA-RX0+HDMIA-RX0-

HDMIA-RX1+

Page 81: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 81Q552.2E LA 10.

2011-Feb-18 back to div. table

Audio

19100_015_110209.eps110211

PNX85500: AudioB02D B02D

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

AIN1

LR

AIN2

LR

AIN3

LR

AIN4

LR

AIN5

VR_AADC

ADAC

ADACL

PN

ADACR

I2S_OUT

I2S_OUT_SD

SPDIF_OUT

POSNEG

VREF_AADC

VCOM_AADC

SPDIF_IN1

4321

2

NP

1

3456

WSSCK

OSCLK

LR

OUT IN

PB HNI

COM

&

&&

&

AD2

AE5

AF5

AC8

AD8

AB8AB9

AF9

AD9AC9

AF8AE8 AD4

AD1

AE1AF2AE3AF3

AE6AF6

AB7AC7

AB6AC6

AE10AF10

AD10AC10

AE9

PNX855007S00-2

AUDIO

AD7AE7AF7AD6

IS1L

IS0R

1 8

36

3S13-1

22K

10K3S17-3

1u0

2S33

FS03

IS06

IS02

3S53-3

100R

100R

3S53-2

+2V5-AUDIO

100R

3S53-1

IS1M

9S06

RE

S

3S51

4R7

IS44

3S6M

180R

3S19

10K

68R

3S25

100R3S10

1u0

IS1A

2S2L

IS19

2S3H

10u

1 83S16-1

10K

1u0

2S2Y

2S36

1u0

2S3B

1n0

2S3A

1n0

100n

2S2T

IS1J

1 8

IS1H

10K

3S17-1

1u0

RE

S

4S14

2S34

3S39

100R

100R

3S38

IS1E

IS1G

IS1D

+3V3-ARC

+3V3-ARC

+3V3-ARC

IS1S

+3V3-ARC

2S30

1u0

27

27

22K

3S13-2

10K3S16-2

2S2Z

1u0

100n

2S3K

47p

2S2J

2S2K

47p

4 5

10K

3S36-4

3S53-4

100R

IS1Q

IS1P

22K

3S32

22K

3S6L

2S41

100u

4V

5

67

4

11

1

4

11

LM3247S05-2

LM3247S05-13

2

10

98

4

11

12

1314

4

11

LM3247S05-3

LM3247S05-4

1u0

2S42

3S16-44 5

10K

2S2V

1u0

IS13

3S3U

33R

3S3H

33R

3S3G-4

33R

4 533R

2 7

RE

S

+3V3

3S3G-2

5

2S2S

10u

7S08

4

2

1

3

FS08

LD3985M25

2S2R

10u

DBS8

+2V5

4R7

3S0Z

+24V-AUDIO-VDD

27

IS07

36

3S18

-2

220R

220R

3S18

-3

3S18-1

220R

1 8

3 6

+3V3

+3V3

3S36-3

10K

47p

2S2H

1 82 7

3S36-1

10K

10K

3S36-2

2S2G

47p

3S11

+3V3

1R0

100n

2S3Q

+3V3 100n

2S3M

2S3G

100n

22K

3S12-227

3S16-3

10K

3 6

1u0

2S2W183S12-1

22K

1n0

2S3D

1n0

2S3C

3S17-44 5

2S32

10K4 5

1u0

22K

3S13-4

3S17-210K

27

1u0

3 6

2S31

3 63S13-3

22K

8

3S3G-3

33R

3S3G-1

33R

1

IS12

1n0

2S39

+24V-AUDIO-POWER

1n0

2S38

IS1K

10u

2S3F

56R

100n

2S3E

3S3F

+24V-AUDIO-VDD

+24V-AUDIO-VDD

+24V-AUDIO-VDD

2S3L

100n

IS1N IS03

IS0V

3S34

10K

3S37

10K

13

714

11

+3V3

74LVC00APW7S09-4

12

7S09-374LVC00APW

9

10

714

8

4

5

714

6

14

3

74LVC00APW7S09-2

7S09-174LVC00APW

1

2

7

2S3J

220n

IS1B

eHDMI+

ADAC(5)

ADAC(6)

SPDIF-OUT-PNX SPDIF-OUT-PNX

SEL-HDMI-ARC

SPDIF-OUT

AUDIO-IN3-R

AUDIO-IN3-L

AUDIO-IN4-R

AUDIO-IN4-L

AUDIO-OUT-RADAC(6)

ADAC(4)

ADAC(3)

ADAC(2)

ADAC(1)

AUDIO-IN1-R

AUDIO-IN1-L

ADAC(1)+AUDIO-L

-AUDIO-RADAC(2)

AUDIO-OUT-LADAC(5)

Page 82: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 82Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

MIPS

19100_016_110209.eps110211

PNX85500: MIPSB02E B02E

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

DXR HTE

SDIODAT

ETH

TXD

TXCLK

0123

TXENTXER

COLCRSMDC

MDIO012SDCDSDWP

RXCLK

0123

RXDVRXER

CC_DAT3CLKCMD

-BUSCTRLFIL

I 2 CINP

USB

1

2

3

4

RREFDPDN

CLK_54_OUT

BL_PWM

RESET_SYS

TDITDOTCKTMS

TRSTN

SCLSDA

SCLSDA

SCLSDA

SCLSDA

USE ONLY

RES

FOR FACTORYIS17

IS14

IS15

IS16

3S4A

100R

10K

3S82

+3V3

+3V3-STANDBY

IS08

9S09

RES100R

3S4B

+3V310K

3S84

10K

3S83

IS50

+3V3

+3V310K

3S80

678

910

1F10

12345

RES

BM08B-SRSS-TBT

+3V3

FS11

DS52

IS09

3S40

10K

+3V310K

3S45

FS643S64

10K

FS53

FS51FS50

+3V3FS57

IS4Z

RE

S

3S6J

10K

10K3S6H-44 5

3 610K

3S6H-3

3S6K10K1 8

3S00

33R

3S6H-110K

2K23S6F

3S6D 2K2

4K73S6B

4K7

9S13

3S69

9S12

3S561 2

+3V3

+3V3

100R

3S8110K

1 2

+3V3

3S66

4K7

10K

3S62+3V3

VSS

IS04

SC0

SC1 8

1 SCL 0DS 4

SD1 72 SDA

3

VDD

6

7S01PCA9540B

5

10K

SER 12S3

FS10

3S27

10K

100R1 2

1 2

+3V3

3S61

3S5Z100R

3S5W100R

1 2

IS05

1 2

3S571 2

3S58

100R

+3V3

100R

9S10

3S72

47R

3S55

5K6

1 23S67

4K7

AA5AB3W2

W1W6W5W4W3U6V6

Y5Y6AB4AC1

AC2Y4

AA2

AA1AA4AB1AB2

ETHERNET

AC3Y2Y3Y1

AA3

AB25AB26

AA24AA25

R26R25R24

PNX855007S00-4

AE4

C26

A25

A24

A23

C25

B26

B25

B24

AA23

GPIO_10GPIO_11

U23

Y23GPIO_2

Y24GPIO_3

W21GPIO_4

W22GPIO_5GPIO_6

W23V22

GPIO_7

CONTROL

AD5

AC5

GPIO_0Y21Y22

GPIO_1

V23

PNX855007S00-3

FS52

3S6E 2K2

+3V3

FS44

3S60

100R1 2

3S6A 4K7

FS2Y

FS31

FS2W9S11

2

IS40

3S681

10K2 7

4K710

K

3S26

3S6H-2

3S651 2

4K7

100n

2S89

+3V3

3S6G 2K2

+3V3

FS49

3S6C 4K7

1 2

BACKLIGHT-PWM

3D-VS

3D-VS-DISP

3S5Y

100R

BOOTMODE

SELECT-SAW

GPIO6

PNX-SPI-CS-BLn

BOOST-PWM

RXD1-MIPS

TXD1-MIPS

EJTAG-TDI-PNX85500

EJTAG-TRSTn-PNX85500EJTAG-TMS-PNX85500

PXCLK54

TXD2-MIPSRXD2-MIPS

3D-LR3D-LR

SDA-SET

SDA-DISP

SDA-BL

EJTAG-TMS-PNX85500EJTAG-TRSTn-PNX85500

EJTAG-TCK-PNX85500EJTAG-TDO-PNX85500EJTAG-TDI-PNX85500

EJTAG-DETECTn

EJTAG-TDO-PNX85500EJTAG-TCK-PNX85500

SCL-TUNER

RESET-SYSTEMn

SCL-DISP

SCL-BL

SCL-SET SDA-DISP

SDA-BLSDA-SET

SCL-DISP

SCL-BL

SDA-DISP

SDA-BL

SCL-SET

SCL-BL

SCL-DISP

SDA-SETSCL-SET

SDA-SSBSCL-SSB

SDA-TUNERSCL-TUNER

SDA-UP-MIPSSCL-UP-MIPS

SDA-SETSCL-SET

SDA-SSBSCL-SSB

SDA-TUNER

ETH-TXD(2)ETH-TXD(3)ETH-TXENETH-TXER

ETH-COLETH-CRSETH-MDC

SDA-UP-MIPSSCL-UP-MIPS

SDIO-DAT3SDIO-CLKSDIO-CMDSDIO-DAT0SDIO-DAT1SDIO-DAT2SDIO-CDnSDIO-WP

ETH-TXD(0)ETH-TXD(1)

ETH-RXCLK

ETH-RXD(0)ETH-RXD(1)ETH-RXD(2)ETH-RXD(3)

ETH-RXDVETH-RXER

ETH-TXCLK

BACKLIGHT-PWM

BOOTMODE

BOOST-PWMSELECT-SAW

RXD1-MIPSTXD1-MIPSRXD2-MIPSTXD2-MIPSGPIO6PNX-SPI-CS-BLn

EJTAG-TCK-PNX85500

EJTAG-TDI-PNX85500EJTAG-TDO-PNX85500

EJTAG-TMS-PNX85500EJTAG-TRSTn-PNX85500

USB-DMUSB-DP

ETH-MDIO

Page 83: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 83Q552.2E LA 10.

2011-Feb-18 back to div. table

Video out - LVDS

19100_017_110209.eps110211

PNX85500: Video out - LVDSB02F B02F

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

LOUT1

A

NP

B

CLK

NP

C

NP

D

NP

E

LOUT2

NP

A

NP

B

NP

CLK

NP

C

NP

D

NP

E

LOUT3

A

NP

B

CLK

NP

C

NP

D

NP

E

NP

NP

LOUT4

A

NP

B

CLK

NP

C

NP

D

NP

E

NP

NP

NP

NP

E16

D18E18

E19D19

D11E11

E12D12

D14E14

E15D15

E17D17

D16

B18

C19B19

D7E7

E8D8

E10D10

D9E9

B12

A14B14

C15B15

C17B17

A16B16

A18

A7B7

C8B8

C10B10

A9B9

A11B11

C12

PNX855007S00-7

LVDS

9S979S96

9S949S959S91

9S90

9S929S93

PX3CLK+PX3CLK-

PX4CLK+PX4CLK-

PX1C+PX1C-

PX1B+PX1B-

PX1A+PX1A-

PX2A+PX2A-

PX1E+PX1E-

PX1D+PX1D-

PX1CLK+PX1CLK-

PX2D+PX2D-

PX2CLK+PX2CLK-

PX2C+PX2C-

PX2B+PX2B-

PX3C+PX3C-

PX3B+PX3B-

PX3A+PX3A-

PX2E+PX2E-

PX4B-

PX4A+PX4A-

PX3E+PX3E-

PX3D+PX3D-

PX4E+PX4E-

PX4D+PX4D-

PX4C+PX4C-

PX4B+

Page 84: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 84Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Standby controller

19100_018_110209.eps110211

PNX85500: Standby controllerB02G B02G

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

MC

PWM

SPI

P0

P1

P2

P3

P5

P6

345

0123

45

VD

D_X

TA

L

VD

DA

_AD

C2V

5

VD

DA

_1V

1_D

CS

01237

01234567

012

7

VS

S_X

TA

L

XTAL_IN

XTAL_OUT

RESET_IN

EA

ALE

PSEN

SDASCL

01

SDOSDI

CLKCSB

0123456

RES3S3R10K

+3V3-STANDBY

RES10K

3S3S

4K73S3W

10K3S46RES

3S43

3S44

10K

+3V3-STANDBY

10K3S3P

10K

3S3N

+3V3-STANDBY

RES10K

30R

+3V3-STANDBY

RE

S5S

04

10K3S47

3S3Y10K RES

RES

1n02S4D +3V3-STANDBY

3S41

10K

RES

10K

3S1P

IS3F

RES10K

3S1K

10K3S1H

3S1G

10K

10KRES3S1E10K

27K3S1D

RES3S1C

10K

3S3L

3S494K7

RES

+3V3-STANDBY

100n

2S4K

4

NC

1OUTP

7S20NCP303LSN28

CD5

GND

3

2INP

10K 3S42

100R3S2H

100n

2S4ERES100K

3S1J

2S4G

10p

10p

10K

3S1F

2S4F

10K3S3T

4K7

RES 3S6V

IS20

2S37

1u0

2S11

100n

IS3E

IS3D

RES10K3S2S

10K3S3Q RES

IS2U

3S3M10K

FS451

+3V3-STANDBY

3S2K 100R

3S2G 100R3S2F 100R

RES10K

3S2A

10K

3S1B

1u0

2S13

4K7

3S6W

RES

RE

S

9S24

1

PO

L

AF25AE23

AA

17

AF

26

AC

17A

D17

AE17

AF17

DS50

AF22AE22

AC26

AD26AC25

AA26

AC24AC23

AF24AF23

AD21

AE21AF21AA22AB22AC22AD22

AD23AE26AE25AE24

AF19AA20AB20

AC20AD20AE20AF20AA21AB21AC21

AB24

AB17AA18AD18AE18AF18AA19AB19AC19

AD19AE19

STANDBY

PNX855007S00-9

AB23

IS2Z 10K3S2LIS2V RES

RE

S

3S2V

1K0

12

9S0D

FS0Z

3S1L

10K

54M2

41

3

1S02

2S10

100n

+1V

1

9S0E

RES3S2M

10K

IS3B

SDA-UP-MIPSSCL-UP-MIPS

SPI-PROG

RESET-AVPIP

RESET-STBYn

PNX-SPI-WPnSPI-PROG

DETECT2

RESET-STBYn

CTRL-DISP

SEL-HDMI-ARC

EJTAG-DETECTnLAMP-ONSTANDBY

FAN-CTRL1FAN-CTRL2POWER-OK

ENABLE-3V3n

AV1-STATUSAV2-STATUS

LED2

PSEN

ALE

EA

RESET-DVBSRESET-USBnRESET-ETHERNETn

RESET-AUDIOAUDIO-MUTE-UP

LCD-PWR-ONn

CEC-HDMIBACKLIGHT-PWM-ANA-DISP

SDM

RXD-UPTXD-UP

RESET-SYSTEMn

KEYBOARD

SDA-UP-MIPSSCL-UP-MIPS

LED1LED2

LED1

AV1-BLK

PSEN

PNX-SPI-CLKPNX-SPI-CSBn

PNX-SPI-SDIPNX-SPI-SDO

KEYBOARDLIGHT-SENSOR

RCTACHO

ALE

EA

CTRL-DISPRESET-DVBSRESET-USBn

RESET-ETHERNETnSEL-HDMI-ARC

RESET-AVPIPRESET-AUDIO

AUDIO-MUTE-UP

RCTACHOCEC-HDMIBACKLIGHT-PWM-ANA-DISPSDM

LCD-PWR-ONnEJTAG-DETECTnLAMP-ONSTANDBYFAN-CTRL1FAN-CTRL2POWER-OKENABLE-3V3n

RXD-UPTXD-UPDETECT2

RESET-SYSTEMnAV2-BLK

Page 85: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 85Q552.2E LA 10.

2011-Feb-18 back to div. table

Power

19100_019_110209.eps110211

PNX85500: PowerB02H B02H

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VSSA

VSS

VSS

VSSVDDA_2V5

HDMI_VDDA_3V3_TERM

VDDA_2V5_LVDS_BG

VDDA_2V5_USB

VDDA_2V5_VADC

VDDA_2V5_VDAC

VDDA_3V3_USB

VDD_1V1

VDD_1V8

HDMI_VDDA_1V1

HDMI_VDDA_2V5

VDD_2V5

VDD_2V5_LVDS

VDD_3V3

VDD_3V3_SBY

VDDA_1V2

VS

SA

_US

B

VS

SA

_2V

5_LV

DS

_BG

VS

SA

_1V

1_LV

DS

_PLL

HD

MI_

AG

ND

VDD_1V1_DDR

VDDA_2V5_DCS

VDDA_2V5_ADAC

VDDA_2V5_AADC

VDDA_1V1_LVDS_PLL

100n

2S43

+1V1

100n

2S28

2S6H

100n

12

100u

2S26

2S27

100n

2S21

1u0

30R

5S85

2S4M

220u

6.3V

100n

2S67

2S66

100n

2S65

100n

100n

2S64

100n

2S63

IS58

2S62

100n

100n

2S60

30R

5S80

+2V5

Y11

Y14

Y16 Y9

2S61

100n

V10V12V14V16V18

V2

A3

Y20

A8

AA

16A

A8

T10T12T14T16T18

A26

T2T6T7U4

N2N20P10P12P14A19P16P18

P4P6P7

K7

L20 L4

M10

M12

A17

M14

M16

M18 M6

M7

H7

J20

K10

K12

A15

K14

K16

K18 K

2K

6

G10G12

G14

G16

A12

G18 G2

G20 G8

H4

H6

E13E20E4F10

A10

F12F14F16F18F20F8

A1

B1B20C20C4D2D20

7S00-12PNX85500

VSS

10u

2S6P

100n

2SH

W

+2V5-AUDIO

c000

2S4T

100n

6

2S68

100n

2S5J

-3

100n

3

2S29

220u

2.5V

2S53

10u

+3V3

100n

2S5C

2

+2V5

2S5B

SE

Ru01

5S81

30R

2S4Q

22u

IS3Q

45

RE

S

2S5J

-4

100n

2S5J

-11

8

10u

2S5A

100n

100n

2S5K

-33

6

100n

2S5K

-22

7

18

45

100n

2S5K

-1

100n

2S5H

-4

100u

2S23

100n

2S5H

-33

6

100n

2S5H

-11

8

30R

36

5S90

2S5G

-3

100n

2S46

100n

100n

2S45

5S93

30R

5S94

30R

+1V1

2S4N

100n

+2V5-LVDS

+2V5

P20M20K20

V7Y8

Y19Y18

A13

C13

R20

+3V3

B5

B6

N6N7

C7C9

C11C14C16C18

W20

F6

G6

F7

G7

L7 R6

R7

U7

A5

A6

G9

AB5H20F11G11F13

J7

L6 C6

D6

E6

U9U11U13

AC4

U15U17J6AA6Y7W7F9

N11N13

AD3

N15N17R9R11R13R15R17

J11J13

AE2

J15J17L9L11L13L15L17N9

R21

AF1

G13F15G15F17G17F19G19J9

AA15Y15

AA13

Y12

AA9

AA7

Y17

D13

T20

Y13

Y10

7S00-10

U24

V24

V20V21

U20U21

U22

B13

12

VDD

PNX85500

100n

2S6F

100n

2S4Z

IS3K

30R

5S84

POL

+1V1

12

2S4W

100n

2S6K

100n

100n

2S5M

100n

2S6E

12

12

c001

2S6D

100n

IS3S

+1V2

1u0

RE

S

2S56

10u

2S5D

10u

2S58

30R

5S82

2S4S

10u

RE

S

12

22u

2S4R

100n

2S6C

12

+1V1

2S6G

100n

12

5S83

30R

12

100n

2S6L

2

100n

2S6M

100n

1

100n

2S6A

12

2S6B

18

100n

2S5G

-1

100n

2S6N

12

27

45

2S5H

-2

100n

2S5G

-4

100n

27

5S87

30R

2S5G

-2

100n

12

+1V8

100n

2S5P

1u0

2S59

45

30R

5S92

+2V5

2S5K

-4

100n

5S89

30R

+2V5-LVDS

2S57

10u 30R

5S88

RE

S1u

0

2S4Y

100n

27

2S5J

-2

2S4P

10u

2S55

100n

+2V5

+2V5-AUDIO

2S52

10u

6.3V

30R

2S51

100n

5S95

+2V5

IS3L

10u

2S50

2S4V

10u

+3V3-STANDBY

100n

2S4U

+3V3

SENSE+1V1

SENSE+1V2

Page 86: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 86Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Analog video

19100_020_110209.eps110211

PNX85500: Analog videoB02I B02I

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

CVBS_Y7C7

6

INOUTSCLSDA

ANALOG_VIDEO

AV1

VGA

ATV_CVBS_Y3C3

CVBS1_OUTCVBS2_OUT

RESREF

REF

TUNERVGA_EDID

VSYNC

CURREF

12345

IF_AGCRF_AGC

PN

AGND

CVBS_Y1RBG

SYNCIN1Y_G1PR_R_C1PB_B1

CVBS_Y2SYNCIN2Y_G2PR_R_C2PB_B2

RGBHSYNC_IN

EU:

AP:

EU:

VGA

VGA

SCART2

∗ 319803104790 - RST SM0402 47R PMS Col R at 9S18 for Brazil

EU:

AP:

EU:

Connectivity

YPBPR1

YPBPR2

AP:

+CVBS

AP:

YPBPR1

SCART1

- 22n2S7K

9S21

2S8G

22n

47R

3S59

22n

2S7R

2S85

22n

2S7P

22n

BS10

22n

2S7N

100R

3 6

10n

2S7M

1 8

3S5T-3

3S5T-1

100R

2S7L

22n

2S15

22n

2S14

22n

3S4L

9S18

56R

56R

3S4K

3S75

10K

45

9S19

3S5T

-4

100R

3S4P

56R

2S7H

22n

3S5E

560R

IS5H

3S5B

47R

2S8A

22n

56R

3S54

IS5C

10K3S5S

IS4W

3S4J

56R

22n

2S86

3S52

56R

22n

2S84

AF16

AD24AD25

AF15

AF14

AF12AE12

AC18AF4

AE15

AE14

AC15

AC14AC16AB16AB13AB12AA12AA10

AB10

AB11

AA11

AF11AE11

AB15

AB14

AD11

AD16

AB18 AD12

AD15

AD14

AA

14

AC12

AD13AE13

AC13

AE16

AF13

AC11

PNX855007S00-1

2S7U

22n

IS11

47p

2S40

22n

2S87

3S4T

56R

10n

2S76

56R

3S50

56R

3S4R

BS13

2S77

10n

9S20

47K

3S76

IS4V

3S5V-33 6

1 8

RES

100R

RES 3S5V-1

100R

IS5J

22n

2S18

2S16

22n

IS5D

IS5E

22n

2S7J

22n

2S7E

3S05

56R

2S22

22n

BS15

2S75

10n

7

10n

2S78

3S5V

-2

100R

2

3S5V

-4

100R

45

3S5T

-2

100R

27

8K2

3S09

IS5G

2S19

22n

IS5F

C-SVHS

560R

3S08

PNX-RF-AGC

PNX-IF-AGC

H-SYNC-VGA

V-SYNC-VGA

VGA-SCL-EDID

VGA-SDA-EDID

AV3-PB

AV2-CVBS

AV4-Y

AV4-PR

R-VGA

G-VGA

B-VGA

Y-SVHS

AV1-G

AV1-CVBS

AV1-B

AV1-R

AV3-Y

YPBPR1-SYNCIN1

AV3-PR

CVBS-MON-OUT1

PNX-IF-P

PNX-IF-N

AV4-PB

Page 87: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 87Q552.2E LA 10.

2011-Feb-18 back to div. table

10-3 B03 393912364954Audio

19100_021_110209.eps110209

AudioB03A B03A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VIA VIA

VIA

VIA

VCLAMP

MUTE

IN

BSL

SD

R

AVCC

L

BSR

GND_HS

L

PGNDAGND L R

L

OUT

R

BYPASS

1

R

0

PVCC

GAIN

EMC

EMC

MAINS SWITCH DETECT

63D

01-3

47K

3

5

220u

2D11

3D10

-4

22K

V_N

OM

1D50

GND-AUDIO

35V

2D13

10n2D

01

10n

3D14

-3

22K

6

3D14

-2

22K

7

2

GND-AUDIO

GND-AUDIO

3D02-2

4K7

7 22K

3D14

-18

u0 1V 53

2D29

1u0

2D05

+3V3-STANDBY

220R

5D03

+A

VC

C

220n

2D06

2D17

1u0

ID35

FD14

FD07

+3V3-STANDBY

3D06-44 52D02

10u

GND-AUDIO

100K

47K

3D01-4 5 44K

7

3D15

100K3 6

ID33

ID14

3D06-3

76

4 23

22K

3D10

-2

22K

3D10

-3

1

u 022V5 3

2D20

22K

8

5

3

4

GND-AUDIO

3D10

-1

BC847BS(COL)7D03-2

ID11

ID37

7D03-1BC847BS(COL)

2

6 1

GND-AUDIO

1234

CD10

2041145-4

1735

22K

5

3 2 14

5D04

220R

3D14

-4

7D11-2 5

3

4

RE

S

BC847BS(COL)

220n

2D27

FD09

ID18

6 3

ID27

FD08

4K7

3D02-3 5

3

4

2

6

1

7D15-2BC847BS(COL)

ID05

7D15-1BC847BS(COL)

ID15

47n

2D23

ID06

V_N

OM

1D52

GND-AUDIO

10 12

615

2

11

25

522

4

23 24 13 14

1 3

8 919 20

21

16

7

1817

AUDIO AMP

ΦCLASS-D

TPA3123D2PWP7D10-1

5D01

22u

2D10

220n

ID09

ID08

ID07

FD05

ID12

2930 31 32 33

34

26

353637

383940

2728

GND-AUDIO

VIA

7D10-2TPA3123D2PWP

+24V-AUDIO-POWER

+24V-AUDIO-POWER

GND-AUDIO

4K7

3D02

-45

43D

02-1

81

FD01

4K7

ID10

2D24

7 2

ID19

47n

100K

3D06-2

FD02

220n

2D22

2D21

220n

8 1

GND-AUDIO

100K

3D06-1

2D28

1u0

220u2D

19

ID32

35V

123

ID30

2041145-3

1D38

GND-AUDIO

10n

2D14

220R

5D05

ID29

ID31

GND-AUDIO

2D12

V53 u022

GND-AUDIO

GND-AUDIO5D08

220R

220R

5D07

ID28

4R7

3D09

4n7

2D31

GND-AUDIO

4n7

2D30

RES

3D16

22K

RES

2D09

220n

1u0

2D16

22u

5D02

220n

FD03

2D07

220n

2D08

FD06

GND-AUDIO

GND-AUDIO

RE

S

100p

220n

2D26

1

2D03

BC847BS(COL)7D11-1 2

6

RIGHT-SPEAKER

ID34

DETECT2

AUDIO-MUTE-UP

-AUDIO-R

+AUDIO-L

A-STBY

LEFT-SPEAKER

LEFT-SPEAKER

RIGHT-SPEAKER

LEFT-SPEAKER

RIGHT-SPEAKER

A-PLOP

Page 88: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 88Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

DC/DC

19100_022_110210.eps110211

DC/DCB03B B03B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

2VFB

12

TRIP

DRVL

12

DRVH

12

SW

12

PGND

12

TEST

12

VREG5V5FILT

12

VIN

GND

VBST

12

EN

12

VO

1RES

12V/1V1 CONVERSION

12V/1V8 CONVERSION

CU03

47R

3U24

-2

IU20

FU06

IU04

+3V3-STANDBY

FU05

IU10

IU11

2U20

1u0

IU14

IU12

3R3

3U05

5 6

4

3

+12V

1 2 3

7U02-2SI4952DY

SI4778DY

5 6 7 84

7U04

4

1 2 3

5U00

3u6

SI4778DY7U01

5 6 7 8

CU04CU05

GND-SIG

FU01

3U03

12K

2U05

1u0

2U04

10u

7 82

1

GND-SIG

IU09

SI4952DY7U02-1

10K

IU03

3U00

1%

+1V8

3U10

3U17

330R

RE

S22K1% 10

0p

2U07

1K03U

09

1%1K

0

3U18

5K6

3U19

47u

2U15

5U01

2u0

IU01

IU08

3U08

330R 1%

2U17

1n0

2U12

47u

IU18

10u

2U19

IU19

IU15

RE

S

3U21

100R 1%

3U20

10R

2U10

1u0

IU05

FU08

FU03

FU09

IU07

CU01

2U09

1n0

CU02

2U11

1n0

100n

BC847BW

13

2

2U06

7U00

FU04

3U04 3R3

100n

2U01

3U28

10R

211

58

20

49

19

GND-SIG

6

2215

2413

717

2116

18

112

2314

310

7U03TPS53126PW

2U02

100n

3R3

3U11

5U02

30R

RES

IU23

5U03

30R

GND-SIG

IU17

GND-SIG

GND-SIG

3U22

1K0 1%

+1V1

FU02

+1V8

10u

2U00

GND-SIG

CU00

3U27

10R

IU21

RE

S2U

29

100n

GND-SIG

IU25

IU16

3U14

3R3

IU02

IU24

GND-SIG

3U24

-1

47R

1n0

2U18

IU06

2U21

220p

3U24

-3

47R

10u

2U23

22u

2U13

RE

S

GND-SIG

100p2U

08

18

47R

3U24

-4

27

3U23

-1

47R

47R

3U23

-2

3U23

-3

47R

36

3U02

22K

2U24

GND-SIG

10u

2U25

10u

FU00

GND-SIG

2U03

1n0

RE

S

6U00

ST

PS

2L30

A

45

+1V1

47R

3U23

-4

2U14

100u

2.0V

RE

S

IU22

22u

2U16

+1V1

GND-SIG

IU13

+1V8

220p

2U22

10K

3U01

ENABLE-1V8

SENSE+1V1

Page 89: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 89Q552.2E LA 10.

2011-Feb-18 back to div. table

DC/DC

19100_023_110210.eps110211

DC/DCB03C B03C

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

optionally 1M99 is a 9 pin connector

MAINS-OK

*

*

**

FU63FU61

7U42BC847BW

RES

GND_AL

FU59

27

RE

S10

0p

2U51

10K

3U62-2

3K3

3U73

2U43

100p

IU57

3U83-33 6

3U82

1K0 RES

100K

RE

S

+3V3-STANDBY

3U63

10K

3U44

GND_AL

GND_AL

100R

1U40

T V23A0.3

IU40

FU74

IU64

+24V

IU55FU55

FU52

FU07

+3V3-STANDBY+3V3

IU43

3U83

-11

8

3U83-227

100K

RES

100K

100R3U67

FU51

2U50

10n

+12VIN

9U42RES

FU62

BC847BW7U43

3U66 100R

RES

FU49

10K

3U81

10K

3U68

3U69 10

KR

ES

10n

2U46

1n0

2U45

FU56

+3V3

100RRES

3U53

10K

1

3U84

22K

3U60-18

100p

2U44

RES4U00

IU62

9U41

IU50

IU44

IU63

3U59

10K RES

IU47

IU45

3U61

SE

RK01

+12VIN

3U72

1K0

IU481u0

2U68

1n0

2U56

10K 1 8

RE

S

36

3U62-14

5

10K

3U62

-3

3U62-4 10K

2U54

10n

IU51

100R

3U71

GND_AL

5

3

4

FU57

7U41-2BC847BS(COL)

2U72

FU68

RE

S10

0p

+12V_AL

23456789

1

1011121314

1M95

1-2041145-4

RE

S

1n0

2U57

53

4

+3V3-STANDBY

+12V 6

1

BC847BPN(COL)7U40-2

7U40-1BC847BPN(COL)

2

3U80

4K7

FU48

100n

2U71

100K

4 5

FU76

3U83-4

FU75

2U53

1n0

4U01RES

3U65

100K

+3V3-STANDBY

1K0

FU50

IU56

3U64

22K

3 6

FU72

3U76

100R

3U60-3R

ES

RES

3U74 10

K

10K

3U75

RE

S

GND-AUDIO

+24V-AUDIO-POWER

RE

S

2U48

100p

+3V3-STANDBY+5V

10n

2U47

+12VIN

FU53

2U52

+12VD

RE

S10

0p

10K

3U41

RES

10K

10K

3U70

89

+3V3

3U56

10111213

234567

1-2041145-3

1M99

1

FU67

FU66

2

615

34

7U48-1BC857BS(COL)

7U48-2BC857BS(COL)

2U49

100p

RE

S

IU41

BZ

X38

4-C

6V2

6U40

IU61

FU60IU49

100R

3U43100R

3U42

3U45

100R

22K

3U60-4

45

3U60-2

72

RE

S

22K

FU54

2U58

1n0

+3V3

RE

S

FU58

2

6

1

1u02U

55

BC847BS(COL)7U41-1

IU52

FU73

3D-LR

LAMP-ON

BACKLIGHT-PWM_BL-VS

BACKLIGHT-BOOST

POWER-OK

BL-SPI-SDO

BL-SPI-CSn

ENABLE-1V8

ENABLE-3V3n

ENABLE-3V3-5V

BL-SPI-CLK

LED-1

LED1

LED-2

LED2 LED2

LED1

STANDBY

DETECT2

open

1M95

100p 14 POLE

no

100R

Dream Catcher

2U44 3U43

0Rno

Core Range4U01

13 POLE

Optional table for 4U00 and 4U01

yes

is not mounted If 1M99If 1M99is mounted

Items For non-Amblight sets

4U00

yes no no

Page 90: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 90Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

DC/DC

19100_024_110210.eps110211

DC/DCB03D B03D

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

NCNC

A

REF

K

COM

NI TUO

NI TUO

INH BP

COM

*

*

*

*

RESERVED

NOT FOR 5000 SERIES

*

7UA0

A

3

1

K

2

R

TS2431

+2V5-REFFUA0

3UB5

100K

5 3

12

47UA4TS431AILT

2UB

6

1u0

+5V5-TUN

+5V-TUN

4K7

3UB2

3UB3 4K7

1K0

3UB1

2UB

8

22u

2UB

0

1u0

1u0

2UA

4

3 6

2 7

3U16-3

100R

8

3U16-2

100R

3U16-1

100R

1+5V

4 5

CUA0

2

RES

470R

3U26-4

3UB

7-2 47

0R7

470R

3UB7-18 1

3UB6-1

1K01 8

1%33

0R3U12

30R

5UA0

2UB

5

100n

+2V5-REF 1%33

0R

3U13

1 3

FUA4

LF25ABDT7UC0

2

100K

81

3U25-2

27

RE

S

3U25-1

+2V5

RE

S10

0K

IUB6

+1V8

1 2IUA53UB0

22R

100R

3U15-22 7

100R

3U15-11 8

IU26

PHD38N02LT7UA3

3UA

0

2K2

5

+3V3

+12V

3U29-4

470R

4

470R

3U29-33 6

RES

22n

2UB3

RES

330p

2UB4

IUB0

RES

2 7

3UB4

1K0

1 8

RES3U29-2

470R

RES

470R

3U29-1

+3V3

IUA6

BC847BS(COL)

5

3

4

FUA3

7UA7-2

IUB3

IUB4

IUB2

RE

S1u

0

2UB

1

IUB5

2UB

2

1u0

IU30

470R

54

63

3UB

7-4

IU29

470R

3UB

7-3

5

3

4

6

1

RES

BC847BS(COL)7U06-2

RES7U06-1

BC847BS(COL)2

100K

3U25-44 5

3U25-3

100K

3 6

RES

2

6

1

RES

BC847BS(COL)7UA7-1

5

BC817-25W7UA6

1K0

3UB6-44

3UB6-3

1K03 6

3UB6-22 7

+5V-TUN

+12V1K0

3U15-44 5

+3V3

3 6

100R

6

+2V5-LVDS

100R

3U15-3

3U26-3

470R

3

470R

3U26-22 7

RES

3U26-1

470R

1 8

RES

5

RES

LDS3985M507UA5

4

2

1

3

+5V5-TUN

4 5

+3V3+5V

+12V

3U16-4

100R

+3V3

+1V2

+5V

IUB1

1u0

2UB

7

ENABLE-1V8

SENSE+1V2

Page 91: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 91Q552.2E LA 10.

2011-Feb-18 back to div. table

DC/DC

19100_025_110210.eps110211

DC/DCB03E B03E

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

GND

VIN

A P SH

INH

SYNC

SW

VFB

A

SW

VIA

COM

NI TUO

COM

NI TUO

GND

VIN

A P SH

INH

SYNC

SW

VFB

A

SW

VIA

FOR 5000 SERIES ONLY

∗∗

(∗)

(∗∗) NOT FOR 5000 SERIES

10K

3U07

2

6

1

+1V1

+5V

RE

S

RESBC847BS(COL)

7U05-1

+12V

1%

3UD2

3UD

3

100K 16

V

120K

2UE

4

220u

IUD1

IUD2

10

11

12

13

1415

3

1 6

ST1S10PH7UD0-2

4 9

2

8

7

5

7UD0-1ST1S10PH

3UD

4

1M0

4n7

2UD7

+2V5

10K

RE

S

3U06

RE

S2U

27

100n

2UD

1

10u

10u

2UD

0

22u2U

E9

IU28

RE

S

2UD

8

10u

+1V1

IUD4

100n

2UE

5

IUD3

S1D

6UD1

2UE

3

22u

22u

2UE

2

5

3

4RES

BC847BS(COL)

7U05-2

IUD0

FUD3

+3V3

2UD

5

22u

IUD6

FUD2

10u

2UD

2

1%

u22V61

2UE

6

3UD

0

68K

30R

5UD3

1

3 2

7UD3LD1117DT33

RE

S

100n

2U28

2UE

0

10u

10u

2UD

9

+12V

+5V5-TUN

IUD5

u022V 61

2UD

6

6UD0

SS36

33K

3UD

1

1%

1n0

2UD

3

RE

S

4n7

2UE

1

IUD7

33K

1%3UD

5

5UD0

30R

22u

2UD

4

5UD1

3u6

3u6

5UD2

7UD1-2ST1S10PH

10

11

12

13

1415

16V

1 6

2UE

8

22u

7UD1-1

4 9

2

8

7

35

+5V

+3V3

ST1S10PH

IU27

3 2

7UD2LD1117DT25

1

2UE

7

100n

ENABLE-3V3-5V

ENABLE-3V3-5V

Page 92: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 92Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Temperature sensor & AmbiLight

19100_026_110210.eps110211

Temperature sensor & AmbiLightB03F B03F

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

FUM01UM0

1.0A30R

5UM1+3V3

63VT

IUM0V-AMBI

Page 93: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 93Q552.2E LA 10.

2011-Feb-18 back to div. table

Fan control

19100_027_110210.eps110211

Fan controlB03G B03G

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

+3V3

+3V3

3US3 10K

10K

3US2

IUT1

IUT2

+3V3

IUS8

IUS9

IUS7

IUS6IUS3

IUS5

IUS4

+12V

+12V

100n

2US

3

+12V

+12V

27

+12V

+12V

1013

3

12

3US

4-2

10K

LM339P7US1-2

11

7US1-1LM339P9

814

3

12

7

61

312

2

312

LM339P7US1-4

7US1-3LM339P5

4

10K

18

+12V

45

3US

4-1

36 10

K

3US

4-4

3US

4-3

10K

1K0

3US7

3US5-4

10K

5 4

1

+12V

+12V

10K

3US

5-1

8

47R

3US

6

3US

9

22R

7US3BC807-25W

27

BC807-25W7US2

3

10K

3US

5-2

3US5-3

10K

6

RE

S

9US

0

IUS0

FAN-CTRL2

TACH01

TACH02

TACHO

FAN-CTRL1

FAN-DRV

Page 94: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 94Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Vdisp switch

19100_028_110210.eps110211

Vdisp switchB03H B03H

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VDISP-SWITCH

9UU1-22 7

9UU1-33 6RES

9UU0-44 5

RES

22n

2UU

2

RES

13

2

2 7

RESBC847BW

7UU3K74 SER

3UU3-2

RES9UU0-11 8

7UU0SI4835DDY

RES

3UU2

4K7

+3V3-STANDBY

+VDISP-INT

+3V3

9UU1-44 5RES

IUU1

7UU1RES

SI3441BDV

81

FUU1

7 2

47K

3UU0-1

1

47K

3UU0-2

47K

8

IUU0

RES

3UU3-1

47K

3UU3-44 56 3

RES

+12VD

+3V3

RES

3UU3-3

47K

9UU0-33 6

9UU0-22 7

RES

5

3

4

RES

7UU2-12

6

1

7UU2-2PUMD12

3UU0-3

3 6 PUMD1247K

IUU5

IUU21u0

2UU13UU1

47R

IUU3

RE

S10

0n

2UU

0

IUU4

8

FUU0

RES9UU1-11

LCD-PWR-ONn

Page 95: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 95Q552.2E LA 10.

2011-Feb-18 back to div. table

10-4 B04 393912364954Analogue externals A

19100_029_110210.eps110210

Analogue externals AB04A B04A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

RES

* EU

**

** Provision for ESD

(AV1)

AP

**

**

* EU

* EU

**

**

**

SCART1

**

AP

AP

RES

* 3139803190010 - RSI SM 0402 JUMP 0R05 Col at 2E44 & 2E75 for Brazil

*

RES

*

BEC3

BEC5

6

1

7E06-1

BC847BPN(COL)

2

3EA

1

1K0

12

3E18

39K

4E04

4E02

RES

IE18

RES

2E24

100n

100p

2E12

4 5

3E07-4

1K0

100p

2E06

2E01

100p

IE05

1E00

1E53

39p

2E97

5E80

10u

1u8

5E76

2EA4

1u0 16V

RE

S

12V

CD

S4C

12G

TA

6E26

2E18

100p

12V

CD

S4C

12G

TA

6E09

RE

S

1E12

FEA0

16V

2EA5

6E30

CD

S4C

12G

TA

12V

RE

S

1u0

IE92

GND_A

1X06EMC HOLE

FE83

FE81

FE82

150p

2E85

5

6

7

8

9

FE72

15

16

17

18

19

2

20

21

3

4

1

10

11

12

13

14

IE53

1E01

MTJ-505H-01 NI LF

9E07

3EA7-2

470R2 7

RES

100p

2E10

3E43

1E22

75R

1

7E05BC847BW

7E01-1

RES

2

6

GND_A

PUMH7

FE74

9E53FE73

IE70

1R0

3EA

2

1 8

1E23

470R

3EA7-1

3E78 18R

2E80

150p

+3V3

1E55

IE51

3E73

4K7

150p

2E79

IE54 5E74

1u8

3E17

4K7

RE

S

+5V

FE75

6E28

CD

S4C

12G

TA

12V

FE80

2E84

150p

6E23

RE

S

CD

S4C

12G

TA

12V

1 8

2E83

150p

3EB6-1

470R

5

3

4

IE67

PUMH7

7E01-2

RES

100R

3E37-2

2 7

1K0

3E07-2

2 7

3EB6-3

470R

3 6

IE91

3E74 18R

18p

2E98

SER 60E9

9E08

5E73

1u8

1K03 6

RES

3E07-3

3E06

5K6

IE08

9E09

9E109E55

RE

S

9E51

3

46E

07

CD

S4C

12G

TA

12V

BC847BPN(COL)

7E06-2

5

6E01

CD

S4C

12G

TA

12V

RE

S

3EA7-4

470R 4 5

100p

2E15

1 81K0

3E07-1

1X02REF EMC HOLE

CD

S4C

12G

TA

6E32

12V

RE

S

1E25

3E31

12K

3E32

4K7

330R

3EB

31

2

IE55

1u0

2EB

3

IEC1

FE85

2E75

100p

RE

S

150p

2E86

2E14

100p

2u2

IE68

2E81

IEC0

18R

3E75

45

470R3EB6-4

2 7

18R

3E79

470R

3EB6-2

RE

S

12V

CD

S4C

12G

TA

6E03

2E04

100p

1n0

2E91

FE70

IE13

IE59

RES 9E05

FE84

CD

S4C

12G

TA

6E29

12V

RE

S

3E44

4K7

4E05

+3V3

4E03

4E01

RES

RE

S

RES

100p

2E76

IE23

3E77

18R

1E31

+5V

IE96

IE16

IE14

1 2

IE89

3EB1

820R

3 6

1E54

470R

3EA7-3

2K2

3E24

RES

IE52

FEA1

1E19

IEC2

IE17

9E01

1E18

9E54

9E50

3E48

68R

RES

9E52

1n0

2E88

1

100n

2EB

1

100R

3E37-1

8

IE22

18K

3E19

12

RE

S6E

22

CD

S4C

12G

TA

12V

IE60

2E99

4p7

2E90

1n0

IE61

2E87

1n0

27R

3E62

3 6

100n

3E37-3

100R

2E74

PUMH77E09-1 2

6

1

2E44

100p

FE71

100R5 4

IE48

3E37-4

4E06

68R

3E45

IE90

67E3 R81

AUDIO-IN1-R

CVBS-OUT-SC1

YPBPR1-SYNCIN1

YPBPR1-PB

YPBPR1-PR

AV2-STATUS

AV2-BLK

AP-SCART-OUT-R

A-PLOP

CVBS-MON-OUT1

CVBS-OUT-SC1

AUDIO-OUT-L

AP-SCART-OUT-L

AUDIO-OUT-R

AV1-CVBS

AP-SCART-OUT-R

AP-SCART-OUT-L

AUDIO-IN1-L

AV1-STATUS

AV1-B

AV1-R

AV1-G

AV1-BLK

Page 96: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 96Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Analogue externals B

19100_030_110210.eps110211

Analogue externals BB04B B04B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

+T

YPBPR

YPBPR AUDIO

SPDIF out

EU

∗∗ Provision for ESD

∗∗

∗∗

∗ 242202606017 - SOC CINCH V 3P 1L3 YEWHRDY at 1E08 for BRZ

∗∗

∗∗

EU

AP

VGA ( OR DVI ) AUDIO

EU

FOR 3D

∗∗

FE02

FE01

4E22

RES

3E90

18R

1K0

3E96

27R

1E28

3E88

IE72

9E04

FE54

FE51

6E38

CD

S4C

12G

TA

12V

RE

S

100R3E36

V_N

OM

1E38

RES

RE

S6E

18

BZ

X38

4-C

5V1

IE35

100p

2E27

IE75

IE77

1E44

IE34

1E43

RE

S

12V

CD

S4C

12G

TA

6E20

2E37

1n0

4E20

IE749E57

9E58

+3V3

1E08-2

WHITE

MSP-305H-BBB-732-03 NI

3

4

RES 3E56 100RRES 100R3E57

IE73

18R

3E87

1E76

RES

6E40

RE

S

4E23

12V

CD

S4C

12G

TA

8

9

123

456

RES

1481-702-06S-511ECB

7

RES 100R3E41

RES 3E38100R

FE59

FE03

1E77

FE42

FE43

RES

9E11 RES

9E12

RES 100R3E55

2

1E75

6

1E04

MTJ-032-21B-42 NI FE

1

1E08-1

RED

MSP-305H-BBB-732-03 NI

5

30R

FE46

5E06

2E21

100p

RES9E13

RE

S

GREEN

MSP-305H-BBB-732-03 NI

1

2

100p

2E35

1E08-3

3E89

18R

1E78

6E06

RE

S

GND_A

12V

CD

S4C

12G

TA

RE

S10

0p2E

26

IE10

1E79

FE44

4E21

GND_A

GND_A

1n0

2E36

FE48

2E72

100p

6E52

CD

S4C

12G

TA

12V

RE

S

RES

RES

9E15

2E20

9E14

RE

S10

0p

RE

S10

0n2E

23

FE53

2E25

100p

6E19

CD

S4C

12G

TA

12V

RE

S

RE

S

1E29

10p

2E22

6E46

RE

S

FE4112V

CD

S4C

12G

TA

RES9E24

FE47

IE31

RES9E28

RES 3E58

0R3

FE52

RES

IE71

IE76

4E24 100p

2E71

3E97

1K0

9E26 RES

IE09

+5V

1n0

2E39

1

2

IE36

MTJ-032-21B-45 NI FE (PBT)

1E03

FE50

FE49

BZ

X38

4-C

5V1

6E15

RE

S6E

16

BZ

X38

4-C

5V1

RE

S

2E68

100p

1E42

IE15

IE29

456789

3132

GND_A

2223242526272829

3

30

1213141516171819

2

2021

DF50-30DP

1E32RES

1

1011

3E21

13

1K0

1E09MSJ-035-29D PPO

2

RES

9E17 RES

9E19

RES9E23

9E27 RES

100p

2E67

9E22 RES

GND_A

1E39

2E38

100p

3E20

1K0

1E37

V_N

OM 9E25 RES

9E21 RES

FE45

9E20 RES

RE

S

2E40

1n0

2

1

6E51

CD

S4C

12G

TA

12V

1E07MTJ-032-68B-46-NI-FE9E29

100RRES 3E54

BZ

X38

4-C

5V1

6E17

RE

S

RES

9E16 RES

9E18

AUDIO-IN3-L

AV1-BLK

AV1-STATUSAP-SCART-OUT-R

AUDIO-IN3-R

YPBPR1-SYNCIN1

YPBPR1-PR

YPBPR1-PB

AV3-PBTXD1-MIPS

AUDIO-IN1-LAP-SCART-OUT-L

AV1-B

AV1-G

RXD1-MIPS

CVBS-OUT-SC1AV1-R

AV3-Y

AV3-PR

AUDIO-IN1-R

3D-LRTXD2-MIPS

RXD2-MIPS

AV1-CVBS

AUDIO-IN4-R

3D-VS

AV3-YSPDIF-OUT

AUDIO-IN4-L

AV3-PR

AV3-PB

AUDIO-IN3-L

AUDIO-IN3-R

AV2-CVBS

Page 97: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 97Q552.2E LA 10.

2011-Feb-18 back to div. table

Ethernet & Service

19100_031_110210.eps110211

Ethernet & ServiceB04C B04C

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VDDCLKIN

XTAL

RXD<0:3>

MODE

CRS_DVMODE2

INTTXER

TXD

RX

PN

TX

RXD40

RXCLK

PHYAD

1

INTSEL

LED

PN

TXCLK

RXDV

1

RXER

REGOFF

2

CRS

RBIAS

CR 1A 2A IO

TXEN

01234

MDCMDIO

VSS

12

RST

01RMIISELPHYAD2

COL

VIA

SERVICE

3E67

UART

ENABLED ON

3E69

INTERRUPT FUNCTION

3E65

3E66

provision for BUH

nINT/TXER/TXD4 SIGNAL

CONNECTOR

3E70

3E68

CONFIGURATION RESISTOR SETTINGS

Internal 1.2V reg. enabled

MODE(0) = 1

MII mode selected

0 oh

m

nINT/TXER/TXD4 SIGNAL

PHYADD(1) = 0

MODE(2) = 1

Resistor

MODE(1) = 0

MODE(0) = 0

INTERRUPT FUNCTION

PHYADD(0) = 0

PHYADD(2) = 0

RMII mode selected

MODE(1) = 1

3E64

EMPTYPOP

3E71

Internal 1.2V reg. disabled

PHYADD(0) = 1

0 oh

m

3E72

0 oh

m

0 oh

m

ETHERNET CONNECTOR

DISABLED ON

PHYADD(1) = 1

PHYADD(2) = 1

MODE(2) = 0

+3V3

3E7010K

10K3E69

RESRES

3E33

10K

IE32

100n

2E63

+3V3

6E43

BZ

X38

4-C

5V1

2E58

15p

RE

S

15p

2E57

RE

S

15p

2E07

5E02

27n

RE

S

3E39

RE

S

RE

S

2E54

10p

RES

3E65 10K

15p

2E59

RE

S

FE33

27n

5E04

RE

S

2E09

15p

RE

S

FE27

100n

2E52

2E56

15p

RE

S

RE

S

3E29

15p

2E08

+3V3

RE

S

10K3E35RES

RES10K3E71

FE34

RE

S

3E27

2E05

15p

RE

S

RES

10K3E64

3E66

10K

RE

S

IE07

FE58

3435

3637

54

7E10-2LAN8710A-EZK

2425

21

2829

27 16 12

33

1098

26

13

3031

20

2223

18

3

2

1716

32

19

7

11

LAN8710A-EZK7E10-1

15

14

IE33

4n7

2E53

+3V3-ET-ANA

+3V3-ET-ANA

+3V3

IE06

9E43

RE

S27

n

5E01

+3V3

3E3410K +3V3

+3V3-ET-ANA

IE50

3E53-27 2

IE39

47RFE57

100n

2E49

1E71

502382-0370

123

5 4

RE

S

16V

6E47

-22

7

RES

CD

A5C

16G

TH

1%49

R9

3E22

3

BZ

X38

4-C

5V1

6E44

3E53-3

47R

6

45

36

CD

A5C

16G

TH

RE

S

16V

6E47

-4

RE

S

16V

6E47

-3

CD

A5C

16G

TH

RES10K3E68

IE38

RE

S

10K

3E67

1%49

R9

3E95

ACM20121E87

14

23

FE61

FE60

2E62

10u

+3V3

3E28

RE

S

3E99

49R

9 1%

ACM20121E88

14

23

8 1

47R

3E53-15E08

30R

1%

3E25

49R

9

FE30

FE29

FE28

3E51 1K5

1E85

1E86

1E70NX3225GA

25M

FE32

2E48

10u

8910

1112

1N00

1234567

5450-323-183-H3

9E42

18

RE

S

5E03

27n

CD

A5C

16G

TH

6E47

-1

RE

S

16V

22n

2E60

2E55

10p

IE63

2E66

100n

3E98

22R

3E30

1M0

3E7210K

3E40

12K

1 1%

IE49

+3V3-ET-ANA

FE56

IE26

3E53-4

47R

5 4

+3V3

13

3E26

22R

MSJ-035-29D PPO (PHT)

1E062

IE64

FE31

ETH-TXN

ETH-TXP

ETH-RXN

ETH-RXP

RXD1-MIPS

TXD1-MIPS

RXD1-MIPSTXD1-MIPS

ETH-RXDV

ETH-RXER

ETH-RXCLK

ETH-TXD(3)

ETH-TXEN

ETH-TXNETH-TXP

ETH-INTSEL

ETH-REGOFF

ETH-RXD(0)ETH-RXD(1)ETH-RXD(2)ETH-RXD(3)

ETH-RXNETH-RXP

ETH-TXCLK

ETH-TXD(0)ETH-TXD(1)ETH-TXD(2)

ETH-COL

ETH-CRSETH-TXER

ETH-REGOFF

ETH-INTSEL

ETH-MDCETH-MDIO

RESET-ETHERNETn

Page 98: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 98Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

HDMI

19100_032_110210.eps110211

HDMIB04D B04D

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

CEC_A

(CBUS) HPD2R2PWR5V

DSDA2DSCL2

DSCL3DSDA3

R3PWR5V(CBUS) HPD3

(CBUS) HPD0R0PWR5V

DSDA0DSCL0

NP

DSCL1DSDA1

R1PWR5V(CBUS) HPD1

VCC33

SB

VC

C33

MIC

OM

_VC

C33

EPAD

R3XC

NP

R3X0

NP

R3X1

NP

R3X2

TX2

NP

TX1

NP

TX0

NP

TXC

VIA

R4PWR5V

DSCL4DSDA4

CEC_D

NP

TPWR_CI2CA

RSVDL

CSDACSCL

INT

NP

R0X1

NP

R0X2

NP

R1XC

NP

R1X0

NP

R1X1

NP

R1X2

NP

R2XC

NP

R2X0

NP

R2X1

NP

R2X2

NP

R0XC

NP

R0X0

NON-INSTAPORT

3ECF

9187B

7EC1

INSTAPORT

I2C Address

9187A

HDMI CONNECTOR 2

HDMI CONNECTOR 1

4 × 3K3

3ECN

4 × 100K

HDMI CONNECTOR 3

SII9187B = 0xB2

100K

3K3

4 × 100K9287B

4K7

3ECJ

100K

NON-INSTAPORT

RES

VGA-SDA-EDID-HDMI

4 5

RE

S2E

CW

10u

3ECN-33 6

3ECN-4 100K

2 7

100K

3ECN-2 100K

1u0

2ECU

81

100K

3ECF

47K

3EC

1-1

47K

3EC

A-1

18

72

36

3EC

A-2

47K

4 5

3EC

A-3

47K

10R

3ECM-4

FECZ

FECY

100n

2EC

8

2EC

7

100n

100n

7E02BC847BW

2EC

6

IE12

RES

IE11

IE66

2EC

1

220u

16V

RE

S

FEC0

2EC

C

10p

30R

5EC2

9EC2

RES9EC3

RES

100R100R3EC3

3EC5

8

FECR

100K3ECN-11

3ECM-1

10R

1 8

10R

3ECM-22 7

3 6

2 7

3ECM-3

10R

+3V3

10K

3ECU-2

+5V-EDID

4R7

3ECG

+5V-EDID

+5V-VGA

VGA-SCL-EDID-HDMI

CIN-5V

DIN-5V

10u

2EC

V

3ECH

6

AIN-5V

10K

3EC

1-3

47K

3

10K

36

18

3EC

P-3

10K

3EC

P-1

100n

+3V3

2EC

3

IE65

FEC3

IE45

IE43

IE44

+3V3

5EC0

30R

2EC

0

100n

IEC4

+3V3-HDMI

7EC0

FECG

BC847BW

CIN-5V

2ECP1u0

2ECM1u0

MICOM-VCC33

22K

3E23 +3V3-STANDBY

54

RES

47K

3EC

A-4

BIN-5V

BIN-5V

FECN

AIN-5V

FECM

FECLFECK

FEC4

IEC7

FEC5

IEC5

IEC6

FEC6

6EC1

BAT54

FEC7

+5V

30R

5EC3RES

IE42

FECA

3ECU-4

10K

4 5

212223

19

23456789

20

1

101112131415161718

1P04

BIN-5V

FECW

1u0 2ECQ

MICOM-VCC33

+3V34K7

3ECL

3ECK

4K7

RES

RES

FECEFECF

BIN-5V

FECD

AIN-5V

FECJ

89

20212223

171819

234567

1

10111213141516

1P02

FECB

1u0

+3V3-STANDBY

2EC

2

3ECE 22K

9EC0

100R

3ECD

7980818283848586878889

75767778

60

5958

5756

6362

9 27 64

74

2526

1920

49

1028

38

55

61

16

1718

1112

46

2122

2324

56

78

12

42

1314

15

68

6970

7172

6566

36

34

48

29

33

39

43

47

73

52

37

32

67

41

45

50

51

5453

30

34

40

44

7EC1SII9187B

31

35

1u0 2ECN

FECC

3456789

20212223

10111213141516171819

2

1P03

1

AIN-5V

FECP

CIN-5V

CIN-5V

2EC

Y

10p

RE

S10

p

2EC

XR

ES

FEC2FEC1

eHDMI+

ARC-eHDMI+

DDCA-SDA

DDCA-SCL

PCEC-HDMI

SCL-SSBSDA-SSB

CEC-HDMI

DRX-HOTPLUG

BRX-DDC-SCLBRX-DDC-SDA

CRX-DDC-SCLCRX-DDC-SDA

ARX-DDC-SCLARX-DDC-SDA

DRX-DDC-SCLDRX-DDC-SDA

ARX-HOTPLUG

BRX-HOTPLUG

CRX-HOTPLUG

HDMIA-RXC-

HDMIA-RX0-

HDMIA-RX1-

HDMIA-RX2-

HDMIA-RXC+

HDMIA-RX0+

HDMIA-RX1+

HDMIA-RX2+

DRX0+DRX0-

DRX1+DRX1-

DRX2+DRX2-

DRXC+DRXC-

BRXC+BRXC-

CRX0+CRX0-

CRX1+CRX1-

CRX2+CRX2-

CRXC+CRXC-

ARX2+ARX2-

ARXC+ARXC-

BRX0+BRX0-

BRX1+BRX1-

BRX2+BRX2-

ARX0+ARX0-

ARX1+ARX1-

ARX-DDC-SDAARX-DDC-SCL

BRX-DDC-SCLBRX-DDC-SDA

CRX-DDC-SCLCRX-DDC-SDA

PCEC-HDMI CEC-HDMI

ARX2+

ARXC+

ARXC-PCEC-HDMI

ARX-DDC-SCLARX-DDC-SDA

ARX-HOTPLUG

ARX2-ARX1+

ARX1-ARX0+

ARX0-

CRX2+

CRXC+

CRXC-PCEC-HDMI

ARC-eHDMI+CRX-DDC-SCLCRX-DDC-SDA

CRX-HOTPLUG

CRX2-CRX1+

CRX1-CRX0+

CRX0-

BRX2+

BRXC+

BRXC-PCEC-HDMI

BRX-DDC-SCLBRX-DDC-SDA

BRX-HOTPLUG

BRX2-BRX1+

BRX1-BRX0+

BRX0-

Page 99: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 99Q552.2E LA 10.

2011-Feb-18 back to div. table

Headphone

19100_033_110210.eps110211

HeadphoneB04E B04E

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VIAGND_HS

VOIN-

VDD

1

SHUTDOWN

BYPASS

2

GND

2

1

1 8

IEE8

3 6

3EE2-1

33R

2 7

3EE2-3

33R

5

3EE2-2

33R

3EE2-4

33R

4

4V 100u

2EE7

IEE7

4V 100u

2EE6

36

3EE

1-2

27

3EE

1-3

22K

22K

PUMD127EE0-25

3

4

2

6

1

+3V3-STANDBY

PUMD127EE0-1

FEE0

IEE5

3EE1-44 5

IEE2

22K

IEE0

10K

3EE0-33 6

2EE5

2EE0

47p

IEE6

47p

IEE1

1 8

10K

5 4

3EE1-1

22K

10K

8 1

3EE0-4

3EE0-1

1u0

2EE2

3EE

3

22K

RE

S

+3V3

2EE

1

100n

IEE3

IEE4

2EE3

1u0

1

71u0

2EE4

3

4 9

2

6

5

8

1011

TPA6111A2DGN7EE1

AMPLIFIERΦ

FE35

FE36

A-STBY

AMP2

AMP1

ADAC(4)

ADAC(3)

A-PLOP

RESET-AUDIO

A-PLOP

Page 100: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 100Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

10-5 B05 393912364954DDR

19100_034_110210.eps110210

DDRB05A B05A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

4567

2

0

VSSDLVSS

123

CSRAS

NU|RDQS

CKE

DQS

ODT

1

012345678910111213

NC

VDDQ

DQA

CK

VSSQ

BA

CASWE

0

DM|RDQS

VREFVDDLVDD

4567

2

0

VSSDLVSS

123

CSRAS

NU|RDQS

CKE

DQS

ODT

1

012345678910111213

NC

VDDQ

DQA

CK

VSSQ

BA

CASWE

0

DM|RDQS

VREFVDDLVDD

4567

2

0

VSSDLVSS

123

CSRAS

NU|RDQS

CKE

DQS

ODT

1

012345678910111213

NC

VDDQ

DQA

CK

VSSQ

BA

CASWE

0

DM|RDQS

VREFVDDLVDD

4567

2

0

VSSDLVSS

123

CSRAS

NU|RDQS

CKE

DQS

ODT

1

012345678910111213

NC

VDDQ

DQA

CK

VSSQ

BA

CASWE

0

DM|RDQS

VREFVDDLVDD

AT T-POINT

100n

2B25

2B41

47u2B

40

8

47u

3B05-133R

1

3B04-333R

3 6

1 833R

3B10-1

RES3B06240R

3 633R

3B05-3

33R3B18

100n

2B14

2B13

100n

3B04-4 4 533R

DDR2-VREF-DDR

100n

2B01

100n

2B12

2B42

47u

47u

2B43

2B09

100n

2B10

100n

33R

3B10-22 7

100p

2B39

4 533R

3B07-4

100n

2B26

100n

2B06

240R

3B22

RES3B09240R

2B00

100n

6

DDR2-VREF-DDR

33R3B07-33

100n

2B29

2 733R

3B07-2

+1V8

240R

3B27

3B04-2

33R2 7

+1V8

3 63B11-333R

100n

2B19

FB00

2B24

100n

100n

2B30

33R2 73B08-2

100n

2B16

33R

DDR2-VREF-DDR

3B16

100n

2B20

J1 K9

E7

A7

B2

B8

D2

D8

F3

L1 H9

E1

A9

C1

C3

C7

C9

E2

A3

E3

B9

B7A8

L3L7

A2

F9

F7

A1

E9

F8

G8

B3

C8C2D7D3D1D9B1

J3J7K2K8K3

G2G3G1

G7

E8

F2

H8H3

H2K7L2L8

H7J2J8

D2

D8

F3

ΦSDRAM

7B02EDE1108AGBG-1J-F

C7

C9

E2

A3

E3 J1 K9

E7

A7

B2

B8

A2

F9

F7

A1

E9

L1 H9

E1

A9

C1

C3

D7D3D1D9B1B9

B7A8

L3L7

G3G1

G7

E8

F2F8

G8

B3

C8C2

L2L8

H7J2J8J3J7K2K8K3

G2

SDRAM

7B03EDE1108AGBG-1J-F

H8H3

H2K7

K9

E7

A7

B2

B8

D2

D8

F3

Φ

H9

E1

A9

C1

C3

C7

C9

E2

A3

E3 J1

B7A8

L3L7

A2

F9

F7

A1

E9

L1

G8

B3

C8C2D7D3D1D9B1B9

J7K2K8K3

G2G3G1

G7

E8

F2F8

H8H3

H2K7L2L8

H7J2J8J3

ΦSDRAM

7B00EDE1108AGBG-1J-F

2B472p2RES

RES2p2

2B46

8 3B02-133R

12 7

3 6

3B02-233R

4 5

33R3B02-3

33R3B02-4

3B1433R

100n

33R3B05-44 5

2B23

RES

+1V8

240R3B01

100n

2B04

2p22B45 RESRES

8

2B442p2

3B08-133R

1

4 53B10-433R

2B33

100n

2B32

100n10

0n

2B22

180R

1%

3B20

2 733R

3B00-2

33R1 83B07-1

3B11-22 76

33R

3B10-3 33R 3

2B38

100p

100n

2B34

2B27

100n

RES3B03240R

3B19

33R

3B00-433R

4 5

2B07

100n

2 733R 3B05-2

100n

2B21

3B13

33R

2B05

100n

6

DDR2-VREF-DDR

3B08-333R

3

33R3B12

2B02

100n

33R1 8

100n

3B04-1

2B28

100p

2B37

3B25

33R

3B23

33R

100n

2B11 10

0n2B

17

33R3B00-11 8

3B11-433R

4 5

+1V8

E7

A7

B2

B8

D2

D8

F3

A9

C1

C3

C7

C9

E2

A3

E3 J1 K9

A8

L3L7

A2

F9

F7

A1

E9

L1 H9

E1

B3

C8C2D7D3D1D9B1B9

B7

K2K8K3

G2G3G1

G7

E8

F2F8

G8

H8H3

H2K7L2L8

H7J2J8J3J7

Φ

7B01

SDRAM

EDE1108AGBG-1J-F

100n

2B18

2B08

100n

DDR2-VREF-DDR

240R

3B28

33R

3B17

3B24

33R

3B26

33R

3B00-33 633R

100n

2B31

2B15

100n

3B11-11 8

33R

100p

2B36

R08 1%1

3B21

2B35

100n

2B03

100n

33R

3B15

33R3B08-4 4 5

+1V8

DDR2-D22

DDR2-D17

DDR2-D20DDR2-D19

DDR2-CLK_P

DDR2-CLK_P

DDR2-CLK_P

DDR2-CLK_P

DDR2-D14

DDR2-D9

DDR2-DQM0

DDR2-ODT

DDR2-DQM1

DDR2-ODT

DDR2-CLK_N

DDR2-CLK_N

DDR2-BA0

DDR2-CLK_P

DDR2-A12DDR2-A11DDR2-A10DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2DDR2-A1DDR2-A0

DDR2-DQM2

DDR2-ODT

DDR2-DQM3

DDR2-ODT

DDR2-A14

DDR2-CSDDR2-CKE

DDR2-CASDDR2-A14

DDR2-CLK_N

DDR2-A13

DDR2-BA2DDR2-BA1 DDR2-BA0

DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2

DDR2-A13DDR2-A12DDR2-A11DDR2-A10

DDR2-A1DDR2-A0

DDR2-WE

DDR2-RAS DDR2-CS

DDR2-CLK_NDDR2-CKE

DDR2-CLK_P

DDR2-CAS

DDR2-BA2DDR2-BA1

DDR2-CS

DDR2-CLK_NDDR2-CKE

DDR2-CLK_P

DDR2-CAS

DDR2-BA2DDR2-BA1DDR2-BA0

DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2

DDR2-A14

DDR2-A13DDR2-A12DDR2-A11DDR2-A10

DDR2-A1DDR2-A0

DDR2-WE

DDR2-RAS

DDR2-A13DDR2-A12DDR2-A11DDR2-A10

DDR2-A1DDR2-A0

DDR2-WE

DDR2-RAS

DDR2-CAS

DDR2-BA2DDR2-BA1DDR2-BA0

DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2

DDR2-A14

DDR2-WE

DDR2-RASDDR2-CS

DDR2-CLK_NDDR2-CKE

DDR2-D30DDR2-D31

DDR2-DQS3_PDDR2-DQS3_N

DDR2-D27DDR2-D26

DDR2-D10DDR2-D11

DDR2-D18DDR2-CLK_N

DDR2-D16

DDR2-D21

DDR2-D23

DDR2-DQS2_PDDR2-DQS2_N

DDR2-D24DDR2-D25

DDR2-D28DDR2-D29

DDR2-DQS0_PDDR2-DQS0_N

DDR2-D8

DDR2-D12DDR2-D13

DDR2-D15

DDR2-DQS1_PDDR2-DQS1_N

DDR2-D0DDR2-D1DDR2-D3DDR2-D2DDR2-D4DDR2-D5DDR2-D6DDR2-D7

Page 101: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 101Q552.2E LA 10.

2011-Feb-18 back to div. table

10-6 B06 393912364954Display interfacing-Vdisp

19100_035_110210.eps110210

Display interfacing-VdispB06A B06A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

T

+VDISP-INT

For Development use only

IG11

A0.3 V23

1G03

RES

1G00

T V23A0.3

2G44

22u

RE

SLTST-C190KGKT

RES6G00

RES3G28

2K2

FG0H

5G02

30R

30R

5G01

RES

100nRES

+VDISP

2G43

Page 102: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 102Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Video out - LVDS

19100_036_110210.eps110211

Video out - LVDSB06B B06B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

TO DISPLAY

TO DISPLAY

EM

C

EM

C

EM

C

RES

EM

C

FG1F

FG1ZFG1Y

FG1WFG1UFG1T

FG1RFG1S

FG35FG2R

3G38 100R

56 5758 5960

RES

51

6789

52

61

5354 55

414243444546474849

5

50

313233343536373839

4

40

212223242526272829

3

30

1213141516171819

2

20

1G51

FI-RE51S-HF

1

1011

FG2M

FG2K

FG1A

FG2G

FG2L

FG2H

FG2F

4950

FG34

789

42

51

4344 4546 4748

3536373839

4

4041

56

2526272829

3

3031323334

16171819

2

2021222324

1

101112131415

1G50

FI-RE41S-HF

FG1K

FG27

FG1Q

FG1H

FG18

FG15

FG2DFG2C

FG32

FG2A

FG1J

FG11FG25FG24

FG22

FG20

47p

2G75

FG1V

47p

2G26

FG16

FG14FG13

3G33

10K

FG04

RE

S

FG1BFG2P

RES 9G0G

FG21

2G99 47p

2G98 47p

FG26

FG28

FG2J

FG1P

RES 100R3G2Z

3G2W 100R

FG1NFG1M

FG1G

FG2E

FG1E

FG1C

FG2B

FG1L

FG30FG31

47p

2G79

2G7A

47p

FG23

FG29

2G77

2G76

47p

47p

RES 3G30 100R

47p

2G25

47p

2G24RE

S3G

3510

K

47p2G29

FG12

FG2N

2G27

47p

100R3G37

3G36 100R

RES

FG33

+VDISP

RES100n2G95

REF EMC HOLE1X05

47p2G97

100R3G2Y

2G94 100n

100n2G93

FG19

FG17

3G31RES 100R

FG1D

+VDISP

9G0K

-11

8

+3V3

2G78

47p

36

9G0K

-22

7

45

9G0K

-39G

0K-4

2G96 47p

10K

3G34

RES 3G32

RE

S

100R

2G9F

100n

100n

2G9E

RE

S

100n

RE

S

100n

2G9D

RE

S2G

9C

RE

S

2G92 100n

2G28 47p

2G91

100n

3D-VS-DISP

CTRL-DISP

3D-LR

CTRL-DISP

BACKLIGHT-BOOST

PX2C+PX2C-

CTRL-DISPCTRL-DISP

SCL-DISPSDA-DISP

PX1B-PX1B+PX1C-PX1C+

PX1CLK-PX1CLK+

PX1D-PX1D+PX1E-PX1E+

PX2A-PX2A+PX2B-PX2B+

PX1A-PX1A+

PX4E-PX4E+

PX2CLK-PX2CLK+

PX2D-PX2D+PX2E-PX2E+

PX3CLK+PX3CLK-

PX3D+PX3D-

PX3E-PX3E+

PX3B+PX3B-

PX4C+PX4C-

PX4CLK+PX4CLK-

PX3A+PX3A-

PX3C+PX3C-

PX4D-PX4D+

PX4A+PX4A-

PX4B+PX4B-

Page 103: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 103Q552.2E LA 10.

2011-Feb-18 back to div. table

AmbiLight CPLD

19100_037_110210.eps110211

AmbiLight CPLDB06C B06C

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

TMSTDOTDITCK

GND

VCCINT VCCIO

DEBUG ONLY

DEBUG ONLY

FGA5FGA4

2GA

0

1u0

33R3G1310R3G12

FGA1

FGA0

10p

2G14

RE

S

+3V3

RE

S2G

13

10p

+3V3

4 5

IGA2

100R3GA2-4

8 13G11-1 33R

100n

2GA

5

3G10-4 33R4 5

9GA0

+3V3

VINT

27

2GA

2

100n

3GA

6-2

330R

2GA

4

100n

RE

S

LTS

T-C

190K

GK

T

6GA

1

FGA2

+3V3

RES

123456

IGA3

1G36

SD51022

27

IXO4_2828

1192410

15 35 26

IXO3_77

IXO3_88

IXO4_1919

IXO4_2020

IXO4_2121

IXO4_2222

IXO4_2323

IXO4_2738

IXO3_12 12

IXO3_1313

IXO3_1414

IXO3_16 16

IXO3_1818

IXO3_55

IXO3_66

29

IXO2_3030

IXO2_3131

IXO2_3232

IXO2_33|GSR33

IXO2_34|GTS234

IXO2_36|GTS136

IXO2_3737

IXO2_38

IXO1_33

IXO1_3939

IXO1_4040

IXO1_4141

IXO1_4242

IXO1_43|GCK143

IXO1_44|GCK244

IXO2_29

4 17 25

IXO1_1|GCK31

IXO1_22

XC9572XL-10VQG44C01007GA0

Φ

100n

2GA

1

5

1u0

2GA

3

3GA5-4100R

4

100R3GA5-3 3 6

18

5

330R

3GA

6-1

3GA

6-4

330R

4

3GA2-1 100R1 8100R3GA2-2 2 7

30R

5GA0+3V3

FGA6

2

6

1

30R

5GA1

3

4

7GA1-1BC847BS(COL)

7GA2-2BC847BS(COL)

5

456

IGA1

SD51022

123

RES1G37

100R3GA5-1 1 8

LTS

T-C

190K

GK

T

6GA

3

10p

2GA

6

RE

S

10K

3GA

4

RE

S

3GA147R

10p

2G12

RES

RE

S

RE

S2G

11

10p

2G10

RE

S

10p

3G14 33R

33R3GA3

1

VINT

BC847BS(COL)7GA2-12

6

3GA5-2100R

2 7

2G18

RE

S2G

19

10p

RE

S

10p

VIO

56

7 8

RES9GA1

1G351234 FGA3

RES

+3V3

+3V3

7GA1-25

3

4

+3V3

BC847BS(COL)

3G15 10K

3 633R3G11-3

33R3G10-11 8

10p

10p

2G16

RE

S2G

17

RE

S

6GA

2

LTS

T-C

190K

GK

T

+3V3

330R

3GA

6-3

36

+3V3

33R3G11-27 2

2 73 6

3G10-2 33R33R3G10-3

6GA

0

LTS

T-C

190K

GK

T

RE

S2G

15

10p

VIO

3 63GA2-3 100R

CPLED2

CPLED3

GCK23D-VS-DISP

AMBI-SPI-CS-EXTLAMPSnAMBI-SPI-CS-OUTn_R2AMBI-LATCH1_G2

BACKLIGHT-PWM

BACKLIGHT-PWM_BL-VS

AMBI-PROG_B1AMBI-BLANK_R1

AMBI-SPI-CLK-OUTAMBI-SPI-SDI-OUT_G1

AMBI-SPI-SDO-OUTAMBI-LATCH2_DIS

GSR

GTS2GTS1GCK3

GSR

AMBI-PWM-CLK_B2

GTS2

GTS1

GCK3

BL-SPI-SDIBL-SPI-CSn

BL-SPI-CLK

PNX-SPI-CSBn

3D-LR

AMBI-SPI-CLK-OUT-RAMBI-SPI-SDI-OUT_G1-R

AMBI-SPI-SDO-OUT-R

BACKLIGHT-PWM BACKLIGHT-PWM_BL-VS

PNX-SPI-SDIPNX-SPI-CLK

PXCLK54GCK2

AMBI-SPI-CS-OUTn_R2-R

AMBI-TEMP

GSRGTS2GTS1

CPLED3CPLED2

BL-SPI-SDO

GCK3

PNX-SPI-CS-BLnPNX-SPI-SDO

Page 104: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 104Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

SPI buffer

19100_038_110210.eps110211

SPI bufferB06D B06D

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

G3

12

3EN23EN1

∗∗

Buffer

Direct∗

3GE4

47R

RES47R3GE3

9GE1

9GE0-4 ∗∗5 4

3

9GE2 ∗

7 2

9GE0-36

9GE0-2

IGE0

IGE1

47R3GE1-45 4

1 8

RES

6 3 47R

3GE0-1

3 6

R74 SER3GE1-3

47R

3GE0-3

10K

3GE2

+3V3

7GE1PDTC114EU

+3V3

100n

2GE

0

131211

1

10

19

20

456789

18

17161514

7GE074LVC245A

2

3

PNX-SPI-SDI

BL-SPI-CSn

PNX-SPI-SDO

PNX-SPI-CLK BL-SPI-CLK

BL-SPI-SDO

PNX-SPI-SDI

PNX-SPI-CSBn

BL-SPI-SDI

BL-SPI-CLK

AMBI-SPI-CLK-OUT-R

PNX-SPI-CLK

PNX-SPI-SDO

AMBI-SPI-SDI-OUT_G1-R

BL-SPI-SDO

AMBI-SPI-SDO-OUT-R

BL-SPI-SDI

PNX-SPI-CS-BLn

Page 105: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 105Q552.2E LA 10.

2011-Feb-18 back to div. table

10-7 B07 393912364954DVBS-FE

19100_039_110210.eps110210

DVBS-FEB07A B07A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

6543

DISEQCOUT1

TRST

VS

FSKRX_INFSKRX_OUT

13121110

9

XTALI

XTALO

DIRCLKCLKICLKI2CLKOUT27

P

345

N

012

ERRORDPN

STROUTCLKOUT

76

PQ1

RESETB

I1

TMS

01

CS

NC

GPIO

21

SCLTSDAT

1

TDOTDITCK

AGCRF1

D

10

COMPSTDBY

SCLSDA

87

DISEQCIN1

N

NC

VIA

VDDA2V5

VDDA1V0

GNDA

GND_HS

VDD1V0

VDD3V3

VCO

XTAL_OUT

VIA

IP

NC

RF_OUT

QNQP

IN

RF LNA LT MIX DIG BB SYN HS

GND

VCOLNA LT MIX DIG BB SYNVSS

XTAL_IN

XTAL_CMD

SCLSDA

AGC

AS

RF_IN

NC

NC

NC

I2C-ADDRESS : C6

NC

NC

NC

* To be drawn near PNX85500

*

NC

NC

NC

NC

*

*

NC

NC

NC

I2C-ADDRESS : D0

NC

NC

NC

NC

NC

NC

NC

NC

NC

*

NC

NC

NC

NC

NC

NC

NC

NCNC

NC

NC

NC

NC

NC

NC

2R46

100n

2R5347n

FR07

2R05

10n

9R04

IR02

IR01

2R09

100n

2R34

1n0

100n

2R17

2

4

1

3

1R10NX3225GA

16M

2R40

100p

3R09

1K0

1 89R03-1

RE

S

6p8

2R20

52122

124

97

19

98

18

58

75

2623242927

8384868789909194

87

62

12

82

95108109111115116119120

3055

5049474644433735

11

59

12820

7879

126107

101

3432

56

6364656768707173

16

104103

74

100

4041

60

7R01-1

STV0903BAC

MAINΦ

100n

2R00

27n

5R02

FR06

RE

S3R

14

10K

RES9R02

2R28

10n

u0 22V3 . 6

2R27

6R00

SM

15T

3R02

3R08-2 100R2 7

1K0

RE

S

10K

3R15

0p56

2R62

100n

2R04

+3V3-DEMOD

+3V3-DVBS10K

3R11

1K0

3R10

1

1R01

2R26

100n

100n

2R25

FR04FR03

+3V3RF

2R07

100n

+3V3RF

100n

2R12

FR00

2R52

10n

47R3R0447R3R03

IR05

165

133134135136137138

156157158

132

159160161162163164

145146147148

131

149150151152153154155

118123127

130

139140141142143144

76809296106

23

5913114

22252831333639

213854

17

778185889399102105110112

42454851535761666972

146

1014

113117121125

129

15 ΦPOWER_VIA

STV0903BAC7R01-2

IR08

RES

1n02R21

9R00

RES

2R10

100n

10p

2R37

2R38

10p

2R43

27p

100p

2R45

2R49

100n

10n

2R03

100n

2R19

10n

2R01

+3V3RF

100n

2R02

22u

2R16

+3V3-DVBS30R

5R00

2R32

1n0

RES 2R23 47p

100R3R08-33 6

2R13

10n

47pSER 22R2

100R 3R003R01100R

FR05

2R61

10u

3R12

4R7

1n0

2R35

10n

2R14

10n

10n

2R11

2R08

2R18

100n

+1V-DVBS

+1V-DVBS

+1V-DVBS

+3V3-DEMOD

47R3R0647R

2R39

10p

3R05

IR04

3R07

120K

IR07

2 7

100n

2R15

9R03-2

1n0

2R31

1n0

2R29

100n

2R06

10u

5R01

3839404142

1

30

31

32

14 72 821186

3435363723

24

2021

5

4

7

1213

22

33513 9 10 2925 26

1918

ΦSATELLITE

TUNER

STV6110AT7R02

2

16

17

2R24

100n

1 8

+2V5-DVBS

+1V-DVBS

100R3R08-1

+3V3RF

+3V3-DVBS

IR06

10K

3R13

2R56

10p

FR02

FR01

10p

2R55

IR03

10p

2R41

2R51

10n

IR00

1n0

2R33

9R03-44 5

100n

2R48

2R47

100n

3R08-4 100R4 5

10p

2R54

2R50

10n

AGC

QPQM

IPIMSCLT

SDAT

XTAL

LNB-RF1

SDA-SSB

AGC

TS-DVBS-VALID

TS-DVBS-CLOCKTS-FE-SOP

TS-FE-VALID

TS-FE-DATATS-FE-CLOCK

F22-DISECQ-TX

DISECQ-RX

QMQP

IMIP

RESET-DVBS

SCLTSDAT

SENSE+1V0-DVBSXTAL

TS-DVBS-DATA

TS-DVBS-SOP

DISECQ-DET

SCL-SSB

Page 106: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 106Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

10-8 B08 393912364954DVBS supply

19100_040_110210.eps110210

DVBS supplyB08A B08A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

GND

VIN

P SHA

INH

SYNC

SW

VFB

A

SW

COM

OUTIN

VIA

NI TUO

INH BP

COM

PVDD1 PVDD2

EN1SW1BOOT1

SW2

FB2EN2

BOOT2

FB1

ILIM2SEQBP

GND GND_HS

VIA2

1 6

5T01

2u0

4 9

2

8

7

5 3

22u

7T00-1ST1S10PH

2T01

5T00

30R

3T01

22K

RE

S

IT27

47K

3T03

IT06

IT07

IT16

IT15

IT05

IT04

3T16

47K

3K3

3T15

RES

+V-LNB5%

3K3

3T13

RE

SR

ES

2T30 22

n

RE

S3T

09

3K3

RES

2T34

22n

2T28

22n

RES

RE

S 22n

1n0

2T31

2T26

1n0

2T21

SS

24

6T03

2T23

+V-LNB

6T04

SS

24

+5V-DVBS

10u

2T38

4u7

RE

S

220n

IT24

2T16

FT08

IT26

2T15

220n

IT21

IT23

IT19

2T09

10n

5%RES

47K

3T12

2T36

4n7

2T06

100n

BAS316

6T00 RES

+5V-DVBS

IT30

1n0

2T03

RE

S

4n7

2T10 RES

22u

2T04

2T05

14

15

22u

ST1S10PH7T00-2

10

11

12

13

2T02

22u

2T00

22u

2T12

22u

16V

7T02LD1117DT33

1

3 2

3T21

1K0 1%

IT10

IT12

10u

2T35

IT29

IT09

RES

3T28

100K

3T26

10KRES

3T25

330K

3T24

15K

RE

S

3T23

33K

10nRES

2T43

100n

2T42

2T41

1n0

2T40

220p

2T39

3R3

3T10

1u0

4u7

2T37

RE

S

2T27

1n0

FT07

IT17

IT22

IT20

RE

S3T

31

10K

FT04

100u

25V

3T29 1K0

RE

S2T

22

47n

2T13

30R

5T02

+3V3-DVBS

RESRES

BAS316

6T02

+2V5-DVBS

6T01

BAS316

IT03

FT06IT01

0K1 %1

3T00 RES

3K3

%1

3T02

IT18

IT02

IT00

+2V5-DVBS

+3V3-DVBS

100u

35V

u001V53

2T14

2T17

47n

2T20

1u0

2T08

IT32

2

1

3

5

2T11

100n

7T01LD3985M25

4

100n

5%

2T07

+1V-DVBS

18K

3T20

4u7

2T29

RE

S

2T33

22u

RE

S

22u

RE

S

FT05

2T32

5T03

33u

2T18

220u 2T

19

22u

FT00

16V

+5V-DVBS

2T24

10u

33K

3T19

RE

S

IT25

1n0

2T25

3T05

22R

22R

3T11

3R3

3T04

IT11

IT14

+5V-DVBS

IT13

13V

6T05+24V

IT08

BZX384-C 2K2

3T14

1K0

3T17

100K

3T06

+24V

5

3

4

2

6

1

BC847BS(COL)7T04-2

BC847BS(COL)7T04-1

10K

3T08

10K

3T07+3V3

+24V

3T18

3K3

5%

2526

1718192021222324

8

4 15

9

1 14

10

213

16

ΦTPS54283PWP

7T03

2 13

11

5 67

33u

5T04

SENSE+1V0-DVBS

SENSE+1V0-DVBS

V0-CTRL

Page 107: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 107Q552.2E LA 10.

2011-Feb-18 back to div. table

DVBS supply

19100_041_110210.eps110211

DVBS supplyB08B B08B

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

VIA

VIA

VIAVIA

Φ

LX

NC

ISEL

VORX

VOTX

DSQOUT

VC

C_L

VC

C

BYP

SCLSDA

ADDR

DETIN

DSQIN

EXTM

TTX

VCTRL

VUP

A_G

ND

P_G

ND

GN

D_H

S

ST

PS

2L30

A

6T51

+12V

+V-LNB

220n

2T53

IT64

9T51

5T51

3T56

10K

30R

2T58

470n

RES9T52

10K

3T60

+12V

RES

IT63

IT61

2T56

2T51

100n

470n

IT59

+12V

2T57

100u

IT52

RES

35V

RES 5T50

22u

IT65

RS

1D

6T53

2T52

220n

IT56

IT62

3T58

2K2

3T52

22K

RES

41 42

45T6 SER

BAS316

7T50-2LNBH23Q

343536

37 38

3940

10K

3T57 RES

IT50

IT53

BA

T54

CO

L

6T50

2K2

3T59

RE

S

9T50

1R0

3T62

RES

14

19 18

30

21

22

27

78

16172324

5

96

33

28

4

1

25263132

23

10

20

15

29

1121

13

7T50-1LNBH23Q

2T54

10n

RES

3T53

15R

6T55

RS

1D

100R

IT28

3T61

3T51

100R

2T59

470n

22R

3T27

RE

SR

ES

150R

3T54

u0 01V 53

2T55

RES

BC817-25W7T51

3T22

220R

+3V3-DVBS

RES3T55

10K

u0 01V 53

2T50RES

IT68

IT69

6T52 RES

ST

PS

2L30

A

3T50

100R

IT55

RE

S

1n0

2T61

IT66

IT54

IT51 220u

5T52

2T62

IT60

RE

S

10n

IT57

IT58

10u

2T60IT67

+3V3-DVBS

DISECQ-DET

SCL-SSB

SDA-SSB

DISECQ-DET

F22-DISECQ-TX

LNB-RF1

LNB-RF1

DISECQ-RX

V0-CTRL

Page 108: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 108Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

10-9 B09 393912364954Connectors comp

19100_042_110210.eps110210

Connectors compB09A B09A

2010-12-104

3139 123 6495SPB SSB TV5502K11 4DDR EU

TO

HOTEL TV

Dreamcatcher

SENSOR

LED PANEL

NC

RESERVED

TEMPERATURE

FC83

RES FC983C82

100R

RES9C03RES9C02RES9C01

RE

S

RES9C00

63V

T

1C85

1.0A

100R

3C77

30R

5C55

RE

S

IC75

6C05

BZ

X38

4-C

5V6

28

IC78

26

3456789

27

16171819

2

202122232425

1M59

FH34SJ-26S-0.5SH(50)

1

101112131415

FC92

100n

2C95

RE

S

A0.2 V36T

1C87

1u0

2C91

RES

∗RES

100R

3C91

RE

S2C

86

10p

100n

2C70

3C81

+3V3

RES

100R

RE

S

10p

2C89

RE

S2C

88

10p

RE

S

10p

2C87

2C82

100p

GND_AL

V-AMBI

100R

3C75

FC78

FC84

3C83

100R3C70

RES

100R

RES

RE

S

100n

2C96+12V_AL

3C74

100K

+3V3

RES

+3V3

2C93

47n

10K

3C90∗RES

FC89

FC70

12345678

1M19

1u0

2C85

+24V

FC72

RE

S

100R

RES

1C86

2.0A 63VT

3C80

∗RES 3C93

10K

100p

2C78

FC94

RES

47R3C97

FC82

FC96

FC75

+12V

FC88

BZ

X38

4-C

5V6

6C02

RE

S

2C90

1u0

RES

3C96 47RRES

47R3C95

100p

2C76

FC90

3C78

100R

100p

2C80

3C76

100R

FC81

FC74

1234

IC74

RES

2041145-4

1M71

FC86

GND_AL

3C79

10R

+5V

RES

3C94 47R

FC73

2C77

100p

+3V3

+3V3-STANDBY

+5V

100n

FC61

2C81

GND_AL

FC95

FC91

2C94

100n

RE

S

FC63

FC79

6C03

BZ

X38

4-C

5V6

FC76

FC62

100p

2C79

3C92

100R

∗ RES

FC77

2C84

5C54

30R

RE

S

100p

RES

RES

FC97

30R

5C53

FC71

FC99

FC64

FC87

FC93

FC85

V-AMBI

+3V3-STANDBY

IC73

RE

S

100p

2C83

18

23456789

19 20

1

1011121314151617

AMBI-LATCH2_DIS

RES

FH52-18S-0.5SH

1M21

SCL-SET

SDA-SET

TXD2-MIPS

RXD2-MIPS

AMBI-SPI-CS-OUTn_R2

AMBI-PWM-CLK_B2

AMBI-LATCH1_G2

AMBI-TEMP

AMBI-BLANK_R1AMBI-PROG_B1

AMBI-POWER

TACH02

TACH01

SDA-BL

FAN-CTRL1

FAN-CTRL2

LED-1

FAN-DRV

SCL-BL

AMBI-SPI-CLK-OUT

AMBI-SPI-SDO-OUTAMBI-SPI-SDI-OUT_G1

LED-2

RC

LIGHT-SENSOR

KEYBOARD

Page 109: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 109Q552.2E LA 10.

2011-Feb-18 back to div. table

10-10 313912364954 SSB Layout Overview top side

19100_800_110127.eps110217

2011-01-274

3139 123 6495LAYOUT

SSB TV550 2K11 4DDR EU

1328

1329

1735

1C85

1C86

1C87

1D38

1D50

1D52

1E00

1E01

1E03 1E04

1E05

1E06

1E07

1E08 1E09

1E12

1E18

1E19

1E22

1E23

1E25

1E28

1E29

1E31

1E321E37

1E38

1E39

1E42

1E43

1E44

1E53

1E54

1E55

1E70

1E71

1E75

1E76

1E77

1E781E79

1E85

1E86

1E87

1E88

1ECB

1F10 1F24

1F25

1F51

1F52

1F75

1FC

11FC21FC3 1FC4

1FC

5

1FC6

1FD

2

1FD

3

1G00

1G03

1G35

1G36

1G37

1G50

1G51

1M19

1M21

1M59

1M71

1M95 1M99

1N00

1P00

1P021P031P04

1P05

1P08

1P09

1R011R10

1S02

1T01

1UM

0

1X02

1X041X05

1X06

1X07

2B44

2B45

2B46

2B47

2C70

2C76

2C77

2C78

2C80

2C81

2C82

2C832C84

2C85

2C86

2C87

2C882C89

2C902C91

2C93

2C94

2C952C96

2D05

2D06

2D072D

08

2D09

2D10

2D11

2D12

2D17

2D19

2D20

2D23

2D24

2D30

2E05

2E07

2E142E18

2E20

2E21

2E22

2E23

2E25

2E26

2E27

2E35

2E362E

37

2E38

2E39

2E40

2E48

2E49

2E52

2E53

2E54

2E55

2E562E57

2E60

2E62

2E632E66

2E67

2E71

2E72

2E83

2E84

2EC12ECC

2ECM

2ECN

2EC

P

2ECU

2EE

0

2EE1

2EE2

2EE3

2EE

4

2EE

52EE

6

2EE7

2F01

2F29

2F32

2F33

2F342F35

2F40

2F58

2F60

2F81

2F86

2F88

2F902F

91

2F92

2F93

2F94

2F97

2F98

2F99

2F9A

2F9B

2F9C

2F9D

2FC

1

2FC

2

2FC

3

2FC

4

2FC

5

2FC

6

2FC7

2FC8

2FD

C2F

DD

2G13

2G24

2G25

2G26

2G27

2G28

2G29

2G43

2G44

2G75

2G76

2G77

2G78

2G79

2G7A

2G96

2G97

2G98

2G99

2GA4

2R20

2R27

2R28

2R29

2R31

2R32

2R33

2R34

2R35

2R37

2R38

2R39

2R40

2R41

2R43

2R45

2R46

2R54

2R55

2R56

2R61

2R62

2S09

2S2R

2S2S

2S2T

2S2V

2S2W

2S2Y

2S2Z

2S30

2S31

2S32

2S33

2S34

2S41

2S4D

2S4E

2S4F

2S4G

2S4M

2S4P

2S772S78

2S7E

2S7H

2S7J2S

7K

2S7L

2S7M

2S7N

2S7P

2S7R

2S7U

2S87

2S8G

2T00

2T01

2T112T122T

14 2T17

2T18

2T19

2T22

2T32

2T33

2T50 2T552T56

2T57

2U09 2U11

2U152U16

2U17

2U18

2U19

2U20

2U23

2U24

2U25

2U27

2U28

2U43

2U44

2U45

2U46

2U47

2U48

2U49

2U50

2U51

2U52

2U53

2U54

2U56

2U58

2U68

2U72

2UD0

2UD1

2UD2

2UD3

2UD4 2UD5

2UD

6

2UD

7

2UD8

2UD9

2UE0

2UE1

2UE

2

2UE

32UE42UE

6

2UE7

2UE

8

2UE

9

2US

3

2UU2

3B00

3B02

3B04

3B05

3B07

3B08

3B10

3B11

3B12

3B13

3B14

3B15

3B16

3B17

3B18

3B19

3B23

3B24

3B25

3B26

3C70

3C743C75

3C76

3C77

3C78

3C79

3C803C81

3C82

3C833C903C91

3C923C93

3C94

3C95

3C963C97

3E17

3E20

3E21

3E223E25

3E26 3E

27

3E28

3E30

3E31

3E32

3E33

3E34

3E35

3E36

3E38

3E40

3E41

3E513E

54

3E55

3E56

3E573E58

3E64

3E65

3E66

3E67

3E68

3E69

3E70

3E71

3E72

3E763E77

3E873E88

3E89

3E96

3E97

3E98

3EC3

3EC5

3EC

F

3EC

G

3ECM

3ECN

3ECP

3EE

03E

E1

3EE2

3EE

3

3F28

3F31

3F36

3F37

3F58

3F59

3F60

3F623F63

3F64

3F65

3F71

3F72

3F75

3F78

3FC

1

3FC2

3FC

33F

C4

3FC

5

3FC

6

3FC

7

3FDG

3G10

3G11 3G12

3G13

3G14

3G15

3G28

3G38

3GA1

3GA2

3GA5

3GA6

3R03

3R04

3R05

3R06

3R08

3R09

3R12

3R14

3R15

3S00

3S01

3S02

3S03

3S04

3S123S13

3S1B

3S1C

3S1J3S1K

3S1L

3S21

3S23

3S24

3S26

3S27

3S28

3S29

3S2A

3S2M

3S31

3S3F

3S3G3S3H

3S3L

3S3M

3S3N

3S3Q

3S3R

3S3S

3S3T

3S3U

3S3W

3S3Y

3S42

3S43

3S44

3S4A

3S4B

3S4J3S

4K

3S4L

3S4P

3S4R

3S4T

3S50

3S52

3S53

3S54

3S59

3S62

3S6H

3S6J

3S6K

3S803S81

3S83

3S84

3T22

3U06

3U07

3U23

3U24

3U26

3U29

3U42

3U43

3U44

3U45

3U56

3U64

3U65

3U66

3U67

3U71

3U76

3U81

3U84

3UD

0

3UD

1

3UD

2

3UD33UD4

3UD5

3US

2

3US

3

3US

4

3US5

3US6

3US7

3US9

4E014E

02

4E034E044E05

4E20 4E

21

4E22

4E23

4E24

4S14

4U00

4U01

5C535C54

5C55

5D01

5D02

5D04

5D05

5D07

5D08

5E015E02

5E06

5E08

5E74

5EC2

5F70

5F72

5F73

5G01

5G02

5R01

5R02

5T00

5T01

5T03

5T04

5T50

5T51

5T52

5U00

5U01

5U02

5U03

5UD0

5UD

1

5UD

2

5UD3

5UM

1

6C02

6C03

6C05

6E06

6E15

6E16

6E17

6E18

6E196E

20

6E22 6E26

6E38

6E40

6E46

6E47

6E51

6EC1

6F72

6FC16FC2

6FC36FC4

6FC5

6FC6

6FC7

6FC8

6FD

26F

D3

6G00

6GA

0

6GA

1

6GA

2

6GA

3

6T03

6T51

6T52

6T53

6T55

6U00

6UD

0

7B00

7B01

7B02

7B037D10

7E10

7EC1

7EE

0

7EE1

7F20

7F25

7F58

7F70

7GA0

7GA1

7GA

2

7R01 7R02

7S00

7S02

7S08

7T00

7T02

7T03

7T50

7U01 7U027U04

7U05 7UD0

7UD1

7UD3

7US1

7US

2

7US

3

7UU

0

9C02

9C03

9E04

9E05

9E11

9E13

9E15

9E17

9E18

9E20

9E21

9E22

9E24

9E29

9E42

9E43

9E50

9E52

9E57

9EC3

9F00

9F01

9F04

9F05

9F06

9F27

9F28

9F71

9FC3

9FC4

9FC

5

9FC6

9GA0

9R02

9S00

9S01

9S06

9S18

9S19

9S20

9S21

9S90

9S91

9S92

9S93

9US

0

9UU09UU1

BS10

BS13

BS15

CXXX

DB

S8

DS50

IC74

IC75

IE07

IE09

IE10

IE11

IE34

IE35IE36IE42

IEE3

IEE4

IEE5

IEE6

IF61

IF62

IF86

IF89

IG11

IGA1

IGA2

IGA3

IS13

IS14

IU15

IU17IU18

IU23

IU57

IUD0

IUD1

IUD2

IUD4

IUS3

IUS4

IUS5 IUS

6

IUS9

IUT1

IUT2

1X01

1X08

Page 110: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 110Q552.2E LA 10.Circuit Diagrams and PWB Layouts

2011-Feb-18 back to div. table

Overview bottom side

19100_801_110127.eps110127

2011-01-274

3139 123 6495 LAYOUT

SSB TV550 2K11 4DDR EU

1FE

0

1U40

2B00

2B01

2B022B

03

2B04

2B05

2B06

2B07

2B08

2B09

2B10

2B112B

12

2B13

2B14

2B15

2B16

2B17

2B182B19

2B20

2B21

2B22

2B23

2B242B25

2B26

2B27

2B282B

29

2B302B31

2B32

2B33

2B34

2B35

2B36

2B37

2B38

2B39

2B40

2B41

2B42

2B43

2C79

2D01

2D02

2D03

2D13

2D14

2D16

2D21

2D22

2D26

2D27

2D28

2D29

2D31

2E01

2E042E06

2E08

2E09

2E10

2E12

2E15

2E24

2E44

2E58 2E59

2E68

2E74

2E75

2E76

2E79

2E802E81 2E85

2E86

2E87

2E88

2E90

2E91

2E97 2E982E99

2EA42EA5

2EB1

2EB3

2EC

0

2EC

2 2EC3

2EC

6

2EC

7

2EC8

2ECQ

2EC

V

2EC

W

2EC

X

2EC

Y

2F00

2F02

2F03

2F042F

05

2F06

2F202F21

2F25

2F26

2F27

2F28

2F30

2F31

2F49

2F52

2F53

2F59

2F61

2F62

2F632F64

2F65

2F66

2F70

2F71

2F72

2F73

2F74

2F75

2F76

2F77

2F78

2F79

2F80

2F82

2F84

2F85

2F95

2F96

2FA

2

2FA3

2FA

4

2FD1

2FE0

2FE

3

2FE4

2FE

5

2FE6

2FE8

2FF0

2FF1

2FF

2

2FF

3

2FF

4

2FF5

2FF6

2FF

7 2FF8

2FF

9

2FG

02F

G1

2FG

22F

G3

2FG4

2FG62FG7

2FG8

2FG9

2FH

2

2FH3

2FH

4

2FH5

2FH6

2FH7

2FH8

2G10

2G11

2G12

2G14

2G15

2G162G

17

2G18

2G19

2G91

2G92

2G93

2G94

2G95

2G9C

2G9D

2G9E

2G9F

2GA

0

2GA1

2GA2

2GA

3

2GA

5

2GA

6

2GE

0

2R00

2R01

2R02

2R03

2R04

2R05

2R06

2R07

2R08

2R09

2R10

2R11

2R12

2R13

2R14

2R15

2R16

2R17

2R18 2R19

2R21

2R22

2R23

2R242R

25

2R26

2R47

2R48

2R49

2R50

2R51

2R52

2R53

2S10

2S11

2S12

2S13

2S14

2S15

2S16

2S17

2S18

2S19

2S20

2S21

2S22

2S23

2S24

2S25

2S26

2S27

2S28

2S29

2S2E

2S2G

2S2H

2S2J

2S2K

2S2L

2S36

2S37

2S38

2S39

2S3A

2S3B

2S3C

2S3D

2S3E

2S3F

2S3G

2S3H

2S3J

2S3K

2S3L

2S3M

2S3Q

2S40

2S42

2S43

2S45

2S46

2S4K

2S4N

2S4Q2S

4R

2S4S

2S4T

2S4U

2S4V

2S4W

2S4Y

2S4Z

2S50

2S51

2S52

2S532S

55

2S56

2S57

2S58

2S59

2S5A

2S5B

2S5C2S

5D

2S5G

2S5H

2S5J

2S5K

2S5M

2S5P

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67

2S68

2S6A

2S6B

2S6C

2S6D

2S6E

2S6F

2S6G

2S6H

2S6K

2S6L 2S6M

2S6N

2S6P

2S752S76

2S84

2S852S86

2S89

2S8A

2SHW

2T02

2T03

2T04

2T05

2T06

2T07

2T08

2T09

2T102T13

2T15

2T16

2T20

2T21

2T23

2T24 2T

25

2T26

2T27

2T28

2T29

2T30

2T31

2T34

2T35

2T36

2T37

2T38

2T39

2T40

2T41

2T42

2T43

2T51

2T52

2T53

2T54

2T58

2T59

2T60

2T61

2T62

2U00

2U01

2U02

2U03

2U04

2U05

2U06

2U07 2U08

2U10

2U122U13

2U14

2U21

2U22

2U29

2U55

2U57

2U712UA4

2UB

02U

B1

2UB

22U

B3

2UB

4

2UB

5

2UB

6

2UB7

2UB8

2UE5

2UU

0

2UU

1

3B01

3B03

3B06

3B09

3B20

3B21

3B22

3B27

3B28

3D01

3D02

3D06

3D09

3D10

3D14

3D15

3D16

3E06

3E07

3E18

3E19

3E23

3E24

3E29

3E37

3E39

3E43

3E44

3E45

3E48

3E533E

62

3E73

3E74

3E75

3E78

3E79

3E90

3E95 3E99

3EA

1

3EA2

3EA7

3EB

1

3EB

3 3EB6

3EC13ECA

3EC

D

3ECE

3EC

H

3EC

J 3ECK

3EC

L

3ECU

3F01

3F02 3F03

3F04 3F05

3F06

3F07

3F08

3F09 3F10

3F11

3F12

3F19

3F20

3F21

3F22

3F23

3F24

3F30

3F32

3F34

3F35

3F40

3F41

3F42

3F43

3F44

3F45

3F52

3F53 3F54

3F663F67

3F68

3F69

3F76

3F77

3F79

3F803F81

3F82

3FB

F

3FD

13F

D2

3FD

3

3FD

4

3FD

6

3FD

7

3FE5

3FE

6

3FE

73F

E8

3FE

9

3FG23FG4

3FG

6

3FG7

3G2W

3G2Y

3G2Z

3G30

3G31

3G32

3G33

3G34

3G35

3G36

3G37

3GA

3

3GA

4

3GE03GE1

3GE2

3GE

3 3GE4

3R00

3R01

3R02

3R07

3R10

3R11

3R13

3S05

3S06

3S07

3S08

3S09

3S0V

3S0W

3S0Z

3S10

3S11

3S15

3S16 3S17

3S18

3S19

3S1D

3S1E

3S1F

3S1G

3S1H

3S1P

3S1R

3S1S

3S1T

3S1U

3S1V

3S1W

3S1X

3S20

3S22

3S25

3S2F3S2G

3S2H

3S2K

3S2L

3S2S

3S2V

3S30

3S32

3S33

3S34

3S36

3S37

3S38

3S39

3S3P

3S40

3S41

3S45

3S46

3S47

3S49

3S51

3S55

3S563S57

3S58

3S5B

3S5E

3S5S

3S5T

3S5V

3S5W

3S5Y

3S5Z

3S60

3S61

3S64

3S65

3S66

3S67

3S68

3S693S6A

3S6B

3S6C

3S6D

3S6E3S6F

3S6G

3S6L

3S6M

3S6P

3S6Q

3S6V3S6W

3S72

3S75

3S76

3S82

3T00

3T01

3T02

3T03

3T04

3T05

3T06

3T07

3T08

3T09

3T10

3T11

3T12 3T13

3T14

3T15

3T16

3T17

3T18

3T19 3T20

3T21

3T23

3T24

3T25

3T26

3T27

3T28

3T29

3T31

3T503T51

3T52

3T53

3T54

3T55

3T56

3T57

3T58

3T59

3T60

3T61

3T62

3U00

3U01

3U02

3U03

3U04

3U05

3U08

3U09

3U10

3U11

3U12

3U13

3U14

3U15

3U16

3U17

3U18

3U19

3U20 3U21

3U22

3U25

3U27

3U28

3U41

3U53

3U59

3U60

3U61

3U62

3U63

3U68

3U69

3U70

3U72

3U73

3U74

3U75

3U80

3U82

3U83

3UA

0

3UB03UB1

3UB

23U

B3

3UB

4

3UB5

3UB6

3UB7

3UU0

3UU

1

3UU

2

3UU3

4E06

5D03

5E03 5E04

5E73

5E765E80

5EC0

5EC3

5F66

5F71

5F74

5F76

5FA3

5FA

4

5FE0

5FE3

5FE4

5FE5

5FE

7

5FE

8

5FE9

5FG

0

5FG

2

5GA

05G

A1

5R00

5S04

5S80

5S81

5S82

5S83

5S84

5S85

5S87

5S88

5S89

5S90

5S92 5S

93

5S94

5S95

5T02

5UA0

6E01

6E03

6E07

6E09

6E23

6E28

6E29

6E30

6E32

6E43

6E44

6E52

6FD

1

6R006T

00

6T01

6T02

6T04

6T05

6T50

6T54

6U40

6UD

1

7D03

7D11

7D15

7E01

7E02

7E05

7E06

7E09

7EC0

7F00

7F01

7F02

7F03

7F04

7F05

7F52

7F53

7F54

7F75

7FA3

7FD

1

7FE0

7FE

3

7GE

0

7GE1

7S01

7S05

7S09

7S20

7T01

7T04

7T51

7U00

7U03

7U06

7U40

7U41

7U42

7U43

7U48

7UA0

7UA

37U

A4

7UA5

7UA6

7UA

7 7UC0

7UD

2

7UU1

7UU

2

7UU3

9C00

9C01

9CH

0

9E01

9E06

9E07

9E089E09

9E10

9E12

9E14

9E16

9E19

9E23

9E25

9E26

9E27

9E28

9E51

9E53

9E54

9E55

9E58

9EC0

9EC2

9F029F03

9F259F26

9F29

9F30

9FC

1

9FC

2

9FD

1

9FD

2

9FD

5

9G0G

9G0K

9GA1

9GE0

9GE1

9GE2

9R00

9R03

9R04

9S08

9S09

9S0D

9S0E

9S10

9S11

9S12

9S13

9S24

9S94

9S95

9S96

9S97

9T50

9T51

9T52

9U41

9U42

AF70

AF71

AF72

AF73

BEC3

BE

C5

BFE2

BFE3

C00

0

C00

1

CD

10

CU00

CU

01

CU

02

CU

03C

U04

CU05

CU

A0

DFE6

DFE7

DFE8

DFE9

DF

F1

DFF2

DS52

FB00

FC61

FC62

FC63

FC64

FC70

FC71

FC72

FC73

FC74FC75

FC76

FC77

FC78

FC79

FC81

FC82

FC83FC84

FC85

FC

86

FC87

FC88

FC89

FC90

FC91

FC92

FC93

FC94

FC95

FC96

FC97

FC98

FC

99

FD01

FD

02

FD03

FD05

FD06

FD07

FD08

FD09

FD14

FE01

FE02

FE

03

FE27 FE28

FE29

FE30

FE31

FE32

FE33

FE

34

FE35

FE

36

FE41

FE42

FE

43

FE44

FE45

FE

46

FE47

FE48

FE49

FE50

FE51

FE52FE53

FE54

FE

56

FE

57

FE58

FE59

FE60

FE61

FE

70

FE71

FE72

FE

73

FE74

FE75

FE80

FE81

FE

82

FE83

FE

84

FE

85

FEA0FEA1

FEC0

FEC1

FEC2

FEC3

FEC4

FEC5

FEC6

FEC7

FECA

FECB

FECC

FECD

FECE

FECF

FECG

FECJ

FECK

FECL

FECM

FECN

FECP

FECR

FECW

FECY

FECZ

FEE0

FF00

FF01

FF03

FF04

FF29

FF

30

FF31

FF32

FF33

FF36

FF37

FF38 FF39FF41

FF42

FF43

FF44

FF45

FF46

FF47

FF48

FF49

FF50

FF55

FF56

FF57

FF58

FF61

FF62

FF

63

FF64

FF65FF66

FF71

FF74

FF

75

FF76

FF81

FF82

FFA2

FFAF

FFB1

FFB2 FFB3

FFB4

FFB5

FFB6

FFC1

FFC2

FFC3 FFC4

FFC5

FFC6

FFC7

FFC8

FFC9

FFDA

FF

DB

FFDC

FG04

FG

0H

FG11

FG12FG13

FG14FG15

FG16FG17

FG18FG19

FG1AFG1B

FG

1C FG1D

FG1E FG1F

FG1GFG1H

FG1J

FG1K FG1L

FG1MFG1N

FG1P FG1Q

FG1RFG1S

FG1TFG1U

FG1V FG1W

FG1Y FG1Z

FG

20

FG

21

FG22FG23

FG24FG25FG26

FG27 FG28 FG29

FG2A

FG2B

FG2C

FG2D

FG2E FG2F

FG2G

FG2H

FG2J

FG

2K

FG2L

FG2M

FG2N

FG2P

FG2R

FG30

FG31

FG32

FG

33

FG34

FG35

FGA0

FGA1

FGA2

FG

A3

FGA4

FGA5

FG

A6

FR00

FR01

FR02

FR03

FR04

FR05

FR06

FR07

FS01

FS02

FS03

FS08

FS0Z

FS10

FS

11

FS2W

FS2Y

FS31

FS44

FS45

FS49

FS50

FS51

FS52

FS53

FS57

FS64

FT00

FT04

FT05

FT06

FT07

FT08

FU00

FU01

FU02

FU03

FU04 FU05

FU06

FU

07

FU08FU09

FU48 FU49 FU50FU51 FU52 FU53FU54 FU55FU56

FU57

FU58

FU59 FU60 FU61 FU62

FU63

FU66 FU67

FU68

FU72

FU

73

FU74

FU75

FU76

FUA0

FUA3

FUA4

FUD2

FUD3

FUM0

FUU0

FUU1

IC73

IC78

ID05

ID06

ID07

ID08

ID09

ID10

ID11

ID12

ID14

ID15

ID18

ID19

ID27

ID28

ID29

ID30

ID31

ID32

ID33

ID34

ID35

ID37

IE05

IE06

IE08

IE12

IE13

IE14

IE15

IE16

IE17

IE18

IE22

IE23

IE26

IE29IE31

IE32

IE33

IE38

IE39

IE43

IE44

IE45

IE48

IE49 IE50

IE51

IE52

IE53

IE54

IE55

IE59

IE60

IE61

IE63

IE64

IE65IE66

IE67

IE68

IE70

IE71

IE72

IE73

IE74

IE75

IE76

IE77

IE89

IE90

IE91

IE92IE96

IEC0

IEC1

IEC2

IEC4

IEC5IEC6

IEC7

IEE0

IEE1

IEE2

IEE7 IEE8

IF01

IF02

IF03

IF04

IF05

IF06

IF07

IF08

IF10

IF11

IF12IF13

IF14

IF15

IF16

IF17 IF18

IF21

IF22

IF23

IF27IF28

IF29

IF30

IF31

IF32

IF33

IF34

IF35

IF36

IF37

IF39

IF40

IF41

IF42

IF43

IF44

IF45

IF47

IF48

IF49

IF50

IF51

IF52

IF53

IF54

IF55

IF56

IF57

IF58

IF59

IF63

IF64

IF65

IF66

IF67

IF68

IF69

IF72

IF73

IF74

IF75

IF76

IF77

IF78

IF79

IF80

IF81

IF82

IF87

IF88

IF90

IFD

1

IFD2

IFD3

IFD4

IFD5

IGE0

IGE1

IR00

IR01

IR02

IR03

IR04

IR05

IR06

IR07

IR08

IS00

IS01

IS02

IS03

IS04

IS05

IS06

IS07

IS08

IS09

IS0R

IS0V

IS10

IS11

IS12

IS15

IS16

IS17

IS19

IS1A

IS1B

IS1D

IS1E

IS1G

IS1H

IS1J

IS1K

IS1L

IS1M

IS1N

IS1P

IS1Q

IS1S

IS20

IS25

IS26

IS2U

IS2V

IS2Z

IS3B

IS3D

IS3E

IS3F

IS3K

IS3L

IS3Q

IS3S

IS40

IS42

IS44

IS4V

IS4W

IS4Z

IS50

IS58

IS5C

IS5D

IS5E

IS5F

IS5G

IS5H

IS5J

IT00

IT01

IT02

IT03

IT04

IT05

IT06

IT07

IT08IT09 IT10

IT11

IT12

IT13

IT14

IT15

IT16

IT17IT18

IT19 IT20

IT21

IT22IT23

IT24

IT25IT26

IT27

IT28

IT29

IT30

IT32

IT50

IT51

IT52

IT53

IT54

IT55

IT56

IT57

IT58

IT59

IT60

IT61

IT62

IT63

IT64

IT65

IT66

IT67

IT68

IT69

IU01

IU02

IU03

IU04IU05IU06

IU07

IU08

IU09

IU10

IU11

IU12

IU13

IU14

IU16

IU19

IU20

IU21

IU22

IU24

IU25

IU26

IU27

IU28

IU29

IU30

IU40

IU41

IU43

IU44

IU45

IU47

IU48

IU49

IU50

IU51

IU52

IU55IU56

IU61

IU62

IU63

IU64

IUA5IUA6

IUB0

IUB1

IUB2

IUB3

IUB4IUB5

IUB

6

IUD3

IUD5

IUD6

IUD7

IUM

0

IUS0

IUS7

IUS8

IUU0

IUU1

IUU2

IUU3IUU4

IUU5

Page 111: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Circuit Diagrams and PWB Layouts EN 111Q552.2E LA 10.

2011-Feb-18 back to div. table

10-11 E 27221719026x IR/LED/Key BoardLeading Edge Module

19100_815_110217.eps110217

Leading Edge ModuleE E

2010-07-158

2010-07-159

2722 171 9026Leading Edge Module

L1

100uHC1

4.7uF/16V

+3.3V

VPP/MCLR/RE31

SEG12/Vcap(2)/SS(1)/SRNQ(1)/C2OUT(1)/C12IN0-/AN0/RA02

SEG7/C12IN1-/AN1/RA13

COM2/DACOUT/VREF-/C2IN+/AN2/RA24

SEG15/COM3/VREF+/C1IN+/AN3/RA35

SEG4/CCP5/SRQ/T0CKI/CPS6/C1OUT/RA46

SEG5/VCAP(2)/SS(1)/SRNQ(1)/CPS7/C2OUT(1)/AN4/RA57

VSS8

SEG2/CLKIN/OSC1/RA79 SEG1/VCAP(2)/CLKOUT/OSC2/RA610

P2B(1)/T1CKI/T1OSO/RC011

P2A(1)/CCP2(1)/T1OSI/RC112

SEG3/P1A/CCP1/RC213

SEG6/SCL/SCK/RC314

RC4/SDI/SDA 15RC5/SDO 16RC6/TX/CK 17RC7/RX/DT 18

VSS 19

VDD 20

RB0/AN12/CPS0/INT 21RB1/AN10/CPS1 22RB2/AN8/CPS2 23RB3/AN9/CPS3/CCP2(1) 24RB4/AN11/CPS4 25RB5/AN13/CPS5/T1G 26

RB6/ICSPCLK 27RB7/ICSPDAT 28

U1 PIC16LF1933

VDD

ICSPDATICSPCLK

ANALOG_VOUT

VPP

SCL

R3

100RR4

100RR5

100RR6

100RR7

100RR8

100R

SDA

R18

100R

R17 10Ω

C104.7uF/6.3V

+5V

R19

47kΩ

R25

100kΩ

R21

100kΩ

R24

18kΩ

G1

TEMT6200FX01

ZD5

3.3VC12

104

C11 104 C13 104

R22

470ΩR26

100R

3

21

84

U3A

LM358

5

67

U3B

LM358

+5V

R23

15kΩ

R20

22kΩ

GND1

VDD2

OUT3

GND4

U2

TSOP75236

IR

LIGHT

MCU

BUZZER

LED2

WHITE LEDRED LED

IR

LIGHT Sensor

CONNECTOR

+3.3V

CAP

TO

UC

HSE

NC

E

11CH-CPS4

1 HOMECPS3

1 A LCPS2

1 VOL+CPS1

1 VOL-CPS0

1CPS5 CH+

PWM

R9

1K

A 1

B 2BZ1

BUZZER

Q1

2SC8050

R11100R

C6104

+3.3V

BUZZER

Proximity SensorR27

2K

C81u

C9104

C71u

OUT1

VSS2

3 VREG 4

VDDHI 5

CX 61

IQS127D

Proximity

VDDHI

VDDHI

ProximityJP2

R1

1KC2105

+5V

12345678

J1

2.0- 8pin

ANALOG_VOUTLED1

LED2IR

LIGHT

C5104

C3105

R210K

C4104

VDD

JP1

R104.7kΩ / 100Ω

D2

R12

10kΩ R1310kΩ

B2 C1

E3

Q2BC847

+5V

WHITE

LED1

TVS1RES ZD4

5.6V

ZD1

5.6V

123456789

10111213

J2

HEADER 13

SDA

SCL +5V

+3.3VIRANALOG_VOUT

LED2LED1LIGHT

+3.3V

CXANTENNA

+3.3V

R14

10kΩ

R1547Ω

VSS

B2 C3

E1

Q3BC857

RED

R16

10kΩ

D1

B 2C1

E3

Q3*BC847

ZD35.6V

Page 112: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 112Q552.2E LA 11.Styling Sheets

2011-Feb-18 back to div. table

11. Styling Sheets

11-1 Blockbuster 32"

19100_806_110210.eps110214

BLOCKBUSTER 32"

Pos No. Description Remarks

0004 Front Cabinet 0011 Back Cover0029 Hard Switch bracket0260 Stand1004 Display panel1005 Power Supply Unit1085 Remote Control Not displayed1108 Keyboard + IR assy1150 Board SSB 5213 Loudspeaker box5216 Tweeter8191 Mainscord 1.8m Not displayed8308 Main (power) switch8G50 Cable LVDS FFC Not displayed8G51 Cable LVDS FFC Not displayed

0260

1005

5213

0011

5216

0029

1150

5216

8308

1004

00041108

Page 113: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

Styling Sheets EN 113Q552.2E LA 11.

2011-Feb-18 back to div. table

11-2 Blockbuster 37"

19100_810_110214.eps110217

BLOCKBUSTER 37"

Pos No. Description Remarks

0004 Front Cabinet 0011 Back Cover0029 Hard Switch bracket0260 Stand1004 Display panel1005 Power Supply Unit1085 Remote Control Not displayed1108 Keyboard + IR assy1150 Board SSB 5213 Loudspeaker box5216 Tweeter8191 Mainscord 1.8m Not displayed8308 Main (power) switch8G50 Cable LVDS FFC Not displayed8G51 Cable LVDS FFC Not displayed

0029

0011

0260

1005

1004

8308

1150

0004

1108

5216

5216

5213

Page 114: Philips 40pfl6606h 12 Chassis q552.2e-La Sm

EN 114Q552.2E LA 11.Styling Sheets

2011-Feb-18 back to div. table

11-3 Blockbuster 40"& 46"

19100_802_110202.eps110209

BLOCKBUSTER 40"- 46"

0004 Front Cabinet 0011 Back Cover0040 Hard Switch bracket0260 Stand1004 Display panel1005 Power Supply Unit1085 Remote Control Not Displayed1108 Keyboard + IR assy1150 Board SSB 5213 Loudspeaker box5216 Tweeter8191 Mainscord 1.8m Not Displayed8308 Main (power) switch with cable8G50 Cable LVDS FFC Not Displayed 8G51 Cable LVDS FFC Not Displayed

POS. NO. DESCRIPTION. REMARKS

5213

0011

0260

0029

0004

1004

1108

5216

8308

1150

1005

5216