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Phase change memory technology Rob Wolters September 2008
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Page 1: Phase change memory technology Rob Wolters September 2008.

Phase change memory technology

Rob Wolters

September 2008

Page 2: Phase change memory technology Rob Wolters September 2008.

Rob Wolters, 29 september 2008

2

Contents

Introduction

Phase change materials

Memory cell concepts

Switching

Endurance

Retention

Perspective

Page 3: Phase change memory technology Rob Wolters September 2008.

Rob Wolters, 29 september 2008

3

Programming and erasing the floating gate

Control gateFloating

gate

Floating gate

Control gateSiO2

Si3N4

Polysilicon

High voltage“Thick” gate oxideDouble poly

Page 4: Phase change memory technology Rob Wolters September 2008.

Rob Wolters, 29 september 2008

4

Introduction (present NVM)

density is improving!for how long?

performance is stagnating!forever!

Page 5: Phase change memory technology Rob Wolters September 2008.

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5

Optical storage: CD, DVD and Blu-ray disc

Page 6: Phase change memory technology Rob Wolters September 2008.

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6

Optical storage: Blu-Ray DVD-RW

300 nm

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7

Phase change materials

SEM picture of DVD-RW dots

Sb (at%)

0 10 20 30 40 50 60 70 80 90 100

Ge (at%)

0

10

20

30

40

50

60

70

80

90

100

Te (at%)

0

10

20

30

40

50

60

70

80

90

100

Sb-M

SbTe-M

‘225’

1.0E02

1.0E03

1.0E04

1.0E05

1.0E06

1.0E07

1.0E08

0 100 200 300 400

Temperature ( 0C)re

sis

tivi

ty(

.cm

)

doped SbTedoped Sb

Ge 2Sb 2Te 5

1.0E02

1.0E03

1.0E04

1.0E05

1.0E06

1.0E07

1.0E08

0 100 200 300 400

Temperature ( 0C)re

sis

tivi

ty(

.cm

)

doped SbTedoped Sb

Ge 2Sb 2Te 5Ge 2Sb 2Te 5

Page 8: Phase change memory technology Rob Wolters September 2008.

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What is the PC RAM challenge:

How to integrate into

DVD-RW materials on

chip

Page 9: Phase change memory technology Rob Wolters September 2008.

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PC RAM principle

• A simple scalable device:• An access transistor and a programmable element (PE)• High switching speed (~ns)• Read/write endurance: >1012 (Flash: 106)

Memory array with NMOS transistors:

PE

wor

d-lin

esbit-lines

• PE based on a switching resistance• Phase-change materials amorphous phase: ‘high’-Ohmic crystalline phase: ‘low’-Ohmic• Fast switching between amorphous and crystalline phase

Page 10: Phase change memory technology Rob Wolters September 2008.

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Phase change technology: Ovonyx cell(Ovshinsky in 1966)

ResitiveElectrode

A m orphous C halcogenide

Crysta lline Chalcogenide

Small amorphous volume

~20 nm3 !

Chalcogenide Insulator Resistive layer

L1 C ELLXSECTION thru M atch

L1-X1.cdr

POLY

Alum inum or Copper

W

W

TiSi2

W

BPSG

SiO2SiO2

SILICON

Sidewall spacer contact

1T – 1R cell Ovonyx cell

Page 11: Phase change memory technology Rob Wolters September 2008.

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11

Cell concepts

Megabit demonstrators by Intel, STM, Samsung Ovonyx concept

Small contact areabetween PC-layer and electrode

Small volume undergoes phase change

“Ovonyx concept”(cross section)

“NXP novel line concept”(top view)

Small areahighest resistance

NXP Approach: Novel cell concept & Material

= Electrode material = Phase-change material

Page 12: Phase change memory technology Rob Wolters September 2008.

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line of phase-change material

Thickness: 15 nm

Width: 50nm

Length: 1000 nm

Metal contacts (TiN)

Line concept

Page 13: Phase change memory technology Rob Wolters September 2008.

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Temperature

Time

MeltingTemperature

CrystalTemperature

amorphization pulse

Switching

Electric pulses induce Joule heating

RESET pulse:

- T > Tmelt

- Rapid cooling down amorphization

Temperature

Time

MeltingTemperature

CrystalTemperature

crystallization pulse

SET pulse:

- T > Tcryst

- Longer pulse crystallization

Page 14: Phase change memory technology Rob Wolters September 2008.

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Fast switching phase-change material10 ns SET: amorphous to crystalline

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0 50 100 150 200 250 300 350 400

time (ns)

volta

ge

(V)

0

100

200

300

400

500

600

700

800

900

1000

curr

ent (

A

)

READ150 mV

READ150 mV

SET500 mV

Single cell data for “fast-growth” material

Fast switching phase-change material10 ns RESET: crystalline to amorphous

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0 50 100 150 200 250 300 350 400

time (ns)

volta

ge

(V)

0

100

200

300

400

500

600

700

800

900

1000

curr

ent (

A

)

READ150 mV

READ150 mV

RESET900 mV

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Temperature

Time

MeltingTemperature

CrystalTemperature

amorphization pulse

Electric pulses induce Joule heating

RESET pulse:

- T > Tmelt

- Rapid cooling down amorphization

Phase-change materialsCell switching RESET

PE

wor

d-lin

es

bit-lines

P = I2 . R (Joule heating)I: determined by technology node

For optimum energy transfer: RPE = Rtransistor (~2 k Ω)RPE = ρ . L/A

Page 16: Phase change memory technology Rob Wolters September 2008.

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20 40 60 80 100 120 140 160 180 2000.0

0.5

1.0

1.5

2.0

0 50 1000

200

400

600

0.0

0.2

0.4

0.6

0.8

Current [mA]

Line width [nm]

Time [ns]

Temperature

[ oC ]

Current [mA]

¬

®

20 40 60 80 100 120 140 160 180 2000.0

0.5

1.0

1.5

2.0

0 50 1000

200

400

600

0.00.20.40.60.8

[ ]Current mA

Line width [nm]

Time [ns]

Temperature

[ o C]

[ ]Current mA

¬

®

20 nm

5 nm

Phase-change materialsCell switching RESET

Ireset as a function of line width for 20 and 5 nm thick PC, L=2W

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Phase-change materialsCell switching SET

Amorphous state shows a threshold voltage

0

0.5

1

1.5

2

2.5

3

3.5

4

-1.00E-07

0.00E+001.00E-072.00E-073.00E-074.00E-075.00E-07

t [s]

Vi [V]

0

0.01

0.02

0.03

0.04

0.05

0.06

0.07

Vo [V]

Vi

Vo

0

0.2

0.4

0.6

0.8

1

1.2

1.4

-0.5 0 0.5 1 1.5 2 2.5

Vdut [V]

Idut [m

A]

Crystalline

Amorphous

Threshold voltage

Page 18: Phase change memory technology Rob Wolters September 2008.

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Cell switching

0

0.2

0.4

0.6

0.8

1

1.2

1.4

-0.5 0 0.5 1 1.5 2 2.5

Vdut [V]

Idu

t [m

A]

Crystalline

Amorphous

Threshold voltage

PE

wor

d-lin

es

bit-lines

Vdut = VT . LV: determined by technology nodeVT : material characteristicV = 1-2 V, L < 100 nm

Page 19: Phase change memory technology Rob Wolters September 2008.

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Process integration PC cells embedded in a standard CMOS process

W-plugs

Metal 2Via & Trench

TaN Electrode

Passivation

STISTI STI

Phase change cell

Metal1

Top view SEM

Cross-section SEM

Page 20: Phase change memory technology Rob Wolters September 2008.

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Sensing window in SET/RESET resistance2 kb memory sub-sector

0.1

1

10

50

90

99.0

99.9

%

102 103 104 105 106

R [Ohm]

L = 740 x W = 340 nm2 cell

L= 450 x W = 120 nm2 cell

IntegratedTest Cells

0.1

1

10

50

90

99.0

99.9

%

102 103 104 105 106

R [Ohm]

L = 740 x W = 340 nm2 cell

L= 450 x W = 120 nm2 cell0.1

1

10

50

90

99.0

99.9

%

102 103 104 105 106

R [Ohm]

L = 740 x W = 340 nm2 cell

L= 450 x W = 120 nm2 cell

L = 740 x W = 340 nm2 cell

L= 450 x W = 120 nm2 cell

IntegratedTest Cells

0

10

20

30

40

50

60

70

80

90

100

1.E+03 1.E+04 1.E+05 1.E+06 1.E+07

Resistance (Ω)C

ell p

erce

ntag

e

SET

RESET

IntegratedTest Cells

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21

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10

cycle number

R-Rload (ohm)

n8_Ron

n8_Roff

Imin+15%

Endurance

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Retention

DVD: amorphous dots in a crystalline matrix

Size: appr. 300 x 300 nm

PC cell: amorphous dot and crystalline areasaside.

Size: appr. 50 x 100 nm

System tends to the lowest energy: crystallinity!

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RetentionDVD: amorphous dots in a crystalline matrix

Ga15Sb75

Increased doping

Page 24: Phase change memory technology Rob Wolters September 2008.

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Positioning of amorphous spot. Thomson Effect

+-

0 LL/2

δT

x

Tmelt

amorphous spot

L

V+-

0 LL/2

δT

x

Tmelt

amorphous spot

L

V

•IEDM 2007

•Thermoelectric effect

Page 25: Phase change memory technology Rob Wolters September 2008.

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PCM performance

•Fast (~50 ns)

•Low voltage (0.4-2 V)

•Scaling: good

•Medium endurance (109-1013)

•Medium current (50-300 A)

•Energy (pJ/switch)

PCM costs

•Only 3 additional masks

NVM/Flash performance

•Slow (s-ms)

•High voltage (10-15 V)

•Scaling: bad

•Short endurance (105-106)

•Low current (~ nA)

•Energy (nJ/switch)

NVM/Flash costs

•8-10 additional masks

Perspective

Page 26: Phase change memory technology Rob Wolters September 2008.