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Equipos profesionales de medida Technical Note INNOVATION IN TEST AND MEASUREMENT FOR TETELECOMMUNICATIONS I ELECOMUNICACIONES PDHMap: a pocket guide to PDH 2 8 8 M b it/s 2 8 8 34 MUX MUX 3 4 M b it/s 2 8 1 4 0 M b it/s MUX LTE 2 M b it/s 34 140
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Page 1: PDH

Equipos profes iona les de medida

Technical Note

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PDHMap: a pocket guide to PDH

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8 M b it/s

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MUX

3 4 M b it/s

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2 M b it/s

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1 4 0

Page 2: PDH

table ofcontents

i© ICT electronicswww.ict.es

PDHMap

1 Multiplexing Architecture

3 Switching and Framing

4 Technical Features

Page 3: PDH

Plesiochronous Digital Hierarchy

1© ICT electronicswww.ict.es

Multiplexing Architecture

PDHMap

M U L T I P L E X I N G A R C H I T E C T U R E

PDH (Plesichoronous Digital Hierarchy) is the most basic technology for broadband digital transmission. Based on the 2048 kbps bit rate (G.732, European Hierarchy) or on the 1544 kbps (G.733, North American Hierarchy), several tributaries are bit-inter-leaved for multiplexing into a higher speed level. There are actually four levels in the hierarchy, with their speeds defined in the G.702 ITU-T standard, which are, for the european system, 2048 kbps, 8448 kbps(G.742), 34 Mbps and 140 Mbps (G.751).

Figure 1 European PDH hierarchy: from 2 Mbit/s to 140 Mbit/s.

Page 4: PDH

Plesiochronous Digital Hierarchy

2© ICT electronicswww.ict.es

Multiplexing Architecture

PDHMap

The 2048 kbps circuit (2 Mbps hereafter) has capacity to simultaneously transmit 30 64 kbps voice (data) channels. The remaining 128 kbps are used in two simultaneous ways: 64 kbps are used for frame specific purposes, such as frame alignment and far-end alarms, while the remaining 64 kbps are mainly used for CAS (Channel Associated) Signaling.

The main motivation of this document is to provide a graphical and intuitive tool for a fast identification of any basic issue one would eventually need to remember or to find out about PDH. Starting with the overall multiplexing structure, this document explains how the different levels are builded, beginning with the basic 2 Mbit/s signal and following with the 8, 34 and 140 Mbit/s.

PDH is a plesiochronous technology, so it is not possible to insert or to extract (add&drop) any channel or tributary without fully demultiplexing the incoming signal to the required level. Obviously, and jointly with the lack of bundled management capabilities, this is a major disadvantage for this technology, specially for carriers when planning their networks. So, new synchronous transmission technologies such as SDH have been developed allowing for more flexible and less cost demanding network configurations.

A

S

T1

J11

R1

E

1

0

C1ai bi ci di

Remote Alarms Indicator (FAS and MFAS)

Spare bits (national use)

i - Tributary bits

Justification control bits

Justification bits

i - Channel CAS bits C2 C3 C4

CAS multiframe alignment

CRC-4 Multiframe alignment

Frame alignment bits

Frame alignment supervision bits

Cyclic Redundancy Checksum bits

CRC-4 Error signaling bits

Page 5: PDH

Plesiochronous Digital Hierarchy

3© ICT electronicswww.ict.es

Framing and Switching

PDHMap

F R A M I N G A N D S W I T C H I N G

From the 2 Mbps primary rate tributary upwards, every level in the hierarchy is composed by 4 immediate lower level tributaries, and the frame built by bit-inter-leaving those signals. Thus, each level provides trans-port capacity and justification for each one. In the graphic below you can check the way signals are multi-plexed in the PDH and click on the sensitive bits to get more information.

As it has been pointed out before, switching in PDH is only possible by previosly demultiplexing the carrier down to the required switching level, so it can be infe-rred that the basic transport level is the 2 Mbit/s (30+2 x 64 kbit/s), and it is the signal with a different structure from the others (8, 34 and 140 Mbit/s).

The 2 Mbit/s frame transports 30 voice channels and 2 additional channels for frame related functions and for channel associated signaling. It is structured around the basic 125 us frame, which has 32 x 64 kbit/s channels, or time slots. Slot 0 is always used for specific frame control: CRC, frame alignment, submultiframe alignment, alarm signaling and bit error detection, while Slot 16 is used for channel associated signaling (CAS). Every eight 125 us frames are considered a submultiframe, because CRC control (Ci bits) is generated for every submultiframe (a submultiframe carries the CRC-4 information for its preceeding one), and 2 submultiframes compose the whole multiframe, which consists of 16 basic frames. It's easy to see the main reason underliying behind this organisation: the fact is that you need four bits (a 2 kbit/s signaling channel) to signalize every 64 kbit/s channel, so 15 bytes are needed to signal the whole 30 voice channels, and a supplementary byte to provide CAS multiframe alignment and stuffing.

Page 6: PDH

Plesiochronous Digital Hierarchy

4© ICT electronicswww.ict.es

Technical Features

PDHMap

T E C H N I C A L F E A T U R E S

140 Mbit/s 34 Mbit/s

Binary Rate 139264.0 kbit/s ± 15 ppm 34368.0 kbit/s ± 20 ppm

Line Code CMI HDB3

Nominal Vpp 1 V 1 V

Impedance 75 Ohm (Ω) 75 Ohm (Ω)

Tolerated input levelattenuation

0-12 dB at 70 MHz as √ƒ 0-12 dB at 17.184 MHz as √ƒ

Number of tributaries 4 4

Justification Positive Positive

Bits Jij = 1 ⇒ Ri = fill-in (jusitification)Bits Jij = 0 ⇒ Ri = information (no justification)(Majority vote over Jij bits)

Frame length 2928 bits 1536 bits

Available bits / tributary/ frame

723 bits 378 bits

Multiplexing method bit interleaving bit interleving

Frame Rate 47562.842 frames / s 22375.0 bit/s

Frame alignment bit rate 570754.098 bit / s 223750.0 bit/s

Maximum justificationrate per tributary

47563 bit / s aprox. 22375 bit/s

Nominal justificationratio

0.419 0.436

Page 7: PDH

Plesiochronous Digital Hierarchy

5© ICT electronicswww.ict.es

Technical Features

PDHMap

8 Mbit/s 2 Mbit/s

Binary Rate 8448.0 kbit/s ± 30 ppm 34368.0 kbit/s ± 20 ppm

Line Code HDB3 HDB3

Nominal Vpp 2.37 V 2.37 V (coaxial cable)3.00 V (balanced cable)

Impedance 75 Ohm (Ω) 75 Ohm (Ω) (coaxial)120 Ohm (Ω) (balanced)

Tolerated input levelattenuation

0-6 dB at 4224 kHz as √ƒ 0-6 dB at 1024 kHz as √ƒ

Number of tributaries 4

Justification Positive

Bits Jij = 1 ⇒ Ri = fill-in (jusitification)Bits Jij = 0 ⇒ Ri = information (no justification)(Majority vote over Jij bits)

Frame length 848 bits 256 bits

Available bits / tributary/ frame

206 bits

Multiplexing method bit interleaving octet

Frame Rate 9962.264 frames / s 8000 bit/s

Frame alignment bit rate 99622.64 bit / s 28000 bit/s (32000 bit/sincluding supervision bits)

Maximum justificationrate per tributary

10000 bit / s aprox.

Nominal justificationratio

0.424