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Parallelizing IPsec: switching SMP to ’On’ is not even half the way Parallelizing IPsec: switching SMP to ’On’ is not even half the way Steffen Klassert secunet Security Networks AG Dresden June 11 2010
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Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

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Page 1: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec: switching SMP to ’On’ is noteven half the way

Steffen Klassert

secunet Security Networks AG

Dresden

June 11 2010

Page 2: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Table of contents

Some basics about IPsec

About the IPsec performance issues

Parallelizing IPsec

Some IPsec throughput benchmarks

Page 3: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

The IPsec protocols

Every IPsec implementation must support two protocols.

I IP - Authentication Header (AH)

I AH builds a cryptographic checksum over the payload andparts of the header of a network packet.

I This checksum is appended to the network packet and is usedto ensure authenticity of this network packet.

I IP - Encapsulated Security Payload (ESP)

I ESP is primary used to encrypt the payload of network packets.I A cryptographic checksum can be used to ensure authenticity

of the payload, similar to AH.

Page 4: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

The IPsec protocols

Every IPsec implementation must support two protocols.

I IP - Authentication Header (AH)

I AH builds a cryptographic checksum over the payload andparts of the header of a network packet.

I This checksum is appended to the network packet and is usedto ensure authenticity of this network packet.

I IP - Encapsulated Security Payload (ESP)

I ESP is primary used to encrypt the payload of network packets.I A cryptographic checksum can be used to ensure authenticity

of the payload, similar to AH.

Page 5: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

The IPsec protocols

Every IPsec implementation must support two protocols.

I IP - Authentication Header (AH)

I AH builds a cryptographic checksum over the payload andparts of the header of a network packet.

I This checksum is appended to the network packet and is usedto ensure authenticity of this network packet.

I IP - Encapsulated Security Payload (ESP)

I ESP is primary used to encrypt the payload of network packets.I A cryptographic checksum can be used to ensure authenticity

of the payload, similar to AH.

Page 6: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

ESP modesThe ESP protocol can be used in several modes.

I Transport mode - Pure layer 4 payload encryption.

I Tunnel mode - Encryption for the whole IP packet (payload +IP header).

ESP

Header

ESP

Auth.Payload DataTCP Header

ESP

Trailer

IP−4

Header

ESP

Header

orig. IP−4

Header

ESP

Auth.Payload DataTCP Header

ESP

Trailer

IP−4

Header

ESP in IP−4 packet (transport mode)

ESP in IP−4 packet (tunnel mode)

Encrypted

Authenticated

Encrypted

Authenticated

Page 7: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

ESP modesThe ESP protocol can be used in several modes.

I Transport mode - Pure layer 4 payload encryption.

I Tunnel mode - Encryption for the whole IP packet (payload +IP header).

ESP

Header

ESP

Auth.Payload DataTCP Header

ESP

Trailer

IP−4

Header

ESP

Header

orig. IP−4

Header

ESP

Auth.Payload DataTCP Header

ESP

Trailer

IP−4

Header

ESP in IP−4 packet (transport mode)

ESP in IP−4 packet (tunnel mode)

Encrypted

Authenticated

Encrypted

Authenticated

Page 8: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some basics about IPsec

The Hardware setup and IPsec scenario

The hardware setup is the simplest possible IPsec VPN scenario,consisting of two IPsec gateways and two clients.

IPsec Gateway 1

IPsec

(ESP tunnel mode)

IPsec Gateway 2Client 1 Client 2

Plain IPPlain IP

Packet forwarding from client 1 to client 2, unidirectional traffic,one packet flow.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

Plain packet forwarding vs. tunnel mode ESP withcbc-aes192 / hmac-sha1 on a Gbit network.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

IPsec throughput: scaling with the number of cpus

494 byte packets (L3) cbc-aes-192 / hmac-sha1

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

IPsec throughput: scaling with the number of cpus

The forward packet path is strictly serialized. I.e. the cpu thatdrives the interrupt of the receiving NIC does all the work!

Why?

I The upper layer (L4) protocols rely on a certain packet order.The packets must be received in the same order they wheresent.

I IPsec adds a sequence number to each packet to notify packetreplay attacks.

Distributing the received network packets to multiple cpus leads topacket reordering!

Page 12: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

IPsec throughput: scaling with the number of cpus

The forward packet path is strictly serialized. I.e. the cpu thatdrives the interrupt of the receiving NIC does all the work!

Why?

I The upper layer (L4) protocols rely on a certain packet order.The packets must be received in the same order they wheresent.

I IPsec adds a sequence number to each packet to notify packetreplay attacks.

Distributing the received network packets to multiple cpus leads topacket reordering!

Page 13: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

IPsec throughput: scaling with the number of cpus

The forward packet path is strictly serialized. I.e. the cpu thatdrives the interrupt of the receiving NIC does all the work!

Why?

I The upper layer (L4) protocols rely on a certain packet order.The packets must be received in the same order they wheresent.

I IPsec adds a sequence number to each packet to notify packetreplay attacks.

Distributing the received network packets to multiple cpus leads topacket reordering!

Page 14: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

About the IPsec performance issues

IPsec throughput: scaling with the number of cpus

The forward packet path is strictly serialized. I.e. the cpu thatdrives the interrupt of the receiving NIC does all the work!

Why?

I The upper layer (L4) protocols rely on a certain packet order.The packets must be received in the same order they wheresent.

I IPsec adds a sequence number to each packet to notify packetreplay attacks.

Distributing the received network packets to multiple cpus leads topacket reordering!

Page 15: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

Network parallelization approaches

Due to packet reorder problems, parallelization of the networkstack is a highly nontrivial task. Several software, as well ashardware based approaches came up during the last years.

I Multiqueue network devices.

I Receive packet steering.

These techniques do flow based parallelization, i.e. distributingpacket flows across the cpus.

No parallelization within the flows to preserve the packetorder!

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

Flow based parallelization on IPsec

Flow based parallelization is only limited useful for tunnel modeESP.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

Flow based parallelization on IPsec

Flow based parallelization is only limited useful for tunnel modeESP.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

Flow based parallelization on IPsec (tunnel mode ESP)

IPsec Gateway A

IPsec Gateway B

Client 1

Client 4

Client 3

Client 2

1−>4

1−>4

1−>4

1−>4

2−>3

2−>3

2−>3

2−>3

A−>B A−>B

ESPHeader

orig. IP−4Header

ESPAuth.

Payload DataTCP HeaderESP

TrailerIP−4

Header

ESP in IP−4 packet (tunnel mode)

Encrypted

Authenticated

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

Requirements of an IPsec parallelization

I R1: It should be possible to distribute cpu intensive codepathsto a given set of cpus.

I R2: It should be possible to parallelize even within a flow.

I R3: The parallelization framework must preserve the order ofthe parallelized network packets. E.g. the packets must leavethe parallel codepath in the same order as they entered.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

A parallel crypto layer

Advantages of a parallel crypto layer:

I The crypto operations are by far the most cpu intensivecodepath (R1).

I The crypto layer does not know about the crypto user (ESP),no need to care about the order of the requests within thecrypto layer (R2).We just have to ensure that the crypto requests leave thecrypto layer in the same order as they entered (R3).

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

The gain of a crypto layer parallelization

T−crypt T−crypt T−crypt T−crypt

T−crypt

T−crypt

T−crypt

T−crypt

T−par T−ser

T−sum

T’−sum

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

The gain of a crypto layer parallelization

I Large crypto requests (e.g. big network packets) benefit well.

I Very cpu intensive crypto algorithms benefit well.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

The padata/pcrypt framework

parallelization function

parallelization queue

round robin+add seqnr#

cryptooperations

serialization function

reorder queue

serialization

serialization queue

CPU0

CPU1

CPU3

CPU2

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

The padata/pcrypt framework

parallelization function

parallelization queue

round robin+add seqnr#

cryptooperations

serialization function

reorder queue

serialization

serialization queue

CPU0

CPU1

CPU3

CPU2

Page 25: Parallelizing IPsec: switching SMP to ’On’ is not even ... · Parallelizing IPsec: switching SMP to ’On’ is not even half the way Some basics about IPsec The IPsec protocols

Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Parallelizing IPsec

The padata/pcrypt framework

serialization function

reorder queue

serialization

serialization queue

cryptooperations

parallelization function

parallelization queue

round robin+add seqnr#

CPU0

CPU1

CPU3

CPU2

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

The software test setup

I Kernel: linux-2.6.33-rc7 with two additional patches(padata/pcrypt) picked from the cryptodev-2.6 tree.

I IPsec: Tunnel mode ESP on IPv4.

I Encryption/Decryption: cbc-aes-192 (x86 64 optimizedversion of AES).

I Authentication: hmac-sha1 (generic C version).

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

The hardware test setup

EXFO FTB−400

Packetblazer

IPsec Gateway 1

IPsec

(ESP tunnel mode)

IPsec Gateway 2

Plain IPPlain IP

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

The hardware test setup

IPsec gateway 1 (Apligo Nexom NSA7110):

I 2 x XEON DP E5540 2.53GHz (2 x quad-core)

I 2 x 1024 DDR3 ECC

I 8 x Intel Corporation 82575EB Gbit NIC

I Intel 5520 and ICH10R Chipset

IPsec gateway 2 (SIE XL-1.0):

I 2 x Intel Xeon X5550 2,66GHz (2 x quad-core)

I 4 x 1024 DDR3 ECC

I Intel 4Port Gbit NIC EXPI9404PTL

I Intel 5520 and ICH10R Chipset

Hyperthreading was enabled on both IPsec gateways on all tests, sowe had 16 logical cores (8 on each socket) for parallel processing.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

RFC 2544 Benchmarking Methodology

I Test duration: 60 sec.

I Throughput test results: Maximal throughput rate withoutpacket loss (60 sec.).

I latency test results: Latency at Maximal throughput ratewithout packet loss.

I Packet sizes RFC 2544 (Layer 2): 64, 128, 256, 512, 1024,1280, 1518 byte.

I Used packet sizes (Layer 2): 64, 128, 256, 512, 1024, 1280,1420 byte.

I Used packet sizes (Layer 3): 46, 110, 238, 494, 1006, 1262,1402 byte.

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Maximum theoretical throughput on Layer 3

IPsec Gateway 1

IPsec

(ESP tunnel mode)

IPsec Gateway 2Client 1 Client 2

Plain IPPlain IP

Wire speed at layer 1: 1000 Mbit/s.

IP−4Header

Payload DataTCP Header

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Maximum theoretical throughput on Layer 3

IPsec Gateway 1

IPsec

(ESP tunnel mode)

IPsec Gateway 2Client 1 Client 2

Plain IPPlain IP

ESPHeader

IP−4Header

ESPAuth.

Payload DataTCP HeaderESP

TrailerIP−4

Header (Tunnel)

IP−4Header

Payload DataTCP Header

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Maximum theoretical throughput on Layer 3

ESPHeader

IP−4Header

ESPAuth.

Payload DataTCP HeaderESP

TrailerIP−4

Header (Tunnel)

IP−4Header

Payload DataTCP Header

L2Header

L1Header

L2Trailer

L1Trailer

58 byte L3 packet size (S) 38 byte

Maximum theoretical throughput on Layer 3:

MTT (S) =S

S + 96× 1000 Mbit/s

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Maximum theoretical throughput on Layer 3

ESPHeader

IP−4Header

ESPAuth.

Payload DataTCP HeaderESP

TrailerIP−4

Header (Tunnel)

IP−4Header

Payload DataTCP Header

L2Header

L1Header

L2Trailer

L1Trailer

58 byte L3 packet size (S) 38 byte

Maximum theoretical throughput on Layer 3:

MTT (S) =S

S + 96× 1000 Mbit/s

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Maximum theoretical throughput on Layer 3

MTT (46) = 324 Mbit/s (1)

MTT (110) = 534 Mbit/s (2)

MTT (238) = 712 Mbit/s (3)

MTT (494) = 837 Mbit/s (4)

MTT (1006) = 913 Mbit/s (5)

MTT (1262) = 929 Mbit/s (6)

MTT (1402) = 932 Mbit/s (7)

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Effective throughput on Layer 3

ET (S) =Measured throughput for packetsize S

MTT (S)

0 ≤ ET (S) ≤ 1

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Unidirectional effective throughput benchmarks

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Unidirectional throughput: plain, IPsec vanilla, IPsec pcrypt

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Unidirectional effective throughput 494 Byte on Layer 3

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Latency with linux-2.6.33-rc7 vanilla and pcrypt 16 cores

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Thanks to Apligo for providing me with test hardware!

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Parallelizing IPsec: switching SMP to ’On’ is not even half the way

Some IPsec throughput benchmarks

Thanks for listening!