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Parallel Processing Group Members : PJ Kulick Jon Robb Brian Tobin
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Page 1: Parallel Processing Group Members: PJ Kulick Jon Robb Brian Tobin.

Parallel Processing

Group Members:PJ KulickJon RobbBrian Tobin

Page 2: Parallel Processing Group Members: PJ Kulick Jon Robb Brian Tobin.

Topics Theory of parallel computers

SUPERCOMPUTERS

Distributed Computing

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Parallelism is the process of performing tasks concurrently.

What is parallelism??? Real life examples:

Definition

A pack of wolves hunting its prey. An orchestra.

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Flynn’s Hardware TaxonomyProcessor Organizations

Single instruction, single data (SISD)

stream

Multiple instruction, single data (MISD)

stream

Single instruction, multiple data (SIMD)

stream

Multiple instruction, multiple data

(MIMD) stream

Uniprocessor

Vector processor

Array processor

Shared memory

Distributed memory

Symmetric multiprocessor

(SMP)

Nonuniform memory access

(NUMA)

Clusters

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Taxonomy of parallel computing paradigms

Parallel Computer

Synchronous Asynchronous

Vector/Array

SIMD

Systolic

MIMD

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Interconnection Networks(IN)

IN topology

Distributed Memory Shared Memory

Static Dynamic

1-dimensional

2-dimensional

Hypercube

Single-stage

Multi-stage

Cross-bar

Vector

MIMD

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Distributed Memory – Static Networks

Linear array (1-d)

2-dimensional networks

ring star tree mesh

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Distributed Memory – Static Networks (cont’d)

Fully connected network

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Hypercube

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Distributed Memory

Dynamic configurations

single-stage

multi-stage

cross-bar

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Deep Blue First computer to defeat a world

chess champion

32-node IBM Power Parallel SP2

6-move look ahead capability

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SP2 Architecture “The IBM SP2 is a general-purpose

scalable parallel system based on a distributed memory message passing architecture.”

2 to 128 nodes POWER2 technology RISC

System/6000 processor

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SP2 Architecture

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SP2 Architecture

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Super Computers – “Real World”

RISC System technology Running a high-volume scalable WWW

server Forecasting the weather Designing cars

Compaq AlphaServer technology Human Genome Project

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Sun Systems

MAJC Chip

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MAJC Implements parallel processing on one

chip Can operate in standalone or with up to

several hundred others in parallel First version contains two separate

processors As time goes many more will be included

on one chip

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Features Four function units

per processor Each function unit

contains local registers

Global registers can be accessed by all FU’s

Operates as SIMD

Multiple function units allow multiple instructions to be done simultaneously

Each function unit can act as RISC/DSP processor itself

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Architecture

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Instruction Word

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SGI

Onyx 3000

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Onyx 3000 Series Developed for

visualization and supercomputing

Modular design allows for scalability ease

Snap together approach

Growth in multiple dimensions

NUMAFlex architecture

Designed for different generations to work together

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Road Map

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Available configurations

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Applications of Onyx 3000 High speed processing Real time graphic to video High-definition editing Integral support for virtual reality, real-

time six degrees of freedom (6DOF) interaction, and sensory immersion

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Real World Example

The Cave(Iowa State University)• Recreation of Forbidden City• John Dear Factory• Molecular Structuring

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References http://www.sun.com http://www.sgi.com http://www.ibm.com http://www.vrac.iastate.edu Stallings, Williams. Computer Organization and Architecture,5th

Edition.Upper Saddle River, New Jersey: Prentice Hall 2000 Lewis, Ted G. Introduction to Parallel Computing. Englewood

Cliffs, New Jersey: Prentice Hall 1992 Kumar, Vippin. Introduction to Parallel Computing. Redwood

City,California: The Benjamin/Cummings Publishing Company 1994

Moldovan,Dan I. Parallel Processing: From Applications to Systems. San Mateo, California: Morgan Kaufmann 1993