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1 Overview of the Beam Interlock System BIS Overview Linac4 BCC meeting / 21 Oct.2010 / B.Puccio (TE/MPE)
24

Overview of the Beam Interlock System

Feb 05, 2016

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Overview of the Beam Interlock System. Beam Interlock System. “Target” system. BIS. Principle. User System #n. User #n-1. Beam_Permit. User. User System #3. “Target” system. AND. User_Permit#3. User System #2. User_Permit#2. - PowerPoint PPT Presentation
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Page 1: Overview of the  Beam Interlock System

1

Overviewof the

Beam Interlock System

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Page 2: Overview of the  Beam Interlock System

Beam Interlock System

2

BIS

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Page 3: Overview of the  Beam Interlock System

UserSystem #n

User

#n-1

Principle

3

UserUser

System #3User

System #2

User System #1

Σ (User_Permit = « TRUE » ) Beam_Permit = « TRUE »

Beam Source or Extraction kickeror Dump Kicker,…etc…

AND

BIS

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User_Permit#1

User_Permit#2

User_Permit#3

Beam_Permit

Page 4: Overview of the  Beam Interlock System

Central part of LHC protection

4 BIS

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Page 5: Overview of the  Beam Interlock System

Dedicated User Interfaces (named CIBU) for connecting User System Permit signals via copper cable

Always installed in the User System rack Input signal = current loop

BIS Layout

5 User Interfaces

Beam Interlock Controller

front viewrear

Beam

Permit

Loops

(F.O.)

UserPermit

#1

#14

#2copper cables

User System #1

User System #2

BIS = set of Beam Interlock Controllers with 14+1 inputs each BICs can be daisy chained Two types of layout: ring or tree architecture (see next slide)

Technical

Network

JAVA Application

BIC boards embedded in VME chassis Dedicated FESA class for monitoring and for remote testing Supervision (JAVA application) for Operators

User System #14

Page 6: Overview of the  Beam Interlock System

6

Two types of layout

ring architecture or tree architecture

are identical.... except the “Master” BICAll BIC

Page 7: Overview of the  Beam Interlock System

Example of Master BIC: SPS Extraction (1/2)

o Extraction_PermitExtraction_Permit for the Extraction kickers is generated by a “Master” BIC:

o Simple ‘AND’ function replaced by combination of ‘OR of AND’ function

o All inputs are NOT maskable

In taking into account the LHC injection region and the different conditions to inject a

high intensity beam, we introduce another complication...

o Basic Principle:

Extraction_Permit Extraction_Permit = (TT60 BIC = OK) AND (TED = “IN position” )

OR

(TT60 BIC = OK) AND (Ti2 BICs = OK )

Courtesy Verena Kain (BE/OP)

o TED position is taken

into account to ignore

downstream inputs

for necessary

operational flexibility

Page 8: Overview of the  Beam Interlock System

8

Various operating modes:

M1: Beam to upstream TED (setting up of the SPS extractions)

M2: Beam onto downstream TED (setting up of the transfer line)

M3: Probe beam into LHC (setting up of the LHC injections…)

M4: Low intensity beam into LHC (filling the LHC)

M5: High intensity beam into LHC (filling the LHC)

Corresponding Truth Table for Master BIC:

Input Names Input Type M1 M2 M3 M4 M5

0 Software Interlock Sw 1 1 1 1 1

1 TT60 User_Permits Slave BIC 1 1 1 1 1

2 TED Upstream ‘IN position’ User System

1 0 0 0 0

3 Ti2 Upstream User_Permits Slave BIC X 1 1 1 1

4 Ti2 Downstream User_Permits

Slave BIC X 1 1 1 1

5 TED Downstream ‘IN position’

User System

X 1 0 0 0

6 LHC b1 Injection User_Permits

Slave BIC X X 1 1 1

7 SPS Probe Beam Flag Safe Param. X X 1 0 0

8 LHC Beam Presence Flag Safe Param. X X X 1 1

9 SPS Setup Beam Flag Safe Param. X X X X 0

10 LHC Setup Beam Flag Safe Param. X X 1 1 0

Extraction Beam_Permit 1 1 1 1 1

Example of Master BIC: SPS Extraction (2/2)

Page 9: Overview of the  Beam Interlock System

System Performance

9

Critical process in Hardware: ♦ functionality into 2 redundant matrices♦ VHDL code written by different engineers following same specification.

Critical versus Non-Critical: ♦ Critical functionality always separated from non-critical.♦ Monitoring elements fully independent of the two redundant safety channels.

 

100% Online Test Coverage: Can be easily tested from end-to end in a safe manner => recovered “good as new”

Safe & Reliable: Safety Integrity Level 3 was used as a guideline

Whole design studied using Military and Failure Modes Handbooks Results from the LHC analysis are:

P (false beam dump) per hour = 9.1 x 10-4

P (missed beam dump) per hour = 3.3 x 10-9

Page 10: Overview of the  Beam Interlock System

FALSE

Setup Beam Flag

Within a fixed partition, half of User Permit signals

could be remotely masked

“Flexible” system: thanks to Input Masking

Masking

Masking automatically removed when this flag

changes to FALSE

Masking depends on an external condition:

the Setup Beam Flag

this SBF is generated by an independent system

(like LHC Safe Machine Parameters system)

and is distributed by the Timing system

FALSEYES

FALSE

Page 11: Overview of the  Beam Interlock System

BIS monitoring: History Buffer

11

time

Page 12: Overview of the  Beam Interlock System

BIS & Timing...

12

BIS process is independent of Timing

Beam_PermitBeam_Permit changes when one of User_PermitsUser_Permits changes

Nevertheless (thanks to Timing system) the BIS is synchronized to UTC time

TimingReceiver

board

1PPS tick

Event pulseMachine Timing

In addition, an External hardware signal can create a record in the History Buffer

- like for the SPS Extraction lines with the Extraction Event occurrence

Beam Interlock Controller

Useful for checking time relationship Interlock’s change Vs. Machine event

Record created at the external

pulse occurrence

Page 13: Overview of the  Beam Interlock System

BIS Output: Beam Permit signals

13

♦ Beam_Permit is TRUE is corresponding frequency is detected

♦ absence or erroneous frequency means that Beam_Permit is FALSE.

 

♦ For Beam_Permit _A: Nominal Frequency 9.375MHz => Period = 107nsDuty cycle 50%

Both Beam_Permits transmitted via Fibres

Conversion Electrical/light and

Light/electrical performed by a

dedicated board

♦ For Beam_Permit _B: Nominal Frequency 8.375MHz => Period = 119ns

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Page 14: Overview of the  Beam Interlock System

User_Permit_A+

User_Permit_A-

BIS User Interface (named CIBU)

14

User System to BeamInterlockController

Front view

rear view

( could be PLC based, or VME based, or any type of electronics…)

User_Permit state transmitted in

RS485 format

Unique HW solution for connecting any User System to the BIS

Current loop signal

CIBU

User_Permit = “TRUE” if input current > ~10mA

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Page 15: Overview of the  Beam Interlock System

BIS User Interface details

15

USER_PERMIT_+

USER_PERMIT_-

HCPL2601High Speed Optocoupler

74HCT14Schmidt Trigger

MAX3440ETransceiver

USER_PERMIT

Fast response time (2.6 µS max) Large Input Voltage Range ( 4V up to 25V) Input TVS Diodes (33Volts) to protect overvoltage Input current limitation stage Hysteresis, clean signal edges RS485 output, good EMC, long distance (up to 1200m)

More details in EDMS #636589More details in EDMS #636589

BIS

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Page 16: Overview of the  Beam Interlock System

BIS User Interface input

16

User Side

<5 meters

+ 25Vmax

0V

Shielded & Twisted Pair cable

User Interface (CIBU )

User_Permit_A

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Mandatory circuit:a) All ground / earth / 0V connectedb) Spare wires groundedc) Shield 360o at both ends & NO pig-tailsd) Cable should be Twisted pair (like NE8

type) or LEMO 00 from VME front-panele) More than 5 meters = FORBIDEN

User_Permit_B

Page 17: Overview of the  Beam Interlock System

Summing up

17

● Initially designed for LHC => Highly reliable, Fast and Maintainable

● Modular and expandable

● Deployed in SPS ring and Transfer lines SPS-CNGS-LHC

● Tree architecture suitable for Linac4 requirements● Slave BICs : “AND” function of 14+1 inputs

with fixed Unmaskable/ Maskable partition● Master BIC : “AND” & “OR” functions of 14+1 inputs

(like local Beam_Permits, User_Permits, Beam Conditions Flags…)

In both cases, an input for Software Interlock allows more flexibility.

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● Redundant Beam_PermitsBeam_Permits = Fixed Freq. signals available of optical

cables

● Unique Hw solution to interface any type of electronics● User_PermitsUser_Permits = simple current loops ( with I >10mA )● Redundant signals are required● Interconnecting recommendations have to be followed

Page 18: Overview of the  Beam Interlock System

Thank you !Thank you !

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Page 19: Overview of the  Beam Interlock System

Backup slidesBackup slides

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Page 20: Overview of the  Beam Interlock System

Electrical Architecture (LHC case)

20

Electrical Architecture

VME Chassis2U ChassisUser System

in USER rack in INTERLOCK rack

Cable

Courtesy BenjaminTodd

Page 21: Overview of the  Beam Interlock System

Kickers only pulse if they have the PERMIT

o ...and if energy is correct (BETS = beam energy tracking system) and for the injection kicker: if the abort gap keeper (AGK) gives green light → see Jan’s talk

o LHC injection kicker needs: injection permit (produced by the Injection BICsInjection BICs)

o SPS extraction kicker needs: extraction permit (produced by the Extraction Extraction master BICmaster BIC)

o Injection permit = LHC beam permit + injection BICs OK

o Extraction permit = injection permit + transfer line BICs OK + extraction BICs OK +

+ combination of flags

Courtesy Verena Kain (BE/OP)

Page 22: Overview of the  Beam Interlock System

User Interface: remote test & monitoring

22

User_Permit

MAX3441ETransceiver

User_Permit

74HCT14Schmidt Trigger

HCPL2601High SpeedOptocoupler

Input CurrentLoop

OutputDifferential

Test Logic

User Permit Monitor

NOT Beam Permit INFO

Test On

G6K-2F-Y4.5Small-Signal

Relay

User Permit Fault

Test and Monitoring of USER_PERMIT Channel (signals in green)

Page 23: Overview of the  Beam Interlock System

Reaction Time

23

Page 24: Overview of the  Beam Interlock System

BIS Hardware

24

User Interface Redundant

P.S.

Manager Test & Monitoring

Back PanelF.O. variant of the User Interface

Optical daughter

cards

Controller’s sideUser system’s side

~2200 boards produced(~85% in operation)