Optimal Linear Precoding with Theoretical Optimal Linear Precoding with Theoretical and Practical Data Rates in High-Speed S il Li kB kl C i i Serial-Link Backplane Communication Vladimir Stojanovic 1,2 , Amir Amirkhany 1 , Mark Horowitz 1 1 Stanford University 2 R b I 2 Rambus Inc.
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Optimal Linear Precoding with TheoreticalOptimal Linear Precoding with Theoretical and Practical Data Rates in High-Speed S i l Li k B k l C i iSerial-Link Backplane Communication
Vladimir Stojanovic1,2, Amir Amirkhany1, Mark Horowitz1
Timing noise – always looked at separatelyKey to integrate with voltage noise sourcesKey to integrate with voltage noise sourcesNeed to map from time to voltage
9
Effect of timing noise
Ideal sampling
Jittered sampling sampling sampling
Voltage noiseVoltage noise when receiver clock is offclock is off
The effect depends on the size of the jitter, the input sequence, and the channel
10
Need effective voltage noise distribution
Example: Effect of transmitter jitter
kbkb
1 TXb ε
ideal
kb
kT
TXkε
Tk )1( +
TXk 1+ε
kT Tk )1( +
TX+ kb
1
2
kkb 1+ε
TXkε
TXk 1+ε
kb−
2 ≈TXkkb ε−noisekb kk
Decompose output into ideal and noiseNoise are pulses at front and end of symbolNoise are pulses at front and end of symbol
Width of pulse is equal to jitter
Approximate with deltas on bandlimited channels
11
V. Stojanović, M. Horowitz, “Modeling and Analysis of High-Speed Links,” IEEE Custom Integrated Circuits Conference, September 2003. (invited)
Jitter Propagation Model
TXw )( jTpa kb
+ kxISIk
x kaprecoder
pulseresponse
idealw )( jTpka k +
jitTXx RXε
k
vddn
)(sHjit
PLL
TXkk 1, +ε
inn⎟⎠⎞
⎜⎝⎛ +
2TjTh
jk
x kε
impulse RX
noise
kk 1, + impulseresponse
∑ +=++sbE
RXISI jTpbkTx )()( φεφ ∑−=
− +=++sbSj
ijkki jTpbkTx )()( φεφ
( ) ( )∑ ⎥⎤
⎢⎡ −+−−−++=++
sbETXRXTXRXRXjitter TjThTjThbkTx )()()( εεφεεφεφ
12
( ) ( )∑−=
−+−− ⎥⎦⎢⎣+++=++
sbSjjkkijkkijkki jThjThbkTx 1)
2()
2()( εεφεεφεφ
Outline
Show system level optimization for linksCreate a framework to evaluate trade-offsCreate a framework to evaluate trade offs
High-speed link modelingg p gSystem level optimization
Limits – What is the capacity of these links?Limits What is the capacity of these links?Improving today’s baseband signaling
Energy-efficiencygy y
13
Baseline channels
20
0
n [d
B]
26" NELCO,t b
(b)
-60
-40
-20
Atte
nuat
ion no stub
-100
-80
-6026" FR4, via stub
0 5 10 15 20
100
frequency [GHz]
Legacy (FR4) - lots of reflectionsMicrowave engineered (NELCO)
14
Capacity calculation
Modified waterfilling
HEN12
⎟⎞
⎜⎛
⎟⎞
⎜⎛
Add phase noise
( )PARNENEEt
HE
HE
nEN
N
n nnnthermal
nn
N1log
21bmaximizelim
1
12222
⎟⎟⎟
⎠⎜⎜⎜
⎝⎟⎟
⎠
⎞
⎜⎜
⎝
⎛
+Γ+=
∑
∑
−
=∞→
θσσ
NnE
PARNENEEts
n
npeakavgn
,...,1,0
..1
1
=≥
==∑=
Concave problem
15
Capacity with link-specific noise
120
140
[Gb/
s]
thermal noiseNELCO120
140
y [G
b/s] FR4
60
80
100
Cap
acity
thermal noise and LC PLL phase noise
thermal noise and ring PLL phase noise
60
80
100
Cap
acity
thermal noise
20
40
60
20
40
60thermal noise and LC PLL phase noise
thermal noise and ring PLL phase noise
-25 -20 -15 -10 -5 00 log10(Clipping probability)
-25 -20 -15 -10 -5 00 log10(Clipping probability)
Given EpeakFind Eavg from PAR (desired clipping probability)
16
Capacity much higher than data rates in today’s links
Available bandwidth
9
10
Capacity with thermal noise
6
7
8
s/H
z
Capacity with thermal noise
Nelco 105Gb/sFR4 70Gb/s
3
4
5#bits
0
1
2
Up to 12GHz
0 5 10 150
frequency [GHz]
17
pNo need to build 40Gs/s transceivers
Uncoded Discrete-multitone
70
80
90
e [G
b/s] a) NELCO
thermal noiseNELCO70
80
90
e [G
b/s] b) FR4FR4
40
50
60
70
Data
rate
thermal noise and LC PLL phase noise
40
50
60
70
Data
rate
thermal noise
10
20
30 thermal noise and ring PLL phase noise
10
20
30 thermal noise and LC PLL phase noise
thermal noise and ring PLL phase noise
Modified Levin-Campello loading for phase noise
-25 -20 -15 -10 -5 00 log10(Clipping probability)
-25 -20 -15 -10 -5 00 log10(Clipping probability)
Modified Levin Campello loading for phase noiseGap is huge for BER=10-15
Too costly to use soft decoders
18
Still, data rates much better than in today’s baseband linksBaseband links ISI limited
Removing ISILinear transmit equalizer
SampledData
Deadband Feedback tapsTx Anticausal tapsData
TapSel
Data
Channel
Decision-feedback equalizer
Tap SelLogicCausal
taps
I
doutNoutP
d
Ω50Ω50
Transmit and Receive Equalization Ch i l f ISI
0eqI
Changes signal to correct for ISIOften easier to work at transmitter
DACs easier than ADCs
19
DACs easier than ADCs
J. Zerbe et al, "Design, Equalization and Clock Recovery for a 2.5-10Gb/s 2-PAM/4-PAM Backplane Transceiver Cell," IEEE Journal Solid-State Circuits, Dec. 2003.
Transmit equalization – headroom constraint
5
0
n [d
B]
unequalizedTx Anticausal tapsPeak power constraint
-15
-10
-5
Atte
nuat
ion
equalized
TxData
Channel
Peak power constraint
0 0.5 1 1.5 2 2.5-25
-20
frequency [GHz]
Amplitude of equalized signal
Causaltaps
Transmit DAC has limited voltage headroom
Amplitude of equalized signaldepends on the channel
Unknown target signal levelsHard to formulate error or objective function
Need to tune the equalizer and receive comparator levels
20
Need to tune the equalizer and receive comparator levels
Optimization example: Power constrained linear precoding
w P
power constraint
gka kake
precoder channelpulse response
g
noise ka
k
( )( ) 222121),( σgwwgwgEgwMSE TTTa ++−= Δ PPP
2)1(Δ E T P
Add i bl i t lif t k t t l l
2
2
)11)(11()1()(
σ+−−=
ΔΔΔΔ
ΔΔ
wwEwEwSINR
TTTTTa
Ta
unbiased PIIPP
Add variable gain to amplify to known target levelFormulate the objective function from error
SINR is not concave in w in general
21
SINR is not concave in w in generalChange objective to quasiconcave unbiasedSINR
Optimal linear precoding
Still, does this objective really relate to link performance? Need to look at noise and interference distributions
15.0ma imi e 1min −−Δ offsetwVwd PDpeak
T PIP
Need to look at noise and interference distributions
( )1..
)11)(11(maximize
1
2/12
1
≤
+−−−−=
ΔΔΔΔ
wtswwEw TT
PDT
PDTT
a
p
σγ
PIIIIP
Minimize BER
1
σ2=wTS0TXw+wTS0
RXw+σ2thermal
Residual dispersion into peak distortionReflections into mean distortion
Includes all link-specific noise sources
22
Includes all link specific noise sources
Multi-level: Offset and jitter are crucial
thermal noise + ff t
thermal noise + offset+ jittth l i offset jitter
25
30
e [G
b/s]
PAM8 25
30
[Gb/
s]
35
40
45
e [G
b/s]
thermal noise
15
20D
ata
rate
PAM16PAM4
PAM215
20
Dat
a ra
te
PAM2
PAM420
25
30
35
Dat
a ra
te
PAM4
PAM16
PAM8
0 2 4 6 8 10 12 14 16 18 200
5
10
0 2 4 6 8 10 12 14 16 18 200
5
10 PAM2
PAM8
0 2 4 6 8 10 12 14 16 18 200
5
10
15PAM2
To make better use of available bandwidth, need better circuits
0 2 4 6 8 10 12 14 16 18 20Symbol rate [Gs/s]
0 2 4 6 8 10 12 14 16 18 20Symbol rate [Gs/s]
0 2 4 6 8 10 12 14 16 18 20Symbol rate [Gs/s]
23
circuitsPAM2/PAM4 robust candidate for next generation links
Full ISI compensation too costly
thermal noisethermal noise + offset
thermal noise + offset+ jitter
14
16
18
20
rate
[Gb/
s]
14
16
18
20
a ra
te [G
b/s]
PAM414
16
18
20
rate
[Gb/
s]
6
8
10
12Dat
a
PAM16PAM4
PAM2PAM8
6
8
10
12Dat
a PAM8
PAM28
10
12Dat
a
PAM2
PAM4
PAM8
0 2 4 6 8 10 12 14 160
2
4
6
0 2 4 6 8 10 12 14 160
2
4
6 PAM2
0 2 4 6 8 10 12 14 160
2
4
6
0 2 4 6 8 10 12 14 16Symbol rate [Gs/s]
0 2 4 6 8 10 12 14 16Symbol rate [Gs/s]
0 2 4 6 8 10 12 14 16Symbol rate [Gs/s]
Today’s links cannot afford to compensate all ISI
24
Limits today’s maximum achievable data rates
Outline
Show system level optimization for linksCreate a framework to evaluate trade-offsCreate a framework to evaluate trade offs
High-speed link modelingg p gSystem level optimization
Limits – What is the capacity of these links?Limits What is the capacity of these links?Improving today’s baseband signaling
Energy-efficiencygy y
25
Energy efficiency of link components
120
140
W/G
b/s]
5.514
16
18
mW
/Gb/
s]
PAM4PAM2
60
80
100
PAM2 Tx5 Rx20PAM2 Tx5 Rx1+20PAM2 Tx50 Rx80PAM4 Tx5 Rx20 p
er b
it [m
115 9
4
6
8
10
12
ost p
er b
it [m
20
40
PAM4 Tx5 Rx20PAM4 Tx50 Rx80
nerg
y co
st
1 2.2
811
1.5
5.9
0.3
0.450
2
4
T T R T R S PLL CDR
Ener
gy c
o
Large chunk of energy on timing sub-system (PLL CDR)
0 2 4 6 8 10 12 14 16 18 200
Data rate [Gb/s]EnTxTap RxTap RxSamp PLL CDR
Large chunk of energy on timing sub-system (PLL, CDR)Different scaling for PAM2/PAM4
Energy scales linearly with technology
26
Likely to remain a key constraintCan’t count on very complex filters
Conclusions
Interfaces are challenging system designsGood space to explore system level optimization
Baseband links limited to PAM2,4Residual ISI biggest factorAl b ff t d jittAlso by offset and jitter
Still far from the capacity of these linksStill, far from the capacity of these linksLooking into multi-tone to mitigate ISIImproves energy efficiency