Optimal layout and work allocation in batch assembly under learning effect

188 Int. J. Intelligent Systems Technologies and Applications, Vol. 4, Nos. 1/2, 2008

Copyright © 2008 Inderscience Enterprises Ltd.

Optimal layout and work allocation in batch assembly under learning effect

Yuval Cohen* Department of Management and Economics, The Open University of Israel, 108 Rabutzki Street, P.O. Box 808, Raanana 43104, Israel E-mail: [email protected] *Corresponding author

Ezey M. Dar-El Technion (IIT), Kiryat Hatechnion, Haifa 32000, Israel E-mail: [email protected]

Gad Vitner

Department of Industrial Engineering and Management, School of Engineering, The Ruppin Academic Center, Emek-Hafer 40250, Israel E-mail: [email protected]

Subhash Sarin Grado Department of Industrial and Systems Engineering, Virginia Tech, Blacksburg, VA 2061, USA E-mail: [email protected]

Abstract: This research investigates the effect of system’s configuration (layout) and work allocation on the makespan of batches of different products characterised by significant learning. Frequently, in science-based industries the layout of the batch assembly could be relatively easily setup separately for each batch, where each batch contains different type of products. The research aims at finding guidelines for configurations and work allocations that will minimise the makespan for a given number of workers. Analytical expression of the makespan is developed and analysed.

Keywords: layout; industrial learning; assembly line; batch assembly; makespan; work allocation.

Optimal layout and work allocation in batch assembly 189

Reference to this paper should be made as follows: Cohen, Y., Dar-El, E.M., Vitner, G. and Sarin, S. (2008) ‘Optimal layout and work allocation in batch assembly under learning effect’, Int. J. Intelligent Systems Technologies and Applications, Vol. 4, Nos. 1/2, pp.188–207.

Biographical notes: Yuval Cohen is the Head of the Industrial Engineering Programme at the Open University of Israel. His areas of speciality are production planning, industrial learning and logistics management. He has published several papers in these areas. He served several years as a senior operations planner at FedEx Ground (USA) and received several awards for his contributions to the hub and terminal network planning. He received a PhD from the University of Pittsburgh (USA), an MSc from the Technion – Israel Institute of Technology and a BSc from Ben-Gurion University. He is a Fellow of the Institute of Industrial Engineers (IIE) and a Full Member of the Institute for Operations Research and Management Sciences (INFORMS).

Ezey M. Dar-El holds the Harry Lebensfeld Chair in Industrial Engineering in the Faculty of Industrial Engineering and Management at the Technion – Israel Institute of Technology. He has published extensively in several areas, which include the design and analysis of production/assembly systems, project and FMS scheduling and productivity development. He has also authored two books on productivity improvement and industrial learning. He received a BMechE, an MEngSci and a PhD from the University of Melbourne (Australia). He is a Fellow of the IIE, a Member of SME, ORSIS, HFS and IFPR and is on the editorial board of the IIE Transactions, International Journal of Production Research, Production Planning and Control, International journal of Engineering and Quality Observer. He is an internationally known consultant having worked with over 70 companies in Australia, UK, USA, The Netherlands, Antilles, Italy and Israel.

Gad Vitner is the Head of Industrial Engineering and Management Department at Ruppin Academic Center in Israel. He received a PhD in Industrial and Systems Engineering from University of Southern California in Los-Angeles (USA). He received a BSc and an MSc in Industrial Engineering and Management at the Technion – Israel Institute of Technology. His research areas are: project management, productivity, quality management, production planning and control and PhotoVoltaic energy. He served for 15 years in various senior management positions in several organisations and supervised many projects in the areas of CIM, Strategic Planning, ERP, Production Planning and Control and Quality Management.

Subhash C. Sarin is the Paul T. Norton Endowment Professor in the Grado Department of Industrial and Systems Engineering at Virginia Tech. His areas of speciality are production scheduling, applied mathematical programming and the design and analysis of manufacturing systems. He has published many papers in these areas. He is the recipient of several prestigious awards at the university, state and national levels. He has served as an Associate Editor of several journals. He is a Fellow of the Institute of Industrial Engineers and a Full Member of the Institute for Operations Research and Management Sciences.

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1 Introduction

While assembly layout has been intensively studied (e.g. Becker and Scholl, 2006; Bukchin et al., 2006; Hillier and Hillier, 2006; Sarkar et al., 2005; Sherali et al., 2003) the literature does not mention any research on the effect of learning on choosing a certain layout.

This paper deals with an environment where the demand comes in the form of various orders for small batches of different products (several tens to several hundreds of products) with overall low demand for each product. Typically in such settings learning is significant. It is also assumed that the number of workers, W, is known a priori and that tasks could be split arbitrarily between two successive stations. The objective is to minimise the makespan of a given batch of products with a given work force. Obviously, reaching this objective would maximise the throughput.

Practical instances of this problem are presented in Globerson and Shtub (1984), Globerson and Levin (1995), Karni and Herrer (1995), Cohen and Dar-El (1998), Brenner (1990), Dar-El (2000), Ardity et al. (2001) and others. The situation of processing a product with low overall demand can typically be attributed to science-based products for which the total demands are likely to be between the mid-tens to the low hundreds.

The aforementioned studies assume that the products are assembled on sequential assembly lines, partly due to flow shop arrangement of the equipment. This indeed characterises remanufacturing of engines and heavy appliances. However, in assembly of light electronic parts and devices, as well as light furniture, and some appliances, the workflow could be rearranged in any configuration, suiting the particular batch at hand. Thus, the question of whether to assemble a certain batch on two lines (each with W/2 stations) or on a single line of W stations, has to be answered. This problem (in a different format) was tackled by Gero and Kazakov (1997) but their Genetic Algorithm (GA) approach could not supply any guidelines or principles for coherent decision making.

Since the assembly of each batch could be organised in any layout. It is desired to have guidelines for choosing the best layout for each batch. This paper aims at analysing and supplying these guidelines with respect to minimising the makespan (and maximising throughput).

1.1 Summary of assumptions and their implications

This paper deals with a certain work environment that is defined as follows:

1 Production range: tens to some hundreds of products. As a result, learning is dominant in affecting cycle time (e.g. Ardity et al., 2001; Brenner, 1990; Cohen and Dar-El, 1998; Dar-El, 2000; Globerson and Levin, 1995; Globerson and Shtub, 1984; Karni and Herrer, 1995).

2 Product characteristics: products with large work content that, mostly of it, is manual or cognitive with few machine processing times. As a result learning is dominant (e.g. Globerson and Shtub, 1984; Sabag, 1988).

3 The whole batch of products is needed to be delivered as soon as possible. Thus, the main objective is to minimise the makespan (e.g. Ardity et al., 2001; Cohen and Dar-El, 1998; Karni and Herrer, 1995).

Optimal layout and work allocation in batch assembly 191

4 Aggregate planning for the number of operators precedes the actual work allocation to each of the operators. Determining the number of stations has a major effect on the cost of machinery which is less significantly affected by changing layout or configuration (see Cohen and Dar-El, 1998; Nahmias, 2004).

5 Shortening the makespan increases profitability. For example,

a fast service avoids penalties for lateness and reputation loss

b some customers are willing to pay for shortening the makespan

c alternative production is always ready for the people involved

d reduction of costs that depend on the production time such as inventory cost.

6 The decision making is done in hierarchical way by starting with a rough-cut planning for the human resource requirements. Thus, the layout would be a second step in this decision process.

7 Learning: the learning slopes of all the related tasks sets can be accurately estimated (Dar-El, 2000; Sabag, 1988). As a result, knowing the tasks allocation for each position, the learning curve at that position could be estimated.

8 While several lines could run in parallel, it is assumed that in any given sequential line there are no parallel stations. A sequential line that forks into two (or more) stations with the same set of tasks is said to have parallel stations. Parallel stations double (or more) the requirements for machinery and reduces the repetitions at each station and, therefore, reduce the learning effect. Owing to these shortcomings, it is customary to avoid using parallel stations (e.g. Globerson and Shtub, 1984).

1.2 Modelling industrial learning

The mathematical form of the classical power learning curve, introduced by Wright (1936) is still the most accepted model of industrial learning today. Wright’s model is based on the phenomenon that the cycle time is reduced by a constant percentage (φ) every time the quantity produced is doubled (φ is called the learning slope). We define cycle time to be the time taken to process the work allocated to a station. Let t1 be the execution time of the first cycle and tn be the execution time of the nth cycle, then the Wright’s learning model can be expressed as follows:

2log ( )1

nnt t φ= (1)

or (see Yelle, 1979):

1b

nt t n−= (2)

where the cycle number n is a positive integer. By comparing Equations (1) and (2), we obtain the following relationship between b (learning constant) and φ (learning slope):

2log ( )b φ= − (3)

192 Y. Cohen et al.

A higher value of learning constant (b) prevails when the learning process is faster. Also, note that as the value of b increases that of φ decreases. The models of the learning curve represented by Equations (1) and (2) are by far the most popular ones and have been supported empirically in the literature (see Dar-El, 2000).

An issue in the above models is that the observed t1 has very large variation and, therefore, a theoretic t1 has to be estimated. Further work in the learning curve research (see Brenner, 1990; Sabag, 1988) has increased our understanding of the learning phenomenon and prediction of the two learning parameters (t1, b). Results are reported in Dar-El et al. (1995a,b) and Brenner (1990), and these are further reviewed in Dar-El (2000). In particular, by defining the standard time of a task as STD, it is shown that (Dar-El, 2000; Dar-El et al., 1995a,b)

1STD(57 60 )

t

φ=

− (4)

For example, with an 80% learning slope, the first cycle time is nine times of its standard time. Since the standard time can be determined by using the Predetermined Motion Time Standards (PMTS) of a task, we can use Equation (4) to predict the first cycle time. From Equation (4) it can be revealed that the ratio between the standard cycle time and the first cycle time is a function of φ. We call this function G(φ) which is defined as follows:

1( ) 57 60STD

tG φ φ= − = (5)

The effect of learning in the production scheduling environment has been analysed by several researchers (see, e.g. Adler and Nanda, 1974; Kroll, 1989). The minimisation of makespan in assembly lines under the constraint of low total demand and learning was tackled by Globerson and Shtub (1984). They proposed balancing the line with the estimated task times of the mid lot cycle.

However, the authors are not aware of any research done on the effect of learning on layout planning or the mutual effect of layout and industrial learning on the throughput or the makespan.

The rest of this paper proceeds as follows: Section 2 deals with serial versus parallel considerations and their effect on the makespan and its computation, Section 3 introduces the proposed general model, Section 4 analyses the model, Section 5 discusses the analysis and Section 6 concludes the paper.

2 Sequential versus parallel processing

In this section, we introduce the considerations and trade-offs between two extremes: a totally sequential system whose workers are ordered in a line and the totally parallel system where each operator will be producing the whole product several times. Between these two extremes there are many possible arrangements of the workers with varying degrees of sequentiality and parallelism. The following definitions are necessary for the analysis.

Optimal layout and work allocation in batch assembly 193

2.1 Notation

A line: A subsystem that receives the raw materials and processes them into the final products. We assume each station in a line is assigned with a single worker. Stations in a line are assumed to be ordered sequentially.

M: Batch size, the total number of products to be assembled

NPL: The number of parallel lines in the system that will assemble the full products

b: The learning constant

STD: Total standard time inherent in the product of which a batch is required

W: Total number of workers to be assigned to stations

CMAX: The makespan

t1: First cycle time

T(n): Total time for continuous production and completion of n cycles

δ: Zero/one logical indicator for perfect division: δ = 0 if (M Mod NPL = 0), Otherwise δ = 1

Y1: The time to assemble the full first product

For example, a single line with 8 stations is expressed as NPL = 1, W = 8. Dividing the workers into two equal lines will result in two lines of four workers each (NPL = 2, W = 4). We can continue to divide the workers into more and more lines in a process of increasing the parallelism. Note, however, that even taking a one worker out of a single line and giving him/her the task of making the full product, increases Number of Parallel Lines (NPL) from 1 to 2. Taking one worker at the time out of the line and setting them as single station lines is also a process of increasing parallelism.

In this study, we would like to learn the trends in the makespan that result from changing the layout. For simplicity we shall start analysing systems with identical number of stations. For example, a six workers line could be compared to two lines of three workers each, three lines of two workers each and six individual workers as shown in Figure 1.

Single line configuration maximises the repetition at each station and, therefore, maximises the effect of learning. On the other hand, line configuration induces on the last few stations long initial idle time. For example, in a 30 stations line, station 30 has a very large idle time until the first product arrives (this idle time would only be slightly smaller for station 29, and the same goes for stations 28, 27, and 26). Moreover, station 1 has already done many cycles when station 30 starts its first cycle. Thus, station 30 is in the steeper zone of the curve whereas station 1 is in a much flatter part of the learning curve.

A special case occurs when W ≥ M. Since the makespan cannot be smaller than the assembly time of a single product, when W ≥ M the best policy is to assign a station for each product and thus all the M products are assembled simultaneously, yielding a makespan that equals the time to assemble a single product (which is the minimal makespan).

194 Y. Cohen et al.

Figure 1 Various configurations of six stations

2.2 Avoiding parallel stations in sequential lines

Parallel stations in sequential lines are usually assigned the same tasks and operate simultaneously. While they may facilitate load balancing, they have some serious drawbacks:

1 The machinery used in one station must be purchased again for its twin.

2 They usually have at least double the work content of other stations and require more time to get acquainted with, and get into the required pace. These usually are required in cases of absenteeism and turnover.

3 Learning and productivity in parallel stations are significantly lower than those of regular stations. This is illustrated in the following example.

Example: Finding the work allocation for producing a batch of n products characterised by learning slope of b = 0.322 with five workers where station 1 is the first, followed by stations 2, 3 and 4, in parallel, followed by station 5. The load reflected by first cycle time assignments to stations 1 and 5 are defined as t1 and for the other stations it is defined as 1t′ . Taking a heuristic approach for maximal simultaneous work, we shall try

to balance the load (the cycle time) on the mid-batch cycle. For stations 1 and 5 it is the integer portion of n/2. However, since each of the three parallel stations work on only a

Optimal layout and work allocation in batch assembly 195

third of the products (n/3), the mid-cycle at these stations would be the integer portion of n/6 cycle for the parallel line. Seeking equal mid-cycle time we proceed as follows:

( )

1 1 1 1 1 1

1

(Const)( ) ( 3 Total time for first product)

So,

t t t t t Y

t

= + + = =′ ′

( )0.322

1(Const)2

nt

−⎛ ⎞ =⎜ ⎟⎝ ⎠

0.3220.322

6

nn

−−

⎛ ⎞⎛ ⎞ ⇒⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠( )0.322(Const) n−=

0.322

0.322

0.322

1

3

1 11 (Const) 0.702 (Const)

(1/ 3) 3

−⎛ ⎞⎜ ⎟⎝ ⎠

⎛ ⎞= ⇒ = =⎜ ⎟⎝ ⎠

Thus, the parallel stations are assigned 70.2% of the load of non-parallel stations. In other words, stations 1 and 5 get 142% of the parallel stations workload.

The above discussion and example support the reasonability of assumption 8.

2.3 The case of identical parallel lines (NPLs)

In the case where there are several identical NPLs, perfect balance of the workload assures that all the NPLs are simultaneously utilised and leads to minimal makespan. However, in many cases it is impossible to split the workload evenly (it may happen even when NPLs have identical number of stations). For example, suppose we need to split a batch of 103 products to 5 NPLs: 3 NPLs would be assigned 21 products each, while the other 2 NPLs would be assigned 20 products each.

In the above case, since the makespan is the time until the last product is ready, we should measure the makespan on the NPL with the maximal assignment (i.e. 21 products). For convenience we shall use the notation of Cmax(n) for a NPL makespan (as a function of the number of products n to be assembled at this NPL).

Table 1 summarises the case where M products have to be assembled on three identical lines (NPLs). In Table 1, [M/3] denotes the integer portion of M/3.

Table 1 Makespan calculation for three possible cases of assembling M products on three parallel lines (NPL = 3)

The case M mod NPL = 1 M mod NPL = 2 M mod NPL = 0

Line number

1 2 3 1 2 3 1 2 3

Line’s batch size

[M/3] [M/3] [M/3]+1 [M/3] [M/3]+1 [M/3]+1 M/3 M/3 M/3

System’s makespan

Cmax([M/3]+1) Cmax([M/3]+1) Cmax(M/3)

It is clear from Table 1 that if (M mod NPL = 0) the makespan is Cmax(M/NPL) and if (M mod NPL ≠ 0) the makespan is Cmax(M/NPL + 1), then for a more compact expression we define δ as follows:

0 if mod NPL 0

1 if mod NPL 0

M

M

δδ

δ= =⎧

= ⎨ = ≠⎩ (6)

and the makespan is computed as: Cmax(M/NPL + δ).

196 Y. Cohen et al.

2.4 The case of non-identical lines (NPLs)

A more complex case is having non-identical NPLs. For example, trying to split 11 workers into 3 NPLs yields: two NPLs of four stations each, and one NPL with three stations. Without directly dealing with this case, we shall show that their throughput (and, therefore, their makespan) is a linear combination of the throughputs of the following two NPLs:

1 Number of stations at each line = [W/NPL]

2 Number of stations at each line = [W/NPL] + 1.

Where [W/NPL] is the integer portion of W/NPL. To show the above, the throughputs of [W/NPL] and ([W/NPL] + 1) are computed and the cases where {[W/NPL] < W/NPL < ([W/NPL] + 1)} are expressed as their linear combination.

For simplifying the explanation, suppose that the number of stations W/NPL is an integer and that by the time ‘t’ (t > Y1 of the full product) its throughput is Nt products. At the same time (‘t’), a line with one more station (W/NPL + 1) can produce Xt products (Xt > Nt). Suppose A workers (A < NPL) are added. Then each is added to a different line, forming A lines with (W/NPL + 1) stations, and (NPL − A) lines with W/NPL stations. However, if A = NPL Then all the lines will have the same number of stations (W/NPL) + 1. The throughput of the three cases is as follows:

Case

1 / NPL = integer: Throughput at NPL

2 ' ' lines with W/NPL + 1 stations: Throughput at (NPL )

3 All lines with [( / NPL) 1] stations:

t

t t

W t N

A t A X A N

W

= ×

= × + −

+ Throughput at NPL tt X= ×

So, the throughput of the second case (non-identical lines) is a linear combination of the throughputs of the lower and upper cases of identical lines. The same is also true for the makespan and, therefore, the calculations for identical lines can roughly approximate the makespan of non-identical lines.

3 The general model for NPLs

We assume we have an estimate of the average learning slope and that it is identical for all stations. An important assumption in this section is that the configurations under consideration only include identical NPLs. For example, we do consider breaking six stations to the configurations of Figure 1 but we do not, at this stage, consider breaking them to a line of four stations.

We first need to define the first cycle time as a function of the given data and the number of both NPLs and the number of sequential stations in each NPL. Thus the first cycle time of any station in identical system of parallel lines is:

1

STD NPL( )t G

Wφ ×

= (7)

The total working time of any station (assuming n cycles) in such setting is:

Optimal layout and work allocation in batch assembly 197

11( )1

btT n n

b−=

− (8)

If there are NPL lines and total of M products to assemble, each one of the single lines should produce M/NPL products. Thus, for a single station we can develop the workload formula as follows:

1

1( ,NPL)NPL 1 NPL

btM M

T M Tb

δ δ−

⎛ ⎞⎛ ⎞ ⎛ ⎞= + = +⎜ ⎟ ⎜ ⎟⎜ ⎟−⎝ ⎠ ⎝ ⎠⎝ ⎠ (9)

Since the number of stations is (W/NPL), we can replace t1 of a single station by:

1

STD STD STD NPL( ) ( ) ( )

Number of stations ( / NPL)t G G G

W Wφ φ φ ×

= = = (10)

Rearranging (9), using (10) and the equality:

1 b 1

(1 b)

(NPL)

NPL NPL

bM M δδ− −

−

+⎛ ⎞+ =⎜ ⎟⎝ ⎠

We have

1

1

( )(STD NPL)( NPL)

NPL (1 )NPL

b

b

M G MT

W b

φ δδ−

−

× + ×⎛ ⎞+ =⎜ ⎟ −⎝ ⎠ (11)

By dividing the numerator and denominator by (NPL)(1 − b) we get:

1NPL ( ( )STD)( NPL)

NPL (1 )

b bM G MT

W b

φ δδ−+ ×⎛ ⎞+ =⎜ ⎟ −⎝ ⎠

(12)

Defining full product assembly as Y1 = STD × G(φ) expression (12) becomes:

( ) 11NPL ( NPL)

NPL (1 )

b bY MMT

W b

δδ

−+ ×⎛ ⎞+ =⎜ ⎟ −⎝ ⎠ (13)

We assume that all stations have identical work allocation. Therefore, the makespan could be computed as the time it takes the first product to reach the last station in the typical NPL, and the continuous production on the last station from that minute. We assume that the total number of stations = workers (W) is a product of NPL so (W/NPL) is an integer. The number of products to be produced at each parallel line is (M/NPL + δ). Thus, if all stations share the same t1, the makespan (Cmax) could be described as sum of: (1) the time until the first product arrives at the last station, plus (2) the last station processing time. This gives the following:

1Cmax 1NPL NPL

W Mt T δ⎛ ⎞ ⎛ ⎞= − + +⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠ (14)

Combining Equation (13) into (14) gives,

( ) 11

1

NPL ( NPL)Cmax 1

NPL (1 )

b bY MWt

W b

δ −+ ×⎛ ⎞= − +⎜ ⎟ −⎝ ⎠ (15)

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Using Equation (10), t1 is replaced by its equivalent,

( ) 11NPL ( NPL)NPL

Cmax 1 ( )STDNPL (1 )

b bY MWG

W W b

δφ

−+ ×⎛ ⎞⎛ ⎞= − +⎜ ⎟⎜ ⎟ −⎝ ⎠⎝ ⎠ (16)

But since,

NPL NPL NPL1 1

NPL

W W

W W W

−⎛ ⎞− = = −⎜ ⎟⎝ ⎠ (17)

Replacing this expression gives:

( ) ( ) 11NPL ( NPL)NPL

Cmax 1 ( )STD(1 )

b bY MG

W W b

δφ

−+ ×⎛ ⎞= − +⎜ ⎟ −⎝ ⎠ (18)

But since 1 Y ( )STDG φ= we have

( ) ( ) 11

1

NPL ( NPL)NPLCmax 1

(1 )

b bY MY

W W b

δ −+ ×⎛ ⎞= − +⎜ ⎟ −⎝ ⎠ (19)

That is:

( ) ( ) 11 1

1

(NPL) NPL ( NPL)Cmax

(1 )

b bY Y MY

W W b

δ −+ ×= − +

− (20)

So,

( )1 11Cmax ( (1 )(NPL)) NPL ( NPL)

(1 )b bY

Y b MW b

δ −⎡ ⎤= + − − + + ×⎣ ⎦− (21)

From this Equation (21) it is clear that: 1Cmax .Y≥

This proves again the point that the minimal possible makespan is Y1 which is reached only if all products are assembled simultaneously and each product is allocated a single station.

On the other hand, Equation (21) could also be expressed as:

11Cmax (1 )( NPL) NPL ( NPL)(1 )

b bYb W M

W bδ −⎡ ⎤= − − + + ×⎣ ⎦−

(22)

Since for each station in a single line, the total processing time is

( )1 1( )(1 )

bYT M M

W b−=

− (23)

Unifying Equations (22) and (23) yields:

1

1 1

(1 )( NPL) NPL ( NPL)Cmax ( )

b b

b b

b W MT M

M M

δ −

− −

⎡ ⎤− − + ×= +⎢ ⎥

⎣ ⎦ (24)

Optimal layout and work allocation in batch assembly 199

To show that Cmax ≥ T(M) we analyse the expression in the square brackets of (24) and show that it is greater than 1 or equals 1. To see this, note that by the definitions: (1 − b) > 0, W ≥ NPL so W − NPL ≥ 0, and M1 − b > 0. So,

1

(1 )( NPL)0

b

b W

M −

− −≥ (25)

Also, the following inequality

1 1

1 1

( NPL) ( )1

b b

b b

M M

M M

δ − −

− −

+ ×≥ = (26)

Now, by definition b > 0, NPL ≥ 1 and therefore NPLb ≥ 1 so (26) is used to conclude that:

1

1

NPL ( NPL)NPL 1

b bb

b

M

M

δ −

−

+ ×≥ ≥ (27)

Combining the conclusions of (25) and (27) into (24) we finally get

( )1 1Cmax ( )(1 )

bYT M M

W b−≥ =

− (28)

It so happens that the right hand side of the equation describes the active processing time of each station in a single line. Indeed, the makespan of a single line (including the initial idle time of its last station) is:

( ) ( )1 11Cmax(single-line) 1(1 )

bYYW M

W W b−⎛ ⎞= − +⎜ ⎟ −⎝ ⎠

(29)

Thus, it is conceivable that in many cases, the makespan of a single line reaches closest to a state of equality in (28), which means reaching minimal makespan.

4 Analysis of the makespan formula

This section analyses Equation (21) of the makespan as a function of the number of lines (NPL). For convenience Equation (21) is repeated here:

( ) ( )1 11Cmax (1 )(NPL) NPL ( NPL)

(1 )b bY

Y b MW b

δ −⎡ ⎤= + − − + + ×⎣ ⎦− (21)

The analysis should consider the two cases separately: (1) δ = 0 and (2) δ = 1. Starting at δ = 0, the makespan pattern is analysed by differentiating the makespan

with respect to NPL and studying the increasing and decreasing zones. Since NPL is the only variable in the makespan equation, Y1 and Y1/W(1 − b) are constants, and only the square brackets could be differentiated. Thus, we define B as the square brackets with δ = 0.

So,

( ) 1(1 )(NPL) NPL ( )b bB b M −⎡ ⎤= − − +⎣ ⎦ (30)

200 Y. Cohen et al.

and,

( )1 1d( 1) ( ) NPL

NPLb bB

b b M − −= − +∂

(31)

Defining two constants α and β:

1

1 1 0

0b

b

b M M b

α αβ β−

= − > >

= ⋅ > > >

Gives,

dNPL

NPL NPL

B αα

βα β α−= − + × = −∂

(32)

Which leads to the conclusion that the derivative is decreasing as function of NPL. The derivative is positive (increasing makespan) in the range:

NPLα

β α> (33)

For the combinations of batch size M, and learning slope b, this translates into: 1/(1– )1– 1– 1– 1

1–1– 1–

1 1 NPL NPL(1 ) (1 )NPL (1 )NPL

bb b b bb

b b

b M b M b M b Mb

b bb

−⎛ ⎞× × × ×> − ⇒ > ⇒ > ⇒ >⎜ ⎟− −− ⎝ ⎠

(34)

This means that as long as the Number of Parallel Lines (NPL) is smaller than the left side of the expression, the makespan grows (against the objective of minimising the makespan). The derivative is zero when

1/(1 )1

NPL(1 )

bbb M

b

−−⎛ ⎞×=⎜ ⎟−⎝ ⎠

(35)

and is negative when 1/(1 )1

NPL(1 )

bbb M

b

−−⎛ ⎞×<⎜ ⎟−⎝ ⎠

(36)

indicating reduction in the makespan. Very similar results are attained for δ = 1. Thus, the main results from the analysis are:

1 Range of increasing makespan, that is, Cmax(NPL): 1/(1 )1( )

NPL1

bbb M

b

δ−−⎛ ⎞+

< ⎜ ⎟−⎝ ⎠ (37)

2 Maximal makespan, that is, Cmax(NPL): 1/(1 )1( )

NPL1

bbb M

b

δ−−⎛ ⎞+

= ⎜ ⎟−⎝ ⎠ (38)

3 Range of decreasing makespan, that is, Cmax(NPL):

Optimal layout and work allocation in batch assembly 201

1/(1 )1( )NPL

1

bbb M

b

δ−−⎛ ⎞+

> ⎜ ⎟−⎝ ⎠ (39)

The above analysis shows that the makespan function is concave in NPL, and has a maximum at the point described by Equation (38). This is of course, the most undesired level of NPL.

5 Discussion

Since the aim is to find the NPL that minimises the makespan, the minimum must be the lower makespan of the two extreme points:

1 Cmax(NPL = 1) or

2 Cmax(NPL = W).

For punctuality we should add that the δ generates jumps between two almost parallel graphs. That is, as long as δ = 1, the makespan (Cmax) corresponds to a batch size of ([M/NPL] + 1). On the other hand, for δ = 0, the makespan (Cmax) corresponds to a batch size of ([M/NPL]) which generates a lower graph. The graph structure is evident from Figure 2.

Figure 2 An example for the makespan as a function of NPL with three different learning slopes. The jumps are a result of the δ in makespan function

A single line (NPL = 1) in Figure 2 assigns 1/30 of the workload to each of the 30 stations and each station completes 60 cycles. On the other hand, if the 30 workers are working independently in parallel, each will be assigned the assembly of two full products. Since some learning takes place, the second round is shorter than the first and the makespan of NPL = 30 is somewhat lower then 20 = 2Y1.

Note in the Figure 2 that a single line has the shortest makespan for the cases of b = 0.5 and b = 0.3 but not for b = 0.1. Note also, that the production time of the first unit (Y1) was kept constant. If we want to compare three different products with the same standard time but keep the different learning slopes, the magnitudes of the graph levels would be higher for the larger b. However, the general graph behaviour (trends and jumps) would have stayed the same.

The main conclusion to be drawn from the makespan graph is that minimal makespan should be sought at the edges. That the minimal makespan is either a makespan of a single sequential line or the makespan of a totally parallel system (with W parallel

202 Y. Cohen et al.

workers so that each assembles M/W full products). Before dealing with the comparison of the two points we first deal with special cases where we already know which of the two points to choose.

5.1 Special cases

We have already shown that if the batch size (M) is smaller than or equal to the number of workers (W), the minimal makespan is attained with NPL = M. NPL must be smaller or equal to W (the number of workers/stations). So when W is smaller than the NPL value of the maximal makespan, the makespan only increases with NPL. In such cases only a single line should be considered and we say that single line dominates other configurations. This case is illustrated in Figure 3.

This dominance range is attained by replacing NPL by W in Equation (37) to obtain:

1/(1 )1 1(1 )

1/(1 )(1 )

(1 )

( ) ( )

1 1

1 1

bb bb

bb

b

b M b MW W

b b

b M b M

b b WW

−− −−

−−

−

⎛ ⎞ ⎛ ⎞< ⇒ <⎜ ⎟ ⎜ ⎟− −⎝ ⎠ ⎝ ⎠

⎛ ⎞− −⎛ ⎞⇒ < ⇒ <⎜ ⎟ ⎜ ⎟⎝ ⎠⎝ ⎠

(40)

So a single line has the shortest makespan of a strictly increasing makespan function (no need to compare any other arrangement) when

1/(1 )1

bb

W Mb

−−⎛ ⎞ <⎜ ⎟

⎝ ⎠ (41)

Table 2 describes these lower bounds of batch size for single line dominance. For each combination of learning slope and number of workers there are lower bound batch sizes –above which a single line is the only solution to be considered.

Figure 3 Three examples where a single line has the shortest makespan which generally increases with NPL

Optimal layout and work allocation in batch assembly 203

Table 2 The minimal batch sizes for strictly increasing Cmax(NPL), rendering a single line layout as the only relevant choice

Batch size range for strictly increasing Cmax (NPL) (NPL = 1 (a single line) is the only candidate for minimal makespan)

Dominance range

Lowest bound batch size (M)

For various number of workers

Learning constant

(b) Lowest bound M/W

W = 5 W = 10 W = 15 W = 20 W = 25

0.05 23.0 115 230 345 460 575

0.10 12.0 60 120 180 240 300

0.15 8.0 40 80 120 160 200

0.20 6.0 30 60 90 120 150

0.25 5.0 25 50 75 100 125

0.30 4.0 20 40 60 80 100

0.35 3.0 15 30 45 60 75

0.40 2.0 10 20 30 40 50

0.45 2.0 10 20 30 40 50

0.50 1.0 5 10 15 20 25

5.2 The general case comparison

The general case requires a comparison between Cmax(NPL = 1) and Cmax(NPL = W) and choosing the lower of the two. Note that for a single line δ = 0 and for convenience it is assumed that δ = 0 for NPL = W. The mathematical expressions of the two options are:

1 1

11Cmax(NPL 1) 1

1

bY MY

W b

−⎛ ⎞= = + −⎜ ⎟−⎝ ⎠

(42)

2 1

11Cmax(NPL )

1

b bY W MW Y W

W b

−⎛ ⎞= = + −⎜ ⎟−⎝ ⎠

(43)

Equation (42) is a re-arrangement of (29), and (43) is a manipulation of (21) after replacing NPL by W.

Thus, we shall look at the difference of Cmax(NPL 1) Cmax(NPL )W= − = to conclude:

If this difference is positive Cmax(NPL = W) is the shorter makespan.

If this difference is negative Cmax(NPL = 1) is the shorter makespan.

And if this difference is close to zero, it means that both configurations yield minimal makespan.

The detailed mathematical form of Cmax(NPL 1) Cmax(NPL )W= − = (for M > W) is:

204 Y. Cohen et al.

1

Cmax(NPL 1) Cmax(NPL )W

Y

= − = =1

111

1

bY MY

W b

−⎡ ⎤⎛ ⎞+ − −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

11

1

bbY M

W WW b

−⎡ ⎤⎛ ⎞+ −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

(44)

( )1 1 1

1 11 ( 1) 11 1 1

b b bb bY YM M M

W W W WW b b W b

− − −⎡ ⎤⎡ ⎤ ⎛ ⎞= − − + = − + −⎢ ⎥⎜ ⎟⎢ ⎥− − −⎣ ⎦ ⎝ ⎠⎣ ⎦

(45)

A single line has a shorter makespan if:

( )1

10 ( 1) 11

bbY M

W WW b

−⎡ ⎤⎛ ⎞> − + −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

(46)

That is,

( )

( )

11

1

1

1

( 1)(1 )

1

( 1) 11

1 11

bb

bb

bb

YW MY W

W W b

MW W

b

MW W

b

−

−

−

⎡ ⎤⎛ ⎞−− > + −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

⎡ ⎤⎛ ⎞⇒ − − > −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

⎡ ⎤⎛ ⎞⇒ − > −⎢ ⎥⎜ ⎟−⎝ ⎠⎣ ⎦

(47)

Since by definition W > 1 and b > 0, it is clear that Wb > 1. Thus (1 )bW− is negative and when dividing both sides by that factor the inequality sign reverses:

( ) ( ) ( )

1/(1 )1

11 (1 )(1 ) (1 )(1 )

11 1 1

bb

b

b b b

W M W b W bM M

bW W W

−−

−⎡ ⎤− − − − −⎢ ⎥< ⇒ < ⇒ <

− ⎢ ⎥− − −⎣ ⎦ (48)

So, the optimal layout is a single line for batch sizes M greater then the lower bound value:

( )

1/(1 )

(1 )(1 )

1

b

b

W bM

W

−⎡ ⎤− −⎢ ⎥ <⎢ ⎥−⎣ ⎦

(49)

Any batch size below that (remember that M > W) should be split evenly between W independent parallel workers. Figure 4 shows the batch-size ranges for single line and parallel cells for selected values of b (learning slopes).

Table 3 describes these lower bounds of batch size for single line shorter makespan. For each combination of learning slope and number of workers there are lower bound batch sizes - above which, a single line produces a shorter makespan.

Table 3 describes these lower bounds of batch size for single line shorter makespan. For each combination of learning slope and number of workers there are lower bound batch sizes - above which, a single line produces a shorter makespan.

The largest batch-size in Table 3 is 71. So when the number of workers is 30 or less, any batch of over 70 units prescribes a single line layout.

Optimal layout and work allocation in batch assembly 205

Figure 4 Batch-size range boundaries for single line versus parallel cells designs for minimal makespan

Table 3 The minimal batch sizes, based on expression (49) for a single line layout as the best choice, for selected combinations of (b, W)

Minimal batch size (M) for single line dominance (Single line has shortest makespan for M above table values)

Learning constant (b) W 0.15 0.2 0.25 0.3 0.35 0.4

4 17 13 10 8 6 5 5 20 15 12 9 7 6 6 22 17 13 10 8 6 7 25 18 14 11 9 7 8 27 20 16 12 10 8 9 29 22 17 13 11 8 10 32 24 18 14 11 9 11 34 25 20 15 12 9 12 36 27 21 16 13 10 13 38 28 22 17 14 11 14 40 30 23 18 15 11 15 42 31 25 19 15 12 16 44 33 26 20 16 12 17 46 34 27 21 17 13 18 48 36 28 22 18 14 19 50 37 29 23 18 14 20 52 39 30 24 19 15 21 54 40 32 25 20 15 22 56 42 33 26 20 16 23 58 43 34 27 21 16 24 60 45 35 28 22 17 25 61 46 36 29 23 18 26 63 48 37 29 23 18 27 65 49 38 30 24 19 28 67 50 39 31 25 19 29 69 52 40 32 25 20 30 71 53 42 33 26 20

206 Y. Cohen et al.

6 Conclusion

This paper presents an analysis of layout effect on the makespan of batch assembly characterised by significant learning. The analysis shows that the ideal minimal makespan layout should be one of two:

1 a single line

2 maximal number of parallel stations (each producing the whole product).

This paper also presented the boundaries for preference between these two extreme layout configurations. In general, the larger the batch size, the more it would fit a single line.

Overall, learning turns as an important motivator for choosing a single line layout for batches that are not too small. A single line maximises the stations, repetition and, therefore, the learning. When batch size is too small, the initial waiting time of the last stations (for the first product to arrive) has high percentage of idle time (compared with the makespan) and full parallel processing becomes attractive.

Number of stations has been given in this paper; there should be a merit for future research of simultaneously finding the optimal number of stations and the optimal layout configuration. Future research could also explore full economic analysis of the possible layouts (including machinery investments) or assess the effects of processing time variations, buffers and rework.

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