Offload Solutions for 5G-NR - ETSI · Join ETSI – OSA Workshop Open Implementation and Standardization Offload Solutions for 5G-NR P. ROBERT SYRTEM Dec 13 2018

Join ETSI – OSA Workshop

Open Implementation and Standardization

Offload Solutions for 5G-NR

P. ROBERT SYRTEM

Dec 13 2018

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Content

● Clarifications on the title● Some very general considerations to decide

how to map functions to processing ressources ● Current decisions in the context of Mass Start

Demonstrator● What about 5G-NR Test and Measurements

Domain● Conclusions

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Clarifications

● «Trafic Offload Solutions» permit Operators to deliver more trafic when their network becomes saturated (limited amount of spectrum) → not the subject here

● « Processing Offload Solutions» can overcome the limitations of GPP based SDR implementations → the scope of this very general discussion

● From the perspective of a GPP centric view of an architecture we may use the term « Accelerators »

● It is the problem of efficiently mapping Functional Blocks (Algorithms) of a System onto a set of Processing Ressources ranging from general purpose to specialized

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Some high-level considerations● Architecture analysis usually starts by considering a more or less rich set of

GPP(s), CTL(s), DSP(s), FPGA types of processing ressources required within the cost budget

● GPP → performances driven by PC & Cloud market → very popular → OAI– Typical clock rate 2 to 3 GHz– 8, 16 and even more parallel cores

● FPGA/SoC → typicaly include a very high number of gates, DSP Processing Units, but also real-time Controllers and Application Processors– Clock rate ~5 x lower than GPP– But several Ks of DSP oriented Processing Units– Much better capable of handling low latency behavior with real-time constraints– But development requires more skilled persons despite High Level Synthesis

Framework available today● Both lines of Processing Solutions benefit from the same continuing

increase of number of transitors/gates per sq mm of silicon (28 nm → 7nm)

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Mass Start High Data Rate demo

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Mass Start demonstration mapping decisions

● Current configuration– gNB Tx processing

● All Tx NR processing performed by an optimized version of OAI NR SW● Running on an Intel Core i7 GPP

– 8 cores– 2.8 GHz

● GPP load > 80 % at 200 Mb/s usable data rate● 5 x 4K video streams tansmitted DL over 3.5 & 25 Ghz RF links

– UE Rx processing● LDPC decoding offloaded to a Zynq 7045 FPGA/SOC● The rest of Rx NR processing is performed by an optimized version of OAI NR SW ● Usable Data rates of up to 300Mb/s can be sustained on Air

● Future– Probably more offloading options to support the massive configurations to be

assembled

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LDPC decoding Offload on UE side

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5G-NR Test & Measurements

● New project on SYRTEM’s side● TTCN3 Titan Framework already in use in our Lab● Architecture of our version of the System Simulator

part is work in progress based on ETSI 36/38 523-3 (TTCN3)

● FPGA offload options are under investigation● Upper layers will reuse some of our legacy

components already developed in the context of our Test and Instrument Products

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Conclusions

● Mapping functions to Processing Ressources remains a key architectural decision over time

● However 5G NR is pushing hard towards offloading more functions to FPGA/SOC

● SYRTEM’s objectives in T&M Domain:– Set-up a closer interactions with ETSI– Provides High Performances Testing Solutions based

on required Offloading to both OAI Community and the Industry

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Thank-you for your attention

[email protected]