Nonlinear control for dc–dc converters based on hysteresis of the current with a frequency loop to operate at constant frequency

1036 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 3, MARCH 2011

Nonlinear Control for DC–DC Converters Based onHysteresis of the COUT Current With a Frequency

Loop to Operate at Constant FrequencySanta Concepción Huerta, Member, IEEE, Pedro Alou, Member, IEEE, Jesús Á. Oliver, Member, IEEE,

Oscar García, Member, IEEE, José A. Cobos, Member, IEEE, and Ahmed M. Abou-Alfotouh

Abstract—The nonlinear and linear controls proposed byAlou et al. and Soto et al. provide very fast transient response(voltage step from 1 to 1.5 V in 2 µs). This nonlinear control isbased on hysteretic control of Cout current. This system is verysensitive to effects, like aging, temperature, input and output volt-age variation, etc., that modify the switching frequency. This paperproposes a frequency loop to avoid the frequency variation and toadjust the switching frequency to the nominal value by changingthe hysteretic band. A 5-MHz buck converter is developed, andexperimental results validate the loop design, obtaining the samefast transient response (from 1.5 to 2.5 V in 2 µs) while keepingswitching frequency constant in steady state.

Index Terms—DC–DC converter, hysteretic control, nonlinearcircuits, transient response.

I. INTRODUCTION

NOWADAYS, many applications demand fast dynamic re-sponse. Aside from the dynamic requirements, size can

also be a main constraint. A fast dynamic control techniquecan provide reduction in the size of the components (outputcapacitor), making integration of the power converter easier.Different techniques have been presented in order to obtainfast transient response, such as combining nonlinear and linearcontrols. The concept of combining the nonlinear and linearcontrols is presented in the literature with different approaches[1]–[30]. Control strategies like V 2 and hysteretic control ofthe output voltage [4]–[6] have received extensive attentionbecause of the fast transient response and simple design.However, the main drawback is that they require sensing theoutput voltage ripple, which is very small compared to thedc value. These techniques provide very good performance inapplications where the equivalent series resistance (ESR) of the

Manuscript received June 25, 2009; revised October 17, 2009 andJanuary 21, 2010; accepted February 22, 2010. Date of publicationMay 10, 2010; date of current version February 11, 2011.

S. C. Huerta was with the Centro de Electrónica Industrial, UniversidadPolitécnica de Madrid, 28006 Madrid, Spain. She is now with Toronto Rehabil-itation Institute, Toronto, ON M5G 2A2, Canada, and also with the Universityof Toronto, Toronto, ON M5S 1A1, Canada (e-mail: [email protected]).

P. Alou, J. A. Oliver, O. García, and J. A. Cobos are with the Centrode Electrónica Industrial, Universidad Politécnica de Madrid, 28006 Madrid,Spain.

A. M. Abou-Alfotouh is with the Enpirion, Inc., Hampton, NJ 08827 USA(e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2010.2049707

output capacitor is dominant, the output voltage ripple beingproportional to the current of the output capacitor. In applica-tions where the ESR is not dominant, the application of thesecontrol strategies is limited. In [7]–[9], time optimal digitalcontrollers are presented. In [10], digital controllers applyinglookup table methods have been proposed. Although thesetechniques significantly improve the transient response, theysuffer from having complex implementations. In [11]–[14],nonlinear sliding-mode and fuzzy logic controllers arepresented. Both techniques improve the dynamic response.However, the main drawback of sliding mode is its variablefrequency. Other techniques that modify the control and/orthe topology, like zero-current detectors, synthetic ripple mod-ulators, double-frequency buck converter, and fast-responsedouble buck converter, are presented in [15]–[20].

The nonlinear and linear approaches proposed in [1] and [2]present a very fast transient response, owing to the hystereticcontrol of the output capacitor current. This control technique isuseful even in applications where the ESR is not dominant sinceit is based on the current ripple of the output capacitor insteadof the output voltage ripple used in other techniques [4]. Theuse of the output capacitor current is proposed in [24] and [25];however, the measurement of this current is very complex. In[1], [2], and [32], a noninvasive sensor to measure this currentis proposed, making feasible the use of control techniques basedon the output capacitor current. Nevertheless, the nonlinearand linear control schemes proposed in [1] and [2] are sensi-tive to different effects (aging, temperature, etc.) that modifythe switching frequency. Some applications, such as portabledevices or telecommunication systems (RF applications andautomobile/airplane communication systems), require a fixedswitching frequency to control electromagnetic interferences(EMIs). For example, in the communication systems, the EMIemissions could be a problem because of interference withother devices. In [31], a method to reduce these emissions isproposed. In order to achieve a fixed switching frequency anda fast transient response, different frequency control techniquesbased on hysteretic control adjustment are presented [6], [27],[29]. Some of them add an additional loop to the hysteretic con-trol technique, and others modify the control scheme [26], [28].

In this paper, a frequency loop that keeps constant theswitching frequency of the hysteretic control of the outputcapacitor current [1], [2] is proposed. This control techniqueis applied to a 5-MHz converter, where the ultimate goal is

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HUERTA et al.: CONTROL FOR DC–DC CONVERTERS BASED ON HYSTERESIS OF THE COUT CURRENT 1037

Fig. 1. Feedback of the current of the output capacitor.

Fig. 2. Control concept. Steady state.

integration of the converter. At these frequencies (5 MHz),the behavior of ceramic capacitors is dominated by equivalentseries inductance (ESL), limiting the use of V 2 and similarcontrol techniques. Moreover, the control strategy proposed isvery suitable to scale the output voltage. The proposed controlstrategy is experimentally validated with a converter followingthe design guidelines for dynamic voltage scaling and load stepregulation presented in [21]. The dynamic response obtained inthe prototype with the proposed control strategy is equivalentto the response of a buck converter with linear voltage modecontrol and 1-MHz bandwidth.

II. CONTROL CONCEPT: SCHEME OF THE NONLINEAR

AND LINEAR CONTROLS

The basic idea of the combination of linear and nonlinearcontrols is to use the nonlinear action to provide robustness forthe control and fast control action. The slower linear loop pro-vides accuracy and less sensitivity to noise and plant variations.In order to achieve fast transient response, the nonlinear schemeis based on measuring the output capacitor current.

The idea is to switch the MOSFETs (Q1 and Q2) by means ofthe hysteretic control of the output capacitor current, as shownin Fig. 1. The capacitor current is measured by a constant gainKc. In steady state, the mean value of this current should bezero (areas A1 and A2 are equal); thus, the output capacitoris balanced (Fig. 2). The transient response under load stepsdepends on the nonlinear loop. When a load step occurs (Fig. 3),the capacitor current goes out of the hysteretic band, and theduty cycle is saturated until the capacitor current reenters theband. Hence, the response of this strategy under load steps isvery fast, owing to the hysteretic control.

Fig. 3. Control concept. Transient response under load step.

Fig. 4. Addition of a linear voltage loop.

The dc operating point is determined by adding a voltageloop, as shown in Fig. 4, where Ke is the gain of the linearcontroller. The linear voltage loop guarantees a zero dc valueof the capacitor current. The regulation accuracy is also de-termined by this loop. Details about the linear voltage loopdesign are presented in [3]. This control technique presents fasttransient response given for the nonlinear loop and accuratesteady-state regulation, owing to the linear voltage loop. A veryfast transient response (voltage step from 1 to 1.5 V in 2 µs) isobtained in [2].

The proposed strategy has two important advantages. First, itachieves very fast regulation under load changes, since ideally,the current unbalance in the capacitor is corrected. Second,effects due to the dynamics of the inductor, the resistanceof MOSFET, and dead-time influence are cancelled, and thecontrol becomes more robust.

III. MEASUREMENT OF OUTPUT CAPACITOR CURRENT

The nonlinear scheme is based on measuring the current ofthe output capacitor [1], [2]. The sensing circuit behaves likean RLC network in parallel with the output capacitor (Fig. 5).It is designed to mirror the actual capacitor current with atransimpedance amplifier (Fig. 6) by matching time constants[(1) and (2)] and scaling the impedance (n) of the parallel RLC


Fig. 5. Capacitor current-sensing method (RLC network).

Fig. 6. Physical implementation of the capacitor current-sensing method(RLC network).

network [(3)]. The gain of the current sensor (Kc) is givenby (4), where VS is the output voltage of the transimpedanceamplifier.

It is important to highlight that the inductive behavior (LS)of the sensor RLC network is provided by the input impedanceof the transimpedance amplifier. As shown in (5), this inductivebehavior depends on the op-amp bandwidth (ΔB) and thefeedback resistance R1. All the design details of the currentsensor are presented in [32]

ESR · Cout = Req · CS (1)

ESL · Cout = LS · CS (2)

n · |ZCout| = |ZS| (3)

Kc =VS

ICout= −R1

n(4)

LS =ΔB

R1. (5)

IV. PARAMETERS THAT AFFECT THE

SWITCHING FREQUENCY

In this section, the variables that modify the switching fre-quency are explained. The RLC network is adjusted to thenominal output capacitor impedance, and any mismatchingbetween these two impedances causes an error measurementthat produces a frequency deviation.

A. Input Voltage (Vin) and Output Voltage (Vout)

The variation range of Vin and Vout produces a frequencydeviation due to the change of the inductor current ripple. Forexample, the input voltage ranges between 2.7 and 5 V, and theoutput voltage ranges between 1 and 2 V. Considering thenominal case of 5 V at the input and 1 V at the output,the subsequent frequency deviations are +59% and −35% ofthe nominal value (5 MHz).

B. Addition of an External Output Capacitor

In some applications, the load already has a decouplingcapacitor. The sensor is designed and adjusted for the con-verter output capacitor, and this additional capacitor cannotbe accounted for the sensor design, producing an error in thesensor measurement that also generates a frequency deviation.For example, adding a 4-mF external OSCON capacitor (theconverter capacitor being 10 µF) increases the equivalent ca-pacitance by +39 900%; however, the equivalent impedanceat fsw is reduced only by −82% since we are working onthe inductive side. This variation in the equivalent impedance(−82%) generates an fsw variation (−99%). Therefore, theeffect of adding additional output capacitors depends primarilyon the change of the equivalent capacitor impedance at fsw.

C. Output Capacitor (Cout)

The deviation of the capacitance value depends on the tol-erance of the dielectric and aging effects. For example, ifthe system is designed for the inductive side, the capacitancevariation does not affect fsw, but a 2% increment of ESL resultsin approximately 2% frequency increment and vice versa.

D. Tolerance of the Op-Amp Bandwidth (ΔB) andOpen-Loop Gain (ADC)

The RLC network is adjusted with the bandwidth and theopen-loop gain of the op-amp used in the transimpedance am-plifier. Therefore, the design of this current sensor is sensitiveto parameters such as bandwidth (ΔB) and dc gain of the op-amp (ADC). The deviation of the ΔB or ADC value affects theswitching frequency, for example, the ΔB tolerance (−15%)of the op-amp generates fsw variation (−15%). Moreover, thesupply voltage of the op-amp affects the switching frequencysince the hysteresis band depends on the supply voltage.

V. SCHEME OF THE PROPOSED CONTROL

The proposed control strategy is based on combining nonlin-ear and linear controls with a frequency loop. The nonlinear(hysteretic current loop) action provides fast control action,bringing the converter close to steady state. The linear voltageloop provides accurate regulation of the output voltage insteady state. Finally, the frequency loop regulates the fsw tothe nominal value, avoiding the frequency deviation caused bythe effects presented in Section IV. This regulation is achievedby adjusting the hysteretic band (H). In [26] and [28], twodifferent fast control strategies are proposed, where similar fre-quency loops are used to keep the switching frequency constant.


Fig. 7. Proposed control scheme to achieve fast transient response with no frequency variation.

Fig. 8. Small signal model of the external voltage loop with no integrator.

Fig. 9. Open-loop gain of the external voltage loop: ZCout · Ke/Kc.

These control strategies provide very fast response althoughthey are only appropriate for ESR dominant applications, whilethe concept proposed in this paper is also applicable at veryhigh frequency applications (5 MHz) where the behavior of thecapacitor at the fsw is inductive (ESL dominant).

Fig. 7 shows the proposed control to achieve fast transientresponse with no frequency variation. The scheme of thisconverter is composed of three control loops: the nonlinearloop, the linear voltage loop, and the frequency loop. In [3], thedesign of the current, voltage, and frequency loop is presentedin detail.

In order to design the voltage loop: 1) the frequency loopis not considered since its bandwidth is very low and it isdecoupled and 2) the hysteresis current loop, together with thebuck converter, is modeled like a current source that follows thecurrent reference given by the voltage loop.

Fig. 8 shows this small signal model used to design the volt-age loop. Fig. 9 shows the open-loop gain of the voltage loop;it is necessary to include in the voltage regulator a pole at theresonant frequency of the Cout(Ke/(RC · s + 1)) to guaranty

Fig. 10. Small signal model of the voltage loop with integrator (Ki/s) toreduce dc error.

Fig. 11. Open-loop transfer function (Vout/Vref ) with a resistive load and anintegrator (Ki/s). Phase margin = 102◦, and ΔB = 140.9 kHz.

stability. If the load has inductive behavior, no integral action isrequired in the voltage regulator, since the output capacitanceprovides this action. However, if the load has resistive behavior,a pole at the origin must be added in the regulator (Fig. 10).Fig. 11 shows an example of the simulated open-loop gain ofthe voltage loop with a bandwidth of 140 kHz.

Fig. 7 shows the five blocks of the frequency loop scheme:frequency divider (counter), frequency-to-voltage converter(FVC), frequency loop regulator, voltage-controlled resistor(VCR), and the hysteretic circuit.

First, the frequency loop senses the actual switchingfrequency and scales it down, dividing the fSW. The actual im-plementation of the frequency divider is based on a binary asyn-chronous counter. Second, this scaled frequency (fSW/KFD) isconverted into a linear proportional voltage by using the FVC.Then, this proportional voltage is compared with a proportional


Fig. 12. Hysteretic circuit to adjust the frequency variation using a VCR.

reference voltage (proportional to the nominal switching fre-quency), generating the error command to adjust the switchingfrequency to the nominal value using a hysteretic circuit anda variable resistor (VCR) shown in Fig. 12. According to (6),variation in R4 (VCR) produces variation in the hysteretic band

H =R4·(R1+R2)R4+R1+R2

· R1 · Vcc(R3 + R4·(R1+R2)

R4+R1+R2

)· (R1 + R2)

. (6)

The relationship between the hysteretic band and the switch-ing period of the buck converter is given by (7). Therefore, avariation of the hysteretic band produces a switching frequencyvariation, as stated by

TSW

H=

(1

VOUT+

1VIN − VOUT

)· L · 1

Kc(7)

where Kc is the current sensor gain, and TSW is the switchingperiod.

The VCR has a drain-to-source resistance that is controlledby the applied voltage VGS. Therefore, the VCR is consideredas a variable resistance, and the value depends on the Verror

(frequency loop command) applied in VGS. The resistance value(RdsON) is given by (8). These n-channel devices provideresistance variation between 20 and 60 Ω when the VGS rangesfrom −3.5 to −7 V

RdsON =RdsVg

1 − VGSV gsOff

. (8)

Fig. 13 shows the simulation results of the regulation capa-bility, where a variation in R4 (VCR) produces band variationsof +65% (2.94 MHz) and −35% (7.7 MHz) around the nominalcase (5 MHz).

The goal of the frequency loop is to keep the switchingfrequency constant under steady-state operation, while the dy-namics requirements for this loop are very soft. The maindynamic specification for this loop is to avoid interactions withthe voltage and current loops. Therefore, the design criterionfor the frequency loop is a bandwidth that is much lower thanthe voltage loop bandwidth to guarantee no interaction. In theexperimental results of this paper, the voltage loop bandwidth is140 kHz, and the frequency loop is designed with a bandwidthof lower than 1.5 kHz (see Fig. 14).

In order to design the regulator, it is necessary to linearizethe system around the operating point. The small signal model

Fig. 13. Example of regulation capability for a specific design.

Fig. 14. Maximum, nominal, and minimum variations in GH, consideringmaximum VCR variations, and maximum Vin and Vout variations.

is designed, taking into account the gain variations (producedfor the VCR, Vin, and Vout) and linearizing the gains of thefrequency loop around the operating point (5 MHz). For thisexample, the bandwidth for the frequency loop is 240 Hz, andthe dc gain is 60 dB.

Fig. 14 shows the open-loop gain of this frequency loop,considering gain variations (VCR gain variations, and Vin andVout range variations). The frequency loop regulator is a dcgain with a pole. Alternatively, an integrator (type-I regulator)should be used to avoid dc error in the frequency regulator.

VI. EXPERIMENTAL RESULTS

A discrete buck converter at 5 MHz of switching fre-quency is presented. The input specifications for this exampleare Vin = 4 V, Vout = 1.5 to 2.5 V, Cout = 4 µF, ESR =4.5 mΩ, ESL = 450 pH, and fsw = 5 MHz. The transim-pedance amplifier used for the current sensor design is AD8061(ΔBMEASURED = 150 MHz). The hysteretic comparator isLMV7219, and the selected VCR is VCR2N (JFET VCR).Experimental results show proper operation of the proposedscheme during voltage step. Fig. 15 shows a very fast voltagestep from 1.5 to 2.5 V and from 2.5 to 1.5 V in 2 µs. VS is


Fig. 15. Voltage step (Vref) from 1.5 to 2.5 V within 2 µs (1 µs/div), Vout

(500 mV/div), and IL (5 A/div).

Fig. 16. Frequency loop adjusts the hysteretic band to keep fsw at 5 MHz.Voltage step (Vref) from 1.5 to 2.5 V, Vout (500 mV/div), and Verror (1 V/div).

the output of the current sensor, and it shows an appropriatecurrent measurement for a fast transient response. Therefore,experimental results validate the current sensor design for avery fast transient response. The asymmetry in the transientresponse is due to the saturation of the current sensor duringpositive voltage reference step. As a result, an overshoot in theoutput voltage of 250 mV is observed.

The variations in Vout produce frequency deviation. Fig. 16shows how the frequency loop command adjusts the hystereticband in order to keep the switching frequency constant. Thedynamic response of the frequency loop is slow, taking 4 s toadjust the hysteretic band to the new steady state. It is importantto highlight that the frequency loop is not affecting the fastresponse of current and voltage loops during the voltage steps.

Regulation under a 45-A/µs load step is shown in Fig. 17.Despite the relatively small output capacitor of 4 µF(4 × 1 µF),a 1.7-A load step results in an output voltage deviation of only50 mV. The output voltage recovers the steady state in 1.2 µs.The frequency loop does not interact with the other loops duringthe transient.

Fig. 18 shows how the frequency loop regulates to keepthe switching frequency constant when the output voltage isstepping up and down every 40 s. Fig. 19 shows the samewaveforms than Fig. 18; however, just showing the detail ofa time interval where the voltage is constant at 1.5 V, frequencyis not oscillating, and it is 5 MHz permanently.

VII. CONCLUSION

The nonlinear and linear control techniques proposed in [1]and [2] have very fast dynamic response. However, these meth-

Fig. 17. Regulation under 1-A (45-A/µs) load step (400 ns/div), Vout

(50 mV/div), and load current (1 A/div).

Fig. 18. Frequency loop adjusts the hysteretic band to keep fsw at 5 MHz.Voltage step (Vref) from 1.5 to 2.5 V, Vout (500 mV/div), Verror (1 V/div),and timescale (20 s/div).

Fig. 19. Steady-state waveforms when the output voltage is 1.5 V. Frequencykeeps constant at 5 MHz. Vout (500 mV/div), Verror (1 V/div), and timescale(400 ns/div).

ods suffer from variable frequency. In this paper, the influenceof parameters that modify the switching frequency has beenanalyzed. An additional frequency loop has been proposed to


avoid frequency deviation. Therefore, the frequency loop makesfeasible the use of this nonlinear control technique operating atconstant fsw.

The proposed control strategy has presented very fast tran-sient response for load and voltage steps. This control techniqueis suitable for applications where the behavior of the outputcapacitor is dominated by the ESR and is also appropriate forvery high frequency applications (5 MHz) where the ESL isdominant. Other control techniques, like V 2, also present veryfast transient response, although they are more appropriate forconverters with ESR dominant output capacitors.

The main limitation of the proposed technique is that theregulation capability of the frequency loop should be wideenough to cover all the tolerances and parameter variations fora specific application. It is very important to highlight that theuse of the noninvasive current sensor proposed in [1] and [2] iscritical to achieve the good performance of the proposed controlstrategy.

The frequency loop is designed to guarantee no interactionwith the fast current and voltage loops. Experimental resultsshow a very fast dynamic response in buck converter (stepvoltage of 1.5 to 2.5 V and from 2.5 to 1.5 V in 2 µs).

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Santa Concepción Huerta (S’05–M’10) was bornin Santa Cruz de Juventino Rosas, Mexico, in 1981.She received the B.Eng. degree in electronic engi-neering from the Instituto Tecnologico de Celaya,Celaya, Mexico, in 2003 and the Ph.D. degree inelectronic engineering from the Universidad Politéc-nica de Madrid, Madrid, Spain, in 2009.

Since 2009, she has been a Postdoctoral Fellowwith Toronto Rehabilitation Institute, Toronto, ON,Canada, and the University of Toronto, Toronto. Herresearch interests include low-voltage fast transient

response dc–dc converters, digital control of switching mode power sup-plies, power electronics, biomedical applications, and dynamic voltage scalingtechniques.


Pedro Alou (M’07) was born in Madrid, Spain, in1970. He received the M.S. and Ph.D. degrees inelectrical engineering from the Universidad Politéc-nica de Madrid (UPM), Madrid, in 1995 and 2004,respectively.

Since 1997, he has been a Professor with UPM. Hehas been involved in Power Electronics since 1995,participating in more than 40 research and develop-ment projects. He has published over 70 technicalpapers and is the holder of three patents. His mainresearch interests are in power supply systems and

topologies, advanced control techniques, and modeling. His research activity isdistributed among industrial, aerospace, and military projects.

Jesús Á. Oliver (M’00) was born in Toledo, Spain,in 1972. He received the M.S. and Ph.D. degrees inelectrical engineering from the Universidad Politéc-nica de Madrid (UPM), Madrid, Spain, in 1996 and2007 respectively.

In 1996, he was a Visiting Scholar at the Cen-ter for Power Electronics Systems, Virginia Tech,Blacksburg, and in 2000, he held a summer intern-ship at GE R&D, Schenectady, NY. In 2001, he be-came an Assistant Professor of electrical engineeringwith UPM and has been an Associate Professor since

2007. He has published over 60 technical papers and is the holder three patents.He has been actively involved in over 25 R&D projects for companies inEurope, the U.S., and Australia. His research activities include modeling andcontrol of power electronics converters and systems, fuel-cell-powered systems,and energy-efficient design.

Oscar García (M’99) was born in Madrid, Spain,in 1968. He received the M.S. and Ph.D. degrees inelectronic engineering from the Universidad Politéc-nica de Madrid (UPM), Madrid, in 1992 and 1999respectively.

He is an Associate Professor with UPM. He hasbeen involved in about 50 research projects, is theholder of five patents, and has published more than140 papers in IEEE conferences and journals.

Dr. García received the UPM Research andDevelopment Award for faculty less than 35 years

(in 2003) and the UPM Innovation in Education Award in 2005. He is the Vice-President of the Center for Industrial Electronics (CEI-UPM) and is a memberof the IEEE Power Electronics Society–Industrial Electronics Society SpanishChapter.

José A. Cobos (M’92) received the M.S. and Ph.D.degrees in electrical engineering from the Universi-dad Politécnica de Madrid (UPM), Madrid, Spain, in1989 and 1994, respectively.

Since 2001, he has been a Professor with UPM,where he is currently the Vice Dean of the EscuelaTécnica Superior de Ingenieros Industriales. His con-tributions are focused in the field of power supplysystems for telecommunication, aerospace, automo-tive, and medical applications. His research interestsinclude low output voltage, magnetic components,

piezoelectric transformers, transcutaneous energy transfer, and dynamic powermanagement. He has published over 150 technical papers and is the holderof three patents. He has been actively involved in over 40 R&D projects forcompanies in Europe, the U.S., and Australia.

Dr. Cobos served as an AdCom member of the IEEE Power ElectronicsSociety (PELS) and the Chair of the Technical Committee on DC PowerSystems. He is serving as an Associate Editor of the IEEE TRANSACTIONS IN

POWER ELECTRONICS (IEEE-PELS). He received several awards, includingthe UPM Research and Development Award for faculty less than 35 years ofage and the Richard Bass Outstanding Young Power Electronics Award of theIEEE (in 2000).

Ahmed M. Abou-Alfotouh received the B.Sc. andM.Sc. degrees from Kuwait University, Kuwait City,Kuwait, in 1995 and 1998, respectively, and thePh.D. degree from the University of Kentucky,Lexington, in 2004.

From 1995 to 2000, he was a Scientific Engineerand a Laboratory Engineer with Kuwait Univer-sity. Since 2004, he has been with Enpirion, Inc.,Hampton, NJ, where he is currently the Systems Ar-chitecture Group Manager. His research interest in-clude power electronics power conversion, dc-to-dc

converter control, and power semiconductor device physics.

Nonlinear control for dc–dc converters based on hysteresis of the current with a frequency loop to operate at constant frequency

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