8/2/2019 Noise Analysis and Modeling
1/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-1
Noise Analysis and Modeling Circuit noise
1. interference noise
2. inherent noise
Interference noise
result from interaction between circuit and outside world or
between different parts of circuit itself.
examples :
(i) power supply noise on ground wires.
(ii) electromagnetic interference between wires.
can be reduced by careful circuit wiring or layout
Inherent noise
refers to random noise signals that can be reduced butnever eliminated since this noise is due to fundamental
properties of circuits.
8/2/2019 Noise Analysis and Modeling
2/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-2
Noise Analysis and Modeling (Cont.)
examples :
thermal noise and flicker noise
only moderately affected by circuit wiring or layout, suchas using multiple contact to change resistance value of atransistor. However, inherent noise can be significantlyreduced through proper circuit design, such as changing
the circuit structure or increasing bias current.
Only inherent noise will be discussed in the following
8/2/2019 Noise Analysis and Modeling
3/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-3
Time-Domain Analysis
Assumption : All noise signals have a mean value of zero.This assumption is valid in most physical systems.
Root mean square(rms) voltage value is defined as
rms current is defined as
Typically, a longer T gives a more accurate rmsmeasurement
Normalized noise power, pdiss
Vn(t) is applied to a 1 resistor
or Pdiss =
2/1T
0
2
nn(rms) dt](t)VT
1
[V
2
n(rms)
2n(rms)
diss V1
VP
2
n(rms)
2
n(rms) I
1I
2/1T
0
2nn(rms) dt](t)I
T
1[I
8/2/2019 Noise Analysis and Modeling
4/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-4
Time-Domain Analysis (Cont.)
Signal-to noise ratio(SNR), dBSNR=10
Example : normalized signal power =
normalized noise power =
dBm
dB units relate the relative ratio of two power levels
For dBm units, all power levels are referenced by1mW
Examples : 1mW = 0dBm and 1W = -30dBm
It is common to reference the voltage level to either a50 or 75 resistorexample:
]V
Vlog[]
V
Vlog[SNR
)rms(n
)rms(x
)rms(n
)rms(x2010
2
2
dBm
mW
V rmsn
1
50log10
2)(
dBmmW
I rmsn
1
50log10
)(2
or 75
or
when Vx(rms)=Vn(rms), SNR=0dB
]log[powernoise
powersignal
2)rms(xV
2
)rms(n
V
8/2/2019 Noise Analysis and Modeling
5/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-5
Noise Summation
Noise sources Vn1(t),Vn2(t),Vn3(t),.
Total noise Vn0(t)= Vn1(t)+Vn2(t)+Vn3(t)+
Example : summation of 2 noise sources
- Voltage noises - Current noises)t(ino
)t(in1 )t(in2
)t(V 1n
)t(V 2n
)t(Vno
)rms(n)rms(n)rms(n)rms(n
T T
nn)rms(n)rms(nnn)rms(no
VCVVV
dt)t(V)t(VT
VVdt)t(V)t(VT
V
2122
21
0 021
22
21
2
212
2
21
)t(V)t(V)t(Vnnno 21
8/2/2019 Noise Analysis and Modeling
6/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-6
Noise Summation (Cont.)
Correlation coefficient
where -1C1
C = 1; the two noise signals are fully correlatedC = 0 ; the two noise signals are fully uncorrelated
Typically, different inherent noise sources are uncorrelated
For two uncorrelated noise signals
V2no(rms)=V2n1(rms)+ V
2n2(rms)
For two fully correlated noise signals
V2no(rms)=[Vn1(rms) Vns(rms)]2
To reduce overall noise, concentrate on the reduction oflarge noise signals.
)rms(n)rms(n
Tnn
VV
dt)t(V)t(VTC
21
0 211
8/2/2019 Noise Analysis and Modeling
7/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-7
Frequency-Domain Analysis
Units of Hz(rather than radians/sec) are commonly used Noise spectral density
periodic signals(e.g. sinusoid) have power at distinct
frequency random signals have their power spread out over the
frequency spectrum
Example
Time-domain signal
0 2.0 4.0 6.0 8.0
3.0
2.01.00
1.02.0
)(sTime
)(fVn
8/2/2019 Noise Analysis and Modeling
8/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-8
Frequency-Domain Analysis (Cont.)
Spectral density
Root spectral density
Vertical axis is a measureof the normalized noise
power over 1 Hz
bandwidth at eachfrequency point
1.0 100.1 100 000,1
0.1
16.3
10
6.31
Hz
V
)(fVn
1.0 100.1 100 000,1
0.1
10
100
000,1
Hz
)V( 2
Hz
)(2 fVn
Hz
8/2/2019 Noise Analysis and Modeling
9/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-9
Frequency-Domain Analysis (Cont.)
Resolution Bandwidth(RBW) V2/Hz use 1Hz bandwidth => normalized Mean-squared value of a random signal at a precise
frequency is zero.
Random-noise power must be measured over a specificbandwidth.
Example1: Normalized power between 99.5Hz and100.5Hz is 10(v)2---shown in previous page
Example2: Mean-squared value of noise power at100Hz is 1(v)2 when 0.1Hz is used
=> Mean-squared value measured at 100Hzis directly proportional to the bandwidth of the
bandpass filter used for measurement Total mean-squared power
0
22 df)f(VV n)rms(n
0
22 df)f(II n)rms(n
8/2/2019 Noise Analysis and Modeling
10/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-10
Noise Types in CMOS transistor
Two major sources Thermal, or white noise
flat spectrum density
Vn(f)=Vnw is a constant Flicker, or 1/f noise
Spectrum density is inversely proportional to frequencyVn2(f)= /f where Kv is a constant.
The intersection of flicker and white noise curves iscalled 1/f noise corner
Spectral density
2vK
26262n )101(
f
)102.3()f(V
2.3V)f(V nwn HzV
1.0 0.1 10 100
0.1
2.3
10
)(fVn
Hz
Hz
V
1/f noisedomnates
White noisedominates
Hz
V
1,000
8/2/2019 Noise Analysis and Modeling
11/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-11
Noise in MOSFET
Thermal noise ( white noise caused by random thermalmotion of electron) Noise power
Real Resistor Rmean square VnT:
f: bandwidth in which the noise is measured, in Hz4kT, at room temperature, is equal to 1.661020VC
MOSFET
If the device is in saturation, then
frequencyfkTR4V2
nT
m
gR2
31
f cant be infinite, could be assumed up to
several hundred MHz for MOSFET. Since,
for very high frequency (1012Hz), other
physical phenomena enter which cause
to decrease with increasing frequency.
fVmm
nT
gkT
g
i
nT 3822 )(
~VnT
inT2nV
8/2/2019 Noise Analysis and Modeling
12/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-12
Noise in MOSFET (Cont.)
Flicker Noise (1/f)In an MOS transistor, extra electron energystates exist at boundary between the Si and SiO2. These can
trap and release electrons from the channel, and henceintroduce noise. Since the process is relatively slow, most of
the noise energy will be at low frequency.
Noise power
f
f
f
WLC
kV
ox
nf
2
Thermal noise + Flicker noise
where G is the noise conductance
The mean squares of the noise currents are added, since thedifferent noise mechanism are statistically independent.
infgWLfC
K
g
KTiii m
oxm
nfnTn
222
3
8
8/2/2019 Noise Analysis and Modeling
13/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-13
Filtered Noise
Noise amplification and filtering
spectral density
: input noise spectral density
: output noise spectral density
root spectral density
)()()( fVfjAfV nino222
2)(fVni)(fVno
)(fVni2
)()()( fVfjAfV nino222 2
)()()( fVfjAfV nino 2
)s(A
8/2/2019 Noise Analysis and Modeling
14/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-14
Filtered Noise (Cont.)
Total output mean-squared value
Summation of multiple filtered uncorrelated noise sources
Example : 3 sources
)f(V 1n
)f(V 2n
)f(V 3n
21
321
222 )](|)(|[)(,,
fVfjAfVi niino
)s(A1
)s(A2
)s(A3
Uncorrelated
noise sources
0
222 2 df)f(V)fj(AV ni)rms(no
n
i
niino )f(V)j(A)f(V1
222 2
8/2/2019 Noise Analysis and Modeling
15/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-15
Noise Bandwidth
The noise bandwidth of a given filter is equal to the frequencyspan of a brick wall filter that has the same output noise rmsvalue that the given filter has when white noise is applied toboth filters. (Peak gains are the same for the given and brick-
wall filters.) Example : a 1st-order lowpass response with a 3 dB
bandwidth of fo(Such a response would occur
from a RC filter with )
input signal Vni(f)=Vnw (White noise)
1. For the response A(s)= ,
2. For brick-wall filter with fx bandwidth,
3. From 1 and 2, noise bandwidth fx=
RC2
1fo
of2
s1
1
2fV
df
)f
f(1
VV o
2nw
0 2
o
2nw2
)rms(no
2
fo
xnw
f
nw)rms(no fVdfVVx 2
0
22
8/2/2019 Noise Analysis and Modeling
16/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-16
Noise Bandwidth (Cont.)
)f(Vni
KR 1
F159.0C RC2
1f0
)f(Vno
|)f2j(A| brick
100
fo10
f oof
ox f2
f
0
20
)(dB
|)f2j(A|
100
fo10
ofof of10
0
20
)(dB
Hz
nv
0.1 10 100 310 410
20
-20dB/decade
f
)(fVn
0f2s1
1)s(A
8/2/2019 Noise Analysis and Modeling
17/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-17
Noise Bandwidth (Cont.)
For a RC filter
KT/C noise
SC sampling circuit
circuit noise model
Vi=0 is assumed
RCfo 2 1 RCfx 4 1and
iV
oV
clock
iV oV
noiseless resistor
eqR
C
KT
CR
KTRV
eq
eq
)rms(o 4
42
C
eq2R KTR4V
8/2/2019 Noise Analysis and Modeling
18/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-18
Approximate Noise Calculation
Piecewise integration of noise
simplify integration formulas
integrate noise power
in different frequency
regions and then
add together
example)f(Vni )f(Vno
)f(Vno
)Hz
nV(
1N 2N 3N 4N
)Hz(frequency
curvef
1
)f(Vni
)Hz
nV(202
200
)Hz(frequency
200
20
|)f2j(A| )(dB
765432 101010101010101
765432 101010101010101
765432 1010101010101012
02200
)s(A
8/2/2019 Noise Analysis and Modeling
19/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-19
Approximate Noise Calculation (Cont.)
The noise power in the N4 region is quite close to the totalnoise power. Thus, in practice, there is little need to find the
noise contributions in N1~N3 regions. Such an observationleads us to the 1/f noise tangent principle.
)(....
)()()()()(
nv1088510331106310841
dffVdffVdffVdffVV
21
9855
21
100
1
10
100
10
10 10
2no
2no
2no
2normso
3 4
3 4
8/2/2019 Noise Analysis and Modeling
20/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-20
Approximate Noise Calculation (Cont.)
1/f noise tangent principle
To determine the frequency region or regions that
contribute to dominant noise, lower a 1/f noise line until
it touches the spectral density curve --- The total noisecan be approximated by the noise in the vicinity of the1/f line.
The reason this simple rule works is that a curveproportional to 1/x results in equal power over eachdecade of frequency. Therefore, by lowering this
constant power/frequency curve, the largest power
contribution will touch it first.
8/2/2019 Noise Analysis and Modeling
21/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-21
Noise Models for Circuit Elements
Three main noise mechanisms1. Thermal noise
white noise
2. Shot noise occurs in pn junctions
white noise
3. Flicker noise 1/f noise
Resistor noise
thermal noise is the major noise source spectral density VR
2(f) or IR2(f)
8/2/2019 Noise Analysis and Modeling
22/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-22
Noise Models for Circuit Elements (Cont.)
1. Series voltage noise sourceVR2(f)=4KTR
where K is Boltzmamns constant (1.38x10-23JK-1)
T is temperature in Kelvin's
R is the resistance value
2. Parallel current noise source
Diode noise
short noise
Vd2(f)=2KTrd
where
Capacitors and inductors do not generate noise
R
KT
R
(f)V(f) R
R
42
22 I
DDT
SDST
SDT
DDDd
qKTVV)ln(VVrIIII
I
I
I
II
1
D
d
dd
qr
(f)V(f) II 2
2
22
8/2/2019 Noise Analysis and Modeling
23/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-23
Noise Models for Circuit Element (Cont.)
OPAMPs
Bipolar OPAMP CMOS OPAMP
(All noise sources are uncorrelated)
)(fIn2
)(fVn2
)(fIn2
NoiselessNoiseless
)(fVn2
8/2/2019 Noise Analysis and Modeling
24/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-24
Noise Models for Circuit Element (Cont.)
Element Noise Models
Resistor
R
(Noiseless)
Diode
Forward(Biased)
R
KTfR
42 )(I
Dd
q
KTr
I
D2d KTr2)f(V
Ddq(f) II 22 D
dqI
KTr
(Noiseless)
R (Noiseless)
KTR)f(VR 42
R
(Noiseless)
8/2/2019 Noise Analysis and Modeling
25/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-25
Noise Models for Circuit Element (Cont.)
)
)f(f
Kq((f)
)g
KT(r(f)V
CBBi
mbi
22
2
2
2
14
IIII
(Activeregion)
MOSFET
(Activeregion)
)f(V 2g
)f(I2d
)f(V 2i
Noiseless
foxWLC
K
mg
1)
3
2(KT4)f(
2iV
simplified model for low andmoderate frequencies
BJT
)f(I2i
Noiseless)f(V2
i
Opamp )(Noiseless)(),(),( fIfIfV nnn
Value depends on opamp
typically, all uncorrelated
md
ox
g
gkTfI
fWLC
KfV
)3
2(4)(
)(
2
2
)(fIn2
)(fVn2
)f(In2
8/2/2019 Noise Analysis and Modeling
26/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-26
OPAMP example a lowpass filter equivalent noise model
assuming all noise sources are uncorrelated
using superposition1. due to , , and
2. due to , , and
3.
Noise Analysis Examples
)f(V2 1no )f(n1I )f(nfI )f(nI
)f(V2 2no )f(nI )f(V 2n )f(Vn
)f(V)f(V)f(V
2
2no
2
1no
2
no
fC
2R
1R
1nI nI
nI
fR
nfI
nV2nV
)f(Vno
1RfR
fC
2R
iV oV
8/2/2019 Noise Analysis and Modeling
27/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-27
Noise Analysis Examples (Cont.)
Vno12 (f)
Vno2
2(f)
ff
ftotal
f
f
totaloCSR
R
SCR
V
11
1II
2
122
2
2
2
22
221
1)]()()([)(ff
f
nnnnoCfRj
RR
fVfVRffV
I
22
0
21
22)rms(no)rms(nono)rms(no VVdf)f(VV
1R fR
fC
totalVoV
oV
totalI
fC
fR
ff
f
totaloCSR
RR
VV1
1 1
2
f2
n
2
nf
2
n1
2
no1j21
R(f)I(f)I(f)I(f)V
ffCfR
8/2/2019 Noise Analysis and Modeling
28/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-28
Noise Analysis Examples (Cont.)
CMOS examples a differential input stage
assuming
Q1 and Q2 are identicalQ3 and Q4 are . identical
3
5
5
343
121
23
2
1
m
m
n
no
omn
no
n
no
omn
no
n
no
gg|
VV|)(
Rg|V
V||
V
V|)(
Rg|
V
V||
V
V|)(
(The drain of Q2 will
track that of Q1)
inV
inV
biasV
42 dsdso r//rR
)output(
552
1nm Vg 552
1nm Vg
55 nmVg
Q5
Q2Q1
Q3 Q4
2nV1nV
4nV3nV
5nV DDV
oV
SSV
5nV
8/2/2019 Noise Analysis and Modeling
29/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-29
Noise Analysis Examples (Cont.)
Since (3) is relative small compared to the others, it can beignored.
Equivalent input noise
For the white noise portion, i.e. thermal noise
)f(n
V)oRmg()f(nV)oRmg()f(noV
23
232
21
212
2
2)
1mg
3mg
)(f(2
3nV2)f(21nV22)oR1mg(
)f(2noV
)f(2neqV
,mi
g
1
3
2KT4f
2thermalniVassuming ))(()()(
)s(A )s(A
)(
)(
fA
fVno equivalent
Input noise
iV iVoV
)f(Vno
)()()()()(
3m
g
12
1m
g3m
gKT
3
16
1m
g
1KT
3
16f2
thermalneqV
oV
8/2/2019 Noise Analysis and Modeling
30/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-30
Noise Analysis Examples (Cont.)
gm1 should be made as large as possible to minimize
thermal noise contribution.
For flicker (1/f) noise portion
assuming
Diiimi )L
w(Coxg I2
]LW
LK)(
LW
K[
fC)f(V
fCLW
K)f(V
p
n
ox
ker)flic(neq
oxii
iker)flic(ni
231
13
11
12
2
2
. (4.101)
p
n
nnker)flic(neq)
LW(
)L
W(
)f(V)f(V)f(V1
32
3
2
1
2
22
8/2/2019 Noise Analysis and Modeling
31/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-31
Noise Analysis Examples (Cont.)
Recall that the first term in (4.101) is due to the p-channelinput transistors, Q1 and Q2, and the second term is due tothe n-channel loads, Q3 and Q4 . We note some points for 1/f
noise here:1. For L1=L3 , the noise of the n-channel loads dominate
since and typically n-channel transistors have
larger 1/f noise than p-channel transistors (i.e. , K3 > K1).2. Taking L3 longer greatly helps due to the inverse squared
relationship in the second term of (4.101). This limits the
signal swings somewhat, but it may be a reasonably
trade-off where low noise is important.
3. The input noise is independent of W3, and therefore we
can make it large to maximize signal swing at the output.
pn
8/2/2019 Noise Analysis and Modeling
32/32
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 20114-32
Noise Analysis Examples (Cont.)
4. Taking W1 wider also helps to minimize 1/f noise.(Recall that it helps white noise, as well.)5. Taking L1 longer increases the noise because the
second term in (4.101) is dominant. Specifically, this
decreases the input-referred noise of the p-channeldrive transistors , which are not the dominate noisesources, but it also increases the input-referred noise ofthe n-channel load transistors, which are the dominant
noise sources !Total rms input noise, Vneq(rms.)
2 , integrated from f1 to f2.
)ff)](gm
()gm
gm(kT)
gm(kT[ 12
3
2
1
3
1
1
3
161
3
16
)]Lw
L)((a
Lw
a[
p
nn
p
2
31
1
112
1
2;f
f
c
kawhere
ox
ii ln
dffVfVVf
fflicneqthermalneqrmsneq
2
1
2 )()( ker)()()(